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1 | /** @file\r |
2 | Protected Processor Inventory Number(PPIN) feature.\r | |
3 | \r | |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "CpuCommonFeatures.h"\r | |
16 | \r | |
17 | /**\r | |
18 | Detects if Protected Processor Inventory Number feature supported on current \r | |
19 | processor.\r | |
20 | \r | |
21 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
22 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
23 | structure for the CPU executing this function.\r | |
24 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
25 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
26 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
27 | RegisterCpuFeature().\r | |
28 | \r | |
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29 | @retval TRUE Protected Processor Inventory Number feature is supported.\r |
30 | @retval FALSE Protected Processor Inventory Number feature is not supported.\r | |
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31 | \r |
32 | @note This service could be called by BSP/APs.\r | |
33 | **/\r | |
34 | BOOLEAN\r | |
35 | EFIAPI\r | |
36 | PpinSupport (\r | |
37 | IN UINTN ProcessorNumber,\r | |
38 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
39 | IN VOID *ConfigData OPTIONAL\r | |
40 | )\r | |
41 | {\r | |
42 | MSR_IVY_BRIDGE_PLATFORM_INFO_1_REGISTER PlatformInfo;\r | |
43 | \r | |
44 | if ((CpuInfo->DisplayFamily == 0x06) && \r | |
45 | ((CpuInfo->DisplayModel == 0x3E) || // Xeon E5 V2\r | |
46 | (CpuInfo->DisplayModel == 0x56) || // Xeon Processor D Product\r | |
47 | (CpuInfo->DisplayModel == 0x4F) || // Xeon E5 v4, E7 v4\r | |
48 | (CpuInfo->DisplayModel == 0x55) || // Xeon Processor Scalable\r | |
49 | (CpuInfo->DisplayModel == 0x57) || // Xeon Phi processor 3200, 5200, 7200 series.\r | |
50 | (CpuInfo->DisplayModel == 0x85) // Future Xeon phi processor \r | |
51 | )) {\r | |
52 | //\r | |
53 | // Check whether platform support this feature.\r | |
54 | //\r | |
55 | PlatformInfo.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PLATFORM_INFO_1);\r | |
56 | return (PlatformInfo.Bits.PPIN_CAP != 0);\r | |
57 | }\r | |
58 | \r | |
59 | return FALSE;\r | |
60 | }\r | |
61 | \r | |
62 | /**\r | |
63 | Initializes Protected Processor Inventory Number feature to specific state.\r | |
64 | \r | |
65 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
66 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
67 | structure for the CPU executing this function.\r | |
68 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
69 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
70 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
71 | RegisterCpuFeature().\r | |
72 | @param[in] State If TRUE, then the Protected Processor Inventory \r | |
73 | Number feature must be enabled.\r | |
74 | If FALSE, then the Protected Processor Inventory \r | |
75 | Number feature must be disabled.\r | |
76 | \r | |
77 | @retval RETURN_SUCCESS Protected Processor Inventory Number feature is \r | |
78 | initialized.\r | |
79 | @retval RETURN_DEVICE_ERROR Device can't change state because it has been \r | |
80 | locked.\r | |
81 | \r | |
82 | **/\r | |
83 | RETURN_STATUS\r | |
84 | EFIAPI\r | |
85 | PpinInitialize (\r | |
86 | IN UINTN ProcessorNumber,\r | |
87 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
88 | IN VOID *ConfigData, OPTIONAL\r | |
89 | IN BOOLEAN State\r | |
90 | )\r | |
91 | {\r | |
92 | MSR_IVY_BRIDGE_PPIN_CTL_REGISTER MsrPpinCtrl;\r | |
93 | \r | |
94 | //\r | |
95 | // Check whether device already lock this register.\r | |
96 | // If already locked, just base on the request state and\r | |
97 | // the current state to return the status.\r | |
98 | //\r | |
99 | MsrPpinCtrl.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PPIN_CTL);\r | |
100 | if (MsrPpinCtrl.Bits.LockOut != 0) {\r | |
101 | return MsrPpinCtrl.Bits.Enable_PPIN == State ? RETURN_SUCCESS : RETURN_DEVICE_ERROR;\r | |
102 | }\r | |
103 | \r | |
104 | CPU_REGISTER_TABLE_WRITE_FIELD (\r | |
105 | ProcessorNumber,\r | |
106 | Msr,\r | |
107 | MSR_IVY_BRIDGE_PPIN_CTL,\r | |
108 | MSR_IVY_BRIDGE_PPIN_CTL_REGISTER,\r | |
109 | Bits.Enable_PPIN,\r | |
110 | (State) ? 1 : 0\r | |
111 | );\r | |
112 | \r | |
113 | return RETURN_SUCCESS;\r | |
114 | }\r |