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1 | #------------------------------------------------------------------------------\r |
2 | #\r | |
3 | # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
4 | # This program and the accompanying materials\r | |
5 | # are licensed and made available under the terms and conditions of the BSD License\r | |
6 | # which accompanies this distribution. The full text of the license may be found at\r | |
7 | # http://opensource.org/licenses/bsd-license.php.\r | |
8 | #\r | |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | #\r | |
12 | # Module Name:\r | |
13 | #\r | |
14 | # SmiEntry.S\r | |
15 | #\r | |
16 | # Abstract:\r | |
17 | #\r | |
18 | # Code template of the SMI handler for a particular processor\r | |
19 | #\r | |
20 | #------------------------------------------------------------------------------\r | |
21 | \r | |
22 | ASM_GLOBAL ASM_PFX(gcSmiHandlerTemplate)\r | |
23 | ASM_GLOBAL ASM_PFX(gcSmiHandlerSize)\r | |
24 | ASM_GLOBAL ASM_PFX(gSmiCr3)\r | |
25 | ASM_GLOBAL ASM_PFX(gSmiStack)\r | |
26 | ASM_GLOBAL ASM_PFX(gSmbase)\r | |
427e3573 MK |
27 | ASM_GLOBAL ASM_PFX(gSmiHandlerIdtr)\r |
28 | \r | |
29 | #\r | |
30 | # Constants relating to PROCESSOR_SMM_DESCRIPTOR\r | |
31 | #\r | |
32 | .equ DSC_OFFSET, 0xfb00\r | |
33 | .equ DSC_GDTPTR, 0x30\r | |
34 | .equ DSC_GDTSIZ, 0x38\r | |
35 | .equ DSC_CS, 14\r | |
36 | .equ DSC_DS, 16\r | |
37 | .equ DSC_SS, 18\r | |
38 | .equ DSC_OTHERSEG, 20\r | |
39 | #\r | |
40 | # Constants relating to CPU State Save Area\r | |
41 | #\r | |
42 | .equ SSM_DR6, 0xffd0\r | |
43 | .equ SSM_DR7, 0xffc8\r | |
44 | \r | |
45 | .equ PROTECT_MODE_CS, 0x08\r | |
46 | .equ PROTECT_MODE_DS, 0x20\r | |
47 | .equ LONG_MODE_CS, 0x38\r | |
48 | .equ TSS_SEGMENT, 0x40\r | |
49 | .equ GDT_SIZE, 0x50\r | |
50 | \r | |
51 | .text\r | |
52 | \r | |
53 | ASM_PFX(gcSmiHandlerTemplate):\r | |
54 | \r | |
55 | _SmiEntryPoint:\r | |
56 | #\r | |
57 | # The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-\r | |
58 | # bit addressing mode. And that coincidence has been used in the following\r | |
59 | # "64-bit like" 16-bit code. Be aware that once RDI is referenced as a\r | |
60 | # base address register, it is actually BX that is referenced.\r | |
61 | #\r | |
62 | .byte 0xbb # mov bx, imm16\r | |
63 | .word _GdtDesc - _SmiEntryPoint + 0x8000\r | |
64 | #\r | |
65 | # fix GDT descriptor\r | |
66 | #\r | |
67 | .byte 0x2e,0xa1 # mov ax, cs:[offset16]\r | |
68 | .word DSC_OFFSET + DSC_GDTSIZ\r | |
69 | .byte 0x48 # dec ax\r | |
70 | .byte 0x2e\r | |
71 | movl %eax, (%rdi) # mov cs:[bx], ax\r | |
72 | .byte 0x66,0x2e,0xa1 # mov eax, cs:[offset16]\r | |
73 | .word DSC_OFFSET + DSC_GDTPTR\r | |
74 | .byte 0x2e\r | |
75 | movw %ax, 2(%rdi)\r | |
76 | .byte 0x66,0x2e\r | |
77 | lgdt (%rdi)\r | |
78 | #\r | |
79 | # Patch ProtectedMode Segment\r | |
80 | #\r | |
81 | .byte 0xb8\r | |
82 | .word PROTECT_MODE_CS\r | |
83 | .byte 0x2e\r | |
84 | movl %eax, -2(%rdi)\r | |
85 | #\r | |
86 | # Patch ProtectedMode entry\r | |
87 | #\r | |
88 | .byte 0x66, 0xbf # mov edi, SMBASE\r | |
89 | ASM_PFX(gSmbase): .space 4\r | |
90 | lea ((ProtectedMode - _SmiEntryPoint) + 0x8000)(%edi), %ax\r | |
91 | .byte 0x2e\r | |
92 | movw %ax, -6(%rdi)\r | |
93 | #\r | |
94 | # Switch into ProtectedMode\r | |
95 | #\r | |
96 | movq %cr0, %rbx\r | |
97 | .byte 0x66\r | |
98 | andl $0x9ffafff3, %ebx\r | |
99 | .byte 0x66\r | |
100 | orl $0x00000023, %ebx\r | |
101 | \r | |
102 | movq %rbx, %cr0\r | |
103 | .byte 0x66, 0xea\r | |
104 | .space 6\r | |
105 | \r | |
106 | _GdtDesc: .space 6\r | |
107 | \r | |
108 | ProtectedMode:\r | |
109 | movw $PROTECT_MODE_DS, %ax\r | |
110 | movl %eax, %ds\r | |
111 | movl %eax, %es\r | |
112 | movl %eax, %fs\r | |
113 | movl %eax, %gs\r | |
114 | movl %eax, %ss\r | |
115 | .byte 0xbc # mov esp, imm32\r | |
116 | ASM_PFX(gSmiStack): .space 4\r | |
117 | jmp ProtFlatMode\r | |
118 | \r | |
119 | ProtFlatMode:\r | |
120 | .byte 0xb8\r | |
121 | ASM_PFX(gSmiCr3): .space 4\r | |
122 | movq %rax, %cr3\r | |
123 | movl $0x668,%eax # as cr4.PGE is not set here, refresh cr3\r | |
124 | movq %rax, %cr4 # in PreModifyMtrrs() to flush TLB.\r | |
125 | # Load TSS\r | |
126 | subl $8, %esp # reserve room in stack\r | |
127 | sgdt (%rsp)\r | |
128 | movl 2(%rsp), %eax # eax = GDT base\r | |
129 | addl $8, %esp\r | |
427e3573 MK |
130 | movb $0x89, %dl\r |
131 | movb %dl, (TSS_SEGMENT + 5)(%rax) # clear busy flag\r | |
132 | movl $TSS_SEGMENT, %eax\r | |
133 | ltr %ax\r | |
134 | \r | |
135 | #\r | |
136 | # Switch to LongMode\r | |
137 | #\r | |
138 | pushq $LONG_MODE_CS # push cs hardcore here\r | |
139 | call Base # push return address for retf later\r | |
140 | Base:\r | |
141 | addl $(LongMode - Base), (%rsp) # offset for far retf, seg is the 1st arg\r | |
142 | movl $0xc0000080, %ecx\r | |
143 | rdmsr\r | |
144 | orb $1,%ah\r | |
145 | wrmsr\r | |
146 | movq %cr0, %rbx\r | |
53ba3fb8 | 147 | orl $0x080010000, %ebx # enable paging + WP\r |
427e3573 MK |
148 | movq %rbx, %cr0\r |
149 | retf\r | |
150 | LongMode: # long mode (64-bit code) starts here\r | |
151 | movabsq $ASM_PFX(gSmiHandlerIdtr), %rax\r | |
152 | lidt (%rax)\r | |
153 | lea (DSC_OFFSET)(%rdi), %ebx\r | |
154 | movw DSC_DS(%rbx), %ax\r | |
155 | movl %eax,%ds\r | |
156 | movw DSC_OTHERSEG(%rbx), %ax\r | |
157 | movl %eax,%es\r | |
158 | movl %eax,%fs\r | |
159 | movl %eax,%gs\r | |
160 | movw DSC_SS(%rbx), %ax\r | |
161 | movl %eax,%ss\r | |
162 | # jmp _SmiHandler ; instruction is not needed\r | |
163 | \r | |
164 | _SmiHandler:\r | |
f45f2d4a | 165 | movq (%rsp), %rbx\r |
427e3573 MK |
166 | # Save FP registers\r |
167 | \r | |
168 | subq $0x208, %rsp\r | |
169 | .byte 0x48 # FXSAVE64\r | |
170 | fxsave (%rsp)\r | |
171 | \r | |
172 | addq $-0x20, %rsp\r | |
f45f2d4a JY |
173 | \r |
174 | movq %rbx, %rcx\r | |
175 | movabsq $ASM_PFX(CpuSmmDebugEntry), %rax\r | |
427e3573 | 176 | call *%rax\r |
f45f2d4a JY |
177 | \r |
178 | movq %rbx, %rcx\r | |
179 | movabsq $ASM_PFX(SmiRendezvous), %rax\r | |
180 | call *%rax\r | |
181 | \r | |
182 | movq %rbx, %rcx\r | |
183 | movabsq $ASM_PFX(CpuSmmDebugExit), %rax\r | |
184 | call *%rax\r | |
185 | \r | |
427e3573 MK |
186 | addq $0x20, %rsp\r |
187 | \r | |
188 | #\r | |
189 | # Restore FP registers\r | |
190 | #\r | |
191 | .byte 0x48 # FXRSTOR64\r | |
192 | fxrstor (%rsp)\r | |
193 | \r | |
427e3573 MK |
194 | rsm\r |
195 | \r | |
196 | ASM_PFX(gcSmiHandlerSize): .word . - _SmiEntryPoint\r |