[mirror_edk2.git] / UefiPayloadPkg / Library / SpiFlashLib / SpiFlashLib.c

/** @file\r
  Generic driver using Hardware Sequencing registers.\r
\r
  Copyright (c) 2017-2021, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
#include "SpiCommon.h"\r
\r
SPI_INSTANCE  *mSpiInstance = NULL;\r
\r
/**\r
  Get SPI Instance from library global data..\r
\r
  @retval SpiInstance       Return SPI instance\r
**/\r
SPI_INSTANCE *\r
GetSpiInstance (\r
  VOID\r
  )\r
{\r
  if (mSpiInstance == NULL) {\r
    mSpiInstance = AllocatePool (sizeof (SPI_INSTANCE));\r
    if (mSpiInstance == NULL) {\r
      return NULL;\r
    }\r
\r
    ZeroMem (mSpiInstance, sizeof (SPI_INSTANCE));\r
  }\r
\r
  return mSpiInstance;\r
}\r
\r
/**\r
  Initialize an SPI library.\r
\r
  @retval EFI_SUCCESS             The protocol instance was properly initialized\r
  @retval EFI_NOT_FOUND           The expected SPI info could not be found\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiConstructor (\r
  VOID\r
  )\r
{\r
  UINT32             ScSpiBar0;\r
  UINT8              Comp0Density;\r
  SPI_INSTANCE       *SpiInstance;\r
  EFI_HOB_GUID_TYPE  *GuidHob;\r
  SPI_FLASH_INFO     *SpiFlashInfo;\r
\r
  //\r
  // Find SPI flash hob\r
  //\r
  GuidHob = GetFirstGuidHob (&gSpiFlashInfoGuid);\r
  if (GuidHob == NULL) {\r
    ASSERT (FALSE);\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  SpiFlashInfo = (SPI_FLASH_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
\r
  //\r
  // Initialize the SPI instance\r
  //\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  DEBUG ((DEBUG_INFO, "SpiInstance = %08X\n", SpiInstance));\r
\r
  SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;\r
  SpiInstance->Handle    = NULL;\r
\r
  //\r
  // Check the SPI address\r
  //\r
  if ((SpiFlashInfo->SpiAddress.AddressSpaceId !=  EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE) ||\r
      (SpiFlashInfo->SpiAddress.RegisterBitWidth !=  32) ||\r
      (SpiFlashInfo->SpiAddress.RegisterBitOffset !=  0) ||\r
      (SpiFlashInfo->SpiAddress.AccessSize !=  EFI_ACPI_3_0_DWORD))\r
  {\r
    DEBUG ((DEBUG_ERROR, "SPI FLASH HOB is not expected. need check the hob or enhance SPI flash driver.\n"));\r
  }\r
\r
  SpiInstance->PchSpiBase = (UINT32)(UINTN)SpiFlashInfo->SpiAddress.Address;\r
  SpiInstance->Flags      = SpiFlashInfo->Flags;\r
  DEBUG ((DEBUG_INFO, "PchSpiBase at 0x%x\n", SpiInstance->PchSpiBase));\r
\r
  ScSpiBar0 = AcquireSpiBar0 (SpiInstance->PchSpiBase);\r
  DEBUG ((DEBUG_INFO, "ScSpiBar0 at 0x%08X\n", ScSpiBar0));\r
\r
  if (ScSpiBar0 == 0) {\r
    ASSERT (FALSE);\r
  }\r
\r
  if ((MmioRead32 (ScSpiBar0 + R_SPI_HSFS) & B_SPI_HSFS_FDV) == 0) {\r
    DEBUG ((DEBUG_ERROR, "SPI Flash descriptor invalid, cannot use Hardware Sequencing registers!\n"));\r
    ASSERT (FALSE);\r
  }\r
\r
  MmioOr32 (SpiInstance->PchSpiBase + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);\r
  SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP);\r
  SpiInstance->SfdpVscc0Value   = MmioRead32 (ScSpiBar0 + R_SPI_LVSCC);\r
  SpiInstance->SfdpVscc1Value   = MmioRead32 (ScSpiBar0 + R_SPI_UVSCC);\r
\r
  //\r
  // Select to Flash Map 0 Register to get the number of flash Component\r
  //\r
  MmioAndThenOr32 (\r
    ScSpiBar0 + R_SPI_FDOC,\r
    (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
    (UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP0)\r
    );\r
\r
  //\r
  // Copy Zero based Number Of Components\r
  //\r
  SpiInstance->NumberOfComponents = (UINT8)((MmioRead16 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_NC) >> N_SPI_FDBAR_NC);\r
\r
  MmioAndThenOr32 (\r
    ScSpiBar0 + R_SPI_FDOC,\r
    (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
    (UINT32)(V_SPI_FDOC_FDSS_COMP | R_SPI_FCBA_FLCOMP)\r
    );\r
\r
  //\r
  // Copy Component 0 Density\r
  //\r
  Comp0Density                     = (UINT8)MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FLCOMP_COMP1_MASK;\r
  SpiInstance->Component1StartAddr = (UINT32)(SIZE_512KB << Comp0Density);\r
\r
  //\r
  // Select FLASH_MAP1 to get Flash SC Strap Base Address\r
  //\r
  MmioAndThenOr32 (\r
    (ScSpiBar0 + R_SPI_FDOC),\r
    (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
    (UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP1)\r
    );\r
\r
  SpiInstance->StrapBaseAddress = MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_FPSBA;\r
\r
  //\r
  // Align FPSBA with address bits for the SC Strap portion of flash descriptor\r
  //\r
  SpiInstance->StrapBaseAddress &= B_SPI_FDBAR_FPSBA;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Read data from the flash part.\r
\r
  @param[in] FlashRegionType      The Flash Region type for flash cycle which is listed in the Descriptor.\r
  @param[in] Address              The Flash Linear Address must fall within a region for which BIOS has access permissions.\r
  @param[in] ByteCount            Number of bytes in the data portion of the SPI cycle.\r
  @param[out] Buffer              The Pointer to caller-allocated buffer containing the data received.\r
                                  It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashRead (\r
  IN     FLASH_REGION_TYPE  FlashRegionType,\r
  IN     UINT32             Address,\r
  IN     UINT32             ByteCount,\r
  OUT    UINT8              *Buffer\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = SendSpiCmd (FlashRegionType, FlashCycleRead, Address, ByteCount, Buffer);\r
  return Status;\r
}\r
\r
/**\r
  Write data to the flash part.\r
\r
  @param[in] FlashRegionType      The Flash Region type for flash cycle which is listed in the Descriptor.\r
  @param[in] Address              The Flash Linear Address must fall within a region for which BIOS has access permissions.\r
  @param[in] ByteCount            Number of bytes in the data portion of the SPI cycle.\r
  @param[in] Buffer               Pointer to caller-allocated buffer containing the data sent during the SPI cycle.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashWrite (\r
  IN     FLASH_REGION_TYPE  FlashRegionType,\r
  IN     UINT32             Address,\r
  IN     UINT32             ByteCount,\r
  IN     UINT8              *Buffer\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = SendSpiCmd (FlashRegionType, FlashCycleWrite, Address, ByteCount, Buffer);\r
  return Status;\r
}\r
\r
/**\r
  Erase some area on the flash part.\r
\r
  @param[in] FlashRegionType      The Flash Region type for flash cycle which is listed in the Descriptor.\r
  @param[in] Address              The Flash Linear Address must fall within a region for which BIOS has access permissions.\r
  @param[in] ByteCount            Number of bytes in the data portion of the SPI cycle.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashErase (\r
  IN     FLASH_REGION_TYPE  FlashRegionType,\r
  IN     UINT32             Address,\r
  IN     UINT32             ByteCount\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = SendSpiCmd (FlashRegionType, FlashCycleErase, Address, ByteCount, NULL);\r
  return Status;\r
}\r
\r
/**\r
  Read SFDP data from the flash part.\r
\r
  @param[in] ComponentNumber      The Component Number for chip select\r
  @param[in] ByteCount            Number of bytes in SFDP data portion of the SPI cycle, the max number is 64\r
  @param[out] SfdpData            The Pointer to caller-allocated buffer containing the SFDP data received\r
                                  It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadSfdp (\r
  IN     UINT8   ComponentNumber,\r
  IN     UINT32  ByteCount,\r
  OUT    UINT8   *SfdpData\r
  )\r
{\r
  EFI_STATUS    Status;\r
  UINT32        Address;\r
  SPI_INSTANCE  *SpiInstance;\r
\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  if ((ByteCount > 64) || (ComponentNumber > SpiInstance->NumberOfComponents)) {\r
    ASSERT (FALSE);\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  Address = 0;\r
  if (ComponentNumber == FlashComponent1) {\r
    Address = SpiInstance->Component1StartAddr;\r
  }\r
\r
  Status = SendSpiCmd (0, FlashCycleReadSfdp, Address, ByteCount, SfdpData);\r
  return Status;\r
}\r
\r
/**\r
  Read Jedec Id from the flash part.\r
\r
  @param[in] ComponentNumber      The Component Number for chip select\r
  @param[in] ByteCount            Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically\r
  @param[out] JedecId             The Pointer to caller-allocated buffer containing JEDEC ID received\r
                                  It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadJedecId (\r
  IN     UINT8   ComponentNumber,\r
  IN     UINT32  ByteCount,\r
  OUT    UINT8   *JedecId\r
  )\r
{\r
  EFI_STATUS    Status;\r
  UINT32        Address;\r
  SPI_INSTANCE  *SpiInstance;\r
\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  if (ComponentNumber > SpiInstance->NumberOfComponents) {\r
    ASSERT (FALSE);\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  Address = 0;\r
  if (ComponentNumber == FlashComponent1) {\r
    Address = SpiInstance->Component1StartAddr;\r
  }\r
\r
  Status = SendSpiCmd (0, FlashCycleReadJedecId, Address, ByteCount, JedecId);\r
  return Status;\r
}\r
\r
/**\r
  Write the status register in the flash part.\r
\r
  @param[in] ByteCount            Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically\r
  @param[in] StatusValue          The Pointer to caller-allocated buffer containing the value of Status register writing\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashWriteStatus (\r
  IN     UINT32  ByteCount,\r
  IN     UINT8   *StatusValue\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = SendSpiCmd (0, FlashCycleWriteStatus, 0, ByteCount, StatusValue);\r
  return Status;\r
}\r
\r
/**\r
  Read status register in the flash part.\r
\r
  @param[in] ByteCount            Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically\r
  @param[out] StatusValue         The Pointer to caller-allocated buffer containing the value of Status register received.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadStatus (\r
  IN     UINT32  ByteCount,\r
  OUT    UINT8   *StatusValue\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status = SendSpiCmd (0, FlashCycleReadStatus, 0, ByteCount, StatusValue);\r
  return Status;\r
}\r
\r
/**\r
  Read SC Soft Strap Values\r
\r
  @param[in] SoftStrapAddr        SC Soft Strap address offset from FPSBA.\r
  @param[in] ByteCount            Number of bytes in SoftStrap data portion of the SPI cycle\r
  @param[out] SoftStrapValue      The Pointer to caller-allocated buffer containing SC Soft Strap Value.\r
                                  It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
\r
  @retval EFI_SUCCESS             Command succeed.\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  @retval EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiReadPchSoftStrap (\r
  IN     UINT32  SoftStrapAddr,\r
  IN     UINT32  ByteCount,\r
  OUT    UINT8   *SoftStrapValue\r
  )\r
{\r
  UINT32        StrapFlashAddr;\r
  EFI_STATUS    Status;\r
  SPI_INSTANCE  *SpiInstance;\r
\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  ASSERT (SpiInstance->StrapBaseAddress != 0);\r
  //\r
  // SC Strap Flash Address = FPSBA + RamAddr\r
  //\r
  StrapFlashAddr = SpiInstance->StrapBaseAddress + SoftStrapAddr;\r
\r
  Status = SendSpiCmd (FlashRegionDescriptor, FlashCycleRead, StrapFlashAddr, ByteCount, SoftStrapValue);\r
  return Status;\r
}\r
\r
/**\r
  This function sends the programmed SPI command to the slave device.\r
\r
  @param[in] FlashRegionType      The SPI Region type for flash cycle which is listed in the Descriptor\r
  @param[in] FlashCycleType       The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register\r
  @param[in] Address              The Flash Linear Address must fall within a region for which BIOS has access permissions.\r
  @param[in] ByteCount            Number of bytes in the data portion of the SPI cycle.\r
  @param[in,out] Buffer           Pointer to caller-allocated buffer containing the data received or sent during the SPI cycle.\r
\r
  @retval EFI_SUCCESS             SPI command completes successfully.\r
  @retval EFI_DEVICE_ERROR        Device error, the command aborts abnormally.\r
  @retval EFI_ACCESS_DENIED       Some unrecognized command encountered in hardware sequencing mode\r
  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
**/\r
EFI_STATUS\r
SendSpiCmd (\r
  IN     FLASH_REGION_TYPE  FlashRegionType,\r
  IN     FLASH_CYCLE_TYPE   FlashCycleType,\r
  IN     UINT32             Address,\r
  IN     UINT32             ByteCount,\r
  IN OUT UINT8              *Buffer\r
  )\r
{\r
  EFI_STATUS    Status;\r
  UINT32        Index;\r
  UINTN         SpiBaseAddress;\r
  UINT32        ScSpiBar0;\r
  UINT32        LimitAddress;\r
  UINT32        HardwareSpiAddr;\r
  UINT16        PermissionBit;\r
  UINT32        SpiDataCount;\r
  UINT32        FlashCycle;\r
  UINT8         BiosCtlSave;\r
  SPI_INSTANCE  *SpiInstance;\r
  UINT32        Data32;\r
\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  Status                        = EFI_SUCCESS;\r
  SpiBaseAddress                = SpiInstance->PchSpiBase;\r
  ScSpiBar0                     = AcquireSpiBar0 (SpiBaseAddress);\r
  BiosCtlSave                   = 0;\r
  SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP);\r
\r
  //\r
  // If it's write cycle, disable Prefetching, Caching and disable BIOS Write Protect\r
  //\r
  if ((FlashCycleType == FlashCycleWrite) || (FlashCycleType == FlashCycleErase)) {\r
    Status = DisableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);\r
    if (EFI_ERROR (Status)) {\r
      goto SendSpiCmdEnd;\r
    }\r
\r
    BiosCtlSave = SaveAndDisableSpiPrefetchCache (SpiBaseAddress);\r
  }\r
\r
  //\r
  // Make sure it's safe to program the command.\r
  //\r
  if (!WaitForSpiCycleComplete (ScSpiBar0, FALSE)) {\r
    Status = EFI_DEVICE_ERROR;\r
    goto SendSpiCmdEnd;\r
  }\r
\r
  HardwareSpiAddr = Address;\r
  if ((FlashCycleType == FlashCycleRead) ||\r
      (FlashCycleType == FlashCycleWrite) ||\r
      (FlashCycleType == FlashCycleErase))\r
  {\r
    switch (FlashRegionType) {\r
      case FlashRegionDescriptor:\r
        if (FlashCycleType == FlashCycleRead) {\r
          PermissionBit = B_SPI_FRAP_BRRA_FLASHD;\r
        } else {\r
          PermissionBit = B_SPI_FRAP_BRWA_FLASHD;\r
        }\r
\r
        Data32           = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);\r
        HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;\r
        LimitAddress     = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;\r
        break;\r
\r
      case FlashRegionBios:\r
        if (FlashCycleType == FlashCycleRead) {\r
          PermissionBit = B_SPI_FRAP_BRRA_BIOS;\r
        } else {\r
          PermissionBit = B_SPI_FRAP_BRWA_BIOS;\r
        }\r
\r
        Data32           = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);\r
        HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;\r
        LimitAddress     = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;\r
        break;\r
\r
      case FlashRegionMe:\r
        if (FlashCycleType == FlashCycleRead) {\r
          PermissionBit = B_SPI_FRAP_BRRA_SEC;\r
        } else {\r
          PermissionBit = B_SPI_FRAP_BRWA_SEC;\r
        }\r
\r
        Data32           = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);\r
        HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;\r
        LimitAddress     = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;\r
        break;\r
\r
      case FlashRegionGbE:\r
        if (FlashCycleType == FlashCycleRead) {\r
          PermissionBit = B_SPI_FRAP_BRRA_GBE;\r
        } else {\r
          PermissionBit = B_SPI_FRAP_BRWA_GBE;\r
        }\r
\r
        Data32           = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);\r
        HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;\r
        LimitAddress     = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;\r
        break;\r
\r
      case FlashRegionPlatformData:\r
        if (FlashCycleType == FlashCycleRead) {\r
          PermissionBit = B_SPI_FRAP_BRRA_PLATFORM;\r
        } else {\r
          PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;\r
        }\r
\r
        Data32           = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);\r
        HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;\r
        LimitAddress     = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;\r
        break;\r
\r
      case FlashRegionAll:\r
        //\r
        // FlashRegionAll indicates address is relative to flash device\r
        // No error checking for this case\r
        //\r
        LimitAddress  = 0;\r
        PermissionBit = 0;\r
        break;\r
\r
      default:\r
        Status = EFI_UNSUPPORTED;\r
        goto SendSpiCmdEnd;\r
    }\r
\r
    if ((LimitAddress != 0) && (Address > LimitAddress)) {\r
      Status = EFI_INVALID_PARAMETER;\r
      goto SendSpiCmdEnd;\r
    }\r
\r
    //\r
    // If the operation is read, but the region attribute is not read allowed, return error.\r
    // If the operation is write, but the region attribute is not write allowed, return error.\r
    //\r
    if ((PermissionBit != 0) && ((SpiInstance->RegionPermission & PermissionBit) == 0)) {\r
      Status = EFI_ACCESS_DENIED;\r
      goto SendSpiCmdEnd;\r
    }\r
  }\r
\r
  //\r
  // Check for SC SPI hardware sequencing required commands\r
  //\r
  FlashCycle = 0;\r
  switch (FlashCycleType) {\r
    case FlashCycleRead:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    case FlashCycleWrite:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    case FlashCycleErase:\r
      if (((ByteCount % SIZE_4KB) != 0) || ((HardwareSpiAddr % SIZE_4KB) != 0)) {\r
        DEBUG ((DEBUG_ERROR, "Erase and erase size must be 4KB aligned. \n"));\r
        ASSERT (FALSE);\r
        Status = EFI_INVALID_PARAMETER;\r
        goto SendSpiCmdEnd;\r
      }\r
\r
      break;\r
\r
    case FlashCycleReadSfdp:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_SFDP << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    case FlashCycleReadJedecId:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_JEDEC_ID << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    case FlashCycleWriteStatus:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE_STATUS << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    case FlashCycleReadStatus:\r
      FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_STATUS << N_SPI_HSFS_CYCLE);\r
      break;\r
\r
    default:\r
      //\r
      // Unrecognized Operation\r
      //\r
      ASSERT (FALSE);\r
      Status = EFI_INVALID_PARAMETER;\r
      goto SendSpiCmdEnd;\r
      break;\r
  }\r
\r
  do {\r
    SpiDataCount = ByteCount;\r
    if ((FlashCycleType == FlashCycleRead) || (FlashCycleType == FlashCycleWrite)) {\r
      //\r
      // Trim at 256 byte boundary per operation,\r
      // - SC SPI controller requires trimming at 4KB boundary\r
      // - Some SPI chips require trimming at 256 byte boundary for write operation\r
      // - Trimming has limited performance impact as we can read / write at most 64 byte\r
      //   per operation\r
      //\r
      if (HardwareSpiAddr + ByteCount > ((HardwareSpiAddr + BIT8) &~(BIT8 - 1))) {\r
        SpiDataCount = (((UINT32)(HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32)(HardwareSpiAddr);\r
      }\r
\r
      //\r
      // Calculate the number of bytes to shift in/out during the SPI data cycle.\r
      // Valid settings for the number of bytes during each data portion of the\r
      // SC SPI cycles are: 0, 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32, 40, 48, 56, 64\r
      //\r
      if (SpiDataCount >= 64) {\r
        SpiDataCount = 64;\r
      } else if ((SpiDataCount &~0x07) != 0) {\r
        SpiDataCount = SpiDataCount &~0x07;\r
      }\r
    }\r
\r
    if (FlashCycleType == FlashCycleErase) {\r
      if (((ByteCount / SIZE_64KB) != 0) &&\r
          ((ByteCount % SIZE_64KB) == 0) &&\r
          ((HardwareSpiAddr % SIZE_64KB) == 0))\r
      {\r
        if (HardwareSpiAddr < SpiInstance->Component1StartAddr) {\r
          //\r
          // Check whether Component0 support 64k Erase\r
          //\r
          if ((SpiInstance->SfdpVscc0Value & B_SPI_LVSCC_EO_64K) != 0) {\r
            SpiDataCount = SIZE_64KB;\r
          } else {\r
            SpiDataCount = SIZE_4KB;\r
          }\r
        } else {\r
          //\r
          // Check whether Component1 support 64k Erase\r
          //\r
          if ((SpiInstance->SfdpVscc1Value & B_SPI_LVSCC_EO_64K) != 0) {\r
            SpiDataCount = SIZE_64KB;\r
          } else {\r
            SpiDataCount = SIZE_4KB;\r
          }\r
        }\r
      } else {\r
        SpiDataCount = SIZE_4KB;\r
      }\r
\r
      if (SpiDataCount == SIZE_4KB) {\r
        FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);\r
      } else {\r
        FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_64K_ERASE << N_SPI_HSFS_CYCLE);\r
      }\r
    }\r
\r
    //\r
    // If it's write cycle, load data into the SPI data buffer.\r
    //\r
    if ((FlashCycleType == FlashCycleWrite) || (FlashCycleType == FlashCycleWriteStatus)) {\r
      if ((SpiDataCount & 0x07) != 0) {\r
        //\r
        // Use Byte write if Data Count is 0, 1, 2, 3, 4, 5, 6, 7\r
        //\r
        for (Index = 0; Index < SpiDataCount; Index++) {\r
          MmioWrite8 (ScSpiBar0 + R_SPI_FDATA00 + Index, Buffer[Index]);\r
        }\r
      } else {\r
        //\r
        // Use Dword write if Data Count is 8, 16, 24, 32, 40, 48, 56, 64\r
        //\r
        for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {\r
          MmioWrite32 (ScSpiBar0 + R_SPI_FDATA00 + Index, *(UINT32 *)(Buffer + Index));\r
        }\r
      }\r
    }\r
\r
    //\r
    // Set the Flash Address\r
    //\r
    MmioWrite32 (ScSpiBar0 + R_SPI_FADDR, (UINT32)(HardwareSpiAddr & B_SPI_FADDR_MASK));\r
\r
    //\r
    // Set Data count, Flash cycle, and Set Go bit to start a cycle\r
    //\r
    MmioAndThenOr32 (\r
      ScSpiBar0 + R_SPI_HSFS,\r
      (UINT32)(~(B_SPI_HSFS_FDBC_MASK | B_SPI_HSFS_CYCLE_MASK)),\r
      (UINT32)(((SpiDataCount - 1) << N_SPI_HSFS_FDBC) | FlashCycle | B_SPI_HSFS_CYCLE_FGO)\r
      );\r
\r
    //\r
    // Wait for command execution complete.\r
    //\r
    if (!WaitForSpiCycleComplete (ScSpiBar0, TRUE)) {\r
      Status = EFI_DEVICE_ERROR;\r
      goto SendSpiCmdEnd;\r
    }\r
\r
    //\r
    // If it's read cycle, load data into the caller's buffer.\r
    //\r
    if ((FlashCycleType == FlashCycleRead) ||\r
        (FlashCycleType == FlashCycleReadSfdp) ||\r
        (FlashCycleType == FlashCycleReadJedecId) ||\r
        (FlashCycleType == FlashCycleReadStatus))\r
    {\r
      if ((SpiDataCount & 0x07) != 0) {\r
        //\r
        // Use Byte read if Data Count is 0, 1, 2, 3, 4, 5, 6, 7\r
        //\r
        for (Index = 0; Index < SpiDataCount; Index++) {\r
          Buffer[Index] = MmioRead8 (ScSpiBar0 + R_SPI_FDATA00 + Index);\r
        }\r
      } else {\r
        //\r
        // Use Dword read if Data Count is 8, 16, 24, 32, 40, 48, 56, 64\r
        //\r
        for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {\r
          *(UINT32 *)(Buffer + Index) = MmioRead32 (ScSpiBar0 + R_SPI_FDATA00 + Index);\r
        }\r
      }\r
    }\r
\r
    HardwareSpiAddr += SpiDataCount;\r
    Buffer          += SpiDataCount;\r
    ByteCount       -= SpiDataCount;\r
  } while (ByteCount > 0);\r
\r
SendSpiCmdEnd:\r
  ///\r
  /// Restore the settings for SPI Prefetching and Caching and enable BIOS Write Protect\r
  ///\r
  if ((FlashCycleType == FlashCycleWrite) || (FlashCycleType == FlashCycleErase)) {\r
    EnableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);\r
    SetSpiBiosControlRegister (SpiBaseAddress, BiosCtlSave);\r
  }\r
\r
  ReleaseSpiBar0 (SpiBaseAddress);\r
\r
  return Status;\r
}\r
\r
/**\r
  Wait execution cycle to complete on the SPI interface.\r
\r
  @param[in] ScSpiBar0            Spi MMIO base address\r
  @param[in] ErrorCheck           TRUE if the SpiCycle needs to do the error check\r
\r
  @retval TRUE                    SPI cycle completed on the interface.\r
  @retval FALSE                   Time out while waiting the SPI cycle to complete.\r
                                  It's not safe to program the next command on the SPI interface.\r
**/\r
BOOLEAN\r
WaitForSpiCycleComplete (\r
  IN     UINT32   ScSpiBar0,\r
  IN     BOOLEAN  ErrorCheck\r
  )\r
{\r
  UINT64  WaitTicks;\r
  UINT64  WaitCount;\r
  UINT32  Data32;\r
\r
  //\r
  // Convert the wait period allowed into to tick count\r
  //\r
  WaitCount = WAIT_TIME / WAIT_PERIOD;\r
  //\r
  // Wait for the SPI cycle to complete.\r
  //\r
  for (WaitTicks = 0; WaitTicks < WaitCount; WaitTicks++) {\r
    Data32 = MmioRead32 (ScSpiBar0 + R_SPI_HSFS);\r
    if ((Data32 & B_SPI_HSFS_SCIP) == 0) {\r
      MmioWrite32 (ScSpiBar0 + R_SPI_HSFS, B_SPI_HSFS_FCERR | B_SPI_HSFS_FDONE);\r
      if (((Data32 & B_SPI_HSFS_FCERR) != 0) && ErrorCheck) {\r
        return FALSE;\r
      } else {\r
        return TRUE;\r
      }\r
    }\r
\r
    MicroSecondDelay (WAIT_PERIOD);\r
  }\r
\r
  return FALSE;\r
}\r
\r
/**\r
  Get the SPI region base and size, based on the enum type\r
\r
  @param[in] FlashRegionType      The Flash Region type for for the base address which is listed in the Descriptor.\r
  @param[out] BaseAddress         The Flash Linear Address for the Region 'n' Base\r
  @param[out] RegionSize          The size for the Region 'n'\r
\r
  @retval EFI_SUCCESS             Read success\r
  @retval EFI_INVALID_PARAMETER   Invalid region type given\r
  @retval EFI_DEVICE_ERROR        The region is not used\r
**/\r
EFI_STATUS\r
EFIAPI\r
SpiGetRegionAddress (\r
  IN     FLASH_REGION_TYPE  FlashRegionType,\r
  OUT    UINT32             *BaseAddress  OPTIONAL,\r
  OUT    UINT32             *RegionSize OPTIONAL\r
  )\r
{\r
  UINT32        ScSpiBar0;\r
  UINT32        ReadValue;\r
  UINT32        Base;\r
  SPI_INSTANCE  *SpiInstance;\r
\r
  if (FlashRegionType >= FlashRegionMax) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  SpiInstance = GetSpiInstance ();\r
  if (SpiInstance == NULL) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  if (FlashRegionType == FlashRegionAll) {\r
    if (BaseAddress != NULL) {\r
      *BaseAddress = 0;\r
    }\r
\r
    if (RegionSize != NULL) {\r
      *RegionSize = SpiInstance->Component1StartAddr;\r
    }\r
\r
    return EFI_SUCCESS;\r
  }\r
\r
  ScSpiBar0 = AcquireSpiBar0 (SpiInstance->PchSpiBase);\r
  ReadValue = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD + S_SPI_FREGX * (UINT32)FlashRegionType);\r
  ReleaseSpiBar0 (SpiInstance->PchSpiBase);\r
\r
  //\r
  // If the region is not used, the Region Base is 7FFFh and Region Limit is 0000h\r
  //\r
  if (ReadValue == B_SPI_FREGX_BASE_MASK) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  Base = (ReadValue & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;\r
  if (BaseAddress != NULL) {\r
    *BaseAddress = Base;\r
  }\r
\r
  if (RegionSize != NULL) {\r
    *RegionSize =  ((((ReadValue & B_SPI_FREGX_LIMIT_MASK) >> N_SPI_FREGX_LIMIT) + 1) <<\r
                    N_SPI_FREGX_LIMIT_REPR) - Base;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r