IN EFI_HANDLE ImageHandle\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
if (IsMMIO) {\r
Status = gDS->AddMemorySpace (\r
Length\r
));\r
}\r
+\r
Status = gDS->AllocateMemorySpace (\r
EfiGcdAllocateAddress,\r
GcdType,\r
Length\r
));\r
}\r
+\r
Status = gDS->AllocateIoSpace (\r
EfiGcdAllocateAddress,\r
GcdType,\r
NULL\r
);\r
}\r
+\r
return Status;\r
}\r
\r
-\r
/**\r
Main entry for the bootloader support DXE module.\r
\r
EFI_STATUS\r
EFIAPI\r
BlDxeEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
EFI_HOB_GUID_TYPE *GuidHob;\r
EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo;\r
ACPI_BOARD_INFO *AcpiBoardInfo;\r
GuidHob = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);\r
if (GuidHob != NULL) {\r
GfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)GET_GUID_HOB_DATA (GuidHob);\r
- Status = PcdSet32S (PcdVideoHorizontalResolution, GfxInfo->GraphicsMode.HorizontalResolution);\r
+ Status = PcdSet32S (PcdVideoHorizontalResolution, GfxInfo->GraphicsMode.HorizontalResolution);\r
ASSERT_EFI_ERROR (Status);\r
Status = PcdSet32S (PcdVideoVerticalResolution, GfxInfo->GraphicsMode.VerticalResolution);\r
ASSERT_EFI_ERROR (Status);\r
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
if (GuidHob != NULL) {\r
AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
- Status = PcdSet64S (PcdPciExpressBaseAddress, AcpiBoardInfo->PcieBaseAddress);\r
+ Status = PcdSet64S (PcdPciExpressBaseAddress, AcpiBoardInfo->PcieBaseAddress);\r
ASSERT_EFI_ERROR (Status);\r
Status = PcdSet64S (PcdPciExpressBaseSize, AcpiBoardInfo->PcieBaseSize);\r
ASSERT_EFI_ERROR (Status);\r
\r
return EFI_SUCCESS;\r
}\r
-\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef __DXE_BOOTLOADER_SUPPORT_H__\r
#define __DXE_BOOTLOADER_SUPPORT_H__\r
\r
\r
#include <BlSupportSmm.h>\r
\r
-PLD_S3_COMMUNICATION mPldS3Hob;\r
-EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;\r
-PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;;\r
-UINT64 mSmmFeatureControl = 0;\r
+PLD_S3_COMMUNICATION mPldS3Hob;\r
+EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;\r
+PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;\r
+UINT64 mSmmFeatureControl = 0;\r
\r
/**\r
Save SMM rebase and SMI handler information to SMM communication area\r
**/\r
EFI_STATUS\r
SaveSmmInfoForS3 (\r
- IN UINT8 BlSwSmiHandlerInput\r
+ IN UINT8 BlSwSmiHandlerInput\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PROCESSOR_INFORMATION ProcessorInfo;\r
- EFI_MP_SERVICES_PROTOCOL *MpService;\r
- CPU_SMMBASE *SmmBaseInfo;\r
- PLD_TO_BL_SMM_INFO *PldSmmInfo;\r
- UINTN Index;\r
-\r
- PldSmmInfo = (PLD_TO_BL_SMM_INFO *)(UINTN)mPldS3Hob.CommBuffer.PhysicalStart;\r
+ EFI_STATUS Status;\r
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;\r
+ EFI_MP_SERVICES_PROTOCOL *MpService;\r
+ CPU_SMMBASE *SmmBaseInfo;\r
+ PLD_TO_BL_SMM_INFO *PldSmmInfo;\r
+ UINTN Index;\r
+\r
+ PldSmmInfo = (PLD_TO_BL_SMM_INFO *)(UINTN)mPldS3Hob.CommBuffer.PhysicalStart;\r
PldSmmInfo->Header.Header.HobLength = (UINT16)(sizeof (PLD_TO_BL_SMM_INFO) + gSmst->NumberOfCpus * sizeof (CPU_SMMBASE));\r
for (Index = 0; Index < mSmramHob->NumberOfSmmReservedRegions; Index++) {\r
if ((mPldS3Hob.CommBuffer.PhysicalStart >= mSmramHob->Descriptor[Index].PhysicalStart) &&\r
- (mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize)) {\r
+ (mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize))\r
+ {\r
break;\r
}\r
}\r
+\r
if (Index == mSmramHob->NumberOfSmmReservedRegions) {\r
return EFI_NOT_FOUND;\r
}\r
// Save APIC ID and SMM base\r
//\r
Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpService);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;\r
- SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];\r
+\r
+ PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;\r
+ SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];\r
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {\r
Status = MpService->GetProcessorInfo (MpService, Index, &ProcessorInfo);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Get specified SMI register based on given register ID\r
\r
**/\r
PLD_GENERIC_REGISTER *\r
GetRegisterById (\r
- UINT64 Id\r
+ UINT64 Id\r
)\r
{\r
- UINT32 Index;\r
+ UINT32 Index;\r
\r
for (Index = 0; Index < mSmmRegisterHob->Count; Index++) {\r
if (mSmmRegisterHob->Registers[Index].Id == Id) {\r
return &mSmmRegisterHob->Registers[Index];\r
}\r
}\r
+\r
return NULL;\r
}\r
\r
VOID\r
)\r
{\r
- PLD_GENERIC_REGISTER *SmiLockReg;\r
+ PLD_GENERIC_REGISTER *SmiLockReg;\r
\r
- DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn .....\n"));\r
+ DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn .....\n"));\r
\r
SmiLockReg = GetRegisterById (REGISTER_ID_SMI_GBL_EN_LOCK);\r
if (SmiLockReg == NULL) {\r
(SmiLockReg->Address.Address != 0) &&\r
(SmiLockReg->Address.RegisterBitWidth == 1) &&\r
(SmiLockReg->Address.AddressSpaceId == EFI_ACPI_3_0_SYSTEM_MEMORY) &&\r
- (SmiLockReg->Value == 1)) {\r
+ (SmiLockReg->Value == 1))\r
+ {\r
DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn ....is locked\n"));\r
\r
MmioOr32 ((UINT32)SmiLockReg->Address.Address, 1 << SmiLockReg->Address.RegisterBitOffset);\r
VOID\r
)\r
{\r
-\r
if (mSmmFeatureControl != 0) {\r
return;\r
}\r
\r
- mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);\r
+ mSmmFeatureControl = AsmReadMsr64 (MSR_SMM_FEATURE_CONTROL);\r
if ((mSmmFeatureControl & 0x5) != 0x5) {\r
//\r
// Set Lock bit [BIT0] for this register and SMM code check enable bit [BIT2]\r
//\r
AsmWriteMsr64 (MSR_SMM_FEATURE_CONTROL, mSmmFeatureControl | 0x5);\r
}\r
- mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);\r
-}\r
-\r
\r
+ mSmmFeatureControl = AsmReadMsr64 (MSR_SMM_FEATURE_CONTROL);\r
+}\r
\r
/**\r
Function to program SMRR base and mask.\r
**/\r
VOID\r
SetSmrr (\r
- IN VOID *ProcedureArgument\r
+ IN VOID *ProcedureArgument\r
)\r
{\r
if (ProcedureArgument != NULL) {\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
- SMRR_BASE_MASK Arguments;\r
- UINTN Index;\r
- UINT32 SmmBase;\r
- UINT32 SmmSize;\r
+ EFI_STATUS Status;\r
+ SMRR_BASE_MASK Arguments;\r
+ UINTN Index;\r
+ UINT32 SmmBase;\r
+ UINT32 SmmSize;\r
\r
if ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSBASE) != 0) && ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSMASK) & BIT11) != 0)) {\r
return;\r
DEBUG ((DEBUG_ERROR, "%d SMM ranges are not supported.\n", mSmramHob->NumberOfSmmReservedRegions));\r
return;\r
} else if (mSmramHob->NumberOfSmmReservedRegions == 2) {\r
- if ((mSmramHob->Descriptor[1].PhysicalStart + mSmramHob->Descriptor[1].PhysicalSize) == SmmBase){\r
+ if ((mSmramHob->Descriptor[1].PhysicalStart + mSmramHob->Descriptor[1].PhysicalSize) == SmmBase) {\r
SmmBase = (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalStart;\r
} else if (mSmramHob->Descriptor[1].PhysicalStart != (SmmBase + SmmSize)) {\r
DEBUG ((DEBUG_ERROR, "Two SMM regions are not continous.\n"));\r
return;\r
}\r
+\r
SmmSize += (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalSize;\r
}\r
\r
if ((SmmBase == 0) || (SmmSize < SIZE_4KB)) {\r
DEBUG ((DEBUG_ERROR, "Invalid SMM range.\n"));\r
- return ;\r
+ return;\r
}\r
\r
//\r
//\r
if ((SmmSize != GetPowerOfTwo32 (SmmSize)) || ((SmmBase & ~(SmmSize - 1)) != SmmBase)) {\r
DEBUG ((DEBUG_ERROR, " Invalid SMM range.\n"));\r
- return ;\r
+ return;\r
}\r
\r
//\r
//\r
// Program smrr base and mask on BSP first and then on APs\r
//\r
- SetSmrr(&Arguments);\r
+ SetSmrr (&Arguments);\r
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {\r
if (Index != gSmst->CurrentlyExecutingCpu) {\r
Status = gSmst->SmmStartupThisAp (SetSmrr, Index, (VOID *)&Arguments);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
DEBUG ((DEBUG_ERROR, "Programming SMRR on AP# %d status: %r\n", Index, Status));\r
}\r
}\r
}\r
}\r
\r
-\r
/**\r
Software SMI callback for restoring SMRR base and mask in S3 path.\r
\r
EFI_STATUS\r
EFIAPI\r
BlSwSmiHandler (\r
- IN EFI_HANDLE DispatchHandle,\r
- IN CONST VOID *Context,\r
- IN OUT VOID *CommBuffer,\r
- IN OUT UINTN *CommBufferSize\r
+ IN EFI_HANDLE DispatchHandle,\r
+ IN CONST VOID *Context,\r
+ IN OUT VOID *CommBuffer,\r
+ IN OUT UINTN *CommBufferSize\r
)\r
{\r
SetSmrrOnS3 ();\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Lock SMI in this SMM ready to lock event.\r
\r
EFI_STATUS\r
EFIAPI\r
BlSupportSmmReadyToLockCallback (\r
- IN CONST EFI_GUID *Protocol,\r
- IN VOID *Interface,\r
- IN EFI_HANDLE Handle\r
+ IN CONST EFI_GUID *Protocol,\r
+ IN VOID *Interface,\r
+ IN EFI_HANDLE Handle\r
)\r
{\r
//\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
The driver's entry point.\r
\r
EFI_STATUS\r
EFIAPI\r
BlSupportSmm (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
EFI_STATUS Status;\r
//\r
GuidHob = GetFirstGuidHob (&gS3CommunicationGuid);\r
if (GuidHob != NULL) {\r
- SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));\r
- CopyMem (&mPldS3Hob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));\r
+ SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));\r
+ CopyMem (&mPldS3Hob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));\r
} else {\r
return EFI_NOT_FOUND;\r
}\r
//\r
GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid);\r
if (GuidHob != NULL) {\r
- SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));\r
- mSmramHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));\r
+ SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));\r
+ mSmramHob = AllocatePool (GET_GUID_HOB_DATA_SIZE (GuidHob));\r
if (mSmramHob == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));\r
+\r
+ CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));\r
} else {\r
return EFI_NOT_FOUND;\r
}\r
//\r
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);\r
if (GuidHob != NULL) {\r
- SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));\r
- mSmmRegisterHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));\r
+ SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));\r
+ mSmmRegisterHob = AllocatePool (GET_GUID_HOB_DATA_SIZE (GuidHob));\r
if (mSmmRegisterHob == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));\r
+\r
+ CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));\r
} else {\r
return EFI_NOT_FOUND;\r
}\r
//\r
// Get the Sw dispatch protocol and register SMI handler.\r
//\r
- Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID**)&SwDispatch);\r
+ Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID **)&SwDispatch);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- SwContext.SwSmiInputValue = (UINTN) -1;\r
- Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);\r
+\r
+ SwContext.SwSmiInputValue = (UINTN)-1;\r
+ Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((DEBUG_ERROR, "Registering S3 smi handler failed: %r\n", Status));\r
return Status;\r
\r
return EFI_SUCCESS;\r
}\r
-\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef BL_SUPPORT_SMM_H_\r
#define BL_SUPPORT_SMM_H_\r
\r
#include <Guid/SmmS3CommunicationInfoGuid.h>\r
#include <Guid/SmramMemoryReserve.h>\r
\r
-#define EFI_MSR_SMRR_MASK 0xFFFFF000\r
-#define MSR_SMM_FEATURE_CONTROL 0x4E0\r
-#define SMRAM_SAVE_STATE_MAP_OFFSET 0xFC00 /// Save state offset from SMBASE\r
+#define EFI_MSR_SMRR_MASK 0xFFFFF000\r
+#define MSR_SMM_FEATURE_CONTROL 0x4E0\r
+#define SMRAM_SAVE_STATE_MAP_OFFSET 0xFC00 /// Save state offset from SMBASE\r
\r
typedef struct {\r
- UINT32 Base;\r
- UINT32 Mask;\r
+ UINT32 Base;\r
+ UINT32 Mask;\r
} SMRR_BASE_MASK;\r
\r
#endif\r
-\r
#include <Guid/NvVariableInfoGuid.h>\r
#include <Library/HobLib.h>\r
\r
-#define FVB_MEDIA_BLOCK_SIZE 0x1000\r
+#define FVB_MEDIA_BLOCK_SIZE 0x1000\r
\r
typedef struct {\r
- EFI_FIRMWARE_VOLUME_HEADER FvInfo;\r
- EFI_FV_BLOCK_MAP_ENTRY End[1];\r
+ EFI_FIRMWARE_VOLUME_HEADER FvInfo;\r
+ EFI_FV_BLOCK_MAP_ENTRY End[1];\r
} EFI_FVB2_MEDIA_INFO;\r
\r
//\r
// This data structure contains a template of FV header which is used to restore\r
// Fv header if it's corrupted.\r
//\r
-EFI_FVB2_MEDIA_INFO mFvbMediaInfo = {\r
+EFI_FVB2_MEDIA_INFO mFvbMediaInfo = {\r
{\r
- {0,}, // ZeroVector[16]\r
+ { 0, }, // ZeroVector[16]\r
EFI_SYSTEM_NV_DATA_FV_GUID,\r
0,\r
EFI_FVH_SIGNATURE,\r
sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),\r
0, // CheckSum which will be calucated dynamically.\r
0, // ExtHeaderOffset\r
- {0,},\r
+ { 0, },\r
EFI_FVH_REVISION,\r
{\r
{\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 NvStorageBase;\r
- UINT32 NvStorageSize;\r
- UINT32 NvVariableSize;\r
- UINT32 FtwWorkingSize;\r
- UINT32 FtwSpareSize;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- NV_VARIABLE_INFO *NvVariableInfo;\r
+ EFI_STATUS Status;\r
+ UINT32 NvStorageBase;\r
+ UINT32 NvStorageSize;\r
+ UINT32 NvVariableSize;\r
+ UINT32 FtwWorkingSize;\r
+ UINT32 FtwSpareSize;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ NV_VARIABLE_INFO *NvVariableInfo;\r
\r
//\r
// Find SPI flash variable hob\r
ASSERT (FALSE);\r
return EFI_NOT_FOUND;\r
}\r
- NvVariableInfo = (NV_VARIABLE_INFO *) GET_GUID_HOB_DATA (GuidHob);\r
+\r
+ NvVariableInfo = (NV_VARIABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
\r
//\r
// Get variable region base and size.\r
if (NvVariableSize >= 0x80000000) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- Status = PcdSet32S(PcdFlashNvStorageVariableSize, NvVariableSize);\r
+\r
+ Status = PcdSet32S (PcdFlashNvStorageVariableSize, NvVariableSize);\r
ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S(PcdFlashNvStorageVariableBase, NvStorageBase);\r
+ Status = PcdSet32S (PcdFlashNvStorageVariableBase, NvStorageBase);\r
ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet64S(PcdFlashNvStorageVariableBase64, NvStorageBase);\r
+ Status = PcdSet64S (PcdFlashNvStorageVariableBase64, NvStorageBase);\r
ASSERT_EFI_ERROR (Status);\r
\r
- Status = PcdSet32S(PcdFlashNvStorageFtwWorkingSize, FtwWorkingSize);\r
+ Status = PcdSet32S (PcdFlashNvStorageFtwWorkingSize, FtwWorkingSize);\r
ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S(PcdFlashNvStorageFtwWorkingBase, NvStorageBase + NvVariableSize);\r
+ Status = PcdSet32S (PcdFlashNvStorageFtwWorkingBase, NvStorageBase + NvVariableSize);\r
ASSERT_EFI_ERROR (Status);\r
\r
- Status = PcdSet32S(PcdFlashNvStorageFtwSpareSize, FtwSpareSize);\r
+ Status = PcdSet32S (PcdFlashNvStorageFtwSpareSize, FtwSpareSize);\r
ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S(PcdFlashNvStorageFtwSpareBase, NvStorageBase + FtwSpareSize);\r
+ Status = PcdSet32S (PcdFlashNvStorageFtwSpareBase, NvStorageBase + FtwSpareSize);\r
ASSERT_EFI_ERROR (Status);\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Get a heathy FV header used for variable store recovery\r
\r
VOID\r
)\r
{\r
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;\r
- UINTN FvSize;\r
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;\r
+ UINTN FvSize;\r
\r
- FvSize = PcdGet32(PcdFlashNvStorageFtwSpareSize) * 2;\r
+ FvSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize) * 2;\r
FvHeader = &mFvbMediaInfo.FvInfo;\r
FvHeader->FvLength = FvSize;\r
- FvHeader->BlockMap[0].NumBlocks = (UINT32) (FvSize / FvHeader->BlockMap[0].Length);\r
- FvHeader->Checksum = 0;\r
- FvHeader->Checksum = CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength);\r
+ FvHeader->BlockMap[0].NumBlocks = (UINT32)(FvSize / FvHeader->BlockMap[0].Length);\r
+ FvHeader->Checksum = 0;\r
+ FvHeader->Checksum = CalculateCheckSum16 ((UINT16 *)FvHeader, FvHeader->HeaderLength);\r
\r
return FvHeader;\r
}\r
-\r
// Global variable for this FVB driver which contains\r
// the private data of all firmware volume block instances\r
//\r
-FWB_GLOBAL mFvbModuleGlobal;\r
+FWB_GLOBAL mFvbModuleGlobal;\r
\r
-FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {\r
+FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {\r
{\r
{\r
HARDWARE_DEVICE_PATH,\r
}\r
},\r
EfiMemoryMappedIO,\r
- (EFI_PHYSICAL_ADDRESS) 0,\r
- (EFI_PHYSICAL_ADDRESS) 0,\r
+ (EFI_PHYSICAL_ADDRESS)0,\r
+ (EFI_PHYSICAL_ADDRESS)0,\r
},\r
{\r
END_DEVICE_PATH_TYPE,\r
}\r
};\r
\r
-FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {\r
+FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {\r
{\r
{\r
MEDIA_DEVICE_PATH,\r
}\r
};\r
\r
-\r
-EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {\r
+EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {\r
FVB_DEVICE_SIGNATURE,\r
NULL,\r
0, // Instance\r
} // FwVolBlockInstance\r
};\r
\r
-\r
/**\r
Get the pointer to EFI_FW_VOL_INSTANCE from the buffer pointed\r
by mFvbModuleGlobal.FvInstance based on a index.\r
**/\r
EFI_FW_VOL_INSTANCE *\r
GetFvbInstance (\r
- IN UINTN Instance\r
+ IN UINTN Instance\r
)\r
{\r
- EFI_FW_VOL_INSTANCE *FwhRecord;\r
+ EFI_FW_VOL_INSTANCE *FwhRecord;\r
\r
if ( Instance >= mFvbModuleGlobal.NumFv ) {\r
ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);\r
//\r
FwhRecord = mFvbModuleGlobal.FvInstance;\r
while ( Instance > 0 ) {\r
- FwhRecord = (EFI_FW_VOL_INSTANCE *) ((UINTN)((UINT8 *)FwhRecord) +\r
- FwhRecord->VolumeHeader.HeaderLength +\r
- (sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));\r
+ FwhRecord = (EFI_FW_VOL_INSTANCE *)((UINTN)((UINT8 *)FwhRecord) +\r
+ FwhRecord->VolumeHeader.HeaderLength +\r
+ (sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));\r
Instance--;\r
}\r
\r
return FwhRecord;\r
-\r
}\r
\r
-\r
/**\r
Get the EFI_FVB_ATTRIBUTES_2 of a FV.\r
\r
STATIC\r
EFI_FVB_ATTRIBUTES_2\r
FvbGetVolumeAttributes (\r
- IN UINTN Instance\r
+ IN UINTN Instance\r
)\r
{\r
- EFI_FW_VOL_INSTANCE * FwInstance;\r
- FwInstance = GetFvbInstance(Instance);\r
+ EFI_FW_VOL_INSTANCE *FwInstance;\r
+\r
+ FwInstance = GetFvbInstance (Instance);\r
ASSERT (FwInstance != NULL);\r
\r
if (FwInstance == NULL) {\r
return FwInstance->VolumeHeader.Attributes;\r
}\r
\r
-\r
-\r
/**\r
Retrieves the starting address of an LBA in an FV. It also\r
return a few other attribut of the FV.\r
STATIC\r
EFI_STATUS\r
FvbGetLbaAddress (\r
- IN UINTN Instance,\r
- IN EFI_LBA Lba,\r
- OUT UINTN *LbaAddress,\r
- OUT UINTN *LbaLength,\r
- OUT UINTN *NumOfBlocks\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ OUT UINTN *LbaAddress,\r
+ OUT UINTN *LbaLength,\r
+ OUT UINTN *NumOfBlocks\r
)\r
{\r
- UINT32 NumBlocks;\r
- UINT32 BlockLength;\r
- UINTN Offset;\r
- EFI_LBA StartLba;\r
- EFI_LBA NextLba;\r
- EFI_FW_VOL_INSTANCE *FwhInstance;\r
- EFI_FV_BLOCK_MAP_ENTRY *BlockMap;\r
+ UINT32 NumBlocks;\r
+ UINT32 BlockLength;\r
+ UINTN Offset;\r
+ EFI_LBA StartLba;\r
+ EFI_LBA NextLba;\r
+ EFI_FW_VOL_INSTANCE *FwhInstance;\r
+ EFI_FV_BLOCK_MAP_ENTRY *BlockMap;\r
\r
//\r
// Find the right instance of the FVB private data\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- StartLba = 0;\r
- Offset = 0;\r
- BlockMap = &FwhInstance->VolumeHeader.BlockMap[0];\r
+ StartLba = 0;\r
+ Offset = 0;\r
+ BlockMap = &FwhInstance->VolumeHeader.BlockMap[0];\r
ASSERT (BlockMap != NULL);\r
\r
//\r
BlockLength = BlockMap->Length;\r
}\r
\r
- if ( NumBlocks == 0 || BlockLength == 0) {\r
+ if ((NumBlocks == 0) || (BlockLength == 0)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
//\r
// The map entry found\r
//\r
- if (Lba >= StartLba && Lba < NextLba) {\r
- Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);\r
+ if ((Lba >= StartLba) && (Lba < NextLba)) {\r
+ Offset = Offset + (UINTN)MultU64x32 ((Lba - StartLba), BlockLength);\r
if (LbaAddress != NULL) {\r
*LbaAddress = FwhInstance->FvBase + Offset;\r
}\r
if (NumOfBlocks != NULL) {\r
*NumOfBlocks = (UINTN)(NextLba - Lba);\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
- StartLba = NextLba;\r
- Offset = Offset + NumBlocks * BlockLength;\r
+ StartLba = NextLba;\r
+ Offset = Offset + NumBlocks * BlockLength;\r
BlockMap++;\r
}\r
}\r
\r
-\r
/**\r
Reads specified number of bytes into a buffer from the specified block\r
\r
STATIC\r
EFI_STATUS\r
FvbReadBlock (\r
- IN UINTN Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BlockOffset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BlockOffset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
- EFI_FVB_ATTRIBUTES_2 Attributes;\r
- UINTN LbaAddress;\r
- UINTN LbaLength;\r
- EFI_STATUS Status;\r
- EFI_STATUS ReadStatus;\r
+ EFI_FVB_ATTRIBUTES_2 Attributes;\r
+ UINTN LbaAddress;\r
+ UINTN LbaLength;\r
+ EFI_STATUS Status;\r
+ EFI_STATUS ReadStatus;\r
\r
- if ( (NumBytes == NULL) || (Buffer == NULL)) {\r
+ if ((NumBytes == NULL) || (Buffer == NULL)) {\r
return (EFI_INVALID_PARAMETER);\r
}\r
+\r
if (*NumBytes == 0) {\r
return (EFI_INVALID_PARAMETER);\r
}\r
\r
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
Attributes = FvbGetVolumeAttributes (Instance);\r
\r
- if ( (Attributes & EFI_FVB2_READ_STATUS) == 0) {\r
+ if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {\r
return (EFI_ACCESS_DENIED);\r
}\r
\r
if (BlockOffset > LbaLength) {\r
- return (EFI_INVALID_PARAMETER);\r
+ return (EFI_INVALID_PARAMETER);\r
}\r
\r
- if (LbaLength < ( *NumBytes + BlockOffset ) ) {\r
- *NumBytes = (UINT32) (LbaLength - BlockOffset);\r
- Status = EFI_BAD_BUFFER_SIZE;\r
+ if (LbaLength < (*NumBytes + BlockOffset)) {\r
+ *NumBytes = (UINT32)(LbaLength - BlockOffset);\r
+ Status = EFI_BAD_BUFFER_SIZE;\r
}\r
\r
ReadStatus = LibFvbFlashDeviceRead (LbaAddress + BlockOffset, NumBytes, Buffer);\r
- if (EFI_ERROR(ReadStatus)) {\r
+ if (EFI_ERROR (ReadStatus)) {\r
return ReadStatus;\r
}\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Writes specified number of bytes from the input buffer to the block\r
\r
**/\r
EFI_STATUS\r
FvbWriteBlock (\r
- IN UINTN Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BlockOffset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BlockOffset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
- EFI_FVB_ATTRIBUTES_2 Attributes;\r
- UINTN LbaAddress;\r
- UINTN LbaLength;\r
- EFI_STATUS Status;\r
+ EFI_FVB_ATTRIBUTES_2 Attributes;\r
+ UINTN LbaAddress;\r
+ UINTN LbaLength;\r
+ EFI_STATUS Status;\r
\r
- if ( (NumBytes == NULL) || (Buffer == NULL)) {\r
+ if ((NumBytes == NULL) || (Buffer == NULL)) {\r
return (EFI_INVALID_PARAMETER);\r
}\r
+\r
if (*NumBytes == 0) {\r
return (EFI_INVALID_PARAMETER);\r
}\r
\r
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
// Check if the FV is write enabled\r
//\r
Attributes = FvbGetVolumeAttributes (Instance);\r
- if ( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {\r
+ if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {\r
return EFI_ACCESS_DENIED;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if ( LbaLength < ( *NumBytes + BlockOffset ) ) {\r
- DEBUG ((DEBUG_ERROR,\r
+ if ( LbaLength < (*NumBytes + BlockOffset)) {\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
"FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",\r
- *NumBytes, (UINT32)(LbaLength - BlockOffset)));\r
- *NumBytes = (UINT32) (LbaLength - BlockOffset);\r
+ *NumBytes,\r
+ (UINT32)(LbaLength - BlockOffset)\r
+ ));\r
+ *NumBytes = (UINT32)(LbaLength - BlockOffset);\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
Status = LibFvbFlashDeviceWrite (LbaAddress + BlockOffset, NumBytes, Buffer);\r
\r
LibFvbFlashDeviceBlockLock (LbaAddress, LbaLength, TRUE);\r
- WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);\r
+ WriteBackInvalidateDataCacheRange ((VOID *)(LbaAddress + BlockOffset), *NumBytes);\r
return Status;\r
}\r
\r
-\r
/**\r
Erases and initializes a firmware volume block\r
\r
**/\r
EFI_STATUS\r
FvbEraseBlock (\r
- IN UINTN Instance,\r
- IN EFI_LBA Lba\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba\r
)\r
{\r
-\r
- EFI_FVB_ATTRIBUTES_2 Attributes;\r
- UINTN LbaAddress;\r
- UINTN LbaLength;\r
- EFI_STATUS Status;\r
+ EFI_FVB_ATTRIBUTES_2 Attributes;\r
+ UINTN LbaAddress;\r
+ UINTN LbaLength;\r
+ EFI_STATUS Status;\r
\r
//\r
// Check if the FV is write enabled\r
//\r
Attributes = FvbGetVolumeAttributes (Instance);\r
\r
- if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {\r
+ if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {\r
return (EFI_ACCESS_DENIED);\r
}\r
\r
// Get the starting address of the block for erase.\r
//\r
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
\r
LibFvbFlashDeviceBlockLock (LbaAddress, LbaLength, TRUE);\r
\r
- WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);\r
+ WriteBackInvalidateDataCacheRange ((VOID *)LbaAddress, LbaLength);\r
\r
return Status;\r
}\r
STATIC\r
EFI_STATUS\r
FvbSetVolumeAttributes (\r
- IN UINTN Instance,\r
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+ IN UINTN Instance,\r
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
)\r
{\r
- EFI_FW_VOL_INSTANCE *FwhInstance;\r
- EFI_FVB_ATTRIBUTES_2 OldAttributes;\r
- EFI_FVB_ATTRIBUTES_2 *AttribPtr;\r
- EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;\r
- UINT32 Capabilities;\r
- UINT32 OldStatus;\r
- UINT32 NewStatus;\r
+ EFI_FW_VOL_INSTANCE *FwhInstance;\r
+ EFI_FVB_ATTRIBUTES_2 OldAttributes;\r
+ EFI_FVB_ATTRIBUTES_2 *AttribPtr;\r
+ EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;\r
+ UINT32 Capabilities;\r
+ UINT32 OldStatus;\r
+ UINT32 NewStatus;\r
\r
//\r
// Find the right instance of the FVB private data\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FwhInstance->VolumeHeader.Attributes);\r
+ AttribPtr = (EFI_FVB_ATTRIBUTES_2 *)&(FwhInstance->VolumeHeader.Attributes);\r
ASSERT (AttribPtr != NULL);\r
if ( AttribPtr == NULL) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Retrieves the physical address of the device.\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetPhysicalAddress (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- OUT EFI_PHYSICAL_ADDRESS *Address\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ OUT EFI_PHYSICAL_ADDRESS *Address\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
- EFI_FW_VOL_INSTANCE *FwhInstance;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_FW_VOL_INSTANCE *FwhInstance;\r
\r
FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
- FwhInstance = GetFvbInstance(FvbDevice->Instance);\r
+ FwhInstance = GetFvbInstance (FvbDevice->Instance);\r
if (FwhInstance == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
return EFI_SUCCESS;\r
}\r
\r
-\r
-\r
/**\r
Retrieve the size of a logical block\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetBlockSize (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- OUT UINTN *BlockSize,\r
- OUT UINTN *NumOfBlocks\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ OUT UINTN *BlockSize,\r
+ OUT UINTN *NumOfBlocks\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
\r
FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
return FvbGetLbaAddress (FvbDevice->Instance, Lba, NULL, BlockSize, NumOfBlocks);\r
}\r
\r
-\r
/**\r
Retrieves Volume attributes. No polarity translations are done.\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetAttributes (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
\r
- FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
+ FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
*Attributes = FvbGetVolumeAttributes (FvbDevice->Instance);\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Sets Volume attributes. No polarity translations are done.\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolSetAttributes (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_STATUS Status;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
\r
FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
Status = FvbSetVolumeAttributes (FvbDevice->Instance, Attributes);\r
return Status;\r
}\r
\r
-\r
-\r
/**\r
This function erases one or more blocks as denoted by the\r
variable argument list. The entire parameter list of blocks must be verified\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolEraseBlocks (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
...\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
- EFI_FW_VOL_INSTANCE *FwhInstance;\r
- UINTN NumOfBlocks;\r
- VA_LIST args;\r
- EFI_LBA StartingLba;\r
- UINTN NumOfLba;\r
- EFI_STATUS Status;\r
-\r
- FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
- FwhInstance = GetFvbInstance (FvbDevice->Instance);\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_FW_VOL_INSTANCE *FwhInstance;\r
+ UINTN NumOfBlocks;\r
+ VA_LIST args;\r
+ EFI_LBA StartingLba;\r
+ UINTN NumOfLba;\r
+ EFI_STATUS Status;\r
+\r
+ FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
+ FwhInstance = GetFvbInstance (FvbDevice->Instance);\r
if (FwhInstance == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {\r
+ if ((StartingLba + NumOfLba) > NumOfBlocks ) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- } while ( 1 );\r
+ } while (1);\r
\r
VA_END (args);\r
\r
\r
while ( NumOfLba > 0 ) {\r
Status = FvbEraseBlock (FvbDevice->Instance, StartingLba);\r
- if ( EFI_ERROR(Status)) {\r
+ if ( EFI_ERROR (Status)) {\r
VA_END (args);\r
return Status;\r
}\r
+\r
StartingLba++;\r
NumOfLba--;\r
}\r
- } while ( 1 );\r
+ } while (1);\r
\r
VA_END (args);\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
-\r
/**\r
Writes data beginning at Lba:Offset from FV. The write terminates either\r
when *NumBytes of data have been written, or when a block boundary is\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolWrite (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
- EFI_STATUS Status;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_STATUS Status;\r
\r
FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
Status = FvbWriteBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);\r
- DEBUG((DEBUG_VERBOSE,\r
+ DEBUG ((\r
+ DEBUG_VERBOSE,\r
"FvbWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x Status:%r\n",\r
- Lba, Offset, *NumBytes, Buffer, Status));\r
+ Lba,\r
+ Offset,\r
+ *NumBytes,\r
+ Buffer,\r
+ Status\r
+ ));\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Reads data beginning at Lba:Offset from FV. The Read terminates either\r
when *NumBytes of data have been read, or when a block boundary is\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolRead (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- OUT UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ OUT UINT8 *Buffer\r
)\r
{\r
-\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
- EFI_STATUS Status;\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_STATUS Status;\r
\r
FvbDevice = FVB_DEVICE_FROM_THIS (This);\r
Status = FvbReadBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);\r
- DEBUG((DEBUG_VERBOSE,\r
+ DEBUG ((\r
+ DEBUG_VERBOSE,\r
"FvbRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x, Status:%r\n",\r
- Lba, Offset, *NumBytes, Buffer, Status));\r
+ Lba,\r
+ Offset,\r
+ *NumBytes,\r
+ Buffer,\r
+ Status\r
+ ));\r
\r
return Status;\r
}\r
**/\r
BOOLEAN\r
IsFvHeaderValid (\r
- IN EFI_PHYSICAL_ADDRESS FvBase\r
+ IN EFI_PHYSICAL_ADDRESS FvBase\r
)\r
{\r
- UINT16 Sum;\r
- EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;\r
+ UINT16 Sum;\r
+ EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;\r
\r
- FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FvBase;\r
- if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {\r
- if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {\r
- DEBUG((DEBUG_INFO, " --FileSystemGuid not match: %g\n", &FwVolHeader->FileSystemGuid));\r
+ FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FvBase;\r
+ if (FvBase == PcdGet32 (PcdFlashNvStorageVariableBase)) {\r
+ if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof (EFI_GUID)) != 0 ) {\r
+ DEBUG ((DEBUG_INFO, " --FileSystemGuid not match: %g\n", &FwVolHeader->FileSystemGuid));\r
return FALSE;\r
}\r
} else {\r
- if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {\r
- DEBUG((DEBUG_INFO, " --not expected guid.\n"));\r
+ if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof (EFI_GUID)) != 0 ) {\r
+ DEBUG ((DEBUG_INFO, " --not expected guid.\n"));\r
return FALSE;\r
}\r
}\r
\r
- if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||\r
- (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||\r
- (FwVolHeader->FvLength == ((UINTN) -1)) ||\r
- ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {\r
- DEBUG((DEBUG_INFO, " -- >Revision = 0x%x, Signature = 0x%x\n", FwVolHeader->Revision, FwVolHeader->Signature ));\r
- DEBUG((DEBUG_INFO, " -- >FvLength = 0x%lx, HeaderLength = 0x%x\n", FwVolHeader->FvLength, FwVolHeader->HeaderLength ));\r
+ if ((FwVolHeader->Revision != EFI_FVH_REVISION) ||\r
+ (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||\r
+ (FwVolHeader->FvLength == ((UINTN)-1)) ||\r
+ ((FwVolHeader->HeaderLength & 0x01) != 0))\r
+ {\r
+ DEBUG ((DEBUG_INFO, " -- >Revision = 0x%x, Signature = 0x%x\n", FwVolHeader->Revision, FwVolHeader->Signature));\r
+ DEBUG ((DEBUG_INFO, " -- >FvLength = 0x%lx, HeaderLength = 0x%x\n", FwVolHeader->FvLength, FwVolHeader->HeaderLength));\r
return FALSE;\r
}\r
\r
- Sum = CalculateSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);\r
+ Sum = CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderLength);\r
if (Sum != 0) {\r
- DEBUG((DEBUG_INFO, "error: checksum: 0x%04X (expect 0x0)\n", Sum));\r
+ DEBUG ((DEBUG_INFO, "error: checksum: 0x%04X (expect 0x0)\n", Sum));\r
return FALSE;\r
}\r
\r
return TRUE;\r
}\r
\r
-\r
/**\r
Get intial variable data.\r
\r
**/\r
EFI_STATUS\r
GetInitialVariableData (\r
- OUT VOID **VarData,\r
- OUT UINTN *VarSize\r
+ OUT VOID **VarData,\r
+ OUT UINTN *VarSize\r
)\r
{\r
EFI_STATUS Status;\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Status = GetSectionFromAnyFv (PcdGetPtr(PcdNvsDataFile), EFI_SECTION_RAW, 0, &ImageData, &ImageSize);\r
+ Status = GetSectionFromAnyFv (PcdGetPtr (PcdNvsDataFile), EFI_SECTION_RAW, 0, &ImageData, &ImageSize);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) ImageData;\r
- VariableStore = (VARIABLE_STORE_HEADER *) ((UINT8 *)ImageData + FvHeader->HeaderLength);\r
+ FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *)ImageData;\r
+ VariableStore = (VARIABLE_STORE_HEADER *)((UINT8 *)ImageData + FvHeader->HeaderLength);\r
VarEndAddr = (UINTN)VariableStore + VariableStore->Size;\r
- Variable = (AUTHENTICATED_VARIABLE_HEADER *) HEADER_ALIGN (VariableStore + 1);\r
+ Variable = (AUTHENTICATED_VARIABLE_HEADER *)HEADER_ALIGN (VariableStore + 1);\r
*VarData = (VOID *)Variable;\r
while (((UINTN)Variable < VarEndAddr)) {\r
if (Variable->StartId != VARIABLE_DATA) {\r
break;\r
}\r
+\r
VariableSize = sizeof (AUTHENTICATED_VARIABLE_HEADER) + Variable->DataSize + Variable->NameSize;\r
- Variable = (AUTHENTICATED_VARIABLE_HEADER *) HEADER_ALIGN ((UINTN) Variable + VariableSize);\r
+ Variable = (AUTHENTICATED_VARIABLE_HEADER *)HEADER_ALIGN ((UINTN)Variable + VariableSize);\r
}\r
\r
*VarSize = (UINTN)Variable - HEADER_ALIGN (VariableStore + 1);\r
VOID\r
)\r
{\r
- EFI_FW_VOL_INSTANCE *FwVolInstance;\r
- EFI_FIRMWARE_VOLUME_HEADER *FvHeader;\r
- EFI_FV_BLOCK_MAP_ENTRY *BlockMap;\r
- EFI_PHYSICAL_ADDRESS BaseAddress;\r
- UINTN WriteAddr;\r
- EFI_STATUS Status;\r
- UINTN BufferSize;\r
- UINTN Length;\r
- VARIABLE_STORE_HEADER VariableStore;\r
- VOID *VarData;\r
+ EFI_FW_VOL_INSTANCE *FwVolInstance;\r
+ EFI_FIRMWARE_VOLUME_HEADER *FvHeader;\r
+ EFI_FV_BLOCK_MAP_ENTRY *BlockMap;\r
+ EFI_PHYSICAL_ADDRESS BaseAddress;\r
+ UINTN WriteAddr;\r
+ EFI_STATUS Status;\r
+ UINTN BufferSize;\r
+ UINTN Length;\r
+ VARIABLE_STORE_HEADER VariableStore;\r
+ VOID *VarData;\r
\r
InitVariableStore ();\r
- BaseAddress = PcdGet32(PcdFlashNvStorageVariableBase);\r
- FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;\r
+ BaseAddress = PcdGet32 (PcdFlashNvStorageVariableBase);\r
+ FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)BaseAddress;\r
\r
//\r
// Check FV header and variable store header\r
LibFvbFlashDeviceBlockLock ((UINTN)BaseAddress, FvHeader->BlockMap->Length, FALSE);\r
\r
Status = LibFvbFlashDeviceBlockErase ((UINTN)BaseAddress, FvHeader->BlockMap->Length);\r
- ASSERT_EFI_ERROR(Status);\r
+ ASSERT_EFI_ERROR (Status);\r
\r
- Length = FvHeader->HeaderLength;\r
- WriteAddr = (UINTN)BaseAddress;\r
- Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *) FvHeader);\r
+ Length = FvHeader->HeaderLength;\r
+ WriteAddr = (UINTN)BaseAddress;\r
+ Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *)FvHeader);\r
WriteAddr += Length;\r
- ASSERT_EFI_ERROR(Status);\r
+ ASSERT_EFI_ERROR (Status);\r
\r
//\r
// Write back variable store header\r
//\r
- VariableStore.Size = PcdGet32(PcdFlashNvStorageVariableSize) - FvHeader->HeaderLength;\r
+ VariableStore.Size = PcdGet32 (PcdFlashNvStorageVariableSize) - FvHeader->HeaderLength;\r
VariableStore.Format = VARIABLE_STORE_FORMATTED;\r
VariableStore.State = VARIABLE_STORE_HEALTHY;\r
CopyGuid (&VariableStore.Signature, &gEfiAuthenticatedVariableGuid);\r
BufferSize = sizeof (VARIABLE_STORE_HEADER);\r
- Status = LibFvbFlashDeviceWrite (WriteAddr, &BufferSize, (UINT8 *) &VariableStore);\r
+ Status = LibFvbFlashDeviceWrite (WriteAddr, &BufferSize, (UINT8 *)&VariableStore);\r
WriteAddr += BufferSize;\r
- ASSERT_EFI_ERROR(Status);\r
+ ASSERT_EFI_ERROR (Status);\r
\r
//\r
// Write initial variable data if found\r
//\r
Status = GetInitialVariableData (&VarData, &Length);\r
if (!EFI_ERROR (Status)) {\r
- Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *) VarData);\r
- ASSERT_EFI_ERROR(Status);\r
+ Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *)VarData);\r
+ ASSERT_EFI_ERROR (Status);\r
}\r
\r
LibFvbFlashDeviceBlockLock ((UINTN)BaseAddress, FvHeader->BlockMap->Length, TRUE);\r
- WriteBackInvalidateDataCacheRange ((VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);\r
+ WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)BaseAddress, FvHeader->BlockMap->Length);\r
}\r
\r
//\r
// Create a new FW volume instance for NVS variable\r
//\r
BufferSize = FvHeader->HeaderLength + sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER);\r
- FwVolInstance = (EFI_FW_VOL_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);\r
+ FwVolInstance = (EFI_FW_VOL_INSTANCE *)AllocateRuntimeZeroPool (BufferSize);\r
if (FwVolInstance == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
+\r
FwVolInstance->FvBase = (UINTN)BaseAddress;\r
CopyMem (&FwVolInstance->VolumeHeader, FvHeader, FvHeader->HeaderLength);\r
\r
// Process the block map for each FV. Assume it has same block size.\r
//\r
FwVolInstance->NumOfBlocks = 0;\r
- FvHeader = &FwVolInstance->VolumeHeader;\r
+ FvHeader = &FwVolInstance->VolumeHeader;\r
for (BlockMap = FvHeader->BlockMap; BlockMap->NumBlocks != 0; BlockMap++) {\r
FwVolInstance->NumOfBlocks += BlockMap->NumBlocks;\r
}\r
// Define two helper macro to extract the Capability field or Status field in FVB\r
// bit fields\r
//\r
-#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \\r
+#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP |\\r
EFI_FVB2_READ_ENABLED_CAP | \\r
EFI_FVB2_WRITE_DISABLED_CAP | \\r
EFI_FVB2_WRITE_ENABLED_CAP | \\r
EFI_FVB2_LOCK_CAP \\r
)\r
\r
-#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)\r
-\r
+#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)\r
\r
typedef struct {\r
- UINTN FvBase;\r
- UINTN NumOfBlocks;\r
+ UINTN FvBase;\r
+ UINTN NumOfBlocks;\r
//\r
// Note!!!: VolumeHeader must be the last element\r
// of the structure.\r
//\r
- EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;\r
+ EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;\r
} EFI_FW_VOL_INSTANCE;\r
\r
-\r
typedef struct {\r
- EFI_FW_VOL_INSTANCE *FvInstance;\r
- UINT32 NumFv;\r
- UINT32 Flags;\r
+ EFI_FW_VOL_INSTANCE *FvInstance;\r
+ UINT32 NumFv;\r
+ UINT32 Flags;\r
} FWB_GLOBAL;\r
\r
//\r
// Fvb Protocol instance data\r
//\r
-#define FVB_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)\r
-#define FVB_EXTEND_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FvbExtension, FVB_DEVICE_SIGNATURE)\r
-#define FVB_DEVICE_SIGNATURE SIGNATURE_32('F','V','B','C')\r
+#define FVB_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)\r
+#define FVB_EXTEND_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FvbExtension, FVB_DEVICE_SIGNATURE)\r
+#define FVB_DEVICE_SIGNATURE SIGNATURE_32('F','V','B','C')\r
\r
typedef struct {\r
- MEDIA_FW_VOL_DEVICE_PATH FvDevPath;\r
- EFI_DEVICE_PATH_PROTOCOL EndDevPath;\r
+ MEDIA_FW_VOL_DEVICE_PATH FvDevPath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevPath;\r
} FV_PIWG_DEVICE_PATH;\r
\r
typedef struct {\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetAttributes (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolSetAttributes (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetPhysicalAddress (\r
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- OUT EFI_PHYSICAL_ADDRESS *Address\r
+ OUT EFI_PHYSICAL_ADDRESS *Address\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolGetBlockSize (\r
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- OUT UINTN *BlockSize,\r
- OUT UINTN *NumOfBlocks\r
+ IN EFI_LBA Lba,\r
+ OUT UINTN *BlockSize,\r
+ OUT UINTN *NumOfBlocks\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolRead (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- OUT UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ OUT UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolWrite (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbProtocolEraseBlocks (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,\r
...\r
);\r
\r
EFI_FW_VOL_INSTANCE *\r
GetFvbInstance (\r
- IN UINTN Instance\r
+ IN UINTN Instance\r
);\r
\r
EFI_STATUS\r
InstallFvbProtocol (\r
- IN EFI_FW_VOL_INSTANCE *FwhInstance,\r
- IN UINTN InstanceNum\r
+ IN EFI_FW_VOL_INSTANCE *FwhInstance,\r
+ IN UINTN InstanceNum\r
);\r
\r
EFI_STATUS\r
VOID\r
);\r
\r
-extern FWB_GLOBAL mFvbModuleGlobal;\r
-extern EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate;\r
-extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;\r
-extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;\r
+extern FWB_GLOBAL mFvbModuleGlobal;\r
+extern EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate;\r
+extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;\r
+extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;\r
\r
#endif\r
**/\r
EFI_STATUS\r
InstallFvbProtocol (\r
- IN EFI_FW_VOL_INSTANCE *FwhInstance,\r
- IN UINTN InstanceNum\r
+ IN EFI_FW_VOL_INSTANCE *FwhInstance,\r
+ IN UINTN InstanceNum\r
)\r
{\r
- EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
- EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;\r
- EFI_STATUS Status;\r
- EFI_HANDLE FvbHandle;\r
- FV_MEMMAP_DEVICE_PATH *FvDevicePath;\r
- VOID *TempPtr;\r
-\r
- FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *) AllocateRuntimeCopyPool (\r
- sizeof (EFI_FW_VOL_BLOCK_DEVICE),\r
- &mFvbDeviceTemplate\r
- );\r
+ EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;\r
+ EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE FvbHandle;\r
+ FV_MEMMAP_DEVICE_PATH *FvDevicePath;\r
+ VOID *TempPtr;\r
+\r
+ FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *)AllocateRuntimeCopyPool (\r
+ sizeof (EFI_FW_VOL_BLOCK_DEVICE),\r
+ &mFvbDeviceTemplate\r
+ );\r
if (FvbDevice == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
//\r
// FV does not contains extension header, then produce MEMMAP_DEVICE_PATH\r
//\r
- TempPtr = AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);\r
- FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) TempPtr;\r
+ TempPtr = AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);\r
+ FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)TempPtr;\r
if (FvbDevice->DevicePath == NULL) {\r
ASSERT (FALSE);\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- FvDevicePath = (FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath;\r
+\r
+ FvDevicePath = (FV_MEMMAP_DEVICE_PATH *)FvbDevice->DevicePath;\r
FvDevicePath->MemMapDevPath.StartingAddress = FwhInstance->FvBase;\r
FvDevicePath->MemMapDevPath.EndingAddress = FwhInstance->FvBase + FwVolHeader->FvLength - 1;\r
} else {\r
- TempPtr = AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);\r
- FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) TempPtr;\r
+ TempPtr = AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);\r
+ FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)TempPtr;\r
if (FvbDevice->DevicePath == NULL) {\r
ASSERT (FALSE);\r
return EFI_OUT_OF_RESOURCES;\r
// Install the SMM Firmware Volume Block Protocol and Device Path Protocol\r
//\r
FvbHandle = NULL;\r
- Status = gSmst->SmmInstallProtocolInterface (\r
- &FvbHandle,\r
- &gEfiSmmFirmwareVolumeBlockProtocolGuid,\r
- EFI_NATIVE_INTERFACE,\r
- &FvbDevice->FwVolBlockInstance\r
- );\r
+ Status = gSmst->SmmInstallProtocolInterface (\r
+ &FvbHandle,\r
+ &gEfiSmmFirmwareVolumeBlockProtocolGuid,\r
+ EFI_NATIVE_INTERFACE,\r
+ &FvbDevice->FwVolBlockInstance\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = gSmst->SmmInstallProtocolInterface (\r
// Notify the Fvb wrapper driver SMM fvb is ready\r
//\r
FvbHandle = NULL;\r
- Status = gBS->InstallProtocolInterface (\r
- &FvbHandle,\r
- &gEfiSmmFirmwareVolumeBlockProtocolGuid,\r
- EFI_NATIVE_INTERFACE,\r
- &FvbDevice->FwVolBlockInstance\r
- );\r
+ Status = gBS->InstallProtocolInterface (\r
+ &FvbHandle,\r
+ &gEfiSmmFirmwareVolumeBlockProtocolGuid,\r
+ EFI_NATIVE_INTERFACE,\r
+ &FvbDevice->FwVolBlockInstance\r
+ );\r
\r
return Status;\r
}\r
\r
-\r
/**\r
The driver entry point for SMM Firmware Volume Block Driver.\r
\r
EFI_STATUS\r
EFIAPI\r
FvbSmmInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
FvbInitialize ();\r
\r
#include <Protocol/SmmFirmwareVolumeBlock.h>\r
\r
-#define EFI_FUNCTION_GET_ATTRIBUTES 1\r
-#define EFI_FUNCTION_SET_ATTRIBUTES 2\r
-#define EFI_FUNCTION_GET_PHYSICAL_ADDRESS 3\r
-#define EFI_FUNCTION_GET_BLOCK_SIZE 4\r
-#define EFI_FUNCTION_READ 5\r
-#define EFI_FUNCTION_WRITE 6\r
-#define EFI_FUNCTION_ERASE_BLOCKS 7\r
+#define EFI_FUNCTION_GET_ATTRIBUTES 1\r
+#define EFI_FUNCTION_SET_ATTRIBUTES 2\r
+#define EFI_FUNCTION_GET_PHYSICAL_ADDRESS 3\r
+#define EFI_FUNCTION_GET_BLOCK_SIZE 4\r
+#define EFI_FUNCTION_READ 5\r
+#define EFI_FUNCTION_WRITE 6\r
+#define EFI_FUNCTION_ERASE_BLOCKS 7\r
\r
typedef struct {\r
- UINTN Function;\r
- EFI_STATUS ReturnStatus;\r
- UINT8 Data[1];\r
+ UINTN Function;\r
+ EFI_STATUS ReturnStatus;\r
+ UINT8 Data[1];\r
} SMM_FVB_COMMUNICATE_FUNCTION_HEADER;\r
\r
-\r
///\r
/// Size of SMM communicate header, without including the payload.\r
///\r
#define SMM_FVB_COMMUNICATE_HEADER_SIZE (OFFSET_OF (SMM_FVB_COMMUNICATE_FUNCTION_HEADER, Data))\r
\r
typedef struct {\r
- EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
- EFI_FVB_ATTRIBUTES_2 Attributes;\r
+ EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
+ EFI_FVB_ATTRIBUTES_2 Attributes;\r
} SMM_FVB_ATTRIBUTES_HEADER;\r
\r
typedef struct {\r
- EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
- EFI_PHYSICAL_ADDRESS Address;\r
+ EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
+ EFI_PHYSICAL_ADDRESS Address;\r
} SMM_FVB_PHYSICAL_ADDRESS_HEADER;\r
\r
typedef struct {\r
- EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
- EFI_LBA Lba;\r
- UINTN BlockSize;\r
- UINTN NumOfBlocks;\r
+ EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
+ EFI_LBA Lba;\r
+ UINTN BlockSize;\r
+ UINTN NumOfBlocks;\r
} SMM_FVB_BLOCK_SIZE_HEADER;\r
\r
typedef struct {\r
- EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
- EFI_LBA Lba;\r
- UINTN Offset;\r
- UINTN NumBytes;\r
+ EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
+ EFI_LBA Lba;\r
+ UINTN Offset;\r
+ UINTN NumBytes;\r
} SMM_FVB_READ_WRITE_HEADER;\r
\r
typedef struct {\r
- EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
- EFI_LBA StartLba;\r
- UINTN NumOfLba;\r
+ EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;\r
+ EFI_LBA StartLba;\r
+ UINTN NumOfLba;\r
} SMM_FVB_BLOCKS_HEADER;\r
\r
#endif\r
#include <PiDxe.h>\r
#include <Library/UefiLib.h>\r
\r
-extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;\r
+extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;\r
\r
//\r
// Driver name table for GraphicsOutput module.\r
// It is shared by the implementation of ComponentName & ComponentName2 Protocol.\r
//\r
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsOutputDriverNameTable[] = {\r
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsOutputDriverNameTable[] = {\r
{\r
"eng;en",\r
L"Generic Graphics Output Driver"\r
This->SupportedLanguages,\r
mGraphicsOutputDriverNameTable,\r
DriverName,\r
- (BOOLEAN) (This == &mGraphicsOutputComponentName)\r
+ (BOOLEAN)(This == &mGraphicsOutputComponentName)\r
);\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputComponentNameGetControllerName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN EFI_HANDLE ControllerHandle,\r
- IN EFI_HANDLE ChildHandle OPTIONAL,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **ControllerName\r
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
+ IN EFI_HANDLE ControllerHandle,\r
+ IN EFI_HANDLE ChildHandle OPTIONAL,\r
+ IN CHAR8 *Language,\r
+ OUT CHAR16 **ControllerName\r
)\r
{\r
return EFI_UNSUPPORTED;\r
//\r
// EFI Component Name 2 Protocol\r
//\r
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2 = {\r
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) GraphicsOutputComponentNameGetDriverName,\r
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) GraphicsOutputComponentNameGetControllerName,\r
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2 = {\r
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)GraphicsOutputComponentNameGetDriverName,\r
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)GraphicsOutputComponentNameGetControllerName,\r
"en"\r
};\r
**/\r
\r
#include "GraphicsOutput.h"\r
-CONST ACPI_ADR_DEVICE_PATH mGraphicsOutputAdrNode = {\r
+CONST ACPI_ADR_DEVICE_PATH mGraphicsOutputAdrNode = {\r
{\r
ACPI_DEVICE_PATH,\r
ACPI_ADR_DP,\r
ACPI_DISPLAY_ADR (1, 0, 0, 1, 0, ACPI_ADR_DISPLAY_TYPE_VGA, 0, 0)\r
};\r
\r
-EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {\r
+EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {\r
MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT8, MAX_UINT8\r
};\r
\r
// The driver should only start on one graphics controller.\r
// So a global flag is used to remember that the driver is already started.\r
//\r
-BOOLEAN mDriverStarted = FALSE;\r
+BOOLEAN mDriverStarted = FALSE;\r
\r
/**\r
Returns information for an available graphics mode that the graphics device\r
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
)\r
{\r
- if (This == NULL || Info == NULL || SizeOfInfo == NULL || ModeNumber >= This->Mode->MaxMode) {\r
+ if ((This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputSetMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN UINT32 ModeNumber\r
-)\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN UINT32 ModeNumber\r
+ )\r
{\r
- RETURN_STATUS Status;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;\r
- GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
+ RETURN_STATUS Status;\r
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;\r
+ GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
\r
if (ModeNumber >= This->Mode->MaxMode) {\r
return EFI_UNSUPPORTED;\r
\r
Private = GRAPHICS_OUTPUT_PRIVATE_FROM_THIS (This);\r
\r
- Black.Blue = 0;\r
- Black.Green = 0;\r
- Black.Red = 0;\r
+ Black.Blue = 0;\r
+ Black.Green = 0;\r
+ Black.Red = 0;\r
Black.Reserved = 0;\r
\r
Status = FrameBufferBlt (\r
Private->FrameBufferBltLibConfigure,\r
&Black,\r
EfiBltVideoFill,\r
- 0, 0,\r
- 0, 0,\r
+ 0,\r
+ 0,\r
+ 0,\r
+ 0,\r
This->Mode->Info->HorizontalResolution,\r
This->Mode->Info->VerticalResolution,\r
0\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputBlt (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL\r
)\r
{\r
- RETURN_STATUS Status;\r
- EFI_TPL Tpl;\r
- GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
+ RETURN_STATUS Status;\r
+ EFI_TPL Tpl;\r
+ GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
\r
Private = GRAPHICS_OUTPUT_PRIVATE_FROM_THIS (This);\r
//\r
// We would not want a timer based event (Cursor, ...) to come in while we are\r
// doing this operation.\r
//\r
- Tpl = gBS->RaiseTPL (TPL_NOTIFY);\r
+ Tpl = gBS->RaiseTPL (TPL_NOTIFY);\r
Status = FrameBufferBlt (\r
Private->FrameBufferBltLibConfigure,\r
BltBuffer,\r
BltOperation,\r
- SourceX, SourceY,\r
- DestinationX, DestinationY, Width, Height,\r
+ SourceX,\r
+ SourceY,\r
+ DestinationX,\r
+ DestinationY,\r
+ Width,\r
+ Height,\r
Delta\r
);\r
gBS->RestoreTPL (Tpl);\r
return RETURN_ERROR (Status) ? EFI_INVALID_PARAMETER : EFI_SUCCESS;\r
}\r
\r
-CONST GRAPHICS_OUTPUT_PRIVATE_DATA mGraphicsOutputInstanceTemplate = {\r
+CONST GRAPHICS_OUTPUT_PRIVATE_DATA mGraphicsOutputInstanceTemplate = {\r
GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE, // Signature\r
NULL, // GraphicsOutputHandle\r
{\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
\r
//\r
// Since there is only one GraphicsInfo HOB, the driver only manages one video device.\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
if (Status == EFI_ALREADY_STARTED) {\r
Status = EFI_SUCCESS;\r
}\r
+\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
gBS->CloseProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiDevicePathProtocolGuid,\r
- (VOID **) &DevicePath,\r
+ (VOID **)&DevicePath,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
if (Status == EFI_ALREADY_STARTED) {\r
Status = EFI_SUCCESS;\r
}\r
+\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
gBS->CloseProtocol (\r
Controller,\r
&gEfiDevicePathProtocolGuid,\r
\r
if ((RemainingDevicePath == NULL) ||\r
IsDevicePathEnd (RemainingDevicePath) ||\r
- CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0) {\r
+ (CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0))\r
+ {\r
return EFI_SUCCESS;\r
} else {\r
return EFI_INVALID_PARAMETER;\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS Status;\r
- RETURN_STATUS ReturnStatus;\r
- GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- EFI_DEVICE_PATH *PciDevicePath;\r
- PCI_TYPE00 Pci;\r
- UINT8 Index;\r
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;\r
- VOID *HobStart;\r
- EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;\r
- EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *DeviceInfo;\r
- EFI_PHYSICAL_ADDRESS FrameBufferBase;\r
+ EFI_STATUS Status;\r
+ RETURN_STATUS ReturnStatus;\r
+ GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_DEVICE_PATH *PciDevicePath;\r
+ PCI_TYPE00 Pci;\r
+ UINT8 Index;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;\r
+ VOID *HobStart;\r
+ EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;\r
+ EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *DeviceInfo;\r
+ EFI_PHYSICAL_ADDRESS FrameBufferBase;\r
\r
FrameBufferBase = 0;\r
\r
HobStart = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);\r
ASSERT ((HobStart != NULL) && (GET_GUID_HOB_DATA_SIZE (HobStart) == sizeof (EFI_PEI_GRAPHICS_INFO_HOB)));\r
- GraphicsInfo = (EFI_PEI_GRAPHICS_INFO_HOB *) (GET_GUID_HOB_DATA (HobStart));\r
+ GraphicsInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)(GET_GUID_HOB_DATA (HobStart));\r
\r
HobStart = GetFirstGuidHob (&gEfiGraphicsDeviceInfoHobGuid);\r
if ((HobStart == NULL) || (GET_GUID_HOB_DATA_SIZE (HobStart) < sizeof (*DeviceInfo))) {\r
DeviceInfo = &mDefaultGraphicsDeviceInfo;\r
DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB doesn't exist!\n", gEfiCallerBaseName));\r
} else {\r
- DeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *) (GET_GUID_HOB_DATA (HobStart));\r
- DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB:\n"\r
- " VendorId = %04x, DeviceId = %04x,\n"\r
- " RevisionId = %02x, BarIndex = %x,\n"\r
- " SubsystemVendorId = %04x, SubsystemId = %04x\n",\r
- gEfiCallerBaseName,\r
- DeviceInfo->VendorId, DeviceInfo->DeviceId,\r
- DeviceInfo->RevisionId, DeviceInfo->BarIndex,\r
- DeviceInfo->SubsystemVendorId, DeviceInfo->SubsystemId));\r
+ DeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *)(GET_GUID_HOB_DATA (HobStart));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "[%a]: GraphicsDeviceInfo HOB:\n"\r
+ " VendorId = %04x, DeviceId = %04x,\n"\r
+ " RevisionId = %02x, BarIndex = %x,\n"\r
+ " SubsystemVendorId = %04x, SubsystemId = %04x\n",\r
+ gEfiCallerBaseName,\r
+ DeviceInfo->VendorId,\r
+ DeviceInfo->DeviceId,\r
+ DeviceInfo->RevisionId,\r
+ DeviceInfo->BarIndex,\r
+ DeviceInfo->SubsystemVendorId,\r
+ DeviceInfo->SubsystemId\r
+ ));\r
}\r
\r
//\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
if (Status == EFI_ALREADY_STARTED) {\r
Status = EFI_SUCCESS;\r
}\r
+\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiDevicePathProtocolGuid,\r
- (VOID **) &PciDevicePath,\r
+ (VOID **)&PciDevicePath,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
if (Status == EFI_ALREADY_STARTED) {\r
Status = EFI_SUCCESS;\r
}\r
+\r
ASSERT_EFI_ERROR (Status);\r
\r
//\r
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (Pci), &Pci);\r
if (!EFI_ERROR (Status)) {\r
if (!IS_PCI_DISPLAY (&Pci) || (\r
- ((DeviceInfo->VendorId != MAX_UINT16) && (DeviceInfo->VendorId != Pci.Hdr.VendorId)) ||\r
- ((DeviceInfo->DeviceId != MAX_UINT16) && (DeviceInfo->DeviceId != Pci.Hdr.DeviceId)) ||\r
- ((DeviceInfo->RevisionId != MAX_UINT8) && (DeviceInfo->RevisionId != Pci.Hdr.RevisionID)) ||\r
- ((DeviceInfo->SubsystemVendorId != MAX_UINT16) && (DeviceInfo->SubsystemVendorId != Pci.Device.SubsystemVendorID)) ||\r
- ((DeviceInfo->SubsystemId != MAX_UINT16) && (DeviceInfo->SubsystemId != Pci.Device.SubsystemID))\r
+ ((DeviceInfo->VendorId != MAX_UINT16) && (DeviceInfo->VendorId != Pci.Hdr.VendorId)) ||\r
+ ((DeviceInfo->DeviceId != MAX_UINT16) && (DeviceInfo->DeviceId != Pci.Hdr.DeviceId)) ||\r
+ ((DeviceInfo->RevisionId != MAX_UINT8) && (DeviceInfo->RevisionId != Pci.Hdr.RevisionID)) ||\r
+ ((DeviceInfo->SubsystemVendorId != MAX_UINT16) && (DeviceInfo->SubsystemVendorId != Pci.Device.SubsystemVendorID)) ||\r
+ ((DeviceInfo->SubsystemId != MAX_UINT16) && (DeviceInfo->SubsystemId != Pci.Device.SubsystemID))\r
+ )\r
)\r
- ) {\r
+ {\r
//\r
// It's not a video device, or device infomation doesn't match.\r
//\r
if ((DeviceInfo->BarIndex != MAX_UINT8) && (DeviceInfo->BarIndex != Index)) {\r
continue;\r
}\r
- Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID**) &Resources);\r
+\r
+ Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID **)&Resources);\r
if (!EFI_ERROR (Status)) {\r
- DEBUG ((DEBUG_INFO, "[%a]: BAR[%d]: Base = %lx, Length = %lx\n",\r
- gEfiCallerBaseName, Index, Resources->AddrRangeMin, Resources->AddrLen));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "[%a]: BAR[%d]: Base = %lx, Length = %lx\n",\r
+ gEfiCallerBaseName,\r
+ Index,\r
+ Resources->AddrRangeMin,\r
+ Resources->AddrLen\r
+ ));\r
if ((Resources->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) &&\r
- (Resources->Len == (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&\r
+ (Resources->Len == (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&\r
(Resources->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&\r
(Resources->AddrLen >= GraphicsInfo->FrameBufferSize)\r
- ) {\r
+ )\r
+ {\r
if (FrameBufferBase == 0) {\r
FrameBufferBase = Resources->AddrRangeMin;\r
}\r
+\r
if (DeviceInfo->BarIndex == MAX_UINT8) {\r
if (Resources->AddrRangeMin == GraphicsInfo->FrameBufferBase) {\r
FrameBufferBase = Resources->AddrRangeMin;\r
}\r
}\r
}\r
+\r
if (Index == MAX_PCI_BAR) {\r
Status = EFI_UNSUPPORTED;\r
} else {\r
\r
Private->GraphicsOutputMode.FrameBufferBase = FrameBufferBase;\r
Private->GraphicsOutputMode.FrameBufferSize = GraphicsInfo->FrameBufferSize;\r
- Private->GraphicsOutputMode.Info = &GraphicsInfo->GraphicsMode;\r
+ Private->GraphicsOutputMode.Info = &GraphicsInfo->GraphicsMode;\r
\r
//\r
// Fix up Mode pointer in GraphicsOutput\r
// Create the FrameBufferBltLib configuration.\r
//\r
ReturnStatus = FrameBufferBltConfigure (\r
- (VOID *) (UINTN) Private->GraphicsOutput.Mode->FrameBufferBase,\r
+ (VOID *)(UINTN)Private->GraphicsOutput.Mode->FrameBufferBase,\r
Private->GraphicsOutput.Mode->Info,\r
Private->FrameBufferBltLibConfigure,\r
&Private->FrameBufferBltLibConfigureSize\r
Private->FrameBufferBltLibConfigure = AllocatePool (Private->FrameBufferBltLibConfigureSize);\r
if (Private->FrameBufferBltLibConfigure != NULL) {\r
ReturnStatus = FrameBufferBltConfigure (\r
- (VOID *) (UINTN) Private->GraphicsOutput.Mode->FrameBufferBase,\r
+ (VOID *)(UINTN)Private->GraphicsOutput.Mode->FrameBufferBase,\r
Private->GraphicsOutput.Mode->Info,\r
Private->FrameBufferBltLibConfigure,\r
&Private->FrameBufferBltLibConfigureSize\r
);\r
}\r
}\r
+\r
if (RETURN_ERROR (ReturnStatus)) {\r
Status = EFI_OUT_OF_RESOURCES;\r
goto RestorePciAttributes;\r
}\r
\r
- Private->DevicePath = AppendDevicePathNode (PciDevicePath, (EFI_DEVICE_PATH_PROTOCOL *) &mGraphicsOutputAdrNode);\r
+ Private->DevicePath = AppendDevicePathNode (PciDevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&mGraphicsOutputAdrNode);\r
if (Private->DevicePath == NULL) {\r
Status = EFI_OUT_OF_RESOURCES;\r
goto RestorePciAttributes;\r
\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
&Private->GraphicsOutputHandle,\r
- &gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,\r
- &gEfiDevicePathProtocolGuid, Private->DevicePath,\r
+ &gEfiGraphicsOutputProtocolGuid,\r
+ &Private->GraphicsOutput,\r
+ &gEfiDevicePathProtocolGuid,\r
+ Private->DevicePath,\r
NULL\r
);\r
\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &Private->PciIo,\r
+ (VOID **)&Private->PciIo,\r
This->DriverBindingHandle,\r
Private->GraphicsOutputHandle,\r
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r
} else {\r
gBS->UninstallMultipleProtocolInterfaces (\r
Private->GraphicsOutputHandle,\r
- &gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,\r
- &gEfiDevicePathProtocolGuid, Private->DevicePath,\r
+ &gEfiGraphicsOutputProtocolGuid,\r
+ &Private->GraphicsOutput,\r
+ &gEfiDevicePathProtocolGuid,\r
+ Private->DevicePath,\r
NULL\r
);\r
}\r
if (Private->DevicePath != NULL) {\r
FreePool (Private->DevicePath);\r
}\r
+\r
if (Private->FrameBufferBltLibConfigure != NULL) {\r
FreePool (Private->FrameBufferBltLibConfigure);\r
}\r
+\r
FreePool (Private);\r
}\r
}\r
Controller\r
);\r
}\r
+\r
return Status;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL *Gop;\r
- GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
+ EFI_STATUS Status;\r
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *Gop;\r
+ GRAPHICS_OUTPUT_PRIVATE_DATA *Private;\r
\r
if (NumberOfChildren == 0) {\r
-\r
//\r
// Close the PCI I/O Protocol\r
//\r
Status = gBS->OpenProtocol (\r
ChildHandleBuffer[0],\r
&gEfiGraphicsOutputProtocolGuid,\r
- (VOID **) &Gop,\r
+ (VOID **)&Gop,\r
This->DriverBindingHandle,\r
ChildHandleBuffer[0],\r
EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
//\r
Status = gBS->UninstallMultipleProtocolInterfaces (\r
Private->GraphicsOutputHandle,\r
- &gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,\r
- &gEfiDevicePathProtocolGuid, Private->DevicePath,\r
+ &gEfiGraphicsOutputProtocolGuid,\r
+ &Private->GraphicsOutput,\r
+ &gEfiDevicePathProtocolGuid,\r
+ Private->DevicePath,\r
NULL\r
);\r
if (!EFI_ERROR (Status)) {\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &Private->PciIo,\r
+ (VOID **)&Private->PciIo,\r
This->DriverBindingHandle,\r
Private->GraphicsOutputHandle,\r
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r
);\r
ASSERT_EFI_ERROR (Status);\r
}\r
+\r
return Status;\r
}\r
\r
-EFI_DRIVER_BINDING_PROTOCOL mGraphicsOutputDriverBinding = {\r
+EFI_DRIVER_BINDING_PROTOCOL mGraphicsOutputDriverBinding = {\r
GraphicsOutputDriverBindingSupported,\r
GraphicsOutputDriverBindingStart,\r
GraphicsOutputDriverBindingStop,\r
EFI_STATUS\r
EFIAPI\r
InitializeGraphicsOutput (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- VOID *HobStart;\r
+ EFI_STATUS Status;\r
+ VOID *HobStart;\r
\r
HobStart = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);\r
\r
\r
\r
**/\r
+\r
#ifndef _GRAPHICS_OUTPUT_DXE_H_\r
#define _GRAPHICS_OUTPUT_DXE_H_\r
#include <PiDxe.h>\r
#define MAX_PCI_BAR 6\r
\r
typedef struct {\r
- UINT32 Signature;\r
- EFI_HANDLE GraphicsOutputHandle;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE GraphicsOutputMode;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- UINT64 PciAttributes;\r
- FRAME_BUFFER_CONFIGURE *FrameBufferBltLibConfigure;\r
- UINTN FrameBufferBltLibConfigureSize;\r
+ UINT32 Signature;\r
+ EFI_HANDLE GraphicsOutputHandle;\r
+ EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;\r
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE GraphicsOutputMode;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT64 PciAttributes;\r
+ FRAME_BUFFER_CONFIGURE *FrameBufferBltLibConfigure;\r
+ UINTN FrameBufferBltLibConfigureSize;\r
} GRAPHICS_OUTPUT_PRIVATE_DATA;\r
\r
#define GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('g', 'g', 'o', 'p')\r
#define GRAPHICS_OUTPUT_PRIVATE_FROM_THIS(a) \\r
CR(a, GRAPHICS_OUTPUT_PRIVATE_DATA, GraphicsOutput, GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE)\r
\r
-extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;\r
+extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;\r
#endif\r
* SUCH DAMAGE.\r
*/\r
\r
-\r
#ifndef _COREBOOT_PEI_H_INCLUDED_\r
#define _COREBOOT_PEI_H_INCLUDED_\r
\r
-#if defined(_MSC_VER)\r
-#pragma warning( disable : 4200 )\r
+#if defined (_MSC_VER)\r
+ #pragma warning( disable : 4200 )\r
#endif\r
\r
-#define DYN_CBMEM_ALIGN_SIZE (4096)\r
+#define DYN_CBMEM_ALIGN_SIZE (4096)\r
\r
-#define IMD_ENTRY_MAGIC (~0xC0389481)\r
-#define CBMEM_ENTRY_MAGIC (~0xC0389479)\r
+#define IMD_ENTRY_MAGIC (~0xC0389481)\r
+#define CBMEM_ENTRY_MAGIC (~0xC0389479)\r
\r
struct cbmem_entry {\r
- UINT32 magic;\r
- UINT32 start;\r
- UINT32 size;\r
- UINT32 id;\r
+ UINT32 magic;\r
+ UINT32 start;\r
+ UINT32 size;\r
+ UINT32 id;\r
};\r
\r
struct cbmem_root {\r
- UINT32 max_entries;\r
- UINT32 num_entries;\r
- UINT32 locked;\r
- UINT32 size;\r
- struct cbmem_entry entries[0];\r
+ UINT32 max_entries;\r
+ UINT32 num_entries;\r
+ UINT32 locked;\r
+ UINT32 size;\r
+ struct cbmem_entry entries[0];\r
};\r
\r
struct imd_entry {\r
- UINT32 magic;\r
- UINT32 start_offset;\r
- UINT32 size;\r
- UINT32 id;\r
+ UINT32 magic;\r
+ UINT32 start_offset;\r
+ UINT32 size;\r
+ UINT32 id;\r
};\r
\r
struct imd_root {\r
- UINT32 max_entries;\r
- UINT32 num_entries;\r
- UINT32 flags;\r
- UINT32 entry_align;\r
- UINT32 max_offset;\r
- struct imd_entry entries[0];\r
+ UINT32 max_entries;\r
+ UINT32 num_entries;\r
+ UINT32 flags;\r
+ UINT32 entry_align;\r
+ UINT32 max_offset;\r
+ struct imd_entry entries[0];\r
};\r
\r
struct cbuint64 {\r
- UINT32 lo;\r
- UINT32 hi;\r
+ UINT32 lo;\r
+ UINT32 hi;\r
};\r
\r
-#define CB_HEADER_SIGNATURE 0x4F49424C\r
+#define CB_HEADER_SIGNATURE 0x4F49424C\r
\r
struct cb_header {\r
- UINT32 signature;\r
- UINT32 header_bytes;\r
- UINT32 header_checksum;\r
- UINT32 table_bytes;\r
- UINT32 table_checksum;\r
- UINT32 table_entries;\r
+ UINT32 signature;\r
+ UINT32 header_bytes;\r
+ UINT32 header_checksum;\r
+ UINT32 table_bytes;\r
+ UINT32 table_checksum;\r
+ UINT32 table_entries;\r
};\r
\r
struct cb_record {\r
- UINT32 tag;\r
- UINT32 size;\r
+ UINT32 tag;\r
+ UINT32 size;\r
};\r
\r
-#define CB_TAG_UNUSED 0x0000\r
-#define CB_TAG_MEMORY 0x0001\r
+#define CB_TAG_UNUSED 0x0000\r
+#define CB_TAG_MEMORY 0x0001\r
\r
struct cb_memory_range {\r
- struct cbuint64 start;\r
- struct cbuint64 size;\r
- UINT32 type;\r
+ struct cbuint64 start;\r
+ struct cbuint64 size;\r
+ UINT32 type;\r
};\r
\r
-#define CB_MEM_RAM 1\r
+#define CB_MEM_RAM 1\r
#define CB_MEM_RESERVED 2\r
-#define CB_MEM_ACPI 3\r
-#define CB_MEM_NVS 4\r
+#define CB_MEM_ACPI 3\r
+#define CB_MEM_NVS 4\r
#define CB_MEM_UNUSABLE 5\r
#define CB_MEM_VENDOR_RSVD 6\r
-#define CB_MEM_TABLE 16\r
+#define CB_MEM_TABLE 16\r
\r
struct cb_memory {\r
- UINT32 tag;\r
- UINT32 size;\r
- struct cb_memory_range map[0];\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ struct cb_memory_range map[0];\r
};\r
\r
#define CB_TAG_MAINBOARD 0x0003\r
\r
struct cb_mainboard {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 vendor_idx;\r
- UINT8 part_number_idx;\r
- UINT8 strings[0];\r
-};\r
-#define CB_TAG_VERSION 0x0004\r
-#define CB_TAG_EXTRA_VERSION 0x0005\r
-#define CB_TAG_BUILD 0x0006\r
-#define CB_TAG_COMPILE_TIME 0x0007\r
-#define CB_TAG_COMPILE_BY 0x0008\r
-#define CB_TAG_COMPILE_HOST 0x0009\r
-#define CB_TAG_COMPILE_DOMAIN 0x000a\r
-#define CB_TAG_COMPILER 0x000b\r
-#define CB_TAG_LINKER 0x000c\r
-#define CB_TAG_ASSEMBLER 0x000d\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ UINT8 vendor_idx;\r
+ UINT8 part_number_idx;\r
+ UINT8 strings[0];\r
+};\r
+\r
+#define CB_TAG_VERSION 0x0004\r
+#define CB_TAG_EXTRA_VERSION 0x0005\r
+#define CB_TAG_BUILD 0x0006\r
+#define CB_TAG_COMPILE_TIME 0x0007\r
+#define CB_TAG_COMPILE_BY 0x0008\r
+#define CB_TAG_COMPILE_HOST 0x0009\r
+#define CB_TAG_COMPILE_DOMAIN 0x000a\r
+#define CB_TAG_COMPILER 0x000b\r
+#define CB_TAG_LINKER 0x000c\r
+#define CB_TAG_ASSEMBLER 0x000d\r
\r
struct cb_string {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 string[0];\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ UINT8 string[0];\r
};\r
\r
-#define CB_TAG_SERIAL 0x000f\r
+#define CB_TAG_SERIAL 0x000f\r
\r
struct cb_serial {\r
- UINT32 tag;\r
- UINT32 size;\r
-#define CB_SERIAL_TYPE_IO_MAPPED 1\r
-#define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
- UINT32 type;\r
- UINT32 baseaddr;\r
- UINT32 baud;\r
- UINT32 regwidth;\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ #define CB_SERIAL_TYPE_IO_MAPPED 1\r
+ #define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
+ UINT32 type;\r
+ UINT32 baseaddr;\r
+ UINT32 baud;\r
+ UINT32 regwidth;\r
\r
// Crystal or input frequency to the chip containing the UART.\r
// Provide the board specific details to allow the payload to\r
// initialize the chip containing the UART and make independent\r
// decisions as to which dividers to select and their values\r
// to eventually arrive at the desired console baud-rate.\r
- UINT32 input_hertz;\r
+ UINT32 input_hertz;\r
\r
// UART PCI address: bus, device, function\r
// 1 << 31 - Valid bit, PCI UART in use\r
// Bus << 20\r
// Device << 15\r
// Function << 12\r
- UINT32 uart_pci_addr;\r
+ UINT32 uart_pci_addr;\r
};\r
\r
-#define CB_TAG_CONSOLE 0x00010\r
+#define CB_TAG_CONSOLE 0x00010\r
\r
struct cb_console {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT16 type;\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ UINT16 type;\r
};\r
\r
-#define CB_TAG_CONSOLE_SERIAL8250 0\r
-#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r
-#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r
-#define CB_TAG_CONSOLE_LOGBUF 3\r
-#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE\r
-#define CB_TAG_CONSOLE_EHCI 5\r
+#define CB_TAG_CONSOLE_SERIAL8250 0\r
+#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r
+#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r
+#define CB_TAG_CONSOLE_LOGBUF 3\r
+#define CB_TAG_CONSOLE_SROM 4// OBSOLETE\r
+#define CB_TAG_CONSOLE_EHCI 5\r
\r
-#define CB_TAG_FORWARD 0x00011\r
+#define CB_TAG_FORWARD 0x00011\r
\r
struct cb_forward {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 forward;\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ UINT64 forward;\r
};\r
\r
-#define CB_TAG_FRAMEBUFFER 0x0012\r
+#define CB_TAG_FRAMEBUFFER 0x0012\r
struct cb_framebuffer {\r
- UINT32 tag;\r
- UINT32 size;\r
-\r
- UINT64 physical_address;\r
- UINT32 x_resolution;\r
- UINT32 y_resolution;\r
- UINT32 bytes_per_line;\r
- UINT8 bits_per_pixel;\r
- UINT8 red_mask_pos;\r
- UINT8 red_mask_size;\r
- UINT8 green_mask_pos;\r
- UINT8 green_mask_size;\r
- UINT8 blue_mask_pos;\r
- UINT8 blue_mask_size;\r
- UINT8 reserved_mask_pos;\r
- UINT8 reserved_mask_size;\r
-};\r
-\r
-#define CB_TAG_VDAT 0x0015\r
+ UINT32 tag;\r
+ UINT32 size;\r
+\r
+ UINT64 physical_address;\r
+ UINT32 x_resolution;\r
+ UINT32 y_resolution;\r
+ UINT32 bytes_per_line;\r
+ UINT8 bits_per_pixel;\r
+ UINT8 red_mask_pos;\r
+ UINT8 red_mask_size;\r
+ UINT8 green_mask_pos;\r
+ UINT8 green_mask_size;\r
+ UINT8 blue_mask_pos;\r
+ UINT8 blue_mask_size;\r
+ UINT8 reserved_mask_pos;\r
+ UINT8 reserved_mask_size;\r
+};\r
+\r
+#define CB_TAG_VDAT 0x0015\r
struct cb_vdat {\r
- UINT32 tag;\r
- UINT32 size; /* size of the entire entry */\r
- UINT64 vdat_addr;\r
- UINT32 vdat_size;\r
+ UINT32 tag;\r
+ UINT32 size; /* size of the entire entry */\r
+ UINT64 vdat_addr;\r
+ UINT32 vdat_size;\r
};\r
\r
-#define CB_TAG_TIMESTAMPS 0x0016\r
-#define CB_TAG_CBMEM_CONSOLE 0x0017\r
-#define CB_TAG_MRC_CACHE 0x0018\r
+#define CB_TAG_TIMESTAMPS 0x0016\r
+#define CB_TAG_CBMEM_CONSOLE 0x0017\r
+#define CB_TAG_MRC_CACHE 0x0018\r
struct cb_cbmem_tab {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 cbmem_tab;\r
+ UINT32 tag;\r
+ UINT32 size;\r
+ UINT64 cbmem_tab;\r
};\r
\r
/* Helpful macros */\r
(void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r
+ (sizeof((_rec)->map[0]) * (_idx)))\r
\r
-typedef struct cb_memory CB_MEMORY;\r
+typedef struct cb_memory CB_MEMORY;\r
\r
#endif // _COREBOOT_PEI_H_INCLUDED_\r
///\r
/// Board information GUID\r
///\r
-extern EFI_GUID gUefiAcpiBoardInfoGuid;\r
+extern EFI_GUID gUefiAcpiBoardInfoGuid;\r
\r
typedef struct {\r
- UINT8 Revision;\r
- UINT8 Reserved0[2];\r
- UINT8 ResetValue;\r
- UINT64 PmEvtBase;\r
- UINT64 PmGpeEnBase;\r
- UINT64 PmCtrlRegBase;\r
- UINT64 PmTimerRegBase;\r
- UINT64 ResetRegAddress;\r
- UINT64 PcieBaseAddress;\r
- UINT64 PcieBaseSize;\r
+ UINT8 Revision;\r
+ UINT8 Reserved0[2];\r
+ UINT8 ResetValue;\r
+ UINT64 PmEvtBase;\r
+ UINT64 PmGpeEnBase;\r
+ UINT64 PmCtrlRegBase;\r
+ UINT64 PmTimerRegBase;\r
+ UINT64 ResetRegAddress;\r
+ UINT64 PcieBaseAddress;\r
+ UINT64 PcieBaseSize;\r
} ACPI_BOARD_INFO;\r
\r
#endif\r
#pragma pack (1)\r
\r
typedef struct {\r
- UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;\r
- GUID FileName;\r
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;\r
+ GUID FileName;\r
} UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU;\r
\r
#pragma pack()\r
\r
-#define UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION 1\r
+#define UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION 1\r
\r
-extern GUID gEdkiiBootManagerMenuFileGuid;\r
+extern GUID gEdkiiBootManagerMenuFileGuid;\r
#endif\r
///\r
/// Memory Map Information GUID\r
///\r
-extern EFI_GUID gLoaderMemoryMapInfoGuid;\r
+extern EFI_GUID gLoaderMemoryMapInfoGuid;\r
\r
#pragma pack(1)\r
typedef struct {\r
- UINT64 Base;\r
- UINT64 Size;\r
- UINT8 Type;\r
- UINT8 Flag;\r
- UINT8 Reserved[6];\r
+ UINT64 Base;\r
+ UINT64 Size;\r
+ UINT8 Type;\r
+ UINT8 Flag;\r
+ UINT8 Reserved[6];\r
} MEMORY_MAP_ENTRY;\r
\r
typedef struct {\r
- UINT8 Revision;\r
- UINT8 Reserved0[3];\r
- UINT32 Count;\r
- MEMORY_MAP_ENTRY Entry[0];\r
+ UINT8 Revision;\r
+ UINT8 Reserved0[3];\r
+ UINT32 Count;\r
+ MEMORY_MAP_ENTRY Entry[0];\r
} MEMORY_MAP_INFO;\r
#pragma pack()\r
\r
//\r
// NV variable hob info GUID\r
//\r
-extern EFI_GUID gNvVariableInfoGuid;\r
+extern EFI_GUID gNvVariableInfoGuid;\r
\r
typedef struct {\r
- UINT8 Revision;\r
- UINT8 Reserved[3];\r
- UINT32 VariableStoreBase;\r
- UINT32 VariableStoreSize;\r
+ UINT8 Revision;\r
+ UINT8 Reserved[3];\r
+ UINT32 VariableStoreBase;\r
+ UINT32 VariableStoreSize;\r
} NV_VARIABLE_INFO;\r
\r
#endif\r
///\r
/// Serial Port Information GUID\r
///\r
-extern EFI_GUID gUefiSerialPortInfoGuid;\r
+extern EFI_GUID gUefiSerialPortInfoGuid;\r
\r
-#define PLD_SERIAL_TYPE_IO_MAPPED 1\r
-#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2\r
+#define PLD_SERIAL_TYPE_IO_MAPPED 1\r
+#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2\r
\r
typedef struct {\r
- UINT8 Revision;\r
- UINT8 Reserved0[3];\r
- UINT32 Type;\r
- UINT32 BaseAddr;\r
- UINT32 Baud;\r
- UINT32 RegWidth;\r
- UINT32 InputHertz;\r
- UINT32 UartPciAddr;\r
+ UINT8 Revision;\r
+ UINT8 Reserved0[3];\r
+ UINT32 Type;\r
+ UINT32 BaseAddr;\r
+ UINT32 Baud;\r
+ UINT32 RegWidth;\r
+ UINT32 InputHertz;\r
+ UINT32 UartPciAddr;\r
} SERIAL_PORT_INFO;\r
\r
#endif\r
///\r
/// SMM Information GUID\r
///\r
-extern EFI_GUID gSmmRegisterInfoGuid;\r
+extern EFI_GUID gSmmRegisterInfoGuid;\r
\r
///\r
/// Reuse ACPI definition\r
/// AddressSpaceId(0xC0-0xFF) is defined by OEM for MSR and other spaces\r
///\r
-typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;\r
+typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;\r
\r
-#define REGISTER_ID_SMI_GBL_EN 1\r
-#define REGISTER_ID_SMI_GBL_EN_LOCK 2\r
-#define REGISTER_ID_SMI_EOS 3\r
-#define REGISTER_ID_SMI_APM_EN 4\r
-#define REGISTER_ID_SMI_APM_STS 5\r
+#define REGISTER_ID_SMI_GBL_EN 1\r
+#define REGISTER_ID_SMI_GBL_EN_LOCK 2\r
+#define REGISTER_ID_SMI_EOS 3\r
+#define REGISTER_ID_SMI_APM_EN 4\r
+#define REGISTER_ID_SMI_APM_STS 5\r
\r
#pragma pack(1)\r
typedef struct {\r
- UINT64 Id;\r
- UINT64 Value;\r
- PLD_GENERIC_ADDRESS Address;\r
+ UINT64 Id;\r
+ UINT64 Value;\r
+ PLD_GENERIC_ADDRESS Address;\r
} PLD_GENERIC_REGISTER;\r
\r
typedef struct {\r
- UINT16 Revision;\r
- UINT16 Reserved;\r
- UINT32 Count;\r
- PLD_GENERIC_REGISTER Registers[0];\r
+ UINT16 Revision;\r
+ UINT16 Reserved;\r
+ UINT32 Count;\r
+ PLD_GENERIC_REGISTER Registers[0];\r
} PLD_SMM_REGISTERS;\r
\r
-\r
#pragma pack()\r
\r
#endif\r
#ifndef PAYLOAD_S3_COMMUNICATION_GUID_H_\r
#define PAYLOAD_S3_COMMUNICATION_GUID_H_\r
\r
-extern EFI_GUID gS3CommunicationGuid;\r
+extern EFI_GUID gS3CommunicationGuid;\r
\r
#pragma pack(1)\r
\r
typedef struct {\r
- EFI_SMRAM_DESCRIPTOR CommBuffer;\r
- BOOLEAN PldAcpiS3Enable;\r
+ EFI_SMRAM_DESCRIPTOR CommBuffer;\r
+ BOOLEAN PldAcpiS3Enable;\r
} PLD_S3_COMMUNICATION;\r
\r
///\r
///\r
\r
typedef struct {\r
- UINT32 ApicId;\r
- UINT32 SmmBase;\r
+ UINT32 ApicId;\r
+ UINT32 SmmBase;\r
} CPU_SMMBASE;\r
\r
typedef struct {\r
- UINT8 SwSmiData;\r
- UINT8 SwSmiTriggerValue;\r
- UINT16 Reserved;\r
- UINT32 CpuCount;\r
- CPU_SMMBASE SmmBase[0];\r
+ UINT8 SwSmiData;\r
+ UINT8 SwSmiTriggerValue;\r
+ UINT16 Reserved;\r
+ UINT32 CpuCount;\r
+ CPU_SMMBASE SmmBase[0];\r
} SMM_S3_INFO;\r
\r
//\r
// to trigger SMI to let payload to restore S3.\r
//\r
typedef struct {\r
- EFI_HOB_GUID_TYPE Header;\r
- SMM_S3_INFO S3Info;\r
+ EFI_HOB_GUID_TYPE Header;\r
+ SMM_S3_INFO S3Info;\r
} PLD_TO_BL_SMM_INFO;\r
\r
#pragma pack()\r
//\r
// SPI Flash infor hob GUID\r
//\r
-extern EFI_GUID gSpiFlashInfoGuid;\r
+extern EFI_GUID gSpiFlashInfoGuid;\r
\r
//\r
// Set this bit if platform need disable SMM write protection when writing flash\r
// in SMM mode using this method: -- AsmWriteMsr32 (0x1FE, MmioRead32 (0xFED30880) | BIT0);\r
//\r
-#define FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT BIT0\r
+#define FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT BIT0\r
\r
//\r
// Reuse ACPI definition\r
//\r
typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;\r
-#define SPACE_ID_PCI_CONFIGURATION EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE\r
-#define REGISTER_BIT_WIDTH_DWORD EFI_ACPI_3_0_DWORD\r
+#define SPACE_ID_PCI_CONFIGURATION EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE\r
+#define REGISTER_BIT_WIDTH_DWORD EFI_ACPI_3_0_DWORD\r
\r
typedef struct {\r
- UINT8 Revision;\r
- UINT8 Reserved;\r
- UINT16 Flags;\r
- PLD_GENERIC_ADDRESS SpiAddress;\r
+ UINT8 Revision;\r
+ UINT8 Reserved;\r
+ UINT16 Flags;\r
+ PLD_GENERIC_ADDRESS SpiAddress;\r
} SPI_FLASH_INFO;\r
\r
#endif\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef BOOTLOADER_PARSE_LIB_\r
#define BOOTLOADER_PARSE_LIB_\r
\r
#include <UniversalPayload/AcpiTable.h>\r
#include <UniversalPayload/SmbiosTable.h>\r
\r
-#define GET_BOOTLOADER_PARAMETER() PcdGet64 (PcdBootloaderParameter)\r
+#define GET_BOOTLOADER_PARAMETER() PcdGet64 (PcdBootloaderParameter)\r
\r
typedef RETURN_STATUS \\r
- (*BL_MEM_INFO_CALLBACK) (MEMORY_MAP_ENTRY *MemoryMapEntry, VOID *Param);\r
+(*BL_MEM_INFO_CALLBACK) (\r
+ MEMORY_MAP_ENTRY *MemoryMapEntry,\r
+ VOID *Param\r
+ );\r
\r
/**\r
This function retrieves the parameter base address from boot loader.\r
RETURN_STATUS\r
EFIAPI\r
ParseMemoryInfo (\r
- IN BL_MEM_INFO_CALLBACK MemInfoCallback,\r
- IN VOID *Params\r
+ IN BL_MEM_INFO_CALLBACK MemInfoCallback,\r
+ IN VOID *Params\r
);\r
\r
/**\r
RETURN_STATUS\r
EFIAPI\r
ParseSmbiosTable (\r
- OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
+ OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
);\r
\r
/**\r
RETURN_STATUS\r
EFIAPI\r
ParseAcpiTableInfo (\r
- OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
+ OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
);\r
\r
/**\r
RETURN_STATUS\r
EFIAPI\r
ParseSerialInfo (\r
- OUT SERIAL_PORT_INFO *SerialPortInfo\r
+ OUT SERIAL_PORT_INFO *SerialPortInfo\r
);\r
\r
-\r
/**\r
Find the video frame buffer information\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxInfo (\r
- OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
+ OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
);\r
\r
/**\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxDeviceInfo (\r
- OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
+ OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
);\r
\r
/**\r
extern VOID *gHobList;\r
\r
#endif\r
-\r
\r
**/\r
\r
-\r
#ifndef FLASHDEVICE_LIB_H_\r
#define FLASHDEVICE_LIB_H_\r
\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceRead (\r
- IN UINTN PAddress,\r
- IN OUT UINTN *NumBytes,\r
- OUT UINT8 *Buffer\r
+ IN UINTN PAddress,\r
+ IN OUT UINTN *NumBytes,\r
+ OUT UINT8 *Buffer\r
);\r
\r
-\r
/**\r
Write NumBytes bytes of data from Buffer to the address specified by\r
PAddresss.\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceWrite (\r
- IN UINTN PAddress,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN UINTN PAddress,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
);\r
\r
-\r
/**\r
Erase the block starting at PAddress.\r
\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceBlockErase (\r
- IN UINTN PAddress,\r
- IN UINTN LbaLength\r
-);\r
-\r
+ IN UINTN PAddress,\r
+ IN UINTN LbaLength\r
+ );\r
\r
/**\r
Lock or unlock the block starting at PAddress.\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceBlockLock (\r
- IN UINTN PAddress,\r
- IN UINTN LbaLength,\r
- IN BOOLEAN Lock\r
-);\r
+ IN UINTN PAddress,\r
+ IN UINTN LbaLength,\r
+ IN BOOLEAN Lock\r
+ );\r
\r
PHYSICAL_ADDRESS\r
EFIAPI\r
LibFvbFlashDeviceMemoryMap (\r
-);\r
+ );\r
\r
#endif\r
);\r
\r
#endif // __BOOTLOADER_PLATFORM_SUPPORT_LIB__\r
-\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadSfdp (\r
- IN UINT8 ComponentNumber,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *SfdpData\r
+ IN UINT8 ComponentNumber,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *SfdpData\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadJedecId (\r
- IN UINT8 ComponentNumber,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *JedecId\r
+ IN UINT8 ComponentNumber,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *JedecId\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SpiFlashWriteStatus (\r
- IN UINT32 ByteCount,\r
- IN UINT8 *StatusValue\r
+ IN UINT32 ByteCount,\r
+ IN UINT8 *StatusValue\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadStatus (\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *StatusValue\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *StatusValue\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SpiReadPchSoftStrap (\r
- IN UINT32 SoftStrapAddr,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *SoftStrapValue\r
+ IN UINT32 SoftStrapAddr,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *SoftStrapValue\r
);\r
\r
-\r
/**\r
Read data from the flash part.\r
\r
#ifndef __PLATFORM_BOOT_MANAGER_OVERRIDE_H__\r
#define __PLATFORM_BOOT_MANAGER_OVERRIDE_H__\r
\r
-\r
/**\r
Do the platform specific action before the console is connected.\r
\r
**/\r
typedef\r
VOID\r
-(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE) (\r
+(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE)(\r
VOID\r
);\r
\r
**/\r
typedef\r
VOID\r
-(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE) (\r
+(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE)(\r
VOID\r
);\r
\r
**/\r
typedef\r
VOID\r
-(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK) (\r
+(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK)(\r
UINT16 TimeoutRemain\r
);\r
\r
**/\r
typedef\r
VOID\r
-(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT) (\r
+(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT)(\r
VOID\r
);\r
\r
/// so platform can provide its own platform specific logic through this protocol\r
///\r
typedef struct {\r
- UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE BeforeConsole;\r
- UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE AfterConsole;\r
- UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK WaitCallback;\r
- UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT UnableToBoot;\r
+ UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE BeforeConsole;\r
+ UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE AfterConsole;\r
+ UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK WaitCallback;\r
+ UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT UnableToBoot;\r
} UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_PROTOCOL;\r
\r
-extern GUID gUniversalPayloadPlatformBootManagerOverrideProtocolGuid;\r
+extern GUID gUniversalPayloadPlatformBootManagerOverrideProtocolGuid;\r
\r
#endif\r
\r
#define ACPI_TIMER_COUNT_SIZE BIT24\r
\r
-UINTN mPmTimerReg = 0;\r
+UINTN mPmTimerReg = 0;\r
\r
/**\r
The constructor function enables ACPI IO space.\r
if (mPmTimerReg == 0) {\r
AcpiTimerLibConstructor ();\r
}\r
+\r
return IoRead32 (mPmTimerReg);\r
}\r
\r
**/\r
VOID\r
InternalAcpiDelay (\r
- IN UINT32 Delay\r
+ IN UINT32 Delay\r
)\r
{\r
- UINT32 Ticks;\r
- UINT32 Times;\r
+ UINT32 Ticks;\r
+ UINT32 Times;\r
\r
- Times = Delay >> 22;\r
- Delay &= BIT22 - 1;\r
+ Times = Delay >> 22;\r
+ Delay &= BIT22 - 1;\r
do {\r
//\r
// The target timer count is calculated here\r
//\r
- Ticks = InternalAcpiGetTimerTick () + Delay;\r
- Delay = BIT22;\r
+ Ticks = InternalAcpiGetTimerTick () + Delay;\r
+ Delay = BIT22;\r
//\r
// Wait until time out\r
// Delay >= 2^23 could not be handled by this function\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
- IN UINTN MicroSeconds\r
+ IN UINTN MicroSeconds\r
)\r
{\r
InternalAcpiDelay (\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
- IN UINTN NanoSeconds\r
+ IN UINTN NanoSeconds\r
)\r
{\r
InternalAcpiDelay (\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
- OUT UINT64 *StartValue OPTIONAL,\r
- OUT UINT64 *EndValue OPTIONAL\r
+ OUT UINT64 *StartValue OPTIONAL,\r
+ OUT UINT64 *EndValue OPTIONAL\r
)\r
{\r
if (StartValue != NULL) {\r
UINT64\r
EFIAPI\r
GetTimeInNanoSecond (\r
- IN UINT64 Ticks\r
+ IN UINT64 Ticks\r
)\r
{\r
UINT64 Frequency;\r
// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
// i.e. highest bit set in Remainder should <= 33.\r
//\r
- Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
- Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
- Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
+ Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
+ Remainder = RShiftU64 (Remainder, (UINTN)Shift);\r
+ Frequency = RShiftU64 (Frequency, (UINTN)Shift);\r
NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
\r
return NanoSeconds;\r
#include <IndustryStandard/Acpi.h>\r
#include <Coreboot.h>\r
\r
-\r
/**\r
Convert a packed value from cbuint64 to a UINT64 value.\r
\r
**/\r
UINT64\r
cb_unpack64 (\r
- IN struct cbuint64 val\r
+ IN struct cbuint64 val\r
)\r
{\r
return LShiftU64 (val.hi, 32) | val.lo;\r
}\r
\r
-\r
/**\r
Returns the sum of all elements in a buffer of 16-bit values. During\r
calculation, the carry bits are also been added.\r
**/\r
UINT16\r
CbCheckSum16 (\r
- IN UINT16 *Buffer,\r
- IN UINTN Length\r
+ IN UINT16 *Buffer,\r
+ IN UINTN Length\r
)\r
{\r
- UINT32 Sum;\r
- UINT32 TmpValue;\r
- UINTN Idx;\r
- UINT8 *TmpPtr;\r
+ UINT32 Sum;\r
+ UINT32 TmpValue;\r
+ UINTN Idx;\r
+ UINT8 *TmpPtr;\r
\r
- Sum = 0;\r
+ Sum = 0;\r
TmpPtr = (UINT8 *)Buffer;\r
- for(Idx = 0; Idx < Length; Idx++) {\r
- TmpValue = TmpPtr[Idx];\r
+ for (Idx = 0; Idx < Length; Idx++) {\r
+ TmpValue = TmpPtr[Idx];\r
if (Idx % 2 == 1) {\r
TmpValue <<= 8;\r
}\r
return (UINT16)((~Sum) & 0xFFFF);\r
}\r
\r
-\r
/**\r
Check the coreboot table if it is valid.\r
\r
**/\r
BOOLEAN\r
IsValidCbTable (\r
- IN struct cb_header *Header\r
+ IN struct cb_header *Header\r
)\r
{\r
- UINT16 CheckSum;\r
+ UINT16 CheckSum;\r
\r
if ((Header == NULL) || (Header->table_bytes == 0)) {\r
return FALSE;\r
return TRUE;\r
}\r
\r
-\r
/**\r
This function retrieves the parameter base address from boot loader.\r
\r
VOID\r
)\r
{\r
- struct cb_header *Header;\r
- struct cb_record *Record;\r
- UINT8 *TmpPtr;\r
- UINT8 *CbTablePtr;\r
- UINTN Idx;\r
- EFI_STATUS Status;\r
+ struct cb_header *Header;\r
+ struct cb_record *Record;\r
+ UINT8 *TmpPtr;\r
+ UINT8 *CbTablePtr;\r
+ UINTN Idx;\r
+ EFI_STATUS Status;\r
\r
//\r
// coreboot could pass coreboot table to UEFI payload\r
// Find full coreboot table in high memory\r
//\r
CbTablePtr = NULL;\r
- TmpPtr = (UINT8 *)Header + Header->header_bytes;\r
+ TmpPtr = (UINT8 *)Header + Header->header_bytes;\r
for (Idx = 0; Idx < Header->table_entries; Idx++) {\r
Record = (struct cb_record *)TmpPtr;\r
if (Record->tag == CB_TAG_FORWARD) {\r
CbTablePtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;\r
break;\r
}\r
+\r
TmpPtr += Record->size;\r
}\r
\r
return CbTablePtr;\r
}\r
\r
-\r
/**\r
Find coreboot record with given Tag.\r
\r
**/\r
VOID *\r
FindCbTag (\r
- IN UINT32 Tag\r
+ IN UINT32 Tag\r
)\r
{\r
- struct cb_header *Header;\r
- struct cb_record *Record;\r
- UINT8 *TmpPtr;\r
- UINT8 *TagPtr;\r
- UINTN Idx;\r
+ struct cb_header *Header;\r
+ struct cb_record *Record;\r
+ UINT8 *TmpPtr;\r
+ UINT8 *TagPtr;\r
+ UINTN Idx;\r
\r
- Header = (struct cb_header *) GetParameterBase ();\r
+ Header = (struct cb_header *)GetParameterBase ();\r
\r
TagPtr = NULL;\r
TmpPtr = (UINT8 *)Header + Header->header_bytes;\r
TagPtr = TmpPtr;\r
break;\r
}\r
+\r
TmpPtr += Record->size;\r
}\r
\r
return TagPtr;\r
}\r
\r
-\r
/**\r
Find the given table with TableId from the given coreboot memory Root.\r
\r
OUT UINT32 *MemTableSize\r
)\r
{\r
- UINTN Idx;\r
- BOOLEAN IsImdEntry;\r
- struct cbmem_entry *Entries;\r
+ UINTN Idx;\r
+ BOOLEAN IsImdEntry;\r
+ struct cbmem_entry *Entries;\r
\r
if ((Root == NULL) || (MemTable == NULL)) {\r
return RETURN_INVALID_PARAMETER;\r
}\r
+\r
//\r
// Check if the entry is CBMEM or IMD\r
// and handle them separately\r
for (Idx = 0; Idx < Root->num_entries; Idx++) {\r
if (Entries[Idx].id == TableId) {\r
if (IsImdEntry) {\r
- *MemTable = (VOID *) ((UINTN)Entries[Idx].start + (UINTN)Root);\r
+ *MemTable = (VOID *)((UINTN)Entries[Idx].start + (UINTN)Root);\r
} else {\r
- *MemTable = (VOID *) (UINTN)Entries[Idx].start;\r
+ *MemTable = (VOID *)(UINTN)Entries[Idx].start;\r
}\r
+\r
if (MemTableSize != NULL) {\r
*MemTableSize = Entries[Idx].size;\r
}\r
\r
- DEBUG ((DEBUG_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",\r
- TableId, *MemTable, Entries[Idx].size));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",\r
+ TableId,\r
+ *MemTable,\r
+ Entries[Idx].size\r
+ ));\r
return RETURN_SUCCESS;\r
}\r
}\r
**/\r
RETURN_STATUS\r
ParseCbMemTable (\r
- IN UINT32 TableId,\r
- OUT VOID **MemTable,\r
- OUT UINT32 *MemTableSize\r
+ IN UINT32 TableId,\r
+ OUT VOID **MemTable,\r
+ OUT UINT32 *MemTableSize\r
)\r
{\r
- EFI_STATUS Status;\r
- CB_MEMORY *Rec;\r
- struct cb_memory_range *Range;\r
- UINT64 Start;\r
- UINT64 Size;\r
- UINTN Index;\r
- struct cbmem_root *CbMemRoot;\r
+ EFI_STATUS Status;\r
+ CB_MEMORY *Rec;\r
+ struct cb_memory_range *Range;\r
+ UINT64 Start;\r
+ UINT64 Size;\r
+ UINTN Index;\r
+ struct cbmem_root *CbMemRoot;\r
\r
if (MemTable == NULL) {\r
return RETURN_INVALID_PARAMETER;\r
return Status;\r
}\r
\r
- for (Index = 0; Index < MEM_RANGE_COUNT(Rec); Index++) {\r
- Range = MEM_RANGE_PTR(Rec, Index);\r
- Start = cb_unpack64(Range->start);\r
- Size = cb_unpack64(Range->size);\r
+ for (Index = 0; Index < MEM_RANGE_COUNT (Rec); Index++) {\r
+ Range = MEM_RANGE_PTR (Rec, Index);\r
+ Start = cb_unpack64 (Range->start);\r
+ Size = cb_unpack64 (Range->size);\r
\r
if ((Range->type == CB_MEM_TABLE) && (Start > 0x1000)) {\r
CbMemRoot = (struct cbmem_root *)(UINTN)(Start + Size - DYN_CBMEM_ALIGN_SIZE);\r
- Status = FindCbMemTable (CbMemRoot, TableId, MemTable, MemTableSize);\r
+ Status = FindCbMemTable (CbMemRoot, TableId, MemTable, MemTableSize);\r
if (!EFI_ERROR (Status)) {\r
break;\r
}\r
return Status;\r
}\r
\r
-\r
-\r
/**\r
Acquire the memory information from the coreboot table in memory.\r
\r
IN VOID *Params\r
)\r
{\r
- CB_MEMORY *Rec;\r
- struct cb_memory_range *Range;\r
- UINTN Index;\r
- MEMORY_MAP_ENTRY MemoryMap;\r
+ CB_MEMORY *Rec;\r
+ struct cb_memory_range *Range;\r
+ UINTN Index;\r
+ MEMORY_MAP_ENTRY MemoryMap;\r
\r
//\r
// Get the coreboot memory table\r
return RETURN_NOT_FOUND;\r
}\r
\r
- for (Index = 0; Index < MEM_RANGE_COUNT(Rec); Index++) {\r
- Range = MEM_RANGE_PTR(Rec, Index);\r
- MemoryMap.Base = cb_unpack64(Range->start);\r
- MemoryMap.Size = cb_unpack64(Range->size);\r
+ for (Index = 0; Index < MEM_RANGE_COUNT (Rec); Index++) {\r
+ Range = MEM_RANGE_PTR (Rec, Index);\r
+ MemoryMap.Base = cb_unpack64 (Range->start);\r
+ MemoryMap.Size = cb_unpack64 (Range->size);\r
MemoryMap.Type = (UINT8)Range->type;\r
MemoryMap.Flag = 0;\r
- DEBUG ((DEBUG_INFO, "%d. %016lx - %016lx [%02x]\n",\r
- Index, MemoryMap.Base, MemoryMap.Base + MemoryMap.Size - 1, MemoryMap.Type));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%d. %016lx - %016lx [%02x]\n",\r
+ Index,\r
+ MemoryMap.Base,\r
+ MemoryMap.Base + MemoryMap.Size - 1,\r
+ MemoryMap.Type\r
+ ));\r
\r
MemInfoCallback (&MemoryMap, Params);\r
}\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Acquire SMBIOS table from coreboot.\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseSmbiosTable (\r
- OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
+ OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
)\r
{\r
- EFI_STATUS Status;\r
- VOID *MemTable;\r
- UINT32 MemTableSize;\r
+ EFI_STATUS Status;\r
+ VOID *MemTable;\r
+ UINT32 MemTableSize;\r
\r
Status = ParseCbMemTable (SIGNATURE_32 ('T', 'B', 'M', 'S'), &MemTable, &MemTableSize);\r
if (EFI_ERROR (Status)) {\r
return EFI_NOT_FOUND;\r
}\r
- SmbiosTable->SmBiosEntryPoint = (UINT64) (UINTN)MemTable;\r
+\r
+ SmbiosTable->SmBiosEntryPoint = (UINT64)(UINTN)MemTable;\r
\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Acquire ACPI table from coreboot.\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseAcpiTableInfo (\r
- OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
+ OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
)\r
{\r
- EFI_STATUS Status;\r
- VOID *MemTable;\r
- UINT32 MemTableSize;\r
+ EFI_STATUS Status;\r
+ VOID *MemTable;\r
+ UINT32 MemTableSize;\r
\r
Status = ParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), &MemTable, &MemTableSize);\r
if (EFI_ERROR (Status)) {\r
return EFI_NOT_FOUND;\r
}\r
- AcpiTableHob->Rsdp = (UINT64) (UINTN)MemTable;\r
+\r
+ AcpiTableHob->Rsdp = (UINT64)(UINTN)MemTable;\r
\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Find the serial port information\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseSerialInfo (\r
- OUT SERIAL_PORT_INFO *SerialPortInfo\r
+ OUT SERIAL_PORT_INFO *SerialPortInfo\r
)\r
{\r
- struct cb_serial *CbSerial;\r
+ struct cb_serial *CbSerial;\r
\r
CbSerial = FindCbTag (CB_TAG_SERIAL);\r
if (CbSerial == NULL) {\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxInfo (\r
- OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
+ OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
)\r
{\r
struct cb_framebuffer *CbFbRec;\r
DEBUG ((DEBUG_INFO, "reserved_mask_size: 0x%x\n", CbFbRec->reserved_mask_size));\r
DEBUG ((DEBUG_INFO, "reserved_mask_pos: 0x%x\n", CbFbRec->reserved_mask_pos));\r
\r
- GfxMode = &GfxInfo->GraphicsMode;\r
+ GfxMode = &GfxInfo->GraphicsMode;\r
GfxMode->Version = 0;\r
GfxMode->HorizontalResolution = CbFbRec->x_resolution;\r
GfxMode->VerticalResolution = CbFbRec->y_resolution;\r
if ((CbFbRec->red_mask_pos == 0) && (CbFbRec->green_mask_pos == 8) && (CbFbRec->blue_mask_pos == 16)) {\r
GfxMode->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;\r
} else if ((CbFbRec->blue_mask_pos == 0) && (CbFbRec->green_mask_pos == 8) && (CbFbRec->red_mask_pos == 16)) {\r
- GfxMode->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;\r
+ GfxMode->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;\r
}\r
+\r
GfxMode->PixelInformation.RedMask = ((1 << CbFbRec->red_mask_size) - 1) << CbFbRec->red_mask_pos;\r
GfxMode->PixelInformation.GreenMask = ((1 << CbFbRec->green_mask_size) - 1) << CbFbRec->green_mask_pos;\r
GfxMode->PixelInformation.BlueMask = ((1 << CbFbRec->blue_mask_size) - 1) << CbFbRec->blue_mask_pos;\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxDeviceInfo (\r
- OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
+ OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
)\r
{\r
return RETURN_NOT_FOUND;\r
VOID *\r
EFIAPI\r
GetNextHob (\r
- IN UINT16 Type,\r
- IN CONST VOID *HobStart\r
+ IN UINT16 Type,\r
+ IN CONST VOID *HobStart\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
ASSERT (HobStart != NULL);\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
//\r
// Parse the HOB list until end of list or matching type is found.\r
//\r
if (Hob.Header->HobType == Type) {\r
return Hob.Raw;\r
}\r
+\r
Hob.Raw = GET_NEXT_HOB (Hob);\r
}\r
+\r
return NULL;\r
}\r
\r
VOID *\r
EFIAPI\r
GetFirstHob (\r
- IN UINT16 Type\r
+ IN UINT16 Type\r
)\r
{\r
- VOID *HobList;\r
+ VOID *HobList;\r
\r
HobList = GetHobList ();\r
return GetNextHob (Type, HobList);\r
VOID *\r
EFIAPI\r
GetNextGuidHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN CONST VOID *HobStart\r
+ IN CONST EFI_GUID *Guid,\r
+ IN CONST VOID *HobStart\r
)\r
{\r
EFI_PEI_HOB_POINTERS GuidHob;\r
\r
- GuidHob.Raw = (UINT8 *) HobStart;\r
+ GuidHob.Raw = (UINT8 *)HobStart;\r
while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {\r
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {\r
break;\r
}\r
+\r
GuidHob.Raw = GET_NEXT_HOB (GuidHob);\r
}\r
+\r
return GuidHob.Raw;\r
}\r
\r
VOID *\r
EFIAPI\r
GetFirstGuidHob (\r
- IN CONST EFI_GUID *Guid\r
+ IN CONST EFI_GUID *Guid\r
)\r
{\r
- VOID *HobList;\r
+ VOID *HobList;\r
\r
HobList = GetHobList ();\r
return GetNextGuidHob (Guid, HobList);\r
VOID\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;\r
+ EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;\r
\r
- HandOffHob = (EFI_HOB_HANDOFF_INFO_TABLE *) GetHobList ();\r
+ HandOffHob = (EFI_HOB_HANDOFF_INFO_TABLE *)GetHobList ();\r
\r
- return HandOffHob->BootMode;\r
+ return HandOffHob->BootMode;\r
}\r
\r
/**\r
VOID\r
EFIAPI\r
BuildModuleHob (\r
- IN CONST EFI_GUID *ModuleName,\r
- IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,\r
- IN UINT64 ModuleLength,\r
- IN EFI_PHYSICAL_ADDRESS EntryPoint\r
+ IN CONST EFI_GUID *ModuleName,\r
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,\r
+ IN UINT64 ModuleLength,\r
+ IN EFI_PHYSICAL_ADDRESS EntryPoint\r
)\r
{\r
//\r
VOID *\r
EFIAPI\r
BuildGuidHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN UINTN DataLength\r
+ IN CONST EFI_GUID *Guid,\r
+ IN UINTN DataLength\r
)\r
{\r
//\r
VOID *\r
EFIAPI\r
BuildGuidDataHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN VOID *Data,\r
- IN UINTN DataLength\r
+ IN CONST EFI_GUID *Guid,\r
+ IN VOID *Data,\r
+ IN UINTN DataLength\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildFvHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildFv2Hob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN CONST EFI_GUID *FvName,\r
- IN CONST EFI_GUID *FileName\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN CONST EFI_GUID *FvName,\r
+ IN CONST EFI_GUID *FileName\r
)\r
{\r
ASSERT (FALSE);\r
VOID\r
EFIAPI\r
BuildFv3Hob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT32 AuthenticationStatus,\r
- IN BOOLEAN ExtractedFv,\r
- IN CONST EFI_GUID *FvName OPTIONAL,\r
- IN CONST EFI_GUID *FileName OPTIONAL\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT32 AuthenticationStatus,\r
+ IN BOOLEAN ExtractedFv,\r
+ IN CONST EFI_GUID *FvName OPTIONAL,\r
+ IN CONST EFI_GUID *FileName OPTIONAL\r
)\r
{\r
ASSERT (FALSE);\r
VOID\r
EFIAPI\r
BuildCvHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildCpuHob (\r
- IN UINT8 SizeOfMemorySpace,\r
- IN UINT8 SizeOfIoSpace\r
+ IN UINT8 SizeOfMemorySpace,\r
+ IN UINT8 SizeOfIoSpace\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildStackHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildBspStoreHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN EFI_MEMORY_TYPE MemoryType\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN EFI_MEMORY_TYPE MemoryType\r
)\r
{\r
//\r
VOID\r
EFIAPI\r
BuildMemoryAllocationHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN EFI_MEMORY_TYPE MemoryType\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN EFI_MEMORY_TYPE MemoryType\r
)\r
{\r
//\r
\r
**/\r
\r
-\r
#include <Uefi.h>\r
\r
VOID *gHobList = NULL;\r
UINT64 *Left;\r
UINT64 *Right;\r
\r
- Left = (UINT64 *) Guid1;\r
- Right = (UINT64 *) Guid2;\r
+ Left = (UINT64 *)Guid1;\r
+ Right = (UINT64 *)Guid2;\r
\r
- return (BOOLEAN) (Left[0] == Right[0] && Left[1] == Right[1]);\r
+ return (BOOLEAN)(Left[0] == Right[0] && Left[1] == Right[1]);\r
}\r
\r
/**\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- UINTN Index;\r
+ UINTN Index;\r
\r
for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {\r
if (LocalCompareGuid (&gEfiHobListGuid, &SystemTable->ConfigurationTable[Index].VendorGuid)) {\r
\r
**/\r
\r
-\r
#include <Uefi.h>\r
\r
/**\r
return SpiConstructor ();\r
}\r
\r
-\r
/**\r
Read NumBytes bytes of data from the address specified by\r
PAddress into Buffer.\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceRead (\r
- IN UINTN PAddress,\r
- IN OUT UINTN *NumBytes,\r
- OUT UINT8 *Buffer\r
+ IN UINTN PAddress,\r
+ IN OUT UINTN *NumBytes,\r
+ OUT UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 ByteCount;\r
- UINT32 RgnSize;\r
- UINT32 AddrOffset;\r
+ EFI_STATUS Status;\r
+ UINT32 ByteCount;\r
+ UINT32 RgnSize;\r
+ UINT32 AddrOffset;\r
\r
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);\r
if (EFI_ERROR (Status)) {\r
return SpiFlashRead (FlashRegionBios, AddrOffset, ByteCount, Buffer);\r
}\r
\r
-\r
/**\r
Write NumBytes bytes of data from Buffer to the address specified by\r
PAddresss.\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceWrite (\r
- IN UINTN PAddress,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN UINTN PAddress,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 ByteCount;\r
- UINT32 RgnSize;\r
- UINT32 AddrOffset;\r
+ EFI_STATUS Status;\r
+ UINT32 ByteCount;\r
+ UINT32 RgnSize;\r
+ UINT32 AddrOffset;\r
\r
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);\r
if (EFI_ERROR (Status)) {\r
return SpiFlashWrite (FlashRegionBios, AddrOffset, ByteCount, Buffer);\r
}\r
\r
-\r
/**\r
Erase the block starting at PAddress.\r
\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceBlockErase (\r
- IN UINTN PAddress,\r
- IN UINTN LbaLength\r
+ IN UINTN PAddress,\r
+ IN UINTN LbaLength\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 RgnSize;\r
- UINT32 AddrOffset;\r
+ EFI_STATUS Status;\r
+ UINT32 RgnSize;\r
+ UINT32 AddrOffset;\r
\r
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);\r
if (EFI_ERROR (Status)) {\r
return SpiFlashErase (FlashRegionBios, AddrOffset, (UINT32)LbaLength);\r
}\r
\r
-\r
/**\r
Lock or unlock the block starting at PAddress.\r
\r
EFI_STATUS\r
EFIAPI\r
LibFvbFlashDeviceBlockLock (\r
- IN UINTN PAddress,\r
- IN UINTN LbaLength,\r
- IN BOOLEAN Lock\r
+ IN UINTN PAddress,\r
+ IN UINTN LbaLength,\r
+ IN BOOLEAN Lock\r
)\r
{\r
return EFI_SUCCESS;\r
}\r
-\r
#include <Library/HobLib.h>\r
#include <Library/PcdLib.h>\r
\r
-VOID *mHobList;\r
+VOID *mHobList;\r
\r
/**\r
Returns the pointer to the HOB list.\r
return mHobList;\r
}\r
\r
-\r
/**\r
Build a Handoff Information Table HOB\r
\r
@return The pointer to the handoff HOB table.\r
\r
**/\r
-EFI_HOB_HANDOFF_INFO_TABLE*\r
+EFI_HOB_HANDOFF_INFO_TABLE *\r
EFIAPI\r
HobConstructor (\r
- IN VOID *EfiMemoryBottom,\r
- IN VOID *EfiMemoryTop,\r
- IN VOID *EfiFreeMemoryBottom,\r
- IN VOID *EfiFreeMemoryTop\r
+ IN VOID *EfiMemoryBottom,\r
+ IN VOID *EfiMemoryTop,\r
+ IN VOID *EfiFreeMemoryBottom,\r
+ IN VOID *EfiFreeMemoryTop\r
)\r
{\r
EFI_HOB_HANDOFF_INFO_TABLE *Hob;\r
Hob = EfiFreeMemoryBottom;\r
HobEnd = (EFI_HOB_GENERIC_HEADER *)(Hob+1);\r
\r
- Hob->Header.HobType = EFI_HOB_TYPE_HANDOFF;\r
- Hob->Header.HobLength = sizeof(EFI_HOB_HANDOFF_INFO_TABLE);\r
- Hob->Header.Reserved = 0;\r
+ Hob->Header.HobType = EFI_HOB_TYPE_HANDOFF;\r
+ Hob->Header.HobLength = sizeof (EFI_HOB_HANDOFF_INFO_TABLE);\r
+ Hob->Header.Reserved = 0;\r
\r
- HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;\r
- HobEnd->HobLength = sizeof(EFI_HOB_GENERIC_HEADER);\r
- HobEnd->Reserved = 0;\r
+ HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;\r
+ HobEnd->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);\r
+ HobEnd->Reserved = 0;\r
\r
- Hob->Version = EFI_HOB_HANDOFF_TABLE_VERSION;\r
- Hob->BootMode = BOOT_WITH_FULL_CONFIGURATION;\r
+ Hob->Version = EFI_HOB_HANDOFF_TABLE_VERSION;\r
+ Hob->BootMode = BOOT_WITH_FULL_CONFIGURATION;\r
\r
- Hob->EfiMemoryTop = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiMemoryTop;\r
- Hob->EfiMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiMemoryBottom;\r
- Hob->EfiFreeMemoryTop = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiFreeMemoryTop;\r
- Hob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) (HobEnd+1);\r
- Hob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;\r
+ Hob->EfiMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiMemoryTop;\r
+ Hob->EfiMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiMemoryBottom;\r
+ Hob->EfiFreeMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiFreeMemoryTop;\r
+ Hob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)(HobEnd+1);\r
+ Hob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;\r
\r
mHobList = Hob;\r
return Hob;\r
VOID *\r
EFIAPI\r
CreateHob (\r
- IN UINT16 HobType,\r
- IN UINT16 HobLength\r
+ IN UINT16 HobType,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;\r
FreeMemory = HandOffHob->EfiFreeMemoryTop - HandOffHob->EfiFreeMemoryBottom;\r
\r
if (FreeMemory < HobLength) {\r
- return NULL;\r
+ return NULL;\r
}\r
\r
- Hob = (VOID*) (UINTN) HandOffHob->EfiEndOfHobList;\r
- ((EFI_HOB_GENERIC_HEADER*) Hob)->HobType = HobType;\r
- ((EFI_HOB_GENERIC_HEADER*) Hob)->HobLength = HobLength;\r
- ((EFI_HOB_GENERIC_HEADER*) Hob)->Reserved = 0;\r
+ Hob = (VOID *)(UINTN)HandOffHob->EfiEndOfHobList;\r
+ ((EFI_HOB_GENERIC_HEADER *)Hob)->HobType = HobType;\r
+ ((EFI_HOB_GENERIC_HEADER *)Hob)->HobLength = HobLength;\r
+ ((EFI_HOB_GENERIC_HEADER *)Hob)->Reserved = 0;\r
\r
- HobEnd = (EFI_HOB_GENERIC_HEADER*) ((UINTN)Hob + HobLength);\r
- HandOffHob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;\r
+ HobEnd = (EFI_HOB_GENERIC_HEADER *)((UINTN)Hob + HobLength);\r
+ HandOffHob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;\r
\r
HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;\r
- HobEnd->HobLength = sizeof(EFI_HOB_GENERIC_HEADER);\r
+ HobEnd->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);\r
HobEnd->Reserved = 0;\r
HobEnd++;\r
- HandOffHob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;\r
+ HandOffHob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;\r
\r
return Hob;\r
}\r
EFI_HOB_RESOURCE_DESCRIPTOR *Hob;\r
\r
Hob = CreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, sizeof (EFI_HOB_RESOURCE_DESCRIPTOR));\r
- ASSERT(Hob != NULL);\r
+ ASSERT (Hob != NULL);\r
\r
Hob->ResourceType = ResourceType;\r
Hob->ResourceAttribute = ResourceAttribute;\r
VOID *\r
EFIAPI\r
GetNextHob (\r
- IN UINT16 Type,\r
- IN CONST VOID *HobStart\r
+ IN UINT16 Type,\r
+ IN CONST VOID *HobStart\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
ASSERT (HobStart != NULL);\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
//\r
// Parse the HOB list until end of list or matching type is found.\r
//\r
if (Hob.Header->HobType == Type) {\r
return Hob.Raw;\r
}\r
+\r
Hob.Raw = GET_NEXT_HOB (Hob);\r
}\r
+\r
return NULL;\r
}\r
\r
-\r
-\r
/**\r
Returns the first instance of a HOB type among the whole HOB list.\r
\r
VOID *\r
EFIAPI\r
GetFirstHob (\r
- IN UINT16 Type\r
+ IN UINT16 Type\r
)\r
{\r
- VOID *HobList;\r
+ VOID *HobList;\r
\r
HobList = GetHobList ();\r
return GetNextHob (Type, HobList);\r
}\r
\r
-\r
/**\r
This function searches the first instance of a HOB from the starting HOB pointer.\r
Such HOB should satisfy two conditions:\r
VOID *\r
EFIAPI\r
GetNextGuidHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN CONST VOID *HobStart\r
+ IN CONST EFI_GUID *Guid,\r
+ IN CONST VOID *HobStart\r
)\r
{\r
EFI_PEI_HOB_POINTERS GuidHob;\r
\r
- GuidHob.Raw = (UINT8 *) HobStart;\r
+ GuidHob.Raw = (UINT8 *)HobStart;\r
while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {\r
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {\r
break;\r
}\r
+\r
GuidHob.Raw = GET_NEXT_HOB (GuidHob);\r
}\r
+\r
return GuidHob.Raw;\r
}\r
\r
-\r
/**\r
This function searches the first instance of a HOB among the whole HOB list.\r
Such HOB should satisfy two conditions:\r
VOID *\r
EFIAPI\r
GetFirstGuidHob (\r
- IN CONST EFI_GUID *Guid\r
+ IN CONST EFI_GUID *Guid\r
)\r
{\r
- VOID *HobList;\r
+ VOID *HobList;\r
\r
HobList = GetHobList ();\r
return GetNextGuidHob (Guid, HobList);\r
}\r
\r
-\r
-\r
-\r
/**\r
Builds a HOB for a loaded PE32 module.\r
\r
VOID\r
EFIAPI\r
BuildModuleHob (\r
- IN CONST EFI_GUID *ModuleName,\r
- IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,\r
- IN UINT64 ModuleLength,\r
- IN EFI_PHYSICAL_ADDRESS EntryPoint\r
+ IN CONST EFI_GUID *ModuleName,\r
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,\r
+ IN UINT64 ModuleLength,\r
+ IN EFI_PHYSICAL_ADDRESS EntryPoint\r
)\r
{\r
EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob;\r
\r
- ASSERT (((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&\r
- ((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0));\r
+ ASSERT (\r
+ ((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&\r
+ ((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0)\r
+ );\r
\r
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE));\r
\r
VOID *\r
EFIAPI\r
BuildGuidHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN UINTN DataLength\r
+ IN CONST EFI_GUID *Guid,\r
+ IN UINTN DataLength\r
)\r
{\r
- EFI_HOB_GUID_TYPE *Hob;\r
+ EFI_HOB_GUID_TYPE *Hob;\r
\r
//\r
// Make sure that data length is not too long.\r
//\r
ASSERT (DataLength <= (0xffff - sizeof (EFI_HOB_GUID_TYPE)));\r
\r
- Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + DataLength));\r
+ Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16)(sizeof (EFI_HOB_GUID_TYPE) + DataLength));\r
CopyGuid (&Hob->Name, Guid);\r
return Hob + 1;\r
}\r
\r
-\r
/**\r
Copies a data buffer to a newly-built HOB.\r
\r
VOID *\r
EFIAPI\r
BuildGuidDataHob (\r
- IN CONST EFI_GUID *Guid,\r
- IN VOID *Data,\r
- IN UINTN DataLength\r
+ IN CONST EFI_GUID *Guid,\r
+ IN VOID *Data,\r
+ IN UINTN DataLength\r
)\r
{\r
VOID *HobData;\r
return CopyMem (HobData, Data, DataLength);\r
}\r
\r
-\r
/**\r
Builds a Firmware Volume HOB.\r
\r
VOID\r
EFIAPI\r
BuildFvHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
EFI_HOB_FIRMWARE_VOLUME *Hob;\r
Hob->Length = Length;\r
}\r
\r
-\r
/**\r
Builds a EFI_HOB_TYPE_FV2 HOB.\r
\r
VOID\r
EFIAPI\r
BuildFv2Hob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN CONST EFI_GUID *FvName,\r
- IN CONST EFI_GUID *FileName\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN CONST EFI_GUID *FvName,\r
+ IN CONST EFI_GUID *FileName\r
)\r
{\r
EFI_HOB_FIRMWARE_VOLUME2 *Hob;\r
VOID\r
EFIAPI\r
BuildFv3Hob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT32 AuthenticationStatus,\r
- IN BOOLEAN ExtractedFv,\r
- IN CONST EFI_GUID *FvName OPTIONAL,\r
- IN CONST EFI_GUID *FileName OPTIONAL\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT32 AuthenticationStatus,\r
+ IN BOOLEAN ExtractedFv,\r
+ IN CONST EFI_GUID *FvName OPTIONAL,\r
+ IN CONST EFI_GUID *FileName OPTIONAL\r
)\r
{\r
EFI_HOB_FIRMWARE_VOLUME3 *Hob;\r
}\r
}\r
\r
-\r
/**\r
Builds a HOB for the CPU.\r
\r
VOID\r
EFIAPI\r
BuildCpuHob (\r
- IN UINT8 SizeOfMemorySpace,\r
- IN UINT8 SizeOfIoSpace\r
+ IN UINT8 SizeOfMemorySpace,\r
+ IN UINT8 SizeOfIoSpace\r
)\r
{\r
EFI_HOB_CPU *Hob;\r
ZeroMem (Hob->Reserved, sizeof (Hob->Reserved));\r
}\r
\r
-\r
/**\r
Builds a HOB for the Stack.\r
\r
VOID\r
EFIAPI\r
BuildStackHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
EFI_HOB_MEMORY_ALLOCATION_STACK *Hob;\r
\r
- ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&\r
- ((Length & (EFI_PAGE_SIZE - 1)) == 0));\r
+ ASSERT (\r
+ ((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&\r
+ ((Length & (EFI_PAGE_SIZE - 1)) == 0)\r
+ );\r
\r
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK));\r
\r
ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));\r
}\r
\r
-\r
/**\r
Update the Stack Hob if the stack has been moved\r
\r
VOID\r
EFIAPI\r
UpdateStackHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
- EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
\r
Hob.Raw = GetHobList ();\r
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Raw)) != NULL) {\r
// Update the BSP Stack Hob to reflect the new stack info.\r
//\r
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress = BaseAddress;\r
- Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;\r
+ Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;\r
break;\r
}\r
+\r
Hob.Raw = GET_NEXT_HOB (Hob);\r
}\r
}\r
\r
-\r
-\r
/**\r
Builds a HOB for the memory allocation.\r
\r
VOID\r
EFIAPI\r
BuildMemoryAllocationHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN EFI_MEMORY_TYPE MemoryType\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN EFI_MEMORY_TYPE MemoryType\r
)\r
{\r
EFI_HOB_MEMORY_ALLOCATION *Hob;\r
\r
- ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&\r
- ((Length & (EFI_PAGE_SIZE - 1)) == 0));\r
+ ASSERT (\r
+ ((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&\r
+ ((Length & (EFI_PAGE_SIZE - 1)) == 0)\r
+ );\r
\r
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION));\r
\r
#include <UniversalPayload/PciRootBridges.h>\r
\r
typedef struct {\r
- ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+ ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
} CB_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
\r
/**\r
**/\r
PCI_ROOT_BRIDGE *\r
ScanForRootBridges (\r
- OUT UINTN *NumberOfRootBridges\r
-);\r
+ OUT UINTN *NumberOfRootBridges\r
+ );\r
\r
/**\r
Scan for all root bridges from Universal Payload PciRootBridgeInfoHob\r
RetrieveRootBridgeInfoFromHob (\r
IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,\r
OUT UINTN *NumberOfRootBridges\r
-);\r
+ );\r
\r
/**\r
Initialize a PCI_ROOT_BRIDGE structure.\r
**/\r
EFI_STATUS\r
InitRootBridge (\r
- IN UINT64 Supports,\r
- IN UINT64 Attributes,\r
- IN UINT64 AllocAttributes,\r
- IN UINT8 RootBusNumber,\r
- IN UINT8 MaxSubBusNumber,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
- OUT PCI_ROOT_BRIDGE *RootBus\r
-);\r
+ IN UINT64 Supports,\r
+ IN UINT64 Attributes,\r
+ IN UINT64 AllocAttributes,\r
+ IN UINT8 RootBusNumber,\r
+ IN UINT8 MaxSubBusNumber,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
+ OUT PCI_ROOT_BRIDGE *RootBus\r
+ );\r
\r
/**\r
Initialize DevicePath for a PCI_ROOT_BRIDGE.\r
**/\r
EFI_DEVICE_PATH_PROTOCOL *\r
CreateRootBridgeDevicePath (\r
- IN UINT32 HID,\r
- IN UINT32 UID\r
-);\r
+ IN UINT32 HID,\r
+ IN UINT32 UID\r
+ );\r
+\r
#endif\r
\r
STATIC\r
CONST\r
-CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {\r
+CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {\r
{\r
{\r
ACPI_DEVICE_PATH,\r
ACPI_DP,\r
{\r
- (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
- (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
+ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),\r
+ (UINT8)((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)\r
}\r
},\r
- EISA_PNP_ID(0x0A03), // HID\r
- 0 // UID\r
+ EISA_PNP_ID (0x0A03), // HID\r
+ 0 // UID\r
},\r
\r
{\r
**/\r
EFI_STATUS\r
InitRootBridge (\r
- IN UINT64 Supports,\r
- IN UINT64 Attributes,\r
- IN UINT64 AllocAttributes,\r
- IN UINT8 RootBusNumber,\r
- IN UINT8 MaxSubBusNumber,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
- OUT PCI_ROOT_BRIDGE *RootBus\r
-)\r
+ IN UINT64 Supports,\r
+ IN UINT64 Attributes,\r
+ IN UINT64 AllocAttributes,\r
+ IN UINT8 RootBusNumber,\r
+ IN UINT8 MaxSubBusNumber,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
+ OUT PCI_ROOT_BRIDGE *RootBus\r
+ )\r
{\r
- CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
+ CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
\r
//\r
// Be safe if other fields are added to PCI_ROOT_BRIDGE later.\r
RootBus->DmaAbove4G = FALSE;\r
\r
RootBus->AllocationAttributes = AllocAttributes;\r
- RootBus->Bus.Base = RootBusNumber;\r
- RootBus->Bus.Limit = MaxSubBusNumber;\r
+ RootBus->Bus.Base = RootBusNumber;\r
+ RootBus->Bus.Limit = MaxSubBusNumber;\r
CopyMem (&RootBus->Io, Io, sizeof (*Io));\r
CopyMem (&RootBus->Mem, Mem, sizeof (*Mem));\r
CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));\r
\r
RootBus->NoExtendedConfigSpace = FALSE;\r
\r
- DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),\r
- &mRootBridgeDevicePathTemplate);\r
+ DevicePath = AllocateCopyPool (\r
+ sizeof (mRootBridgeDevicePathTemplate),\r
+ &mRootBridgeDevicePathTemplate\r
+ );\r
if (DevicePath == NULL) {\r
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- DevicePath->AcpiDevicePath.UID = RootBusNumber;\r
- RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;\r
\r
- DEBUG ((DEBUG_INFO,\r
- "%a: populated root bus %d, with room for %d subordinate bus(es)\n",\r
- __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));\r
+ DevicePath->AcpiDevicePath.UID = RootBusNumber;\r
+ RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;\r
+\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: populated root bus %d, with room for %d subordinate bus(es)\n",\r
+ __FUNCTION__,\r
+ RootBusNumber,\r
+ MaxSubBusNumber - RootBusNumber\r
+ ));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_DEVICE_PATH_PROTOCOL *\r
CreateRootBridgeDevicePath (\r
- IN UINT32 HID,\r
- IN UINT32 UID\r
-)\r
+ IN UINT32 HID,\r
+ IN UINT32 UID\r
+ )\r
{\r
- CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
- DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),\r
- &mRootBridgeDevicePathTemplate);\r
+ CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
+\r
+ DevicePath = AllocateCopyPool (\r
+ sizeof (mRootBridgeDevicePathTemplate),\r
+ &mRootBridgeDevicePathTemplate\r
+ );\r
ASSERT (DevicePath != NULL);\r
DevicePath->AcpiDevicePath.HID = HID;\r
DevicePath->AcpiDevicePath.UID = UID;\r
PCI_ROOT_BRIDGE *\r
EFIAPI\r
PciHostBridgeGetRootBridges (\r
- UINTN *Count\r
-)\r
+ UINTN *Count\r
+ )\r
{\r
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo;\r
EFI_HOB_GUID_TYPE *GuidHob;\r
UNIVERSAL_PAYLOAD_GENERIC_HEADER *GenericHeader;\r
+\r
//\r
// Find Universal Payload PCI Root Bridge Info hob\r
//\r
GuidHob = GetFirstGuidHob (&gUniversalPayloadPciRootBridgeInfoGuid);\r
if (GuidHob != NULL) {\r
- GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);\r
- if ((sizeof(UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {\r
+ GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);\r
+ if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {\r
if ((GenericHeader->Revision == UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION) && (GenericHeader->Length >= sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES))) {\r
//\r
// UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES structure is used when Revision equals to UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION\r
//\r
- PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (GuidHob);\r
- if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {\r
+ PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (GuidHob);\r
+ if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {\r
return RetrieveRootBridgeInfoFromHob (PciRootBridgeInfo, Count);\r
}\r
}\r
}\r
}\r
+\r
return ScanForRootBridges (Count);\r
}\r
\r
VOID\r
EFIAPI\r
PciHostBridgeFreeRootBridges (\r
- PCI_ROOT_BRIDGE *Bridges,\r
- UINTN Count\r
-)\r
+ PCI_ROOT_BRIDGE *Bridges,\r
+ UINTN Count\r
+ )\r
{\r
- if (Bridges == NULL && Count == 0) {\r
+ if ((Bridges == NULL) && (Count == 0)) {\r
return;\r
}\r
+\r
ASSERT (Bridges != NULL && Count > 0);\r
\r
do {\r
FreePool (Bridges);\r
}\r
\r
-\r
/**\r
Inform the platform that the resource conflict happens.\r
\r
VOID\r
EFIAPI\r
PciHostBridgeResourceConflict (\r
- EFI_HANDLE HostBridgeHandle,\r
- VOID *Configuration\r
-)\r
+ EFI_HANDLE HostBridgeHandle,\r
+ VOID *Configuration\r
+ )\r
{\r
//\r
// coreboot UEFI Payload does not do PCI enumeration and should not call this\r
**/\r
VOID\r
AdjustRootBridgeResource (\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
-)\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
+ )\r
{\r
UINT64 Mask;\r
\r
\r
if (MemAbove4G->Base < 0x100000000ULL) {\r
if (MemAbove4G->Base < Mem->Base) {\r
- Mem->Base = MemAbove4G->Base;\r
+ Mem->Base = MemAbove4G->Base;\r
}\r
+\r
if (MemAbove4G->Limit > Mem->Limit) {\r
Mem->Limit = MemAbove4G->Limit;\r
}\r
+\r
MemAbove4G->Base = MAX_UINT64;\r
MemAbove4G->Limit = 0;\r
}\r
\r
if (PMemAbove4G->Base < 0x100000000ULL) {\r
if (PMemAbove4G->Base < Mem->Base) {\r
- Mem->Base = PMemAbove4G->Base;\r
+ Mem->Base = PMemAbove4G->Base;\r
}\r
+\r
if (PMemAbove4G->Limit > Mem->Limit) {\r
Mem->Limit = PMemAbove4G->Limit;\r
}\r
+\r
PMemAbove4G->Base = MAX_UINT64;\r
PMemAbove4G->Limit = 0;\r
}\r
//\r
// Align IO resource at 4K boundary\r
//\r
- Mask = 0xFFFULL;\r
- Io->Limit = ((Io->Limit + Mask) & ~Mask) - 1;\r
+ Mask = 0xFFFULL;\r
+ Io->Limit = ((Io->Limit + Mask) & ~Mask) - 1;\r
if (Io->Base != MAX_UINT64) {\r
Io->Base &= ~Mask;\r
}\r
//\r
// Align MEM resource at 1MB boundary\r
//\r
- Mask = 0xFFFFFULL;\r
- Mem->Limit = ((Mem->Limit + Mask) & ~Mask) - 1;\r
+ Mask = 0xFFFFFULL;\r
+ Mem->Limit = ((Mem->Limit + Mask) & ~Mask) - 1;\r
if (Mem->Base != MAX_UINT64) {\r
Mem->Base &= ~Mask;\r
}\r
STATIC\r
VOID\r
PcatPciRootBridgeBarExisted (\r
- IN UINT64 Address,\r
- OUT UINT32 *OriginalValue,\r
- OUT UINT32 *Value\r
-)\r
+ IN UINT64 Address,\r
+ OUT UINT32 *OriginalValue,\r
+ OUT UINT32 *Value\r
+ )\r
{\r
- UINTN PciAddress;\r
+ UINTN PciAddress;\r
\r
PciAddress = (UINTN)Address;\r
\r
STATIC\r
VOID\r
PcatPciRootBridgeParseBars (\r
- IN UINT16 Command,\r
- IN UINTN Bus,\r
- IN UINTN Device,\r
- IN UINTN Function,\r
- IN UINTN BarOffsetBase,\r
- IN UINTN BarOffsetEnd,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
-\r
-)\r
+ IN UINT16 Command,\r
+ IN UINTN Bus,\r
+ IN UINTN Device,\r
+ IN UINTN Function,\r
+ IN UINTN BarOffsetBase,\r
+ IN UINTN BarOffsetEnd,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
+ IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
+\r
+ )\r
{\r
- UINT32 OriginalValue;\r
- UINT32 Value;\r
- UINT32 OriginalUpperValue;\r
- UINT32 UpperValue;\r
- UINT64 Mask;\r
- UINTN Offset;\r
- UINTN LowBit;\r
- UINT64 Base;\r
- UINT64 Length;\r
- UINT64 Limit;\r
- PCI_ROOT_BRIDGE_APERTURE *MemAperture;\r
+ UINT32 OriginalValue;\r
+ UINT32 Value;\r
+ UINT32 OriginalUpperValue;\r
+ UINT32 UpperValue;\r
+ UINT64 Mask;\r
+ UINTN Offset;\r
+ UINTN LowBit;\r
+ UINT64 Base;\r
+ UINT64 Length;\r
+ UINT64 Limit;\r
+ PCI_ROOT_BRIDGE_APERTURE *MemAperture;\r
\r
for (Offset = BarOffsetBase; Offset < BarOffsetEnd; Offset += sizeof (UINT32)) {\r
PcatPciRootBridgeBarExisted (\r
PCI_LIB_ADDRESS (Bus, Device, Function, Offset),\r
- &OriginalValue, &Value\r
- );\r
+ &OriginalValue,\r
+ &Value\r
+ );\r
if (Value == 0) {\r
continue;\r
}\r
+\r
if ((Value & BIT0) == BIT0) {\r
//\r
// IO Bar\r
//\r
if ((Command & EFI_PCI_COMMAND_IO_SPACE) != 0) {\r
- Mask = 0xfffffffc;\r
- Base = OriginalValue & Mask;\r
+ Mask = 0xfffffffc;\r
+ Base = OriginalValue & Mask;\r
Length = ((~(Value & Mask)) & Mask) + 0x04;\r
if (!(Value & 0xFFFF0000)) {\r
Length &= 0x0000FFFF;\r
}\r
+\r
Limit = Base + Length - 1;\r
\r
if ((Base > 0) && (Base < Limit)) {\r
if (Io->Base > Base) {\r
Io->Base = Base;\r
}\r
+\r
if (Io->Limit < Limit) {\r
Io->Limit = Limit;\r
}\r
// Mem Bar\r
//\r
if ((Command & EFI_PCI_COMMAND_MEMORY_SPACE) != 0) {\r
-\r
- Mask = 0xfffffff0;\r
- Base = OriginalValue & Mask;\r
+ Mask = 0xfffffff0;\r
+ Base = OriginalValue & Mask;\r
Length = Value & Mask;\r
\r
if ((Value & (BIT1 | BIT2)) == 0) {\r
PCI_LIB_ADDRESS (Bus, Device, Function, Offset),\r
&OriginalUpperValue,\r
&UpperValue\r
- );\r
+ );\r
\r
- Base = Base | LShiftU64 ((UINT64) OriginalUpperValue, 32);\r
- Length = Length | LShiftU64 ((UINT64) UpperValue, 32);\r
+ Base = Base | LShiftU64 ((UINT64)OriginalUpperValue, 32);\r
+ Length = Length | LShiftU64 ((UINT64)UpperValue, 32);\r
if (Length != 0) {\r
LowBit = LowBitSet64 (Length);\r
Length = LShiftU64 (1ULL, LowBit);\r
if (MemAperture->Base > Base) {\r
MemAperture->Base = Base;\r
}\r
+\r
if (MemAperture->Limit < Limit) {\r
MemAperture->Limit = Limit;\r
}\r
**/\r
PCI_ROOT_BRIDGE *\r
ScanForRootBridges (\r
- OUT UINTN *NumberOfRootBridges\r
-)\r
+ OUT UINTN *NumberOfRootBridges\r
+ )\r
{\r
- UINTN PrimaryBus;\r
- UINTN SubBus;\r
- UINT8 Device;\r
- UINT8 Function;\r
- UINTN NumberOfDevices;\r
- UINTN Address;\r
- PCI_TYPE01 Pci;\r
- UINT64 Attributes;\r
- UINT64 Base;\r
- UINT64 Limit;\r
- UINT64 Value;\r
- PCI_ROOT_BRIDGE_APERTURE Io;\r
- PCI_ROOT_BRIDGE_APERTURE Mem;\r
- PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
- PCI_ROOT_BRIDGE_APERTURE PMem;\r
- PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;\r
- PCI_ROOT_BRIDGE_APERTURE *MemAperture;\r
- PCI_ROOT_BRIDGE *RootBridges;\r
- UINTN BarOffsetEnd;\r
-\r
+ UINTN PrimaryBus;\r
+ UINTN SubBus;\r
+ UINT8 Device;\r
+ UINT8 Function;\r
+ UINTN NumberOfDevices;\r
+ UINTN Address;\r
+ PCI_TYPE01 Pci;\r
+ UINT64 Attributes;\r
+ UINT64 Base;\r
+ UINT64 Limit;\r
+ UINT64 Value;\r
+ PCI_ROOT_BRIDGE_APERTURE Io;\r
+ PCI_ROOT_BRIDGE_APERTURE Mem;\r
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
+ PCI_ROOT_BRIDGE_APERTURE PMem;\r
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;\r
+ PCI_ROOT_BRIDGE_APERTURE *MemAperture;\r
+ PCI_ROOT_BRIDGE *RootBridges;\r
+ UINTN BarOffsetEnd;\r
\r
*NumberOfRootBridges = 0;\r
- RootBridges = NULL;\r
+ RootBridges = NULL;\r
\r
//\r
// After scanning all the PCI devices on the PCI root bridge's primary bus,\r
// root bridge's subordinate bus number + 1.\r
//\r
for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) {\r
- SubBus = PrimaryBus;\r
+ SubBus = PrimaryBus;\r
Attributes = 0;\r
\r
ZeroMem (&Io, sizeof (Io));\r
// Scan all the PCI devices on the primary bus of the PCI root bridge\r
//\r
for (Device = 0, NumberOfDevices = 0; Device <= PCI_MAX_DEVICE; Device++) {\r
-\r
for (Function = 0; Function <= PCI_MAX_FUNC; Function++) {\r
-\r
//\r
// Compute the PCI configuration address of the PCI device to probe\r
//\r
// Get the I/O range that the PPB is decoding\r
//\r
Value = Pci.Bridge.IoBase & 0x0f;\r
- Base = ((UINT32) Pci.Bridge.IoBase & 0xf0) << 8;\r
- Limit = (((UINT32) Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;\r
+ Base = ((UINT32)Pci.Bridge.IoBase & 0xf0) << 8;\r
+ Limit = (((UINT32)Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;\r
if (Value == BIT0) {\r
- Base |= ((UINT32) Pci.Bridge.IoBaseUpper16 << 16);\r
- Limit |= ((UINT32) Pci.Bridge.IoLimitUpper16 << 16);\r
+ Base |= ((UINT32)Pci.Bridge.IoBaseUpper16 << 16);\r
+ Limit |= ((UINT32)Pci.Bridge.IoLimitUpper16 << 16);\r
}\r
+\r
if ((Base > 0) && (Base < Limit)) {\r
if (Io.Base > Base) {\r
Io.Base = Base;\r
}\r
+\r
if (Io.Limit < Limit) {\r
Io.Limit = Limit;\r
}\r
//\r
// Get the Memory range that the PPB is decoding\r
//\r
- Base = ((UINT32) Pci.Bridge.MemoryBase & 0xfff0) << 16;\r
- Limit = (((UINT32) Pci.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff;\r
+ Base = ((UINT32)Pci.Bridge.MemoryBase & 0xfff0) << 16;\r
+ Limit = (((UINT32)Pci.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff;\r
if ((Base > 0) && (Base < Limit)) {\r
if (Mem.Base > Base) {\r
Mem.Base = Base;\r
}\r
+\r
if (Mem.Limit < Limit) {\r
Mem.Limit = Limit;\r
}\r
// Get the Prefetchable Memory range that the PPB is decoding\r
//\r
Value = Pci.Bridge.PrefetchableMemoryBase & 0x0f;\r
- Base = ((UINT32) Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;\r
- Limit = (((UINT32) Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)\r
+ Base = ((UINT32)Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;\r
+ Limit = (((UINT32)Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)\r
<< 16) | 0xfffff;\r
MemAperture = &PMem;\r
if (Value == BIT0) {\r
- Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);\r
- Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);\r
+ Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);\r
+ Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);\r
MemAperture = &PMemAbove4G;\r
}\r
+\r
if ((Base > 0) && (Base < Limit)) {\r
if (MemAperture->Base > Base) {\r
MemAperture->Base = Base;\r
}\r
+\r
if (MemAperture->Limit < Limit) {\r
MemAperture->Limit = Limit;\r
}\r
// Look at the PPB Configuration for legacy decoding attributes\r
//\r
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_ISA)\r
- == EFI_PCI_BRIDGE_CONTROL_ISA) {\r
+ == EFI_PCI_BRIDGE_CONTROL_ISA)\r
+ {\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
}\r
+\r
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA)\r
- == EFI_PCI_BRIDGE_CONTROL_VGA) {\r
+ == EFI_PCI_BRIDGE_CONTROL_VGA)\r
+ {\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA_16)\r
- != 0) {\r
+ != 0)\r
+ {\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO_16;\r
}\r
OFFSET_OF (PCI_TYPE00, Device.Bar),\r
BarOffsetEnd,\r
&Io,\r
- &Mem, &MemAbove4G,\r
- &PMem, &PMemAbove4G\r
- );\r
+ &Mem,\r
+ &MemAbove4G,\r
+ &PMem,\r
+ &PMemAbove4G\r
+ );\r
\r
//\r
// See if the PCI device is an IDE controller\r
//\r
- if (IS_CLASS2 (&Pci, PCI_CLASS_MASS_STORAGE,\r
- PCI_CLASS_MASS_STORAGE_IDE)) {\r
+ if (IS_CLASS2 (\r
+ &Pci,\r
+ PCI_CLASS_MASS_STORAGE,\r
+ PCI_CLASS_MASS_STORAGE_IDE\r
+ ))\r
+ {\r
if (Pci.Hdr.ClassCode[0] & 0x80) {\r
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
}\r
+\r
if (Pci.Hdr.ClassCode[0] & 0x01) {\r
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
}\r
+\r
if (Pci.Hdr.ClassCode[0] & 0x04) {\r
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
}\r
//\r
if (IS_CLASS2 (&Pci, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA) ||\r
IS_CLASS2 (&Pci, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA)\r
- ) {\r
+ )\r
+ {\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
// or ISA_POSITIVE_DECODE Bridge device\r
//\r
if (Pci.Hdr.ClassCode[2] == PCI_CLASS_BRIDGE) {\r
- if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA ||\r
- Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA ||\r
- Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE) {\r
+ if ((Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) ||\r
+ (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA) ||\r
+ (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE))\r
+ {\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;\r
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
// If this device is not a multi function device, then skip the rest\r
// of this PCI device\r
//\r
- if (Function == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {\r
+ if ((Function == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {\r
break;\r
}\r
}\r
(*NumberOfRootBridges) * sizeof (PCI_ROOT_BRIDGE),\r
(*NumberOfRootBridges + 1) * sizeof (PCI_ROOT_BRIDGE),\r
RootBridges\r
- );\r
+ );\r
ASSERT (RootBridges != NULL);\r
\r
AdjustRootBridgeResource (&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G);\r
\r
InitRootBridge (\r
- Attributes, Attributes, 0,\r
- (UINT8) PrimaryBus, (UINT8) SubBus,\r
- &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,\r
+ Attributes,\r
+ Attributes,\r
+ 0,\r
+ (UINT8)PrimaryBus,\r
+ (UINT8)SubBus,\r
+ &Io,\r
+ &Mem,\r
+ &MemAbove4G,\r
+ &PMem,\r
+ &PMemAbove4G,\r
&RootBridges[*NumberOfRootBridges]\r
- );\r
+ );\r
RootBridges[*NumberOfRootBridges].ResourceAssigned = TRUE;\r
//\r
// Increment the index for the next PCI Root Bridge\r
RetrieveRootBridgeInfoFromHob (\r
IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,\r
OUT UINTN *NumberOfRootBridges\r
-)\r
+ )\r
{\r
- PCI_ROOT_BRIDGE *PciRootBridges;\r
- UINTN Size;\r
- UINT8 Index;\r
+ PCI_ROOT_BRIDGE *PciRootBridges;\r
+ UINTN Size;\r
+ UINT8 Index;\r
\r
ASSERT (PciRootBridgeInfo != NULL);\r
ASSERT (NumberOfRootBridges != NULL);\r
if (PciRootBridgeInfo == NULL) {\r
return NULL;\r
}\r
+\r
if (PciRootBridgeInfo->Count == 0) {\r
return NULL;\r
}\r
- Size = PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE);\r
- PciRootBridges = (PCI_ROOT_BRIDGE *) AllocatePool (Size);\r
+\r
+ Size = PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE);\r
+ PciRootBridges = (PCI_ROOT_BRIDGE *)AllocatePool (Size);\r
ASSERT (PciRootBridges != NULL);\r
if (PciRootBridges == NULL) {\r
return NULL;\r
}\r
+\r
ZeroMem (PciRootBridges, PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE));\r
\r
//\r
PciRootBridges[Index].NoExtendedConfigSpace = PciRootBridgeInfo->RootBridge[Index].NoExtendedConfigSpace;\r
PciRootBridges[Index].ResourceAssigned = PciRootBridgeInfo->ResourceAssigned;\r
PciRootBridges[Index].AllocationAttributes = PciRootBridgeInfo->RootBridge[Index].AllocationAttributes;\r
- PciRootBridges[Index].DevicePath = CreateRootBridgeDevicePath(PciRootBridgeInfo->RootBridge[Index].HID, PciRootBridgeInfo->RootBridge[Index].UID);\r
- CopyMem(&PciRootBridges[Index].Bus, &PciRootBridgeInfo->RootBridge[Index].Bus, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
- CopyMem(&PciRootBridges[Index].Io, &PciRootBridgeInfo->RootBridge[Index].Io, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
- CopyMem(&PciRootBridges[Index].Mem, &PciRootBridgeInfo->RootBridge[Index].Mem, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
- CopyMem(&PciRootBridges[Index].MemAbove4G, &PciRootBridgeInfo->RootBridge[Index].MemAbove4G, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
- CopyMem(&PciRootBridges[Index].PMem, &PciRootBridgeInfo->RootBridge[Index].PMem, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
- CopyMem(&PciRootBridges[Index].PMemAbove4G, &PciRootBridgeInfo->RootBridge[Index].PMemAbove4G, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ PciRootBridges[Index].DevicePath = CreateRootBridgeDevicePath (PciRootBridgeInfo->RootBridge[Index].HID, PciRootBridgeInfo->RootBridge[Index].UID);\r
+ CopyMem (&PciRootBridges[Index].Bus, &PciRootBridgeInfo->RootBridge[Index].Bus, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ CopyMem (&PciRootBridges[Index].Io, &PciRootBridgeInfo->RootBridge[Index].Io, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ CopyMem (&PciRootBridges[Index].Mem, &PciRootBridgeInfo->RootBridge[Index].Mem, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ CopyMem (&PciRootBridges[Index].MemAbove4G, &PciRootBridgeInfo->RootBridge[Index].MemAbove4G, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ CopyMem (&PciRootBridges[Index].PMem, &PciRootBridgeInfo->RootBridge[Index].PMem, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
+ CopyMem (&PciRootBridges[Index].PMemAbove4G, &PciRootBridgeInfo->RootBridge[Index].PMemAbove4G, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));\r
}\r
\r
*NumberOfRootBridges = PciRootBridgeInfo->Count;\r
#include <Library/PciSegmentInfoLib.h>\r
#include <Library/DebugLib.h>\r
\r
-STATIC PCI_SEGMENT_INFO mPciSegment0 = {\r
+STATIC PCI_SEGMENT_INFO mPciSegment0 = {\r
0, // Segment number\r
0, // To be fixed later\r
0, // Start bus number\r
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
ASSERT (GuidHob != NULL);\r
\r
- AcpiBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (GuidHob);\r
+ AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
mPciSegment0.BaseAddress = AcpiBoardInfo->PcieBaseAddress;\r
}\r
+\r
*Count = 1;\r
return &mPciSegment0;\r
}\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_HANDLE Handle;\r
- EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE Handle;\r
+ EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;\r
\r
- DEBUG((DEBUG_INFO,"InstallReadyToLock entering......\n"));\r
+ DEBUG ((DEBUG_INFO, "InstallReadyToLock entering......\n"));\r
//\r
// Inform the SMM infrastructure that we're entering BDS and may run 3rd party code hereafter\r
// Since PI1.2.1, we need signal EndOfDxe as ExitPmAuth\r
//\r
EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);\r
- DEBUG((DEBUG_INFO,"All EndOfDxe callbacks have returned successfully\n"));\r
+ DEBUG ((DEBUG_INFO, "All EndOfDxe callbacks have returned successfully\n"));\r
\r
//\r
// Install DxeSmmReadyToLock protocol in order to lock SMM\r
//\r
- Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **) &SmmAccess);\r
+ Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **)&SmmAccess);\r
if (!EFI_ERROR (Status)) {\r
Handle = NULL;\r
Status = gBS->InstallProtocolInterface (\r
ASSERT_EFI_ERROR (Status);\r
}\r
\r
- DEBUG((DEBUG_INFO,"InstallReadyToLock end\n"));\r
+ DEBUG ((DEBUG_INFO, "InstallReadyToLock end\n"));\r
return;\r
}\r
\r
**/\r
INTN\r
PlatformFindLoadOption (\r
- IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,\r
- IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,\r
- IN UINTN Count\r
-)\r
+ IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,\r
+ IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,\r
+ IN UINTN Count\r
+ )\r
{\r
- UINTN Index;\r
+ UINTN Index;\r
\r
for (Index = 0; Index < Count; Index++) {\r
if ((Key->OptionType == Array[Index].OptionType) &&\r
(StrCmp (Key->Description, Array[Index].Description) == 0) &&\r
(CompareMem (Key->FilePath, Array[Index].FilePath, GetDevicePathSize (Key->FilePath)) == 0) &&\r
(Key->OptionalDataSize == Array[Index].OptionalDataSize) &&\r
- (CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0)) {\r
- return (INTN) Index;\r
+ (CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0))\r
+ {\r
+ return (INTN)Index;\r
}\r
}\r
\r
**/\r
VOID\r
PlatformRegisterFvBootOption (\r
- EFI_GUID *FileGuid,\r
- CHAR16 *Description,\r
- UINT32 Attributes\r
-)\r
+ EFI_GUID *FileGuid,\r
+ CHAR16 *Description,\r
+ UINT32 Attributes\r
+ )\r
{\r
- EFI_STATUS Status;\r
- UINTN OptionIndex;\r
- EFI_BOOT_MANAGER_LOAD_OPTION NewOption;\r
- EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;\r
- UINTN BootOptionCount;\r
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;\r
- EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
-\r
- Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);\r
+ EFI_STATUS Status;\r
+ UINTN OptionIndex;\r
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;\r
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;\r
+ UINTN BootOptionCount;\r
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;\r
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+\r
+ Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **)&LoadedImage);\r
ASSERT_EFI_ERROR (Status);\r
\r
EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);\r
DevicePath = AppendDevicePathNode (\r
DevicePathFromHandle (LoadedImage->DeviceHandle),\r
- (EFI_DEVICE_PATH_PROTOCOL *) &FileNode\r
- );\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&FileNode\r
+ );\r
\r
Status = EfiBootManagerInitializeLoadOption (\r
&NewOption,\r
DevicePath,\r
NULL,\r
0\r
- );\r
+ );\r
if (!EFI_ERROR (Status)) {\r
BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);\r
\r
OptionIndex = PlatformFindLoadOption (&NewOption, BootOptions, BootOptionCount);\r
\r
if (OptionIndex == -1) {\r
- Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN) -1);\r
+ Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN)-1);\r
ASSERT_EFI_ERROR (Status);\r
}\r
+\r
EfiBootManagerFreeLoadOption (&NewOption);\r
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);\r
}\r
EFIAPI\r
PlatformBootManagerBeforeConsole (\r
VOID\r
-)\r
+ )\r
{\r
- EFI_INPUT_KEY Enter;\r
- EFI_INPUT_KEY F2;\r
- EFI_INPUT_KEY Down;\r
- EFI_BOOT_MANAGER_LOAD_OPTION BootOption;\r
- EFI_STATUS Status;\r
+ EFI_INPUT_KEY Enter;\r
+ EFI_INPUT_KEY F2;\r
+ EFI_INPUT_KEY Down;\r
+ EFI_BOOT_MANAGER_LOAD_OPTION BootOption;\r
+ EFI_STATUS Status;\r
\r
- Status = gBS->LocateProtocol (&gUniversalPayloadPlatformBootManagerOverrideProtocolGuid, NULL, (VOID **) &mUniversalPayloadPlatformBootManagerOverrideInstance);\r
+ Status = gBS->LocateProtocol (&gUniversalPayloadPlatformBootManagerOverrideProtocolGuid, NULL, (VOID **)&mUniversalPayloadPlatformBootManagerOverrideInstance);\r
if (EFI_ERROR (Status)) {\r
mUniversalPayloadPlatformBootManagerOverrideInstance = NULL;\r
}\r
- if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){\r
- mUniversalPayloadPlatformBootManagerOverrideInstance->BeforeConsole();\r
+\r
+ if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {\r
+ mUniversalPayloadPlatformBootManagerOverrideInstance->BeforeConsole ();\r
return;\r
}\r
\r
F2.ScanCode = SCAN_F2;\r
F2.UnicodeChar = CHAR_NULL;\r
EfiBootManagerGetBootManagerMenu (&BootOption);\r
- EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL);\r
+ EfiBootManagerAddKeyOptionVariable (NULL, (UINT16)BootOption.OptionNumber, 0, &F2, NULL);\r
\r
//\r
// Also add Down key to Boot Manager Menu since some serial terminals don't support F2 key.\r
Down.ScanCode = SCAN_DOWN;\r
Down.UnicodeChar = CHAR_NULL;\r
EfiBootManagerGetBootManagerMenu (&BootOption);\r
- EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &Down, NULL);\r
+ EfiBootManagerAddKeyOptionVariable (NULL, (UINT16)BootOption.OptionNumber, 0, &Down, NULL);\r
\r
//\r
// Install ready to lock.\r
EFIAPI\r
PlatformBootManagerAfterConsole (\r
VOID\r
-)\r
+ )\r
{\r
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;\r
EFI_GRAPHICS_OUTPUT_BLT_PIXEL White;\r
\r
- if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){\r
- mUniversalPayloadPlatformBootManagerOverrideInstance->AfterConsole();\r
+ if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {\r
+ mUniversalPayloadPlatformBootManagerOverrideInstance->AfterConsole ();\r
return;\r
}\r
+\r
Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;\r
White.Blue = White.Green = White.Red = White.Reserved = 0xFF;\r
\r
L"F2 or Down to enter Boot Manager Menu.\n"\r
L"ENTER to boot directly.\n"\r
L"\n"\r
- );\r
-\r
+ );\r
}\r
\r
/**\r
VOID\r
EFIAPI\r
PlatformBootManagerWaitCallback (\r
- UINT16 TimeoutRemain\r
-)\r
+ UINT16 TimeoutRemain\r
+ )\r
{\r
- if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){\r
+ if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {\r
mUniversalPayloadPlatformBootManagerOverrideInstance->WaitCallback (TimeoutRemain);\r
}\r
+\r
return;\r
}\r
\r
VOID\r
)\r
{\r
- if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){\r
- mUniversalPayloadPlatformBootManagerOverrideInstance->UnableToBoot();\r
+ if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {\r
+ mUniversalPayloadPlatformBootManagerOverrideInstance->UnableToBoot ();\r
}\r
+\r
return;\r
}\r
\r
PlatformBootManagerLibConstructor (\r
IN EFI_HANDLE ImageHandle,\r
IN EFI_SYSTEM_TABLE *SystemTable\r
-)\r
+ )\r
{\r
EFI_STATUS Status;\r
UINTN Size;\r
return EFI_SUCCESS;\r
}\r
\r
- GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);\r
+ GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);\r
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) > GET_GUID_HOB_DATA_SIZE (GuidHob)) || (GenericHeader->Length > GET_GUID_HOB_DATA_SIZE (GuidHob))) {\r
return EFI_NOT_FOUND;\r
}\r
+\r
if (GenericHeader->Revision == UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION) {\r
- BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *) GET_GUID_HOB_DATA (GuidHob);\r
+ BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (GuidHob);\r
if (BootManagerMenuFile->Header.Length < UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU, FileName)) {\r
return EFI_NOT_FOUND;\r
}\r
- Size = sizeof (BootManagerMenuFile->FileName);\r
+\r
+ Size = sizeof (BootManagerMenuFile->FileName);\r
Status = PcdSetPtrS (PcdBootManagerMenuFile, &Size, &BootManagerMenuFile->FileName);\r
ASSERT_EFI_ERROR (Status);\r
} else {\r
#include <Protocol/SmmAccess2.h>\r
\r
typedef struct {\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- UINTN ConnectType;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ UINTN ConnectType;\r
} PLATFORM_CONSOLE_CONNECT_ENTRY;\r
\r
extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];\r
{ END_DEVICE_PATH_LENGTH, 0 },\\r
}\r
\r
-#define CONSOLE_OUT BIT0\r
-#define CONSOLE_IN BIT1\r
-#define STD_ERROR BIT2\r
+#define CONSOLE_OUT BIT0\r
+#define CONSOLE_IN BIT1\r
+#define STD_ERROR BIT2\r
\r
-#define CLASS_HID 3\r
-#define SUBCLASS_BOOT 1\r
-#define PROTOCOL_KEYBOARD 1\r
+#define CLASS_HID 3\r
+#define SUBCLASS_BOOT 1\r
+#define PROTOCOL_KEYBOARD 1\r
\r
typedef struct {\r
- USB_CLASS_DEVICE_PATH UsbClass;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ USB_CLASS_DEVICE_PATH UsbClass;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} USB_CLASS_FORMAT_DEVICE_PATH;\r
\r
typedef struct {\r
- VENDOR_DEVICE_PATH VendorDevicePath;\r
- UINT32 Instance;\r
+ VENDOR_DEVICE_PATH VendorDevicePath;\r
+ UINT32 Instance;\r
} WIN_NT_VENDOR_DEVICE_PATH_NODE;\r
\r
//\r
// Below is the platform console device path\r
//\r
typedef struct {\r
- VENDOR_DEVICE_PATH NtBus;\r
- WIN_NT_VENDOR_DEVICE_PATH_NODE SerialDevice;\r
- UART_DEVICE_PATH Uart;\r
- VENDOR_DEVICE_PATH TerminalType;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ VENDOR_DEVICE_PATH NtBus;\r
+ WIN_NT_VENDOR_DEVICE_PATH_NODE SerialDevice;\r
+ UART_DEVICE_PATH Uart;\r
+ VENDOR_DEVICE_PATH TerminalType;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} NT_ISA_SERIAL_DEVICE_PATH;\r
\r
typedef struct {\r
- VENDOR_DEVICE_PATH NtBus;\r
- WIN_NT_VENDOR_DEVICE_PATH_NODE NtGopDevice;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ VENDOR_DEVICE_PATH NtBus;\r
+ WIN_NT_VENDOR_DEVICE_PATH_NODE NtGopDevice;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} NT_PLATFORM_GOP_DEVICE_PATH;\r
\r
-extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;\r
+extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;\r
\r
/**\r
Use SystemTable Conout to stop video based Simple Text Out consoles from going\r
EFI_STATUS\r
PlatformBootManagerEnableQuietBoot (\r
IN EFI_GUID *LogoFile\r
-);\r
+ );\r
\r
/**\r
Use SystemTable Conout to turn on video based Simple Text Out consoles. The\r
EFI_STATUS\r
PlatformBootManagerDisableQuietBoot (\r
VOID\r
-);\r
+ );\r
\r
/**\r
Show progress bar with title above it. It only works in Graphics mode.\r
**/\r
EFI_STATUS\r
PlatformBootManagerShowProgress (\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,\r
- IN CHAR16 *Title,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,\r
- IN UINTN Progress,\r
- IN UINTN PreviousValue\r
-);\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,\r
+ IN CHAR16 *Title,\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,\r
+ IN UINTN Progress,\r
+ IN UINTN PreviousValue\r
+ );\r
\r
#endif // _PLATFORM_BOOT_MANAGER_H\r
DEVICE_PATH_MESSAGING_PC_ANSI \\r
}\r
\r
-ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode = gPnpPs2Keyboard;\r
-ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;\r
-UART_DEVICE_PATH gUartDeviceNode = gUart;\r
-VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;\r
-VENDOR_DEVICE_PATH gUartDeviceVendorNode = gUartVendor;\r
+ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode = gPnpPs2Keyboard;\r
+ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;\r
+UART_DEVICE_PATH gUartDeviceNode = gUart;\r
+VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;\r
+VENDOR_DEVICE_PATH gUartDeviceVendorNode = gUartVendor;\r
\r
//\r
// Predefined platform root bridge\r
gEndEntire\r
};\r
\r
-EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {\r
- (EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,\r
+EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&gPlatformRootBridge0,\r
NULL\r
};\r
\r
-BOOLEAN mDetectVgaOnly;\r
+BOOLEAN mDetectVgaOnly;\r
\r
/**\r
Add IsaKeyboard to ConIn; add IsaSerial to ConOut, ConIn, ErrOut.\r
**/\r
EFI_STATUS\r
PrepareLpcBridgeDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
+ IN EFI_HANDLE DeviceHandle\r
+ )\r
{\r
EFI_STATUS Status;\r
EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;\r
\r
DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
+ Status = gBS->HandleProtocol (\r
+ DeviceHandle,\r
+ &gEfiDevicePathProtocolGuid,\r
+ (VOID *)&DevicePath\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
TempDevicePath = DevicePath;\r
\r
//\r
**/\r
EFI_STATUS\r
GetGopDevicePath (\r
- IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,\r
- OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath\r
-)\r
+ IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,\r
+ OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath\r
+ )\r
{\r
- UINTN Index;\r
- EFI_STATUS Status;\r
- EFI_HANDLE PciDeviceHandle;\r
- EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;\r
- UINTN GopHandleCount;\r
- EFI_HANDLE *GopHandleBuffer;\r
-\r
- if (PciDevicePath == NULL || GopDevicePath == NULL) {\r
+ UINTN Index;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE PciDeviceHandle;\r
+ EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;\r
+ UINTN GopHandleCount;\r
+ EFI_HANDLE *GopHandleBuffer;\r
+\r
+ if ((PciDevicePath == NULL) || (GopDevicePath == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
TempPciDevicePath = PciDevicePath;\r
\r
Status = gBS->LocateDevicePath (\r
- &gEfiDevicePathProtocolGuid,\r
- &TempPciDevicePath,\r
- &PciDeviceHandle\r
- );\r
+ &gEfiDevicePathProtocolGuid,\r
+ &TempPciDevicePath,\r
+ &PciDeviceHandle\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
gBS->ConnectController (PciDeviceHandle, NULL, NULL, FALSE);\r
\r
Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- &gEfiGraphicsOutputProtocolGuid,\r
- NULL,\r
- &GopHandleCount,\r
- &GopHandleBuffer\r
- );\r
+ ByProtocol,\r
+ &gEfiGraphicsOutputProtocolGuid,\r
+ NULL,\r
+ &GopHandleCount,\r
+ &GopHandleBuffer\r
+ );\r
if (!EFI_ERROR (Status)) {\r
//\r
// Add all the child handles as possible Console Device\r
//\r
for (Index = 0; Index < GopHandleCount; Index++) {\r
- Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID*)&TempDevicePath);\r
+ Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *)&TempDevicePath);\r
if (EFI_ERROR (Status)) {\r
continue;\r
}\r
+\r
if (CompareMem (\r
PciDevicePath,\r
TempDevicePath,\r
GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH\r
- ) == 0) {\r
+ ) == 0)\r
+ {\r
//\r
// In current implementation, we only enable one of the child handles\r
// as console device, i.e. sotre one of the child handle's device\r
EfiBootManagerUpdateConsoleVariable (ConOut, TempDevicePath, NULL);\r
}\r
}\r
+\r
gBS->FreePool (GopHandleBuffer);\r
}\r
\r
**/\r
EFI_STATUS\r
PreparePciVgaDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
+ IN EFI_HANDLE DeviceHandle\r
+ )\r
{\r
EFI_STATUS Status;\r
EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;\r
\r
DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
+ Status = gBS->HandleProtocol (\r
+ DeviceHandle,\r
+ &gEfiDevicePathProtocolGuid,\r
+ (VOID *)&DevicePath\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
PreparePciSerialDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
+ IN EFI_HANDLE DeviceHandle\r
+ )\r
{\r
EFI_STATUS Status;\r
EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
\r
DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
+ Status = gBS->HandleProtocol (\r
+ DeviceHandle,\r
+ &gEfiDevicePathProtocolGuid,\r
+ (VOID *)&DevicePath\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);\r
\r
EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);\r
- EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);\r
+ EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);\r
EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
For every PCI instance execute a callback function.\r
\r
IN EFI_GUID *Id,\r
IN PROTOCOL_INSTANCE_CALLBACK CallBackFunction,\r
IN VOID *Context\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
- UINTN HandleCount;\r
- EFI_HANDLE *HandleBuffer;\r
- UINTN Index;\r
- VOID *Instance;\r
+ EFI_STATUS Status;\r
+ UINTN HandleCount;\r
+ EFI_HANDLE *HandleBuffer;\r
+ UINTN Index;\r
+ VOID *Instance;\r
\r
//\r
// Start to check all the PciIo to find all possible device\r
//\r
- HandleCount = 0;\r
+ HandleCount = 0;\r
HandleBuffer = NULL;\r
- Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- Id,\r
- NULL,\r
- &HandleCount,\r
- &HandleBuffer\r
- );\r
+ Status = gBS->LocateHandleBuffer (\r
+ ByProtocol,\r
+ Id,\r
+ NULL,\r
+ &HandleCount,\r
+ &HandleBuffer\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
continue;\r
}\r
\r
- Status = (*CallBackFunction) (\r
- HandleBuffer[Index],\r
- Instance,\r
- Context\r
- );\r
+ Status = (*CallBackFunction)(\r
+ HandleBuffer[Index],\r
+ Instance,\r
+ Context\r
+ );\r
}\r
\r
gBS->FreePool (HandleBuffer);\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
For every PCI instance execute a callback function.\r
\r
IN EFI_HANDLE Handle,\r
IN VOID *Instance,\r
IN VOID *Context\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- PCI_TYPE00 Pci;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ PCI_TYPE00 Pci;\r
\r
- PciIo = (EFI_PCI_IO_PROTOCOL*) Instance;\r
+ PciIo = (EFI_PCI_IO_PROTOCOL *)Instance;\r
\r
//\r
// Check for all PCI device\r
//\r
Status = PciIo->Pci.Read (\r
- PciIo,\r
- EfiPciIoWidthUint32,\r
- 0,\r
- sizeof (Pci) / sizeof (UINT32),\r
- &Pci\r
- );\r
+ PciIo,\r
+ EfiPciIoWidthUint32,\r
+ 0,\r
+ sizeof (Pci) / sizeof (UINT32),\r
+ &Pci\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- return (*(VISIT_PCI_INSTANCE_CALLBACK)(UINTN) Context) (\r
- Handle,\r
- PciIo,\r
- &Pci\r
- );\r
-\r
+ return (*(VISIT_PCI_INSTANCE_CALLBACK)(UINTN)Context)(\r
+ Handle,\r
+ PciIo,\r
+ &Pci\r
+ );\r
}\r
\r
-\r
/**\r
For every PCI instance execute a callback function.\r
\r
EFI_STATUS\r
EFIAPI\r
VisitAllPciInstances (\r
- IN VISIT_PCI_INSTANCE_CALLBACK CallBackFunction\r
-)\r
+ IN VISIT_PCI_INSTANCE_CALLBACK CallBackFunction\r
+ )\r
{\r
return VisitAllInstancesOfProtocol (\r
&gEfiPciIoProtocolGuid,\r
VisitingAPciInstance,\r
- (VOID*)(UINTN) CallBackFunction\r
- );\r
+ (VOID *)(UINTN)CallBackFunction\r
+ );\r
}\r
\r
-\r
/**\r
Do platform specific PCI Device check and add them to\r
ConOut, ConIn, ErrOut.\r
IN EFI_HANDLE Handle,\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN PCI_TYPE00 *Pci\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationEnable,\r
- EFI_PCI_DEVICE_ENABLE,\r
- NULL\r
- );\r
+ PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ EFI_PCI_DEVICE_ENABLE,\r
+ NULL\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
if (!mDetectVgaOnly) {\r
((IS_PCI_ISA_PDECODE (Pci)) &&\r
(Pci->Hdr.VendorId == 0x8086)\r
)\r
- ) {\r
+ )\r
+ {\r
//\r
// Add IsaKeyboard to ConIn,\r
// add IsaSerial to ConOut, ConIn, ErrOut\r
PrepareLpcBridgeDevicePath (Handle);\r
return EFI_SUCCESS;\r
}\r
+\r
//\r
// Here we decide which Serial device to enable in PCI bus\r
//\r
return Status;\r
}\r
\r
-\r
/**\r
Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut\r
\r
**/\r
EFI_STATUS\r
DetectAndPreparePlatformPciDevicePaths (\r
- BOOLEAN DetectVgaOnly\r
-)\r
+ BOOLEAN DetectVgaOnly\r
+ )\r
{\r
mDetectVgaOnly = DetectVgaOnly;\r
\r
EfiBootManagerUpdateConsoleVariable (\r
ConIn,\r
- (EFI_DEVICE_PATH_PROTOCOL *) &gUsbClassKeyboardDevicePath,\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&gUsbClassKeyboardDevicePath,\r
NULL\r
);\r
\r
return VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);\r
}\r
\r
-\r
/**\r
The function will connect root bridge\r
\r
EFI_STATUS\r
ConnectRootBridge (\r
VOID\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
- EFI_HANDLE RootHandle;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE RootHandle;\r
\r
//\r
// Make all the PCI_IO protocols on PCI Seg 0 show up\r
//\r
Status = gBS->LocateDevicePath (\r
- &gEfiDevicePathProtocolGuid,\r
- &gPlatformRootBridges[0],\r
- &RootHandle\r
- );\r
+ &gEfiDevicePathProtocolGuid,\r
+ &gPlatformRootBridges[0],\r
+ &RootHandle\r
+ );\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
EFIAPI\r
PlatformConsoleInit (\r
VOID\r
-)\r
+ )\r
{\r
gUartDeviceNode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);\r
gUartDeviceNode.DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
// Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut\r
//\r
DetectAndPreparePlatformPciDevicePaths (FALSE);\r
-\r
}\r
#include <Library/DevicePathLib.h>\r
#include <Protocol/PciIo.h>\r
\r
-#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r
-#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r
+#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r
+#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r
\r
//\r
// Type definitions\r
// Platform Root Bridge\r
//\r
typedef struct {\r
- ACPI_HID_DEVICE_PATH PciRootBridge;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ ACPI_HID_DEVICE_PATH PciRootBridge;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r
\r
typedef\r
IN EFI_HANDLE Handle,\r
IN VOID *Instance,\r
IN VOID *Context\r
-);\r
+ );\r
\r
/**\r
@param[in] Handle - Handle of PCI device instance\r
IN EFI_HANDLE Handle,\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN PCI_TYPE00 *Pci\r
-);\r
+ );\r
\r
/**\r
Platform console init. Include the platform firmware vendor, revision\r
EFIAPI\r
PlatformConsoleInit (\r
VOID\r
-);\r
+ );\r
\r
#endif\r
///\r
/// Predefined platform default console device path\r
///\r
-GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {\r
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {\r
{\r
NULL,\r
0\r
}\r
};\r
\r
-\r
-GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {\r
+GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {\r
{\r
{\r
MESSAGING_DEVICE_PATH,\r
MSG_USB_CLASS_DP,\r
{\r
- (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)),\r
- (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)\r
+ (UINT8)(sizeof (USB_CLASS_DEVICE_PATH)),\r
+ (UINT8)((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)\r
}\r
},\r
0xffff, // VendorId\r
#include <Library/PcdLib.h>\r
#include <Library/HobLib.h>\r
\r
-\r
/** Library Constructor\r
\r
@retval RETURN_SUCCESS Success.\r
return EFI_NOT_FOUND;\r
}\r
\r
- GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);\r
+ GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);\r
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) > GET_GUID_HOB_DATA_SIZE (GuidHob)) || (GenericHeader->Length > GET_GUID_HOB_DATA_SIZE (GuidHob))) {\r
return EFI_NOT_FOUND;\r
}\r
\r
if (GenericHeader->Revision == UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION) {\r
- SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *) GET_GUID_HOB_DATA (GuidHob);\r
+ SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
if (GenericHeader->Length < UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO, RegisterBase)) {\r
//\r
// Return if can't find the Serial Port Info Hob with enough length\r
if (RETURN_ERROR (Status)) {\r
return Status;\r
}\r
+\r
Status = PcdSet64S (PcdSerialRegisterBase, SerialPortInfo->RegisterBase);\r
if (RETURN_ERROR (Status)) {\r
return Status;\r
}\r
+\r
Status = PcdSet32S (PcdSerialRegisterStride, SerialPortInfo->RegisterStride);\r
if (RETURN_ERROR (Status)) {\r
return Status;\r
}\r
+\r
Status = PcdSet32S (PcdSerialBaudRate, SerialPortInfo->BaudRate);\r
if (RETURN_ERROR (Status)) {\r
return Status;\r
{\r
return EFI_SUCCESS;\r
}\r
-\r
#include <Library/BaseMemoryLib.h>\r
#include <Guid/AcpiBoardInfoGuid.h>\r
\r
-ACPI_BOARD_INFO mAcpiBoardInfo;\r
+ACPI_BOARD_INFO mAcpiBoardInfo;\r
\r
/**\r
The constructor function to initialize mAcpiBoardInfo.\r
VOID\r
)\r
{\r
- UINTN PmCtrlReg;\r
+ UINTN PmCtrlReg;\r
\r
//\r
// GPE0_EN should be disabled to avoid any GPI waking up the system from S5\r
//\r
- IoWrite16 ((UINTN)mAcpiBoardInfo.PmGpeEnBase, 0);\r
+ IoWrite16 ((UINTN)mAcpiBoardInfo.PmGpeEnBase, 0);\r
\r
//\r
// Clear Power Button Status\r
//\r
- IoWrite16((UINTN) mAcpiBoardInfo.PmEvtBase, BIT8);\r
+ IoWrite16 ((UINTN)mAcpiBoardInfo.PmEvtBase, BIT8);\r
\r
//\r
// Transform system into S5 sleep state\r
//\r
PmCtrlReg = (UINTN)mAcpiBoardInfo.PmCtrlRegBase;\r
- IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16) (7 << 10));\r
+ IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16)(7 << 10));\r
IoOr16 (PmCtrlReg, BIT13);\r
CpuDeadLoop ();\r
\r
VOID\r
EFIAPI\r
ResetPlatformSpecific (\r
- IN UINTN DataSize,\r
- IN VOID *ResetData\r
+ IN UINTN DataSize,\r
+ IN VOID *ResetData\r
)\r
{\r
ResetCold ();\r
VOID\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE *HandoffTable;\r
+ EFI_HOB_HANDOFF_INFO_TABLE *HandoffTable;\r
\r
- HandoffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)(UINTN) GET_BOOTLOADER_PARAMETER ();\r
+ HandoffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)(UINTN)GET_BOOTLOADER_PARAMETER ();\r
if ((HandoffTable->Header.HobType == EFI_HOB_TYPE_HANDOFF) &&\r
- (HandoffTable->Header.HobLength == sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) &&\r
- (HandoffTable->Header.Reserved == 0)) {\r
+ (HandoffTable->Header.HobLength == sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) &&\r
+ (HandoffTable->Header.Reserved == 0))\r
+ {\r
return (VOID *)HandoffTable;\r
}\r
\r
return NULL;\r
}\r
\r
-\r
/**\r
This function retrieves a GUIDed HOB data from Slim Bootloader.\r
\r
**/\r
VOID *\r
GetGuidHobDataFromSbl (\r
- IN EFI_GUID *Guid\r
+ IN EFI_GUID *Guid\r
)\r
{\r
- UINT8 *GuidHob;\r
- CONST VOID *HobList;\r
+ UINT8 *GuidHob;\r
+ CONST VOID *HobList;\r
\r
HobList = GetParameterBase ();\r
ASSERT (HobList != NULL);\r
RETURN_STATUS\r
EFIAPI\r
ParseMemoryInfo (\r
- IN BL_MEM_INFO_CALLBACK MemInfoCallback,\r
- IN VOID *Params\r
+ IN BL_MEM_INFO_CALLBACK MemInfoCallback,\r
+ IN VOID *Params\r
)\r
{\r
- MEMORY_MAP_INFO *MemoryMapInfo;\r
- UINTN Idx;\r
+ MEMORY_MAP_INFO *MemoryMapInfo;\r
+ UINTN Idx;\r
\r
- MemoryMapInfo = (MEMORY_MAP_INFO *) GetGuidHobDataFromSbl (&gLoaderMemoryMapInfoGuid);\r
+ MemoryMapInfo = (MEMORY_MAP_INFO *)GetGuidHobDataFromSbl (&gLoaderMemoryMapInfoGuid);\r
if (MemoryMapInfo == NULL) {\r
ASSERT (FALSE);\r
return RETURN_NOT_FOUND;\r
RETURN_STATUS\r
EFIAPI\r
ParseSmbiosTable (\r
- OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
+ OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable\r
)\r
{\r
- UNIVERSAL_PAYLOAD_SMBIOS_TABLE *TableInfo;\r
+ UNIVERSAL_PAYLOAD_SMBIOS_TABLE *TableInfo;\r
\r
TableInfo = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GetGuidHobDataFromSbl (&gUniversalPayloadSmbiosTableGuid);\r
if (TableInfo == NULL) {\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Acquire ACPI table from slim bootloader.\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseAcpiTableInfo (\r
- OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
+ OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob\r
)\r
{\r
- UNIVERSAL_PAYLOAD_ACPI_TABLE *TableInfo;\r
+ UNIVERSAL_PAYLOAD_ACPI_TABLE *TableInfo;\r
\r
TableInfo = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GetGuidHobDataFromSbl (&gUniversalPayloadAcpiTableGuid);\r
if (TableInfo == NULL) {\r
RETURN_STATUS\r
EFIAPI\r
ParseSerialInfo (\r
- OUT SERIAL_PORT_INFO *SerialPortInfo\r
+ OUT SERIAL_PORT_INFO *SerialPortInfo\r
)\r
{\r
- SERIAL_PORT_INFO *BlSerialInfo;\r
+ SERIAL_PORT_INFO *BlSerialInfo;\r
\r
- BlSerialInfo = (SERIAL_PORT_INFO *) GetGuidHobDataFromSbl (&gUefiSerialPortInfoGuid);\r
+ BlSerialInfo = (SERIAL_PORT_INFO *)GetGuidHobDataFromSbl (&gUefiSerialPortInfoGuid);\r
if (BlSerialInfo == NULL) {\r
ASSERT (FALSE);\r
return RETURN_NOT_FOUND;\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Find the video frame buffer information\r
\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxInfo (\r
- OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
+ OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo\r
)\r
{\r
- EFI_PEI_GRAPHICS_INFO_HOB *BlGfxInfo;\r
+ EFI_PEI_GRAPHICS_INFO_HOB *BlGfxInfo;\r
\r
- BlGfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *) GetGuidHobDataFromSbl (&gEfiGraphicsInfoHobGuid);\r
+ BlGfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)GetGuidHobDataFromSbl (&gEfiGraphicsInfoHobGuid);\r
if (BlGfxInfo == NULL) {\r
return RETURN_NOT_FOUND;\r
}\r
RETURN_STATUS\r
EFIAPI\r
ParseGfxDeviceInfo (\r
- OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
+ OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo\r
)\r
{\r
- EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *BlGfxDeviceInfo;\r
+ EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *BlGfxDeviceInfo;\r
\r
- BlGfxDeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *) GetGuidHobDataFromSbl (&gEfiGraphicsDeviceInfoHobGuid);\r
+ BlGfxDeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *)GetGuidHobDataFromSbl (&gEfiGraphicsDeviceInfoHobGuid);\r
if (BlGfxDeviceInfo == NULL) {\r
return RETURN_NOT_FOUND;\r
}\r
VOID\r
)\r
{\r
- RETURN_STATUS Status;\r
- UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *BlRootBridgesHob;\r
- UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PldRootBridgesHob;\r
-\r
- Status = RETURN_NOT_FOUND;\r
- BlRootBridgesHob = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GetGuidHobDataFromSbl (\r
- &gUniversalPayloadPciRootBridgeInfoGuid\r
- );\r
+ RETURN_STATUS Status;\r
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *BlRootBridgesHob;\r
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PldRootBridgesHob;\r
+\r
+ Status = RETURN_NOT_FOUND;\r
+ BlRootBridgesHob = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GetGuidHobDataFromSbl (\r
+ &gUniversalPayloadPciRootBridgeInfoGuid\r
+ );\r
if (BlRootBridgesHob != NULL) {\r
//\r
// Migrate bootloader root bridge info hob from bootloader to payload.\r
//\r
PldRootBridgesHob = BuildGuidHob (\r
- &gUniversalPayloadPciRootBridgeInfoGuid,\r
- BlRootBridgesHob->Header.Length\r
- );\r
+ &gUniversalPayloadPciRootBridgeInfoGuid,\r
+ BlRootBridgesHob->Header.Length\r
+ );\r
ASSERT (PldRootBridgesHob != NULL);\r
if (PldRootBridgesHob != NULL) {\r
CopyMem (PldRootBridgesHob, BlRootBridgesHob, BlRootBridgesHob->Header.Length);\r
\r
return Status;\r
}\r
-\r
**/\r
UINT32\r
AcquireSpiBar0 (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
)\r
{\r
return MmioRead32 (PchSpiBase + R_SPI_BASE) & ~(B_SPI_BAR0_MASK);\r
**/\r
VOID\r
ReleaseSpiBar0 (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
)\r
{\r
}\r
\r
-\r
-\r
/**\r
This function is to enable/disable BIOS Write Protect in SMM phase.\r
\r
**/\r
VOID\r
CpuSmmDisableBiosWriteProtect (\r
- IN BOOLEAN EnableSmmSts\r
+ IN BOOLEAN EnableSmmSts\r
)\r
{\r
- UINT32 Data32;\r
+ UINT32 Data32;\r
\r
- if(EnableSmmSts){\r
+ if (EnableSmmSts) {\r
//\r
// Disable BIOS Write Protect in SMM phase.\r
//\r
- Data32 = MmioRead32 ((UINTN) (0xFED30880)) | (UINT32) (BIT0);\r
+ Data32 = MmioRead32 ((UINTN)(0xFED30880)) | (UINT32)(BIT0);\r
AsmWriteMsr32 (0x000001FE, Data32);\r
} else {\r
//\r
// Enable BIOS Write Protect in SMM phase\r
//\r
- Data32 = MmioRead32 ((UINTN) (0xFED30880)) & (UINT32) (~BIT0);\r
+ Data32 = MmioRead32 ((UINTN)(0xFED30880)) & (UINT32)(~BIT0);\r
AsmWriteMsr32 (0x000001FE, Data32);\r
}\r
\r
Data32 = MmioRead32 (0xFED30880);\r
}\r
\r
-\r
/**\r
This function is a hook for Spi to disable BIOS Write Protect.\r
\r
EFI_STATUS\r
EFIAPI\r
DisableBiosWriteProtect (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 CpuSmmBwp\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 CpuSmmBwp\r
)\r
{\r
-\r
//\r
// Write clear BC_SYNC_SS prior to change WPD from 0 to 1.\r
//\r
VOID\r
EFIAPI\r
EnableBiosWriteProtect (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 CpuSmmBwp\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 CpuSmmBwp\r
)\r
{\r
-\r
//\r
// Disable the access to the BIOS space for write cycles\r
//\r
- MmioAnd8 (PchSpiBase + R_SPI_BCR, (UINT8) (~B_SPI_BCR_BIOSWE));\r
+ MmioAnd8 (PchSpiBase + R_SPI_BCR, (UINT8)(~B_SPI_BCR_BIOSWE));\r
\r
if (CpuSmmBwp != 0) {\r
CpuSmmDisableBiosWriteProtect (FALSE);\r
**/\r
UINT8\r
SaveAndDisableSpiPrefetchCache (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
)\r
{\r
- UINT8 BiosCtlSave;\r
+ UINT8 BiosCtlSave;\r
\r
BiosCtlSave = MmioRead8 (PchSpiBase + R_SPI_BCR) & B_SPI_BCR_SRC;\r
\r
- MmioAndThenOr32 (PchSpiBase + R_SPI_BCR, \\r
- (UINT32) (~B_SPI_BCR_SRC), \\r
- (UINT32) (V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC));\r
+ MmioAndThenOr32 (\r
+ PchSpiBase + R_SPI_BCR, \\r
+ (UINT32)(~B_SPI_BCR_SRC), \\r
+ (UINT32)(V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC)\r
+ );\r
\r
return BiosCtlSave;\r
}\r
**/\r
VOID\r
SetSpiBiosControlRegister (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 BiosCtlValue\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 BiosCtlValue\r
)\r
{\r
MmioAndThenOr8 (PchSpiBase + R_SPI_BCR, (UINT8) ~B_SPI_BCR_SRC, BiosCtlValue);\r
#ifndef REGS_SPI_H_\r
#define REGS_SPI_H_\r
\r
-#define R_SPI_BASE 0x10 ///< 32-bit Memory Base Address Register\r
-#define B_SPI_BAR0_MASK 0x0FFF\r
-#define R_SPI_BCR 0xDC ///< BIOS Control Register\r
-#define B_SPI_BCR_SRC (BIT3 | BIT2) ///< SPI Read Configuration (SRC)\r
-#define V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS 0x04 ///< Prefetch Disable, Cache Disable\r
-#define B_SPI_BCR_SYNC_SS BIT8\r
-#define B_SPI_BCR_BIOSWE BIT0 ///< Write Protect Disable (WPD)\r
+#define R_SPI_BASE 0x10 ///< 32-bit Memory Base Address Register\r
+#define B_SPI_BAR0_MASK 0x0FFF\r
+#define R_SPI_BCR 0xDC ///< BIOS Control Register\r
+#define B_SPI_BCR_SRC (BIT3 | BIT2) ///< SPI Read Configuration (SRC)\r
+#define V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS 0x04 ///< Prefetch Disable, Cache Disable\r
+#define B_SPI_BCR_SYNC_SS BIT8\r
+#define B_SPI_BCR_BIOSWE BIT0 ///< Write Protect Disable (WPD)\r
\r
///\r
/// SPI Host Interface Registers\r
-#define R_SPI_HSFS 0x04 ///< Hardware Sequencing Flash Status and Control Register(32bits)\r
-#define B_SPI_HSFS_FDBC_MASK 0x3F000000 ///< Flash Data Byte Count ( <= 64), Count = (Value in this field) + 1.\r
-#define N_SPI_HSFS_FDBC 24\r
-#define B_SPI_HSFS_CYCLE_MASK 0x001E0000 ///< Flash Cycle.\r
-#define N_SPI_HSFS_CYCLE 17\r
-#define V_SPI_HSFS_CYCLE_READ 0 ///< Flash Cycle Read\r
-#define V_SPI_HSFS_CYCLE_WRITE 2 ///< Flash Cycle Write\r
-#define V_SPI_HSFS_CYCLE_4K_ERASE 3 ///< Flash Cycle 4K Block Erase\r
-#define V_SPI_HSFS_CYCLE_64K_ERASE 4 ///< Flash Cycle 64K Sector Erase\r
-#define V_SPI_HSFS_CYCLE_READ_SFDP 5 ///< Flash Cycle Read SFDP\r
-#define V_SPI_HSFS_CYCLE_READ_JEDEC_ID 6 ///< Flash Cycle Read JEDEC ID\r
-#define V_SPI_HSFS_CYCLE_WRITE_STATUS 7 ///< Flash Cycle Write Status\r
-#define V_SPI_HSFS_CYCLE_READ_STATUS 8 ///< Flash Cycle Read Status\r
-#define B_SPI_HSFS_CYCLE_FGO BIT16 ///< Flash Cycle Go.\r
-#define B_SPI_HSFS_FDV BIT14 ///< Flash Descriptor Valid\r
-#define B_SPI_HSFS_SCIP BIT5 ///< SPI Cycle in Progress\r
-#define B_SPI_HSFS_FCERR BIT1 ///< Flash Cycle Error\r
-#define B_SPI_HSFS_FDONE BIT0 ///< Flash Cycle Done\r
-\r
-\r
-#define R_SPI_FADDR 0x08 ///< SPI Flash Address\r
-#define B_SPI_FADDR_MASK 0x07FFFFFF ///< SPI Flash Address Mask (0~26bit)\r
-\r
-\r
-#define R_SPI_FDATA00 0x10 ///< SPI Data 00 (32 bits)\r
-\r
-#define R_SPI_FRAP 0x50 ///< SPI Flash Regions Access Permissions Register\r
-#define B_SPI_FRAP_BRWA_PLATFORM BIT12 //< Region write access for Region4 PlatformData\r
-#define B_SPI_FRAP_BRWA_GBE BIT11 //< Region write access for Region3 GbE\r
-#define B_SPI_FRAP_BRWA_SEC BIT10 ///< Region Write Access for Region2 SEC\r
-#define B_SPI_FRAP_BRWA_BIOS BIT9 ///< Region Write Access for Region1 BIOS\r
-#define B_SPI_FRAP_BRWA_FLASHD BIT8 ///< Region Write Access for Region0 Flash Descriptor\r
-#define B_SPI_FRAP_BRRA_PLATFORM BIT4 ///< Region read access for Region4 PlatformData\r
-#define B_SPI_FRAP_BRRA_GBE BIT3 ///< Region read access for Region3 GbE\r
-#define B_SPI_FRAP_BRRA_SEC BIT2 ///< Region Read Access for Region2 SEC\r
-#define B_SPI_FRAP_BRRA_BIOS BIT1 ///< Region Read Access for Region1 BIOS\r
-#define B_SPI_FRAP_BRRA_FLASHD BIT0 ///< Region Read Access for Region0 Flash Descriptor\r
-\r
-\r
-#define R_SPI_FREG0_FLASHD 0x54 ///< Flash Region 0 (Flash Descriptor) (32bits)\r
-#define B_SPI_FREG0_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
-#define N_SPI_FREG0_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
-#define B_SPI_FREG0_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
-#define N_SPI_FREG0_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
-\r
-#define R_SPI_FREG1_BIOS 0x58 ///< Flash Region 1 (BIOS) (32bits)\r
-#define B_SPI_FREG1_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
-#define N_SPI_FREG1_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
-#define B_SPI_FREG1_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
-#define N_SPI_FREG1_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
-\r
-#define R_SPI_FREG2_SEC 0x5C ///< Flash Region 2 (SEC) (32bits)\r
-#define B_SPI_FREG2_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
-#define N_SPI_FREG2_LIMIT 4 //< Bit 30:16 identifies address bits [26:12]\r
-#define B_SPI_FREG2_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
-#define N_SPI_FREG2_BASE 12 //< Bit 14:0 identifies address bits [26:2]\r
-\r
-#define R_SPI_FREG3_GBE 0x60 //< Flash Region 3(GbE)(32bits)\r
-#define B_SPI_FREG3_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
-#define N_SPI_FREG3_LIMIT 4 //< Bit 30:16 identifies address bits [26:12]\r
-#define B_SPI_FREG3_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
-#define N_SPI_FREG3_BASE 12 //< Bit 14:0 identifies address bits [26:2]\r
-\r
-#define R_SPI_FREG4_PLATFORM_DATA 0x64 ///< Flash Region 4 (Platform Data) (32bits)\r
-#define B_SPI_FREG4_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
-#define N_SPI_FREG4_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
-#define B_SPI_FREG4_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
-#define N_SPI_FREG4_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
-\r
-\r
-#define S_SPI_FREGX 4 ///< Size of Flash Region register\r
-#define B_SPI_FREGX_LIMIT_MASK 0x7FFF0000 ///< Flash Region Limit [30:16] represents [26:12], [11:0] are assumed to be FFFh\r
-#define N_SPI_FREGX_LIMIT 16 ///< Region limit bit position\r
-#define N_SPI_FREGX_LIMIT_REPR 12 ///< Region limit bit represents position\r
-#define B_SPI_FREGX_BASE_MASK 0x00007FFF ///< Flash Region Base, [14:0] represents [26:12]\r
-\r
-\r
-#define R_SPI_FDOC 0xB4 ///< Flash Descriptor Observability Control Register (32 bits)\r
-#define B_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) ///< Flash Descriptor Section Select\r
-#define V_SPI_FDOC_FDSS_FSDM 0x0000 ///< Flash Signature and Descriptor Map\r
-#define V_SPI_FDOC_FDSS_COMP 0x1000 ///< Component\r
-#define B_SPI_FDOC_FDSI_MASK 0x0FFC ///< Flash Descriptor Section Index\r
-\r
-#define R_SPI_FDOD 0xB8 ///< Flash Descriptor Observability Data Register (32 bits)\r
-\r
-\r
-#define R_SPI_LVSCC 0xC4 ///<Vendor Specific Component Capabilities for Component 0 (32 bits)\r
-#define B_SPI_LVSCC_EO_64K BIT29 ///<< 64k Erase valid (EO_64k_valid)\r
-\r
-#define R_SPI_UVSCC 0xC8 ///< Vendor Specific Component Capabilities for Component 1 (32 bits)\r
-\r
-\r
-#define R_SPI_FDBAR_FLASH_MAP0 0x14 ///< Flash MAP 0\r
-#define N_SPI_FDBAR_NC 8 ///<< Number Of Components\r
-#define B_SPI_FDBAR_NC 0x00000300 ///< Number Of Components\r
-\r
-#define R_SPI_FDBAR_FLASH_MAP1 0x18 ///< Flash MAP 1\r
-#define B_SPI_FDBAR_FPSBA 0x00FF0000 ///< Flash Strap Base Address\r
-\r
+#define R_SPI_HSFS 0x04 ///< Hardware Sequencing Flash Status and Control Register(32bits)\r
+#define B_SPI_HSFS_FDBC_MASK 0x3F000000 ///< Flash Data Byte Count ( <= 64), Count = (Value in this field) + 1.\r
+#define N_SPI_HSFS_FDBC 24\r
+#define B_SPI_HSFS_CYCLE_MASK 0x001E0000 ///< Flash Cycle.\r
+#define N_SPI_HSFS_CYCLE 17\r
+#define V_SPI_HSFS_CYCLE_READ 0 ///< Flash Cycle Read\r
+#define V_SPI_HSFS_CYCLE_WRITE 2 ///< Flash Cycle Write\r
+#define V_SPI_HSFS_CYCLE_4K_ERASE 3 ///< Flash Cycle 4K Block Erase\r
+#define V_SPI_HSFS_CYCLE_64K_ERASE 4 ///< Flash Cycle 64K Sector Erase\r
+#define V_SPI_HSFS_CYCLE_READ_SFDP 5 ///< Flash Cycle Read SFDP\r
+#define V_SPI_HSFS_CYCLE_READ_JEDEC_ID 6 ///< Flash Cycle Read JEDEC ID\r
+#define V_SPI_HSFS_CYCLE_WRITE_STATUS 7 ///< Flash Cycle Write Status\r
+#define V_SPI_HSFS_CYCLE_READ_STATUS 8 ///< Flash Cycle Read Status\r
+#define B_SPI_HSFS_CYCLE_FGO BIT16 ///< Flash Cycle Go.\r
+#define B_SPI_HSFS_FDV BIT14 ///< Flash Descriptor Valid\r
+#define B_SPI_HSFS_SCIP BIT5 ///< SPI Cycle in Progress\r
+#define B_SPI_HSFS_FCERR BIT1 ///< Flash Cycle Error\r
+#define B_SPI_HSFS_FDONE BIT0 ///< Flash Cycle Done\r
+\r
+#define R_SPI_FADDR 0x08 ///< SPI Flash Address\r
+#define B_SPI_FADDR_MASK 0x07FFFFFF ///< SPI Flash Address Mask (0~26bit)\r
+\r
+#define R_SPI_FDATA00 0x10 ///< SPI Data 00 (32 bits)\r
+\r
+#define R_SPI_FRAP 0x50 ///< SPI Flash Regions Access Permissions Register\r
+#define B_SPI_FRAP_BRWA_PLATFORM BIT12 // < Region write access for Region4 PlatformData\r
+#define B_SPI_FRAP_BRWA_GBE BIT11 // < Region write access for Region3 GbE\r
+#define B_SPI_FRAP_BRWA_SEC BIT10 ///< Region Write Access for Region2 SEC\r
+#define B_SPI_FRAP_BRWA_BIOS BIT9 ///< Region Write Access for Region1 BIOS\r
+#define B_SPI_FRAP_BRWA_FLASHD BIT8 ///< Region Write Access for Region0 Flash Descriptor\r
+#define B_SPI_FRAP_BRRA_PLATFORM BIT4 ///< Region read access for Region4 PlatformData\r
+#define B_SPI_FRAP_BRRA_GBE BIT3 ///< Region read access for Region3 GbE\r
+#define B_SPI_FRAP_BRRA_SEC BIT2 ///< Region Read Access for Region2 SEC\r
+#define B_SPI_FRAP_BRRA_BIOS BIT1 ///< Region Read Access for Region1 BIOS\r
+#define B_SPI_FRAP_BRRA_FLASHD BIT0 ///< Region Read Access for Region0 Flash Descriptor\r
+\r
+#define R_SPI_FREG0_FLASHD 0x54 ///< Flash Region 0 (Flash Descriptor) (32bits)\r
+#define B_SPI_FREG0_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
+#define N_SPI_FREG0_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
+#define B_SPI_FREG0_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
+#define N_SPI_FREG0_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
+\r
+#define R_SPI_FREG1_BIOS 0x58 ///< Flash Region 1 (BIOS) (32bits)\r
+#define B_SPI_FREG1_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
+#define N_SPI_FREG1_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
+#define B_SPI_FREG1_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
+#define N_SPI_FREG1_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
+\r
+#define R_SPI_FREG2_SEC 0x5C ///< Flash Region 2 (SEC) (32bits)\r
+#define B_SPI_FREG2_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
+#define N_SPI_FREG2_LIMIT 4 // < Bit 30:16 identifies address bits [26:12]\r
+#define B_SPI_FREG2_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
+#define N_SPI_FREG2_BASE 12 // < Bit 14:0 identifies address bits [26:2]\r
+\r
+#define R_SPI_FREG3_GBE 0x60 // < Flash Region 3(GbE)(32bits)\r
+#define B_SPI_FREG3_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
+#define N_SPI_FREG3_LIMIT 4 // < Bit 30:16 identifies address bits [26:12]\r
+#define B_SPI_FREG3_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
+#define N_SPI_FREG3_BASE 12 // < Bit 14:0 identifies address bits [26:2]\r
+\r
+#define R_SPI_FREG4_PLATFORM_DATA 0x64 ///< Flash Region 4 (Platform Data) (32bits)\r
+#define B_SPI_FREG4_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]\r
+#define N_SPI_FREG4_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]\r
+#define B_SPI_FREG4_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]\r
+#define N_SPI_FREG4_BASE 12 ///< Bit 14:0 identifies address bits [26:2]\r
+\r
+#define S_SPI_FREGX 4 ///< Size of Flash Region register\r
+#define B_SPI_FREGX_LIMIT_MASK 0x7FFF0000 ///< Flash Region Limit [30:16] represents [26:12], [11:0] are assumed to be FFFh\r
+#define N_SPI_FREGX_LIMIT 16 ///< Region limit bit position\r
+#define N_SPI_FREGX_LIMIT_REPR 12 ///< Region limit bit represents position\r
+#define B_SPI_FREGX_BASE_MASK 0x00007FFF ///< Flash Region Base, [14:0] represents [26:12]\r
+\r
+#define R_SPI_FDOC 0xB4 ///< Flash Descriptor Observability Control Register (32 bits)\r
+#define B_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) ///< Flash Descriptor Section Select\r
+#define V_SPI_FDOC_FDSS_FSDM 0x0000 ///< Flash Signature and Descriptor Map\r
+#define V_SPI_FDOC_FDSS_COMP 0x1000 ///< Component\r
+#define B_SPI_FDOC_FDSI_MASK 0x0FFC ///< Flash Descriptor Section Index\r
+\r
+#define R_SPI_FDOD 0xB8 ///< Flash Descriptor Observability Data Register (32 bits)\r
+\r
+#define R_SPI_LVSCC 0xC4 ///< Vendor Specific Component Capabilities for Component 0 (32 bits)\r
+#define B_SPI_LVSCC_EO_64K BIT29 ///< < 64k Erase valid (EO_64k_valid)\r
+\r
+#define R_SPI_UVSCC 0xC8 ///< Vendor Specific Component Capabilities for Component 1 (32 bits)\r
+\r
+#define R_SPI_FDBAR_FLASH_MAP0 0x14 ///< Flash MAP 0\r
+#define N_SPI_FDBAR_NC 8 ///< < Number Of Components\r
+#define B_SPI_FDBAR_NC 0x00000300 ///< Number Of Components\r
+\r
+#define R_SPI_FDBAR_FLASH_MAP1 0x18 ///< Flash MAP 1\r
+#define B_SPI_FDBAR_FPSBA 0x00FF0000 ///< Flash Strap Base Address\r
\r
//\r
// Flash Component Base Address (FCBA) from Flash Region 0\r
//\r
-#define R_SPI_FCBA_FLCOMP 0x00 ///< Flash Components Register\r
-#define B_SPI_FLCOMP_COMP1_MASK 0x0F ///< Flash Component 1 Density\r
-\r
+#define R_SPI_FCBA_FLCOMP 0x00 ///< Flash Components Register\r
+#define B_SPI_FLCOMP_COMP1_MASK 0x0F ///< Flash Component 1 Density\r
\r
#endif\r
/// Wait Time = 6 seconds = 6000000 microseconds\r
/// Wait Period = 10 microseconds\r
///\r
-#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds\r
-#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds\r
+#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds\r
+#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds\r
\r
///\r
/// Flash cycle Type\r
#define SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I')\r
\r
typedef struct {\r
- UINTN Signature;\r
- EFI_HANDLE Handle;\r
- UINT32 AcpiTmrReg;\r
- UINTN PchSpiBase;\r
- UINT16 RegionPermission;\r
- UINT32 SfdpVscc0Value;\r
- UINT32 SfdpVscc1Value;\r
- UINT32 StrapBaseAddress;\r
- UINT8 NumberOfComponents;\r
- UINT16 Flags;\r
- UINT32 Component1StartAddr;\r
+ UINTN Signature;\r
+ EFI_HANDLE Handle;\r
+ UINT32 AcpiTmrReg;\r
+ UINTN PchSpiBase;\r
+ UINT16 RegionPermission;\r
+ UINT32 SfdpVscc0Value;\r
+ UINT32 SfdpVscc1Value;\r
+ UINT32 StrapBaseAddress;\r
+ UINT8 NumberOfComponents;\r
+ UINT16 Flags;\r
+ UINT32 Component1StartAddr;\r
} SPI_INSTANCE;\r
\r
-\r
/**\r
Acquire SPI MMIO BAR\r
\r
**/\r
UINT32\r
AcquireSpiBar0 (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
);\r
\r
-\r
/**\r
Release SPI MMIO BAR. Do nothing.\r
\r
**/\r
VOID\r
ReleaseSpiBar0 (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
);\r
\r
-\r
/**\r
This function is a hook for Spi to disable BIOS Write Protect\r
\r
EFI_STATUS\r
EFIAPI\r
DisableBiosWriteProtect (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 CpuSmmBwp\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 CpuSmmBwp\r
);\r
\r
/**\r
VOID\r
EFIAPI\r
EnableBiosWriteProtect (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 CpuSmmBwp\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 CpuSmmBwp\r
);\r
\r
-\r
/**\r
This function disables SPI Prefetching and caching,\r
and returns previous BIOS Control Register value before disabling.\r
**/\r
UINT8\r
SaveAndDisableSpiPrefetchCache (\r
- IN UINTN PchSpiBase\r
+ IN UINTN PchSpiBase\r
);\r
\r
/**\r
**/\r
VOID\r
SetSpiBiosControlRegister (\r
- IN UINTN PchSpiBase,\r
- IN UINT8 BiosCtlValue\r
+ IN UINTN PchSpiBase,\r
+ IN UINT8 BiosCtlValue\r
);\r
\r
-\r
/**\r
This function sends the programmed SPI command to the slave device.\r
\r
**/\r
BOOLEAN\r
WaitForSpiCycleComplete (\r
- IN UINT32 PchSpiBar0,\r
- IN BOOLEAN ErrorCheck\r
+ IN UINT32 PchSpiBar0,\r
+ IN BOOLEAN ErrorCheck\r
);\r
\r
#endif\r
**/\r
#include "SpiCommon.h"\r
\r
-SPI_INSTANCE *mSpiInstance = NULL;\r
+SPI_INSTANCE *mSpiInstance = NULL;\r
\r
/**\r
Get SPI Instance from library global data..\r
SPI_INSTANCE *\r
GetSpiInstance (\r
VOID\r
-)\r
+ )\r
{\r
if (mSpiInstance == NULL) {\r
- mSpiInstance = AllocatePool (sizeof(SPI_INSTANCE));\r
+ mSpiInstance = AllocatePool (sizeof (SPI_INSTANCE));\r
if (mSpiInstance == NULL) {\r
return NULL;\r
}\r
- ZeroMem (mSpiInstance, sizeof(SPI_INSTANCE));\r
+\r
+ ZeroMem (mSpiInstance, sizeof (SPI_INSTANCE));\r
}\r
\r
return mSpiInstance;\r
}\r
\r
-\r
/**\r
Initialize an SPI library.\r
\r
VOID\r
)\r
{\r
- UINT32 ScSpiBar0;\r
- UINT8 Comp0Density;\r
- SPI_INSTANCE *SpiInstance;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- SPI_FLASH_INFO *SpiFlashInfo;\r
+ UINT32 ScSpiBar0;\r
+ UINT8 Comp0Density;\r
+ SPI_INSTANCE *SpiInstance;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ SPI_FLASH_INFO *SpiFlashInfo;\r
\r
//\r
// Find SPI flash hob\r
ASSERT (FALSE);\r
return EFI_NOT_FOUND;\r
}\r
- SpiFlashInfo = (SPI_FLASH_INFO *) GET_GUID_HOB_DATA (GuidHob);\r
+\r
+ SpiFlashInfo = (SPI_FLASH_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
\r
//\r
// Initialize the SPI instance\r
if (SpiInstance == NULL) {\r
return EFI_NOT_FOUND;\r
}\r
+\r
DEBUG ((DEBUG_INFO, "SpiInstance = %08X\n", SpiInstance));\r
\r
- SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;\r
- SpiInstance->Handle = NULL;\r
+ SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;\r
+ SpiInstance->Handle = NULL;\r
\r
//\r
// Check the SPI address\r
if ((SpiFlashInfo->SpiAddress.AddressSpaceId != EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE) ||\r
(SpiFlashInfo->SpiAddress.RegisterBitWidth != 32) ||\r
(SpiFlashInfo->SpiAddress.RegisterBitOffset != 0) ||\r
- (SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD)){\r
+ (SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD))\r
+ {\r
DEBUG ((DEBUG_ERROR, "SPI FLASH HOB is not expected. need check the hob or enhance SPI flash driver.\n"));\r
}\r
+\r
SpiInstance->PchSpiBase = (UINT32)(UINTN)SpiFlashInfo->SpiAddress.Address;\r
SpiInstance->Flags = SpiFlashInfo->Flags;\r
DEBUG ((DEBUG_INFO, "PchSpiBase at 0x%x\n", SpiInstance->PchSpiBase));\r
//\r
MmioAndThenOr32 (\r
ScSpiBar0 + R_SPI_FDOC,\r
- (UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
- (UINT32) (V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP0)\r
+ (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
+ (UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP0)\r
);\r
\r
//\r
// Copy Zero based Number Of Components\r
//\r
- SpiInstance->NumberOfComponents = (UINT8) ((MmioRead16 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_NC) >> N_SPI_FDBAR_NC);\r
+ SpiInstance->NumberOfComponents = (UINT8)((MmioRead16 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_NC) >> N_SPI_FDBAR_NC);\r
\r
MmioAndThenOr32 (\r
ScSpiBar0 + R_SPI_FDOC,\r
- (UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
- (UINT32) (V_SPI_FDOC_FDSS_COMP | R_SPI_FCBA_FLCOMP)\r
+ (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
+ (UINT32)(V_SPI_FDOC_FDSS_COMP | R_SPI_FCBA_FLCOMP)\r
);\r
\r
//\r
// Copy Component 0 Density\r
//\r
- Comp0Density = (UINT8) MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FLCOMP_COMP1_MASK;\r
- SpiInstance->Component1StartAddr = (UINT32) (SIZE_512KB << Comp0Density);\r
+ Comp0Density = (UINT8)MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FLCOMP_COMP1_MASK;\r
+ SpiInstance->Component1StartAddr = (UINT32)(SIZE_512KB << Comp0Density);\r
\r
//\r
// Select FLASH_MAP1 to get Flash SC Strap Base Address\r
//\r
MmioAndThenOr32 (\r
(ScSpiBar0 + R_SPI_FDOC),\r
- (UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
- (UINT32) (V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP1)\r
+ (UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),\r
+ (UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP1)\r
);\r
\r
SpiInstance->StrapBaseAddress = MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_FPSBA;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Read data from the flash part.\r
\r
OUT UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SendSpiCmd (FlashRegionType, FlashCycleRead, Address, ByteCount, Buffer);\r
return Status;\r
IN UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SendSpiCmd (FlashRegionType, FlashCycleWrite, Address, ByteCount, Buffer);\r
return Status;\r
IN UINT32 ByteCount\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SendSpiCmd (FlashRegionType, FlashCycleErase, Address, ByteCount, NULL);\r
return Status;\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadSfdp (\r
- IN UINT8 ComponentNumber,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *SfdpData\r
+ IN UINT8 ComponentNumber,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *SfdpData\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Address;\r
- SPI_INSTANCE *SpiInstance;\r
+ EFI_STATUS Status;\r
+ UINT32 Address;\r
+ SPI_INSTANCE *SpiInstance;\r
\r
SpiInstance = GetSpiInstance ();\r
if (SpiInstance == NULL) {\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadJedecId (\r
- IN UINT8 ComponentNumber,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *JedecId\r
+ IN UINT8 ComponentNumber,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *JedecId\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Address;\r
- SPI_INSTANCE *SpiInstance;\r
+ EFI_STATUS Status;\r
+ UINT32 Address;\r
+ SPI_INSTANCE *SpiInstance;\r
\r
SpiInstance = GetSpiInstance ();\r
if (SpiInstance == NULL) {\r
EFI_STATUS\r
EFIAPI\r
SpiFlashWriteStatus (\r
- IN UINT32 ByteCount,\r
- IN UINT8 *StatusValue\r
+ IN UINT32 ByteCount,\r
+ IN UINT8 *StatusValue\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SendSpiCmd (0, FlashCycleWriteStatus, 0, ByteCount, StatusValue);\r
return Status;\r
EFI_STATUS\r
EFIAPI\r
SpiFlashReadStatus (\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *StatusValue\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *StatusValue\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SendSpiCmd (0, FlashCycleReadStatus, 0, ByteCount, StatusValue);\r
return Status;\r
EFI_STATUS\r
EFIAPI\r
SpiReadPchSoftStrap (\r
- IN UINT32 SoftStrapAddr,\r
- IN UINT32 ByteCount,\r
- OUT UINT8 *SoftStrapValue\r
+ IN UINT32 SoftStrapAddr,\r
+ IN UINT32 ByteCount,\r
+ OUT UINT8 *SoftStrapValue\r
)\r
{\r
- UINT32 StrapFlashAddr;\r
- EFI_STATUS Status;\r
- SPI_INSTANCE *SpiInstance;\r
+ UINT32 StrapFlashAddr;\r
+ EFI_STATUS Status;\r
+ SPI_INSTANCE *SpiInstance;\r
\r
SpiInstance = GetSpiInstance ();\r
if (SpiInstance == NULL) {\r
IN OUT UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Index;\r
- UINTN SpiBaseAddress;\r
- UINT32 ScSpiBar0;\r
- UINT32 LimitAddress;\r
- UINT32 HardwareSpiAddr;\r
- UINT16 PermissionBit;\r
- UINT32 SpiDataCount;\r
- UINT32 FlashCycle;\r
- UINT8 BiosCtlSave;\r
- SPI_INSTANCE *SpiInstance;\r
- UINT32 Data32;\r
+ EFI_STATUS Status;\r
+ UINT32 Index;\r
+ UINTN SpiBaseAddress;\r
+ UINT32 ScSpiBar0;\r
+ UINT32 LimitAddress;\r
+ UINT32 HardwareSpiAddr;\r
+ UINT16 PermissionBit;\r
+ UINT32 SpiDataCount;\r
+ UINT32 FlashCycle;\r
+ UINT8 BiosCtlSave;\r
+ SPI_INSTANCE *SpiInstance;\r
+ UINT32 Data32;\r
\r
SpiInstance = GetSpiInstance ();\r
if (SpiInstance == NULL) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
- Status = EFI_SUCCESS;\r
- SpiBaseAddress = SpiInstance->PchSpiBase;\r
- ScSpiBar0 = AcquireSpiBar0 (SpiBaseAddress);\r
- BiosCtlSave = 0;\r
+ Status = EFI_SUCCESS;\r
+ SpiBaseAddress = SpiInstance->PchSpiBase;\r
+ ScSpiBar0 = AcquireSpiBar0 (SpiBaseAddress);\r
+ BiosCtlSave = 0;\r
SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP);\r
\r
//\r
if (EFI_ERROR (Status)) {\r
goto SendSpiCmdEnd;\r
}\r
+\r
BiosCtlSave = SaveAndDisableSpiPrefetchCache (SpiBaseAddress);\r
}\r
\r
HardwareSpiAddr = Address;\r
if ((FlashCycleType == FlashCycleRead) ||\r
(FlashCycleType == FlashCycleWrite) ||\r
- (FlashCycleType == FlashCycleErase)) {\r
-\r
+ (FlashCycleType == FlashCycleErase))\r
+ {\r
switch (FlashRegionType) {\r
- case FlashRegionDescriptor:\r
- if (FlashCycleType == FlashCycleRead) {\r
- PermissionBit = B_SPI_FRAP_BRRA_FLASHD;\r
- } else {\r
- PermissionBit = B_SPI_FRAP_BRWA_FLASHD;\r
- }\r
- Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);\r
- HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;\r
- LimitAddress = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;\r
- break;\r
+ case FlashRegionDescriptor:\r
+ if (FlashCycleType == FlashCycleRead) {\r
+ PermissionBit = B_SPI_FRAP_BRRA_FLASHD;\r
+ } else {\r
+ PermissionBit = B_SPI_FRAP_BRWA_FLASHD;\r
+ }\r
\r
- case FlashRegionBios:\r
- if (FlashCycleType == FlashCycleRead) {\r
- PermissionBit = B_SPI_FRAP_BRRA_BIOS;\r
- } else {\r
- PermissionBit = B_SPI_FRAP_BRWA_BIOS;\r
- }\r
- Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);\r
- HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;\r
- LimitAddress = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;\r
- break;\r
+ Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);\r
+ HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;\r
+ LimitAddress = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;\r
+ break;\r
\r
- case FlashRegionMe:\r
- if (FlashCycleType == FlashCycleRead) {\r
- PermissionBit = B_SPI_FRAP_BRRA_SEC;\r
- } else {\r
- PermissionBit = B_SPI_FRAP_BRWA_SEC;\r
- }\r
- Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);\r
- HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;\r
- LimitAddress = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;\r
- break;\r
+ case FlashRegionBios:\r
+ if (FlashCycleType == FlashCycleRead) {\r
+ PermissionBit = B_SPI_FRAP_BRRA_BIOS;\r
+ } else {\r
+ PermissionBit = B_SPI_FRAP_BRWA_BIOS;\r
+ }\r
\r
- case FlashRegionGbE:\r
- if (FlashCycleType == FlashCycleRead) {\r
- PermissionBit = B_SPI_FRAP_BRRA_GBE;\r
- } else {\r
- PermissionBit = B_SPI_FRAP_BRWA_GBE;\r
- }\r
- Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);\r
- HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;\r
- LimitAddress = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;\r
- break;\r
+ Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);\r
+ HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;\r
+ LimitAddress = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;\r
+ break;\r
\r
- case FlashRegionPlatformData:\r
- if (FlashCycleType == FlashCycleRead) {\r
- PermissionBit = B_SPI_FRAP_BRRA_PLATFORM;\r
- } else {\r
- PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;\r
- }\r
- Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);\r
- HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;\r
- LimitAddress = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;\r
- break;\r
+ case FlashRegionMe:\r
+ if (FlashCycleType == FlashCycleRead) {\r
+ PermissionBit = B_SPI_FRAP_BRRA_SEC;\r
+ } else {\r
+ PermissionBit = B_SPI_FRAP_BRWA_SEC;\r
+ }\r
\r
- case FlashRegionAll:\r
- //\r
- // FlashRegionAll indicates address is relative to flash device\r
- // No error checking for this case\r
- //\r
- LimitAddress = 0;\r
- PermissionBit = 0;\r
- break;\r
+ Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);\r
+ HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;\r
+ LimitAddress = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;\r
+ break;\r
\r
- default:\r
- Status = EFI_UNSUPPORTED;\r
- goto SendSpiCmdEnd;\r
+ case FlashRegionGbE:\r
+ if (FlashCycleType == FlashCycleRead) {\r
+ PermissionBit = B_SPI_FRAP_BRRA_GBE;\r
+ } else {\r
+ PermissionBit = B_SPI_FRAP_BRWA_GBE;\r
+ }\r
+\r
+ Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);\r
+ HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;\r
+ LimitAddress = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;\r
+ break;\r
+\r
+ case FlashRegionPlatformData:\r
+ if (FlashCycleType == FlashCycleRead) {\r
+ PermissionBit = B_SPI_FRAP_BRRA_PLATFORM;\r
+ } else {\r
+ PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;\r
+ }\r
+\r
+ Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);\r
+ HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;\r
+ LimitAddress = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;\r
+ break;\r
+\r
+ case FlashRegionAll:\r
+ //\r
+ // FlashRegionAll indicates address is relative to flash device\r
+ // No error checking for this case\r
+ //\r
+ LimitAddress = 0;\r
+ PermissionBit = 0;\r
+ break;\r
+\r
+ default:\r
+ Status = EFI_UNSUPPORTED;\r
+ goto SendSpiCmdEnd;\r
}\r
\r
if ((LimitAddress != 0) && (Address > LimitAddress)) {\r
//\r
FlashCycle = 0;\r
switch (FlashCycleType) {\r
- case FlashCycleRead:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ << N_SPI_HSFS_CYCLE);\r
- break;\r
+ case FlashCycleRead:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ << N_SPI_HSFS_CYCLE);\r
+ break;\r
\r
- case FlashCycleWrite:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_WRITE << N_SPI_HSFS_CYCLE);\r
- break;\r
+ case FlashCycleWrite:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE << N_SPI_HSFS_CYCLE);\r
+ break;\r
\r
- case FlashCycleErase:\r
- if (((ByteCount % SIZE_4KB) != 0) || ((HardwareSpiAddr % SIZE_4KB) != 0)) {\r
- DEBUG ((DEBUG_ERROR, "Erase and erase size must be 4KB aligned. \n"));\r
- ASSERT (FALSE);\r
- Status = EFI_INVALID_PARAMETER;\r
- goto SendSpiCmdEnd;\r
- }\r
- break;\r
+ case FlashCycleErase:\r
+ if (((ByteCount % SIZE_4KB) != 0) || ((HardwareSpiAddr % SIZE_4KB) != 0)) {\r
+ DEBUG ((DEBUG_ERROR, "Erase and erase size must be 4KB aligned. \n"));\r
+ ASSERT (FALSE);\r
+ Status = EFI_INVALID_PARAMETER;\r
+ goto SendSpiCmdEnd;\r
+ }\r
\r
- case FlashCycleReadSfdp:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_SFDP << N_SPI_HSFS_CYCLE);\r
- break;\r
+ break;\r
\r
- case FlashCycleReadJedecId:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_JEDEC_ID << N_SPI_HSFS_CYCLE);\r
- break;\r
+ case FlashCycleReadSfdp:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_SFDP << N_SPI_HSFS_CYCLE);\r
+ break;\r
\r
- case FlashCycleWriteStatus:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_WRITE_STATUS << N_SPI_HSFS_CYCLE);\r
- break;\r
+ case FlashCycleReadJedecId:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_JEDEC_ID << N_SPI_HSFS_CYCLE);\r
+ break;\r
\r
- case FlashCycleReadStatus:\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_STATUS << N_SPI_HSFS_CYCLE);\r
- break;\r
+ case FlashCycleWriteStatus:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE_STATUS << N_SPI_HSFS_CYCLE);\r
+ break;\r
\r
- default:\r
- //\r
- // Unrecognized Operation\r
- //\r
- ASSERT (FALSE);\r
- Status = EFI_INVALID_PARAMETER;\r
- goto SendSpiCmdEnd;\r
- break;\r
+ case FlashCycleReadStatus:\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_STATUS << N_SPI_HSFS_CYCLE);\r
+ break;\r
+\r
+ default:\r
+ //\r
+ // Unrecognized Operation\r
+ //\r
+ ASSERT (FALSE);\r
+ Status = EFI_INVALID_PARAMETER;\r
+ goto SendSpiCmdEnd;\r
+ break;\r
}\r
\r
do {\r
// per operation\r
//\r
if (HardwareSpiAddr + ByteCount > ((HardwareSpiAddr + BIT8) &~(BIT8 - 1))) {\r
- SpiDataCount = (((UINT32) (HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32) (HardwareSpiAddr);\r
+ SpiDataCount = (((UINT32)(HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32)(HardwareSpiAddr);\r
}\r
+\r
//\r
// Calculate the number of bytes to shift in/out during the SPI data cycle.\r
// Valid settings for the number of bytes during each data portion of the\r
if (FlashCycleType == FlashCycleErase) {\r
if (((ByteCount / SIZE_64KB) != 0) &&\r
((ByteCount % SIZE_64KB) == 0) &&\r
- ((HardwareSpiAddr % SIZE_64KB) == 0)) {\r
+ ((HardwareSpiAddr % SIZE_64KB) == 0))\r
+ {\r
if (HardwareSpiAddr < SpiInstance->Component1StartAddr) {\r
//\r
// Check whether Component0 support 64k Erase\r
} else {\r
SpiDataCount = SIZE_4KB;\r
}\r
+\r
if (SpiDataCount == SIZE_4KB) {\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);\r
} else {\r
- FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_64K_ERASE << N_SPI_HSFS_CYCLE);\r
+ FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_64K_ERASE << N_SPI_HSFS_CYCLE);\r
}\r
}\r
\r
// Use Dword write if Data Count is 8, 16, 24, 32, 40, 48, 56, 64\r
//\r
for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {\r
- MmioWrite32 (ScSpiBar0 + R_SPI_FDATA00 + Index, *(UINT32 *) (Buffer + Index));\r
+ MmioWrite32 (ScSpiBar0 + R_SPI_FDATA00 + Index, *(UINT32 *)(Buffer + Index));\r
}\r
}\r
}\r
//\r
// Set the Flash Address\r
//\r
- MmioWrite32 (ScSpiBar0 + R_SPI_FADDR, (UINT32) (HardwareSpiAddr & B_SPI_FADDR_MASK));\r
+ MmioWrite32 (ScSpiBar0 + R_SPI_FADDR, (UINT32)(HardwareSpiAddr & B_SPI_FADDR_MASK));\r
\r
//\r
// Set Data count, Flash cycle, and Set Go bit to start a cycle\r
//\r
MmioAndThenOr32 (\r
ScSpiBar0 + R_SPI_HSFS,\r
- (UINT32) (~(B_SPI_HSFS_FDBC_MASK | B_SPI_HSFS_CYCLE_MASK)),\r
- (UINT32) (((SpiDataCount - 1) << N_SPI_HSFS_FDBC) | FlashCycle | B_SPI_HSFS_CYCLE_FGO)\r
+ (UINT32)(~(B_SPI_HSFS_FDBC_MASK | B_SPI_HSFS_CYCLE_MASK)),\r
+ (UINT32)(((SpiDataCount - 1) << N_SPI_HSFS_FDBC) | FlashCycle | B_SPI_HSFS_CYCLE_FGO)\r
);\r
\r
//\r
if ((FlashCycleType == FlashCycleRead) ||\r
(FlashCycleType == FlashCycleReadSfdp) ||\r
(FlashCycleType == FlashCycleReadJedecId) ||\r
- (FlashCycleType == FlashCycleReadStatus)) {\r
+ (FlashCycleType == FlashCycleReadStatus))\r
+ {\r
if ((SpiDataCount & 0x07) != 0) {\r
//\r
// Use Byte read if Data Count is 0, 1, 2, 3, 4, 5, 6, 7\r
// Use Dword read if Data Count is 8, 16, 24, 32, 40, 48, 56, 64\r
//\r
for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {\r
- *(UINT32 *) (Buffer + Index) = MmioRead32 (ScSpiBar0 + R_SPI_FDATA00 + Index);\r
+ *(UINT32 *)(Buffer + Index) = MmioRead32 (ScSpiBar0 + R_SPI_FDATA00 + Index);\r
}\r
}\r
}\r
/// Restore the settings for SPI Prefetching and Caching and enable BIOS Write Protect\r
///\r
if ((FlashCycleType == FlashCycleWrite) || (FlashCycleType == FlashCycleErase)) {\r
- EnableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);\r
+ EnableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);\r
SetSpiBiosControlRegister (SpiBaseAddress, BiosCtlSave);\r
}\r
\r
**/\r
BOOLEAN\r
WaitForSpiCycleComplete (\r
- IN UINT32 ScSpiBar0,\r
- IN BOOLEAN ErrorCheck\r
+ IN UINT32 ScSpiBar0,\r
+ IN BOOLEAN ErrorCheck\r
)\r
{\r
- UINT64 WaitTicks;\r
- UINT64 WaitCount;\r
- UINT32 Data32;\r
+ UINT64 WaitTicks;\r
+ UINT64 WaitCount;\r
+ UINT32 Data32;\r
\r
//\r
// Convert the wait period allowed into to tick count\r
return TRUE;\r
}\r
}\r
- MicroSecondDelay ( WAIT_PERIOD);\r
+\r
+ MicroSecondDelay (WAIT_PERIOD);\r
}\r
+\r
return FALSE;\r
}\r
\r
OUT UINT32 *RegionSize OPTIONAL\r
)\r
{\r
- UINT32 ScSpiBar0;\r
- UINT32 ReadValue;\r
- UINT32 Base;\r
- SPI_INSTANCE *SpiInstance;\r
+ UINT32 ScSpiBar0;\r
+ UINT32 ReadValue;\r
+ UINT32 Base;\r
+ SPI_INSTANCE *SpiInstance;\r
\r
if (FlashRegionType >= FlashRegionMax) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- SpiInstance = GetSpiInstance();\r
+ SpiInstance = GetSpiInstance ();\r
if (SpiInstance == NULL) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
if (FlashRegionType == FlashRegionAll) {\r
if (BaseAddress != NULL) {\r
- *BaseAddress = 0;\r
+ *BaseAddress = 0;\r
}\r
+\r
if (RegionSize != NULL) {\r
- *RegionSize = SpiInstance->Component1StartAddr;\r
+ *RegionSize = SpiInstance->Component1StartAddr;\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
ScSpiBar0 = AcquireSpiBar0 (SpiInstance->PchSpiBase);\r
- ReadValue = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD + S_SPI_FREGX * (UINT32) FlashRegionType);\r
+ ReadValue = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD + S_SPI_FREGX * (UINT32)FlashRegionType);\r
ReleaseSpiBar0 (SpiInstance->PchSpiBase);\r
\r
//\r
\r
if (RegionSize != NULL) {\r
*RegionSize = ((((ReadValue & B_SPI_FREGX_LIMIT_MASK) >> N_SPI_FREGX_LIMIT) + 1) <<\r
- N_SPI_FREGX_LIMIT_REPR) - Base;\r
+ N_SPI_FREGX_LIMIT_REPR) - Base;\r
}\r
\r
return EFI_SUCCESS;\r
\r
#include <PiPei.h>\r
\r
-#define ELF_CLASS32 1\r
-#define ELF_CLASS64 2\r
+#define ELF_CLASS32 1\r
+#define ELF_CLASS64 2\r
\r
-#define ELF_PT_LOAD 1\r
+#define ELF_PT_LOAD 1\r
\r
typedef struct {\r
- RETURN_STATUS ParseStatus; ///< Return the status after ParseElfImage().\r
- UINT8 *FileBase; ///< The source location in memory.\r
- UINTN FileSize; ///< The size including sections that don't require loading.\r
- UINT8 *PreferredImageAddress; ///< The preferred image to be loaded. No relocation is needed if loaded to this address.\r
- BOOLEAN ReloadRequired; ///< The image needs a new memory location for running.\r
- UINT8 *ImageAddress; ///< The destination memory address set by caller.\r
- UINTN ImageSize; ///< The memory size for loading and execution.\r
- UINT32 EiClass;\r
- UINT32 ShNum;\r
- UINT32 PhNum;\r
- UINTN ShStrOff;\r
- UINTN ShStrLen;\r
- UINTN EntryPoint; ///< Return the actual entry point after LoadElfImage().\r
+ RETURN_STATUS ParseStatus; ///< Return the status after ParseElfImage().\r
+ UINT8 *FileBase; ///< The source location in memory.\r
+ UINTN FileSize; ///< The size including sections that don't require loading.\r
+ UINT8 *PreferredImageAddress; ///< The preferred image to be loaded. No relocation is needed if loaded to this address.\r
+ BOOLEAN ReloadRequired; ///< The image needs a new memory location for running.\r
+ UINT8 *ImageAddress; ///< The destination memory address set by caller.\r
+ UINTN ImageSize; ///< The memory size for loading and execution.\r
+ UINT32 EiClass;\r
+ UINT32 ShNum;\r
+ UINT32 PhNum;\r
+ UINTN ShStrOff;\r
+ UINTN ShStrLen;\r
+ UINTN EntryPoint; ///< Return the actual entry point after LoadElfImage().\r
} ELF_IMAGE_CONTEXT;\r
\r
-\r
typedef struct {\r
- UINT32 PtType;\r
- UINTN Offset;\r
- UINTN Length;\r
- UINTN MemLen;\r
- UINTN MemAddr;\r
- UINTN Alignment;\r
+ UINT32 PtType;\r
+ UINTN Offset;\r
+ UINTN Length;\r
+ UINTN MemLen;\r
+ UINTN MemAddr;\r
+ UINTN Alignment;\r
} SEGMENT_INFO;\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
ParseElfImage (\r
- IN VOID *ImageBase,\r
- OUT ELF_IMAGE_CONTEXT *ElfCt\r
+ IN VOID *ImageBase,\r
+ OUT ELF_IMAGE_CONTEXT *ElfCt\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
LoadElfImage (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
GetElfSectionName (\r
- IN ELF_IMAGE_CONTEXT *ElfCt,\r
- IN UINT32 SectionIndex,\r
- OUT CHAR8 **SectionName\r
+ IN ELF_IMAGE_CONTEXT *ElfCt,\r
+ IN UINT32 SectionIndex,\r
+ OUT CHAR8 **SectionName\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
GetElfSectionPos (\r
- IN ELF_IMAGE_CONTEXT *ElfCt,\r
- IN UINT32 Index,\r
- OUT UINTN *Offset,\r
- OUT UINTN *Size\r
+ IN ELF_IMAGE_CONTEXT *ElfCt,\r
+ IN UINT32 Index,\r
+ OUT UINTN *Offset,\r
+ OUT UINTN *Size\r
);\r
+\r
#endif /* ELF_LIB_H_ */\r
*/\r
\r
#ifndef _SYS_ELF32_H_\r
-#define _SYS_ELF32_H_ 1\r
-\r
+#define _SYS_ELF32_H_ 1\r
\r
/*\r
* ELF definitions common to all 32-bit architectures.\r
typedef UINT32 Elf32_Word;\r
typedef UINT64 Elf32_Lword;\r
\r
-typedef Elf32_Word Elf32_Hashelt;\r
+typedef Elf32_Word Elf32_Hashelt;\r
\r
/* Non-standard class-dependent datatype used for abstraction. */\r
typedef Elf32_Word Elf32_Size;\r
-typedef Elf32_Sword Elf32_Ssize;\r
+typedef Elf32_Sword Elf32_Ssize;\r
\r
/*\r
* ELF header.\r
*/\r
\r
typedef struct {\r
- unsigned char e_ident[EI_NIDENT]; /* File identification. */\r
- Elf32_Half e_type; /* File type. */\r
- Elf32_Half e_machine; /* Machine architecture. */\r
- Elf32_Word e_version; /* ELF format version. */\r
- Elf32_Addr e_entry; /* Entry point. */\r
- Elf32_Off e_phoff; /* Program header file offset. */\r
- Elf32_Off e_shoff; /* Section header file offset. */\r
- Elf32_Word e_flags; /* Architecture-specific flags. */\r
- Elf32_Half e_ehsize; /* Size of ELF header in bytes. */\r
- Elf32_Half e_phentsize; /* Size of program header entry. */\r
- Elf32_Half e_phnum; /* Number of program header entries. */\r
- Elf32_Half e_shentsize; /* Size of section header entry. */\r
- Elf32_Half e_shnum; /* Number of section header entries. */\r
- Elf32_Half e_shstrndx; /* Section name strings section. */\r
+ unsigned char e_ident[EI_NIDENT]; /* File identification. */\r
+ Elf32_Half e_type; /* File type. */\r
+ Elf32_Half e_machine; /* Machine architecture. */\r
+ Elf32_Word e_version; /* ELF format version. */\r
+ Elf32_Addr e_entry; /* Entry point. */\r
+ Elf32_Off e_phoff; /* Program header file offset. */\r
+ Elf32_Off e_shoff; /* Section header file offset. */\r
+ Elf32_Word e_flags; /* Architecture-specific flags. */\r
+ Elf32_Half e_ehsize; /* Size of ELF header in bytes. */\r
+ Elf32_Half e_phentsize; /* Size of program header entry. */\r
+ Elf32_Half e_phnum; /* Number of program header entries. */\r
+ Elf32_Half e_shentsize; /* Size of section header entry. */\r
+ Elf32_Half e_shnum; /* Number of section header entries. */\r
+ Elf32_Half e_shstrndx; /* Section name strings section. */\r
} Elf32_Ehdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf32_Word sh_name; /* Section name (index into the\r
+ Elf32_Word sh_name; /* Section name (index into the\r
section header string table). */\r
- Elf32_Word sh_type; /* Section type. */\r
- Elf32_Word sh_flags; /* Section flags. */\r
- Elf32_Addr sh_addr; /* Address in memory image. */\r
- Elf32_Off sh_offset; /* Offset in file. */\r
- Elf32_Word sh_size; /* Size in bytes. */\r
- Elf32_Word sh_link; /* Index of a related section. */\r
- Elf32_Word sh_info; /* Depends on section type. */\r
- Elf32_Word sh_addralign; /* Alignment in bytes. */\r
- Elf32_Word sh_entsize; /* Size of each entry in section. */\r
+ Elf32_Word sh_type; /* Section type. */\r
+ Elf32_Word sh_flags; /* Section flags. */\r
+ Elf32_Addr sh_addr; /* Address in memory image. */\r
+ Elf32_Off sh_offset; /* Offset in file. */\r
+ Elf32_Word sh_size; /* Size in bytes. */\r
+ Elf32_Word sh_link; /* Index of a related section. */\r
+ Elf32_Word sh_info; /* Depends on section type. */\r
+ Elf32_Word sh_addralign; /* Alignment in bytes. */\r
+ Elf32_Word sh_entsize; /* Size of each entry in section. */\r
} Elf32_Shdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf32_Word p_type; /* Entry type. */\r
- Elf32_Off p_offset; /* File offset of contents. */\r
- Elf32_Addr p_vaddr; /* Virtual address in memory image. */\r
- Elf32_Addr p_paddr; /* Physical address (not used). */\r
- Elf32_Word p_filesz; /* Size of contents in file. */\r
- Elf32_Word p_memsz; /* Size of contents in memory. */\r
- Elf32_Word p_flags; /* Access permission flags. */\r
- Elf32_Word p_align; /* Alignment in memory and file. */\r
+ Elf32_Word p_type; /* Entry type. */\r
+ Elf32_Off p_offset; /* File offset of contents. */\r
+ Elf32_Addr p_vaddr; /* Virtual address in memory image. */\r
+ Elf32_Addr p_paddr; /* Physical address (not used). */\r
+ Elf32_Word p_filesz; /* Size of contents in file. */\r
+ Elf32_Word p_memsz; /* Size of contents in memory. */\r
+ Elf32_Word p_flags; /* Access permission flags. */\r
+ Elf32_Word p_align; /* Alignment in memory and file. */\r
} Elf32_Phdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf32_Sword d_tag; /* Entry type. */\r
+ Elf32_Sword d_tag; /* Entry type. */\r
union {\r
- Elf32_Word d_val; /* Integer value. */\r
- Elf32_Addr d_ptr; /* Address value. */\r
+ Elf32_Word d_val; /* Integer value. */\r
+ Elf32_Addr d_ptr; /* Address value. */\r
} d_un;\r
} Elf32_Dyn;\r
\r
\r
/* Relocations that don't need an addend field. */\r
typedef struct {\r
- Elf32_Addr r_offset; /* Location to be relocated. */\r
- Elf32_Word r_info; /* Relocation type and symbol index. */\r
+ Elf32_Addr r_offset; /* Location to be relocated. */\r
+ Elf32_Word r_info; /* Relocation type and symbol index. */\r
} Elf32_Rel;\r
\r
/* Relocations that need an addend field. */\r
typedef struct {\r
- Elf32_Addr r_offset; /* Location to be relocated. */\r
- Elf32_Word r_info; /* Relocation type and symbol index. */\r
- Elf32_Sword r_addend; /* Addend. */\r
+ Elf32_Addr r_offset; /* Location to be relocated. */\r
+ Elf32_Word r_info; /* Relocation type and symbol index. */\r
+ Elf32_Sword r_addend; /* Addend. */\r
} Elf32_Rela;\r
\r
/* Macros for accessing the fields of r_info. */\r
-#define ELF32_R_SYM(info) ((info) >> 8)\r
+#define ELF32_R_SYM(info) ((info) >> 8)\r
#define ELF32_R_TYPE(info) ((unsigned char)(info))\r
\r
/* Macro for constructing r_info from field values. */\r
* Move entry\r
*/\r
typedef struct {\r
- Elf32_Lword m_value; /* symbol value */\r
- Elf32_Word m_info; /* size + index */\r
- Elf32_Word m_poffset; /* symbol offset */\r
- Elf32_Half m_repeat; /* repeat count */\r
- Elf32_Half m_stride; /* stride info */\r
+ Elf32_Lword m_value; /* symbol value */\r
+ Elf32_Word m_info; /* size + index */\r
+ Elf32_Word m_poffset; /* symbol offset */\r
+ Elf32_Half m_repeat; /* repeat count */\r
+ Elf32_Half m_stride; /* stride info */\r
} Elf32_Move;\r
\r
/*\r
* size = ELF32_M_SIZE(M.m_info)\r
* M.m_info = ELF32_M_INFO(sym, size)\r
*/\r
-#define ELF32_M_SYM(info) ((info)>>8)\r
-#define ELF32_M_SIZE(info) ((unsigned char)(info))\r
+#define ELF32_M_SYM(info) ((info)>>8)\r
+#define ELF32_M_SIZE(info) ((unsigned char)(info))\r
#define ELF32_M_INFO(sym, size) (((sym)<<8)+(unsigned char)(size))\r
\r
/*\r
* Hardware/Software capabilities entry\r
*/\r
typedef struct {\r
- Elf32_Word c_tag; /* how to interpret value */\r
+ Elf32_Word c_tag; /* how to interpret value */\r
union {\r
- Elf32_Word c_val;\r
- Elf32_Addr c_ptr;\r
+ Elf32_Word c_val;\r
+ Elf32_Addr c_ptr;\r
} c_un;\r
} Elf32_Cap;\r
\r
*/\r
\r
typedef struct {\r
- Elf32_Word st_name; /* String table index of name. */\r
- Elf32_Addr st_value; /* Symbol value. */\r
- Elf32_Word st_size; /* Size of associated object. */\r
- unsigned char st_info; /* Type and binding information. */\r
- unsigned char st_other; /* Reserved (not used). */\r
- Elf32_Half st_shndx; /* Section index of symbol. */\r
+ Elf32_Word st_name; /* String table index of name. */\r
+ Elf32_Addr st_value; /* Symbol value. */\r
+ Elf32_Word st_size; /* Size of associated object. */\r
+ unsigned char st_info; /* Type and binding information. */\r
+ unsigned char st_other; /* Reserved (not used). */\r
+ Elf32_Half st_shndx; /* Section index of symbol. */\r
} Elf32_Sym;\r
\r
/* Macros for accessing the fields of st_info. */\r
-#define ELF32_ST_BIND(info) ((info) >> 4)\r
-#define ELF32_ST_TYPE(info) ((info) & 0xf)\r
+#define ELF32_ST_BIND(info) ((info) >> 4)\r
+#define ELF32_ST_TYPE(info) ((info) & 0xf)\r
\r
/* Macro for constructing st_info from field values. */\r
#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))\r
#define ELF32_ST_VISIBILITY(oth) ((oth) & 0x3)\r
\r
/* Structures used by Sun & GNU symbol versioning. */\r
-typedef struct\r
-{\r
- Elf32_Half vd_version;\r
- Elf32_Half vd_flags;\r
- Elf32_Half vd_ndx;\r
- Elf32_Half vd_cnt;\r
- Elf32_Word vd_hash;\r
- Elf32_Word vd_aux;\r
- Elf32_Word vd_next;\r
+typedef struct {\r
+ Elf32_Half vd_version;\r
+ Elf32_Half vd_flags;\r
+ Elf32_Half vd_ndx;\r
+ Elf32_Half vd_cnt;\r
+ Elf32_Word vd_hash;\r
+ Elf32_Word vd_aux;\r
+ Elf32_Word vd_next;\r
} Elf32_Verdef;\r
\r
-typedef struct\r
-{\r
- Elf32_Word vda_name;\r
- Elf32_Word vda_next;\r
+typedef struct {\r
+ Elf32_Word vda_name;\r
+ Elf32_Word vda_next;\r
} Elf32_Verdaux;\r
\r
-typedef struct\r
-{\r
- Elf32_Half vn_version;\r
- Elf32_Half vn_cnt;\r
- Elf32_Word vn_file;\r
- Elf32_Word vn_aux;\r
- Elf32_Word vn_next;\r
+typedef struct {\r
+ Elf32_Half vn_version;\r
+ Elf32_Half vn_cnt;\r
+ Elf32_Word vn_file;\r
+ Elf32_Word vn_aux;\r
+ Elf32_Word vn_next;\r
} Elf32_Verneed;\r
\r
-typedef struct\r
-{\r
- Elf32_Word vna_hash;\r
- Elf32_Half vna_flags;\r
- Elf32_Half vna_other;\r
- Elf32_Word vna_name;\r
- Elf32_Word vna_next;\r
+typedef struct {\r
+ Elf32_Word vna_hash;\r
+ Elf32_Half vna_flags;\r
+ Elf32_Half vna_other;\r
+ Elf32_Word vna_name;\r
+ Elf32_Word vna_next;\r
} Elf32_Vernaux;\r
\r
typedef Elf32_Half Elf32_Versym;\r
\r
typedef struct {\r
- Elf32_Half si_boundto; /* direct bindings - symbol bound to */\r
- Elf32_Half si_flags; /* per symbol flags */\r
+ Elf32_Half si_boundto; /* direct bindings - symbol bound to */\r
+ Elf32_Half si_flags; /* per symbol flags */\r
} Elf32_Syminfo;\r
\r
#endif /* !_SYS_ELF32_H_ */\r
**/\r
Elf32_Shdr *\r
GetElf32SectionByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
)\r
{\r
- Elf32_Ehdr *Ehdr;\r
+ Elf32_Ehdr *Ehdr;\r
\r
- Ehdr = (Elf32_Ehdr *)ImageBase;\r
+ Ehdr = (Elf32_Ehdr *)ImageBase;\r
if (Index >= Ehdr->e_shnum) {\r
return NULL;\r
}\r
**/\r
Elf32_Phdr *\r
GetElf32SegmentByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
)\r
{\r
- Elf32_Ehdr *Ehdr;\r
+ Elf32_Ehdr *Ehdr;\r
\r
- Ehdr = (Elf32_Ehdr *)ImageBase;\r
+ Ehdr = (Elf32_Ehdr *)ImageBase;\r
if (Index >= Ehdr->e_phnum) {\r
return NULL;\r
}\r
**/\r
Elf32_Shdr *\r
GetElf32SectionByRange (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Offset,\r
- IN UINT32 Size\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Offset,\r
+ IN UINT32 Size\r
)\r
{\r
- UINT32 Index;\r
- Elf32_Ehdr *Ehdr;\r
- Elf32_Shdr *Shdr;\r
+ UINT32 Index;\r
+ Elf32_Ehdr *Ehdr;\r
+ Elf32_Shdr *Shdr;\r
\r
Ehdr = (Elf32_Ehdr *)ImageBase;\r
\r
- Shdr = (Elf32_Shdr *) (ImageBase + Ehdr->e_shoff);\r
+ Shdr = (Elf32_Shdr *)(ImageBase + Ehdr->e_shoff);\r
for (Index = 0; Index < Ehdr->e_shnum; Index++) {\r
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {\r
return Shdr;\r
}\r
+\r
Shdr = ELF_NEXT_ENTRY (Elf32_Shdr, Shdr, Ehdr->e_shentsize);\r
}\r
+\r
return NULL;\r
}\r
\r
**/\r
EFI_STATUS\r
ProcessRelocation32 (\r
- IN Elf32_Rela *Rela,\r
- IN UINT32 RelaSize,\r
- IN UINT32 RelaEntrySize,\r
- IN UINT32 RelaType,\r
- IN INTN Delta,\r
- IN BOOLEAN DynamicLinking\r
+ IN Elf32_Rela *Rela,\r
+ IN UINT32 RelaSize,\r
+ IN UINT32 RelaEntrySize,\r
+ IN UINT32 RelaType,\r
+ IN INTN Delta,\r
+ IN BOOLEAN DynamicLinking\r
)\r
{\r
- UINTN Index;\r
- UINT32 *Ptr;\r
- UINT32 Type;\r
+ UINTN Index;\r
+ UINT32 *Ptr;\r
+ UINT32 Type;\r
\r
for ( Index = 0\r
- ; RelaEntrySize * Index < RelaSize\r
- ; Index++, Rela = ELF_NEXT_ENTRY (Elf32_Rela, Rela, RelaEntrySize)\r
- ) {\r
+ ; RelaEntrySize * Index < RelaSize\r
+ ; Index++, Rela = ELF_NEXT_ENTRY (Elf32_Rela, Rela, RelaEntrySize)\r
+ )\r
+ {\r
//\r
// r_offset is the virtual address of the storage unit affected by the relocation.\r
//\r
- Ptr = (UINT32 *)(UINTN)(Rela->r_offset + Delta);\r
- Type = ELF32_R_TYPE(Rela->r_info);\r
+ Ptr = (UINT32 *)(UINTN)(Rela->r_offset + Delta);\r
+ Type = ELF32_R_TYPE (Rela->r_info);\r
switch (Type) {\r
case R_386_NONE:\r
case R_386_PC32:\r
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));\r
ASSERT (FALSE);\r
} else {\r
- *Ptr += (UINT32) Delta;\r
+ *Ptr += (UINT32)Delta;\r
}\r
+\r
break;\r
\r
case R_386_RELATIVE:\r
// Calculation: B + A\r
//\r
if (RelaType == SHT_RELA) {\r
- *Ptr = (UINT32) Delta + Rela->r_addend;\r
+ *Ptr = (UINT32)Delta + Rela->r_addend;\r
} else {\r
//\r
// A is stored in the field of relocation for REL type.\r
//\r
- *Ptr = (UINT32) Delta + *Ptr;\r
+ *Ptr = (UINT32)Delta + *Ptr;\r
}\r
} else {\r
//\r
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));\r
ASSERT (FALSE);\r
}\r
+\r
break;\r
\r
default:\r
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));\r
}\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
RelocateElf32Dynamic (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- UINT32 Index;\r
- Elf32_Phdr *Phdr;\r
- Elf32_Shdr *DynShdr;\r
- Elf32_Shdr *RelShdr;\r
- Elf32_Dyn *Dyn;\r
- UINT32 RelaAddress;\r
- UINT32 RelaCount;\r
- UINT32 RelaSize;\r
- UINT32 RelaEntrySize;\r
- UINT32 RelaType;\r
+ UINT32 Index;\r
+ Elf32_Phdr *Phdr;\r
+ Elf32_Shdr *DynShdr;\r
+ Elf32_Shdr *RelShdr;\r
+ Elf32_Dyn *Dyn;\r
+ UINT32 RelaAddress;\r
+ UINT32 RelaCount;\r
+ UINT32 RelaSize;\r
+ UINT32 RelaEntrySize;\r
+ UINT32 RelaType;\r
\r
//\r
// 1. Locate the dynamic section.\r
if (DynShdr == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
+\r
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);\r
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));\r
\r
RelaCount = 0;\r
RelaEntrySize = 0;\r
RelaType = 0;\r
- for ( Index = 0, Dyn = (Elf32_Dyn *) (ElfCt->FileBase + DynShdr->sh_offset)\r
- ; Index < DynShdr->sh_size / DynShdr->sh_entsize\r
- ; Index++, Dyn = ELF_NEXT_ENTRY (Elf32_Dyn, Dyn, DynShdr->sh_entsize)\r
- ) {\r
+ for ( Index = 0, Dyn = (Elf32_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)\r
+ ; Index < DynShdr->sh_size / DynShdr->sh_entsize\r
+ ; Index++, Dyn = ELF_NEXT_ENTRY (Elf32_Dyn, Dyn, DynShdr->sh_entsize)\r
+ )\r
+ {\r
switch (Dyn->d_tag) {\r
case DT_RELA:\r
case DT_REL:\r
// For consistency, files do not contain relocation entries to ``correct'' addresses in the dynamic structure.\r
//\r
RelaAddress = Dyn->d_un.d_ptr;\r
- RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA: SHT_REL;\r
+ RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA : SHT_REL;\r
break;\r
case DT_RELACOUNT:\r
case DT_RELCOUNT:\r
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {\r
break;\r
}\r
+\r
RelShdr = NULL;\r
}\r
\r
if (RelShdr == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
+\r
ASSERT (RelShdr->sh_type == RelaType);\r
ASSERT (RelShdr->sh_entsize == RelaEntrySize);\r
\r
// 3. Process the relocation section.\r
//\r
ProcessRelocation32 (\r
- (Elf32_Rela *) (ElfCt->FileBase + RelShdr->sh_offset),\r
- RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,\r
- (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress,\r
+ (Elf32_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),\r
+ RelShdr->sh_size,\r
+ RelShdr->sh_entsize,\r
+ RelShdr->sh_type,\r
+ (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,\r
TRUE\r
);\r
return EFI_SUCCESS;\r
**/\r
EFI_STATUS\r
RelocateElf32Sections (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- EFI_STATUS Status;\r
- Elf32_Ehdr *Ehdr;\r
- Elf32_Shdr *RelShdr;\r
- Elf32_Shdr *Shdr;\r
- UINT32 Index;\r
- UINTN Delta;\r
-\r
- Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
+ EFI_STATUS Status;\r
+ Elf32_Ehdr *Ehdr;\r
+ Elf32_Shdr *RelShdr;\r
+ Elf32_Shdr *Shdr;\r
+ UINT32 Index;\r
+ UINTN Delta;\r
+\r
+ Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
if (Ehdr->e_machine != EM_386) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
- Delta = (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress;\r
+ Delta = (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress;\r
ElfCt->EntryPoint = (UINTN)(Ehdr->e_entry + Delta);\r
\r
//\r
// The below relocation is needed in this case.\r
//\r
DEBUG ((DEBUG_INFO, "EXEC ELF: Fix actual/preferred base address delta ...\n"));\r
- for ( Index = 0, RelShdr = (Elf32_Shdr *) (ElfCt->FileBase + Ehdr->e_shoff)\r
- ; Index < Ehdr->e_shnum\r
- ; Index++, RelShdr = ELF_NEXT_ENTRY (Elf32_Shdr, RelShdr, Ehdr->e_shentsize)\r
- ) {\r
+ for ( Index = 0, RelShdr = (Elf32_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)\r
+ ; Index < Ehdr->e_shnum\r
+ ; Index++, RelShdr = ELF_NEXT_ENTRY (Elf32_Shdr, RelShdr, Ehdr->e_shentsize)\r
+ )\r
+ {\r
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {\r
continue;\r
}\r
+\r
Shdr = GetElf32SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);\r
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {\r
//\r
// Only fix up sections that occupy memory during process execution.\r
//\r
ProcessRelocation32 (\r
- (Elf32_Rela *)((UINT8*)Ehdr + RelShdr->sh_offset),\r
- RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,\r
- Delta, FALSE\r
+ (Elf32_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),\r
+ RelShdr->sh_size,\r
+ RelShdr->sh_entsize,\r
+ RelShdr->sh_type,\r
+ Delta,\r
+ FALSE\r
);\r
}\r
}\r
**/\r
EFI_STATUS\r
LoadElf32Image (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- Elf32_Ehdr *Ehdr;\r
- Elf32_Phdr *Phdr;\r
- UINT16 Index;\r
- UINTN Delta;\r
+ Elf32_Ehdr *Ehdr;\r
+ Elf32_Phdr *Phdr;\r
+ UINT16 Index;\r
+ UINTN Delta;\r
\r
ASSERT (ElfCt != NULL);\r
\r
Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
\r
for ( Index = 0, Phdr = (Elf32_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)\r
- ; Index < Ehdr->e_phnum\r
- ; Index++, Phdr = ELF_NEXT_ENTRY (Elf32_Phdr, Phdr, Ehdr->e_phentsize)\r
- ) {\r
+ ; Index < Ehdr->e_phnum\r
+ ; Index++, Phdr = ELF_NEXT_ENTRY (Elf32_Phdr, Phdr, Ehdr->e_phentsize)\r
+ )\r
+ {\r
//\r
// Skip segments that don't require load (type tells, or size is 0)\r
//\r
if ((Phdr->p_type != PT_LOAD) ||\r
- (Phdr->p_memsz == 0)) {\r
+ (Phdr->p_memsz == 0))\r
+ {\r
continue;\r
}\r
\r
// The memory offset of segment relative to the image base\r
// Note: CopyMem() does nothing when the dst equals to src.\r
//\r
- Delta = Phdr->p_paddr - (UINT32) (UINTN) ElfCt->PreferredImageAddress;\r
+ Delta = Phdr->p_paddr - (UINT32)(UINTN)ElfCt->PreferredImageAddress;\r
CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + Phdr->p_offset, Phdr->p_filesz);\r
ZeroMem (ElfCt->ImageAddress + Delta + Phdr->p_filesz, Phdr->p_memsz - Phdr->p_filesz);\r
}\r
*/\r
\r
#ifndef _SYS_ELF64_H_\r
-#define _SYS_ELF64_H_ 1\r
-\r
+#define _SYS_ELF64_H_ 1\r
\r
/*\r
* ELF definitions common to all 64-bit architectures.\r
* typedef is required.\r
*/\r
\r
-typedef Elf64_Word Elf64_Hashelt;\r
+typedef Elf64_Word Elf64_Hashelt;\r
\r
/* Non-standard class-dependent datatype used for abstraction. */\r
-typedef Elf64_Xword Elf64_Size;\r
-typedef Elf64_Sxword Elf64_Ssize;\r
+typedef Elf64_Xword Elf64_Size;\r
+typedef Elf64_Sxword Elf64_Ssize;\r
\r
/*\r
* ELF header.\r
*/\r
\r
typedef struct {\r
- unsigned char e_ident[EI_NIDENT]; /* File identification. */\r
- Elf64_Half e_type; /* File type. */\r
- Elf64_Half e_machine; /* Machine architecture. */\r
- Elf64_Word e_version; /* ELF format version. */\r
- Elf64_Addr e_entry; /* Entry point. */\r
- Elf64_Off e_phoff; /* Program header file offset. */\r
- Elf64_Off e_shoff; /* Section header file offset. */\r
- Elf64_Word e_flags; /* Architecture-specific flags. */\r
- Elf64_Half e_ehsize; /* Size of ELF header in bytes. */\r
- Elf64_Half e_phentsize; /* Size of program header entry. */\r
- Elf64_Half e_phnum; /* Number of program header entries. */\r
- Elf64_Half e_shentsize; /* Size of section header entry. */\r
- Elf64_Half e_shnum; /* Number of section header entries. */\r
- Elf64_Half e_shstrndx; /* Section name strings section. */\r
+ unsigned char e_ident[EI_NIDENT]; /* File identification. */\r
+ Elf64_Half e_type; /* File type. */\r
+ Elf64_Half e_machine; /* Machine architecture. */\r
+ Elf64_Word e_version; /* ELF format version. */\r
+ Elf64_Addr e_entry; /* Entry point. */\r
+ Elf64_Off e_phoff; /* Program header file offset. */\r
+ Elf64_Off e_shoff; /* Section header file offset. */\r
+ Elf64_Word e_flags; /* Architecture-specific flags. */\r
+ Elf64_Half e_ehsize; /* Size of ELF header in bytes. */\r
+ Elf64_Half e_phentsize; /* Size of program header entry. */\r
+ Elf64_Half e_phnum; /* Number of program header entries. */\r
+ Elf64_Half e_shentsize; /* Size of section header entry. */\r
+ Elf64_Half e_shnum; /* Number of section header entries. */\r
+ Elf64_Half e_shstrndx; /* Section name strings section. */\r
} Elf64_Ehdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf64_Word sh_name; /* Section name (index into the\r
+ Elf64_Word sh_name; /* Section name (index into the\r
section header string table). */\r
- Elf64_Word sh_type; /* Section type. */\r
- Elf64_Xword sh_flags; /* Section flags. */\r
- Elf64_Addr sh_addr; /* Address in memory image. */\r
- Elf64_Off sh_offset; /* Offset in file. */\r
- Elf64_Xword sh_size; /* Size in bytes. */\r
- Elf64_Word sh_link; /* Index of a related section. */\r
- Elf64_Word sh_info; /* Depends on section type. */\r
- Elf64_Xword sh_addralign; /* Alignment in bytes. */\r
- Elf64_Xword sh_entsize; /* Size of each entry in section. */\r
+ Elf64_Word sh_type; /* Section type. */\r
+ Elf64_Xword sh_flags; /* Section flags. */\r
+ Elf64_Addr sh_addr; /* Address in memory image. */\r
+ Elf64_Off sh_offset; /* Offset in file. */\r
+ Elf64_Xword sh_size; /* Size in bytes. */\r
+ Elf64_Word sh_link; /* Index of a related section. */\r
+ Elf64_Word sh_info; /* Depends on section type. */\r
+ Elf64_Xword sh_addralign; /* Alignment in bytes. */\r
+ Elf64_Xword sh_entsize; /* Size of each entry in section. */\r
} Elf64_Shdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf64_Word p_type; /* Entry type. */\r
- Elf64_Word p_flags; /* Access permission flags. */\r
- Elf64_Off p_offset; /* File offset of contents. */\r
- Elf64_Addr p_vaddr; /* Virtual address in memory image. */\r
- Elf64_Addr p_paddr; /* Physical address (not used). */\r
- Elf64_Xword p_filesz; /* Size of contents in file. */\r
- Elf64_Xword p_memsz; /* Size of contents in memory. */\r
- Elf64_Xword p_align; /* Alignment in memory and file. */\r
+ Elf64_Word p_type; /* Entry type. */\r
+ Elf64_Word p_flags; /* Access permission flags. */\r
+ Elf64_Off p_offset; /* File offset of contents. */\r
+ Elf64_Addr p_vaddr; /* Virtual address in memory image. */\r
+ Elf64_Addr p_paddr; /* Physical address (not used). */\r
+ Elf64_Xword p_filesz; /* Size of contents in file. */\r
+ Elf64_Xword p_memsz; /* Size of contents in memory. */\r
+ Elf64_Xword p_align; /* Alignment in memory and file. */\r
} Elf64_Phdr;\r
\r
/*\r
*/\r
\r
typedef struct {\r
- Elf64_Sxword d_tag; /* Entry type. */\r
+ Elf64_Sxword d_tag; /* Entry type. */\r
union {\r
- Elf64_Xword d_val; /* Integer value. */\r
- Elf64_Addr d_ptr; /* Address value. */\r
+ Elf64_Xword d_val; /* Integer value. */\r
+ Elf64_Addr d_ptr; /* Address value. */\r
} d_un;\r
} Elf64_Dyn;\r
\r
\r
/* Relocations that don't need an addend field. */\r
typedef struct {\r
- Elf64_Addr r_offset; /* Location to be relocated. */\r
- Elf64_Xword r_info; /* Relocation type and symbol index. */\r
+ Elf64_Addr r_offset; /* Location to be relocated. */\r
+ Elf64_Xword r_info; /* Relocation type and symbol index. */\r
} Elf64_Rel;\r
\r
/* Relocations that need an addend field. */\r
typedef struct {\r
- Elf64_Addr r_offset; /* Location to be relocated. */\r
- Elf64_Xword r_info; /* Relocation type and symbol index. */\r
- Elf64_Sxword r_addend; /* Addend. */\r
+ Elf64_Addr r_offset; /* Location to be relocated. */\r
+ Elf64_Xword r_info; /* Relocation type and symbol index. */\r
+ Elf64_Sxword r_addend; /* Addend. */\r
} Elf64_Rela;\r
\r
/* Macros for accessing the fields of r_info. */\r
-#define ELF64_R_SYM(info) ((UINT32) RShiftU64 ((info), 32))\r
+#define ELF64_R_SYM(info) ((UINT32) RShiftU64 ((info), 32))\r
#define ELF64_R_TYPE(info) ((info) & 0xffffffffL)\r
\r
/* Macro for constructing r_info from field values. */\r
#define ELF64_R_INFO(sym, type) (((sym) << 32) + ((type) & 0xffffffffL))\r
\r
#define ELF64_R_TYPE_DATA(info) (((Elf64_Xword)(info)<<32)>>40)\r
-#define ELF64_R_TYPE_ID(info) (((Elf64_Xword)(info)<<56)>>56)\r
+#define ELF64_R_TYPE_ID(info) (((Elf64_Xword)(info)<<56)>>56)\r
#define ELF64_R_TYPE_INFO(data, type) \\r
(((Elf64_Xword)(data)<<8)+(Elf64_Xword)(type))\r
\r
* Move entry\r
*/\r
typedef struct {\r
- Elf64_Lword m_value; /* symbol value */\r
- Elf64_Xword m_info; /* size + index */\r
- Elf64_Xword m_poffset; /* symbol offset */\r
- Elf64_Half m_repeat; /* repeat count */\r
- Elf64_Half m_stride; /* stride info */\r
+ Elf64_Lword m_value; /* symbol value */\r
+ Elf64_Xword m_info; /* size + index */\r
+ Elf64_Xword m_poffset; /* symbol offset */\r
+ Elf64_Half m_repeat; /* repeat count */\r
+ Elf64_Half m_stride; /* stride info */\r
} Elf64_Move;\r
\r
-#define ELF64_M_SYM(info) ((info)>>8)\r
-#define ELF64_M_SIZE(info) ((unsigned char)(info))\r
+#define ELF64_M_SYM(info) ((info)>>8)\r
+#define ELF64_M_SIZE(info) ((unsigned char)(info))\r
#define ELF64_M_INFO(sym, size) (((sym)<<8)+(unsigned char)(size))\r
\r
/*\r
* Hardware/Software capabilities entry\r
*/\r
typedef struct {\r
- Elf64_Xword c_tag; /* how to interpret value */\r
+ Elf64_Xword c_tag; /* how to interpret value */\r
union {\r
- Elf64_Xword c_val;\r
- Elf64_Addr c_ptr;\r
+ Elf64_Xword c_val;\r
+ Elf64_Addr c_ptr;\r
} c_un;\r
} Elf64_Cap;\r
\r
*/\r
\r
typedef struct {\r
- Elf64_Word st_name; /* String table index of name. */\r
- unsigned char st_info; /* Type and binding information. */\r
- unsigned char st_other; /* Reserved (not used). */\r
- Elf64_Half st_shndx; /* Section index of symbol. */\r
- Elf64_Addr st_value; /* Symbol value. */\r
- Elf64_Xword st_size; /* Size of associated object. */\r
+ Elf64_Word st_name; /* String table index of name. */\r
+ unsigned char st_info; /* Type and binding information. */\r
+ unsigned char st_other; /* Reserved (not used). */\r
+ Elf64_Half st_shndx; /* Section index of symbol. */\r
+ Elf64_Addr st_value; /* Symbol value. */\r
+ Elf64_Xword st_size; /* Size of associated object. */\r
} Elf64_Sym;\r
\r
/* Macros for accessing the fields of st_info. */\r
-#define ELF64_ST_BIND(info) ((info) >> 4)\r
-#define ELF64_ST_TYPE(info) ((info) & 0xf)\r
+#define ELF64_ST_BIND(info) ((info) >> 4)\r
+#define ELF64_ST_TYPE(info) ((info) & 0xf)\r
\r
/* Macro for constructing st_info from field values. */\r
#define ELF64_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))\r
\r
/* Structures used by Sun & GNU-style symbol versioning. */\r
typedef struct {\r
- Elf64_Half vd_version;\r
- Elf64_Half vd_flags;\r
- Elf64_Half vd_ndx;\r
- Elf64_Half vd_cnt;\r
- Elf64_Word vd_hash;\r
- Elf64_Word vd_aux;\r
- Elf64_Word vd_next;\r
+ Elf64_Half vd_version;\r
+ Elf64_Half vd_flags;\r
+ Elf64_Half vd_ndx;\r
+ Elf64_Half vd_cnt;\r
+ Elf64_Word vd_hash;\r
+ Elf64_Word vd_aux;\r
+ Elf64_Word vd_next;\r
} Elf64_Verdef;\r
\r
typedef struct {\r
- Elf64_Word vda_name;\r
- Elf64_Word vda_next;\r
+ Elf64_Word vda_name;\r
+ Elf64_Word vda_next;\r
} Elf64_Verdaux;\r
\r
typedef struct {\r
- Elf64_Half vn_version;\r
- Elf64_Half vn_cnt;\r
- Elf64_Word vn_file;\r
- Elf64_Word vn_aux;\r
- Elf64_Word vn_next;\r
+ Elf64_Half vn_version;\r
+ Elf64_Half vn_cnt;\r
+ Elf64_Word vn_file;\r
+ Elf64_Word vn_aux;\r
+ Elf64_Word vn_next;\r
} Elf64_Verneed;\r
\r
typedef struct {\r
- Elf64_Word vna_hash;\r
- Elf64_Half vna_flags;\r
- Elf64_Half vna_other;\r
- Elf64_Word vna_name;\r
- Elf64_Word vna_next;\r
+ Elf64_Word vna_hash;\r
+ Elf64_Half vna_flags;\r
+ Elf64_Half vna_other;\r
+ Elf64_Word vna_name;\r
+ Elf64_Word vna_next;\r
} Elf64_Vernaux;\r
\r
typedef Elf64_Half Elf64_Versym;\r
\r
typedef struct {\r
- Elf64_Half si_boundto; /* direct bindings - symbol bound to */\r
- Elf64_Half si_flags; /* per symbol flags */\r
+ Elf64_Half si_boundto; /* direct bindings - symbol bound to */\r
+ Elf64_Half si_flags; /* per symbol flags */\r
} Elf64_Syminfo;\r
\r
#endif /* !_SYS_ELF64_H_ */\r
**/\r
Elf64_Shdr *\r
GetElf64SectionByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
)\r
{\r
- Elf64_Ehdr *Ehdr;\r
+ Elf64_Ehdr *Ehdr;\r
\r
- Ehdr = (Elf64_Ehdr *)ImageBase;\r
+ Ehdr = (Elf64_Ehdr *)ImageBase;\r
if (Index >= Ehdr->e_shnum) {\r
return NULL;\r
}\r
**/\r
Elf64_Phdr *\r
GetElf64SegmentByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
)\r
{\r
- Elf64_Ehdr *Ehdr;\r
+ Elf64_Ehdr *Ehdr;\r
\r
- Ehdr = (Elf64_Ehdr *)ImageBase;\r
+ Ehdr = (Elf64_Ehdr *)ImageBase;\r
if (Index >= Ehdr->e_phnum) {\r
return NULL;\r
}\r
**/\r
Elf64_Shdr *\r
GetElf64SectionByRange (\r
- IN UINT8 *ImageBase,\r
- IN UINT64 Offset,\r
- IN UINT64 Size\r
+ IN UINT8 *ImageBase,\r
+ IN UINT64 Offset,\r
+ IN UINT64 Size\r
)\r
{\r
- UINT32 Index;\r
- Elf64_Ehdr *Ehdr;\r
- Elf64_Shdr *Shdr;\r
+ UINT32 Index;\r
+ Elf64_Ehdr *Ehdr;\r
+ Elf64_Shdr *Shdr;\r
\r
Ehdr = (Elf64_Ehdr *)ImageBase;\r
\r
- Shdr = (Elf64_Shdr *) (ImageBase + Ehdr->e_shoff);\r
+ Shdr = (Elf64_Shdr *)(ImageBase + Ehdr->e_shoff);\r
for (Index = 0; Index < Ehdr->e_shnum; Index++) {\r
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {\r
return Shdr;\r
}\r
+\r
Shdr = ELF_NEXT_ENTRY (Elf64_Shdr, Shdr, Ehdr->e_shentsize);\r
}\r
+\r
return NULL;\r
}\r
\r
**/\r
EFI_STATUS\r
ProcessRelocation64 (\r
- IN Elf64_Rela *Rela,\r
- IN UINT64 RelaSize,\r
- IN UINT64 RelaEntrySize,\r
- IN UINT64 RelaType,\r
- IN INTN Delta,\r
- IN BOOLEAN DynamicLinking\r
+ IN Elf64_Rela *Rela,\r
+ IN UINT64 RelaSize,\r
+ IN UINT64 RelaEntrySize,\r
+ IN UINT64 RelaType,\r
+ IN INTN Delta,\r
+ IN BOOLEAN DynamicLinking\r
)\r
{\r
- UINTN Index;\r
- UINT64 *Ptr;\r
- UINT32 Type;\r
+ UINTN Index;\r
+ UINT64 *Ptr;\r
+ UINT32 Type;\r
\r
for ( Index = 0\r
- ; MultU64x64 (RelaEntrySize, Index) < RelaSize\r
- ; Index++, Rela = ELF_NEXT_ENTRY (Elf64_Rela, Rela, RelaEntrySize)\r
- ) {\r
+ ; MultU64x64 (RelaEntrySize, Index) < RelaSize\r
+ ; Index++, Rela = ELF_NEXT_ENTRY (Elf64_Rela, Rela, RelaEntrySize)\r
+ )\r
+ {\r
//\r
// r_offset is the virtual address of the storage unit affected by the relocation.\r
//\r
- Ptr = (UINT64 *)(UINTN)(Rela->r_offset + Delta);\r
- Type = ELF64_R_TYPE(Rela->r_info);\r
+ Ptr = (UINT64 *)(UINTN)(Rela->r_offset + Delta);\r
+ Type = ELF64_R_TYPE (Rela->r_info);\r
switch (Type) {\r
case R_X86_64_NONE:\r
case R_X86_64_PC32:\r
} else {\r
*Ptr += Delta;\r
}\r
+\r
break;\r
\r
case R_X86_64_32:\r
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));\r
ASSERT (FALSE);\r
}\r
+\r
break;\r
\r
default:\r
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));\r
}\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
RelocateElf64Dynamic (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- UINT32 Index;\r
- Elf64_Phdr *Phdr;\r
- Elf64_Shdr *DynShdr;\r
- Elf64_Shdr *RelShdr;\r
- Elf64_Dyn *Dyn;\r
- UINT64 RelaAddress;\r
- UINT64 RelaCount;\r
- UINT64 RelaSize;\r
- UINT64 RelaEntrySize;\r
- UINT64 RelaType;\r
+ UINT32 Index;\r
+ Elf64_Phdr *Phdr;\r
+ Elf64_Shdr *DynShdr;\r
+ Elf64_Shdr *RelShdr;\r
+ Elf64_Dyn *Dyn;\r
+ UINT64 RelaAddress;\r
+ UINT64 RelaCount;\r
+ UINT64 RelaSize;\r
+ UINT64 RelaEntrySize;\r
+ UINT64 RelaType;\r
\r
//\r
// 1. Locate the dynamic section.\r
if (DynShdr == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
+\r
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);\r
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));\r
\r
//\r
// 2. Locate the relocation section from the dynamic section.\r
//\r
- RelaAddress = MAX_UINT64;\r
+ RelaAddress = MAX_UINT64;\r
RelaSize = 0;\r
RelaCount = 0;\r
RelaEntrySize = 0;\r
RelaType = 0;\r
- for ( Index = 0, Dyn = (Elf64_Dyn *) (ElfCt->FileBase + DynShdr->sh_offset)\r
- ; Index < DivU64x64Remainder (DynShdr->sh_size, DynShdr->sh_entsize, NULL)\r
- ; Index++, Dyn = ELF_NEXT_ENTRY (Elf64_Dyn, Dyn, DynShdr->sh_entsize)\r
- ) {\r
+ for ( Index = 0, Dyn = (Elf64_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)\r
+ ; Index < DivU64x64Remainder (DynShdr->sh_size, DynShdr->sh_entsize, NULL)\r
+ ; Index++, Dyn = ELF_NEXT_ENTRY (Elf64_Dyn, Dyn, DynShdr->sh_entsize)\r
+ )\r
+ {\r
switch (Dyn->d_tag) {\r
case DT_RELA:\r
case DT_REL:\r
// For consistency, files do not contain relocation entries to ``correct'' addresses in the dynamic structure.\r
//\r
RelaAddress = Dyn->d_un.d_ptr;\r
- RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA: SHT_REL;\r
+ RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA : SHT_REL;\r
break;\r
case DT_RELACOUNT:\r
case DT_RELCOUNT:\r
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {\r
break;\r
}\r
+\r
RelShdr = NULL;\r
}\r
\r
if (RelShdr == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
+\r
ASSERT (RelShdr->sh_type == RelaType);\r
ASSERT (RelShdr->sh_entsize == RelaEntrySize);\r
\r
// 3. Process the relocation section.\r
//\r
ProcessRelocation64 (\r
- (Elf64_Rela *) (ElfCt->FileBase + RelShdr->sh_offset),\r
- RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,\r
- (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress,\r
+ (Elf64_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),\r
+ RelShdr->sh_size,\r
+ RelShdr->sh_entsize,\r
+ RelShdr->sh_type,\r
+ (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,\r
TRUE\r
);\r
return EFI_SUCCESS;\r
**/\r
EFI_STATUS\r
RelocateElf64Sections (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- EFI_STATUS Status;\r
- Elf64_Ehdr *Ehdr;\r
- Elf64_Shdr *RelShdr;\r
- Elf64_Shdr *Shdr;\r
- UINT32 Index;\r
- UINTN Delta;\r
-\r
- Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;\r
+ EFI_STATUS Status;\r
+ Elf64_Ehdr *Ehdr;\r
+ Elf64_Shdr *RelShdr;\r
+ Elf64_Shdr *Shdr;\r
+ UINT32 Index;\r
+ UINTN Delta;\r
+\r
+ Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;\r
if (Ehdr->e_machine != EM_X86_64) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
- Delta = (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress;\r
+ Delta = (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress;\r
ElfCt->EntryPoint = (UINTN)(Ehdr->e_entry + Delta);\r
\r
//\r
// The below relocation is needed in this case.\r
//\r
DEBUG ((DEBUG_INFO, "EXEC ELF: Fix actual/preferred base address delta ...\n"));\r
- for ( Index = 0, RelShdr = (Elf64_Shdr *) (ElfCt->FileBase + Ehdr->e_shoff)\r
- ; Index < Ehdr->e_shnum\r
- ; Index++, RelShdr = ELF_NEXT_ENTRY (Elf64_Shdr, RelShdr, Ehdr->e_shentsize)\r
- ) {\r
+ for ( Index = 0, RelShdr = (Elf64_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)\r
+ ; Index < Ehdr->e_shnum\r
+ ; Index++, RelShdr = ELF_NEXT_ENTRY (Elf64_Shdr, RelShdr, Ehdr->e_shentsize)\r
+ )\r
+ {\r
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {\r
continue;\r
}\r
+\r
Shdr = GetElf64SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);\r
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {\r
//\r
// Only fix up sections that occupy memory during process execution.\r
//\r
ProcessRelocation64 (\r
- (Elf64_Rela *)((UINT8*)Ehdr + RelShdr->sh_offset),\r
- RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,\r
- Delta, FALSE\r
+ (Elf64_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),\r
+ RelShdr->sh_size,\r
+ RelShdr->sh_entsize,\r
+ RelShdr->sh_type,\r
+ Delta,\r
+ FALSE\r
);\r
}\r
}\r
**/\r
EFI_STATUS\r
LoadElf64Image (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- Elf64_Ehdr *Ehdr;\r
- Elf64_Phdr *Phdr;\r
- UINT16 Index;\r
- UINTN Delta;\r
+ Elf64_Ehdr *Ehdr;\r
+ Elf64_Phdr *Phdr;\r
+ UINT16 Index;\r
+ UINTN Delta;\r
\r
ASSERT (ElfCt != NULL);\r
\r
Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;\r
\r
for ( Index = 0, Phdr = (Elf64_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)\r
- ; Index < Ehdr->e_phnum\r
- ; Index++, Phdr = ELF_NEXT_ENTRY (Elf64_Phdr, Phdr, Ehdr->e_phentsize)\r
- ) {\r
+ ; Index < Ehdr->e_phnum\r
+ ; Index++, Phdr = ELF_NEXT_ENTRY (Elf64_Phdr, Phdr, Ehdr->e_phentsize)\r
+ )\r
+ {\r
//\r
// Skip segments that don't require load (type tells, or size is 0)\r
//\r
if ((Phdr->p_type != PT_LOAD) ||\r
- (Phdr->p_memsz == 0)) {\r
+ (Phdr->p_memsz == 0))\r
+ {\r
continue;\r
}\r
\r
// The memory offset of segment relative to the image base\r
// Note: CopyMem() does nothing when the dst equals to src.\r
//\r
- Delta = (UINTN) Phdr->p_paddr - (UINTN) ElfCt->PreferredImageAddress;\r
- CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + (UINTN) Phdr->p_offset, (UINTN) Phdr->p_filesz);\r
- ZeroMem (ElfCt->ImageAddress + Delta + (UINTN) Phdr->p_filesz, (UINTN) (Phdr->p_memsz - Phdr->p_filesz));\r
+ Delta = (UINTN)Phdr->p_paddr - (UINTN)ElfCt->PreferredImageAddress;\r
+ CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + (UINTN)Phdr->p_offset, (UINTN)Phdr->p_filesz);\r
+ ZeroMem (ElfCt->ImageAddress + Delta + (UINTN)Phdr->p_filesz, (UINTN)(Phdr->p_memsz - Phdr->p_filesz));\r
}\r
\r
//\r
*/\r
\r
#ifndef _SYS_ELF_COMMON_H_\r
-#define _SYS_ELF_COMMON_H_ 1\r
+#define _SYS_ELF_COMMON_H_ 1\r
\r
/*\r
* ELF definitions that are independent of architecture or word size.\r
*/\r
\r
typedef struct {\r
- UINT32 n_namesz; /* Length of name. */\r
- UINT32 n_descsz; /* Length of descriptor. */\r
- UINT32 n_type; /* Type of this note. */\r
+ UINT32 n_namesz; /* Length of name. */\r
+ UINT32 n_descsz; /* Length of descriptor. */\r
+ UINT32 n_type; /* Type of this note. */\r
} Elf_Note;\r
\r
/* Indexes into the e_ident array. Keep synced with\r
http://www.sco.com/developers/gabi/latest/ch4.eheader.html */\r
-#define EI_MAG0 0 /* Magic number, byte 0. */\r
-#define EI_MAG1 1 /* Magic number, byte 1. */\r
-#define EI_MAG2 2 /* Magic number, byte 2. */\r
-#define EI_MAG3 3 /* Magic number, byte 3. */\r
-#define EI_CLASS 4 /* Class of machine. */\r
-#define EI_DATA 5 /* Data format. */\r
-#define EI_VERSION 6 /* ELF format version. */\r
-#define EI_OSABI 7 /* Operating system / ABI identification */\r
+#define EI_MAG0 0 /* Magic number, byte 0. */\r
+#define EI_MAG1 1 /* Magic number, byte 1. */\r
+#define EI_MAG2 2 /* Magic number, byte 2. */\r
+#define EI_MAG3 3 /* Magic number, byte 3. */\r
+#define EI_CLASS 4 /* Class of machine. */\r
+#define EI_DATA 5 /* Data format. */\r
+#define EI_VERSION 6 /* ELF format version. */\r
+#define EI_OSABI 7 /* Operating system / ABI identification */\r
#define EI_ABIVERSION 8 /* ABI version */\r
-#define OLD_EI_BRAND 8 /* Start of architecture identification. */\r
-#define EI_PAD 9 /* Start of padding (per SVR4 ABI). */\r
-#define EI_NIDENT 16 /* Size of e_ident array. */\r
+#define OLD_EI_BRAND 8 /* Start of architecture identification. */\r
+#define EI_PAD 9 /* Start of padding (per SVR4 ABI). */\r
+#define EI_NIDENT 16 /* Size of e_ident array. */\r
\r
/* Values for the magic number bytes. */\r
-#define ELFMAG0 0x7f\r
-#define ELFMAG1 'E'\r
-#define ELFMAG2 'L'\r
-#define ELFMAG3 'F'\r
-#define ELFMAG "\177ELF" /* magic string */\r
-#define SELFMAG 4 /* magic string size */\r
+#define ELFMAG0 0x7f\r
+#define ELFMAG1 'E'\r
+#define ELFMAG2 'L'\r
+#define ELFMAG3 'F'\r
+#define ELFMAG "\177ELF" /* magic string */\r
+#define SELFMAG 4 /* magic string size */\r
\r
/* Values for e_ident[EI_VERSION] and e_version. */\r
-#define EV_NONE 0\r
+#define EV_NONE 0\r
#define EV_CURRENT 1\r
\r
/* Values for e_ident[EI_CLASS]. */\r
-#define ELFCLASSNONE 0 /* Unknown class. */\r
-#define ELFCLASS32 1 /* 32-bit architecture. */\r
-#define ELFCLASS64 2 /* 64-bit architecture. */\r
+#define ELFCLASSNONE 0 /* Unknown class. */\r
+#define ELFCLASS32 1 /* 32-bit architecture. */\r
+#define ELFCLASS64 2 /* 64-bit architecture. */\r
\r
/* Values for e_ident[EI_DATA]. */\r
#define ELFDATANONE 0 /* Unknown data format. */\r
#define ELFDATA2MSB 2 /* 2's complement big-endian. */\r
\r
/* Values for e_ident[EI_OSABI]. */\r
-#define ELFOSABI_NONE 0 /* UNIX System V ABI */\r
-#define ELFOSABI_HPUX 1 /* HP-UX operating system */\r
-#define ELFOSABI_NETBSD 2 /* NetBSD */\r
-#define ELFOSABI_LINUX 3 /* GNU/Linux */\r
-#define ELFOSABI_HURD 4 /* GNU/Hurd */\r
-#define ELFOSABI_86OPEN 5 /* 86Open common IA32 ABI */\r
-#define ELFOSABI_SOLARIS 6 /* Solaris */\r
-#define ELFOSABI_AIX 7 /* AIX */\r
-#define ELFOSABI_IRIX 8 /* IRIX */\r
-#define ELFOSABI_FREEBSD 9 /* FreeBSD */\r
-#define ELFOSABI_TRU64 10 /* TRU64 UNIX */\r
-#define ELFOSABI_MODESTO 11 /* Novell Modesto */\r
-#define ELFOSABI_OPENBSD 12 /* OpenBSD */\r
-#define ELFOSABI_OPENVMS 13 /* Open VMS */\r
-#define ELFOSABI_NSK 14 /* HP Non-Stop Kernel */\r
-#define ELFOSABI_ARM 97 /* ARM */\r
-#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */\r
-\r
-#define ELFOSABI_SYSV ELFOSABI_NONE /* symbol used in old spec */\r
+#define ELFOSABI_NONE 0 /* UNIX System V ABI */\r
+#define ELFOSABI_HPUX 1 /* HP-UX operating system */\r
+#define ELFOSABI_NETBSD 2 /* NetBSD */\r
+#define ELFOSABI_LINUX 3 /* GNU/Linux */\r
+#define ELFOSABI_HURD 4 /* GNU/Hurd */\r
+#define ELFOSABI_86OPEN 5 /* 86Open common IA32 ABI */\r
+#define ELFOSABI_SOLARIS 6 /* Solaris */\r
+#define ELFOSABI_AIX 7 /* AIX */\r
+#define ELFOSABI_IRIX 8 /* IRIX */\r
+#define ELFOSABI_FREEBSD 9 /* FreeBSD */\r
+#define ELFOSABI_TRU64 10 /* TRU64 UNIX */\r
+#define ELFOSABI_MODESTO 11 /* Novell Modesto */\r
+#define ELFOSABI_OPENBSD 12 /* OpenBSD */\r
+#define ELFOSABI_OPENVMS 13 /* Open VMS */\r
+#define ELFOSABI_NSK 14 /* HP Non-Stop Kernel */\r
+#define ELFOSABI_ARM 97 /* ARM */\r
+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */\r
+\r
+#define ELFOSABI_SYSV ELFOSABI_NONE /* symbol used in old spec */\r
#define ELFOSABI_MONTEREY ELFOSABI_AIX /* Monterey */\r
\r
/* e_ident */\r
(ehdr).e_ident[EI_MAG3] == ELFMAG3)\r
\r
/* Values for e_type. */\r
-#define ET_NONE 0 /* Unknown type. */\r
-#define ET_REL 1 /* Relocatable. */\r
-#define ET_EXEC 2 /* Executable. */\r
-#define ET_DYN 3 /* Shared object. */\r
-#define ET_CORE 4 /* Core file. */\r
-#define ET_LOOS 0xfe00 /* First operating system specific. */\r
-#define ET_HIOS 0xfeff /* Last operating system-specific. */\r
-#define ET_LOPROC 0xff00 /* First processor-specific. */\r
-#define ET_HIPROC 0xffff /* Last processor-specific. */\r
+#define ET_NONE 0 /* Unknown type. */\r
+#define ET_REL 1 /* Relocatable. */\r
+#define ET_EXEC 2 /* Executable. */\r
+#define ET_DYN 3 /* Shared object. */\r
+#define ET_CORE 4 /* Core file. */\r
+#define ET_LOOS 0xfe00 /* First operating system specific. */\r
+#define ET_HIOS 0xfeff /* Last operating system-specific. */\r
+#define ET_LOPROC 0xff00 /* First processor-specific. */\r
+#define ET_HIPROC 0xffff /* Last processor-specific. */\r
\r
/* Values for e_machine. */\r
-#define EM_NONE 0 /* Unknown machine. */\r
-#define EM_M32 1 /* AT&T WE32100. */\r
-#define EM_SPARC 2 /* Sun SPARC. */\r
-#define EM_386 3 /* Intel i386. */\r
-#define EM_68K 4 /* Motorola 68000. */\r
-#define EM_88K 5 /* Motorola 88000. */\r
-#define EM_860 7 /* Intel i860. */\r
-#define EM_MIPS 8 /* MIPS R3000 Big-Endian only. */\r
-#define EM_S370 9 /* IBM System/370. */\r
-#define EM_MIPS_RS3_LE 10 /* MIPS R3000 Little-Endian. */\r
-#define EM_PARISC 15 /* HP PA-RISC. */\r
-#define EM_VPP500 17 /* Fujitsu VPP500. */\r
-#define EM_SPARC32PLUS 18 /* SPARC v8plus. */\r
-#define EM_960 19 /* Intel 80960. */\r
-#define EM_PPC 20 /* PowerPC 32-bit. */\r
-#define EM_PPC64 21 /* PowerPC 64-bit. */\r
-#define EM_S390 22 /* IBM System/390. */\r
-#define EM_V800 36 /* NEC V800. */\r
-#define EM_FR20 37 /* Fujitsu FR20. */\r
-#define EM_RH32 38 /* TRW RH-32. */\r
-#define EM_RCE 39 /* Motorola RCE. */\r
-#define EM_ARM 40 /* ARM. */\r
-#define EM_SH 42 /* Hitachi SH. */\r
-#define EM_SPARCV9 43 /* SPARC v9 64-bit. */\r
-#define EM_TRICORE 44 /* Siemens TriCore embedded processor. */\r
-#define EM_ARC 45 /* Argonaut RISC Core. */\r
-#define EM_H8_300 46 /* Hitachi H8/300. */\r
-#define EM_H8_300H 47 /* Hitachi H8/300H. */\r
-#define EM_H8S 48 /* Hitachi H8S. */\r
-#define EM_H8_500 49 /* Hitachi H8/500. */\r
-#define EM_MIPS_X 51 /* Stanford MIPS-X. */\r
-#define EM_COLDFIRE 52 /* Motorola ColdFire. */\r
-#define EM_68HC12 53 /* Motorola M68HC12. */\r
-#define EM_MMA 54 /* Fujitsu MMA. */\r
-#define EM_PCP 55 /* Siemens PCP. */\r
-#define EM_NCPU 56 /* Sony nCPU. */\r
-#define EM_NDR1 57 /* Denso NDR1 microprocessor. */\r
-#define EM_STARCORE 58 /* Motorola Star*Core processor. */\r
-#define EM_ME16 59 /* Toyota ME16 processor. */\r
-#define EM_ST100 60 /* STMicroelectronics ST100 processor. */\r
-#define EM_TINYJ 61 /* Advanced Logic Corp. TinyJ processor. */\r
-#define EM_X86_64 62 /* Advanced Micro Devices x86-64 */\r
-#define EM_AMD64 EM_X86_64 /* Advanced Micro Devices x86-64 (compat) */\r
-#define EM_AARCH64 183 /* ARM 64bit Architecture */\r
+#define EM_NONE 0 /* Unknown machine. */\r
+#define EM_M32 1 /* AT&T WE32100. */\r
+#define EM_SPARC 2 /* Sun SPARC. */\r
+#define EM_386 3 /* Intel i386. */\r
+#define EM_68K 4 /* Motorola 68000. */\r
+#define EM_88K 5 /* Motorola 88000. */\r
+#define EM_860 7 /* Intel i860. */\r
+#define EM_MIPS 8 /* MIPS R3000 Big-Endian only. */\r
+#define EM_S370 9 /* IBM System/370. */\r
+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 Little-Endian. */\r
+#define EM_PARISC 15 /* HP PA-RISC. */\r
+#define EM_VPP500 17 /* Fujitsu VPP500. */\r
+#define EM_SPARC32PLUS 18 /* SPARC v8plus. */\r
+#define EM_960 19 /* Intel 80960. */\r
+#define EM_PPC 20 /* PowerPC 32-bit. */\r
+#define EM_PPC64 21 /* PowerPC 64-bit. */\r
+#define EM_S390 22 /* IBM System/390. */\r
+#define EM_V800 36 /* NEC V800. */\r
+#define EM_FR20 37 /* Fujitsu FR20. */\r
+#define EM_RH32 38 /* TRW RH-32. */\r
+#define EM_RCE 39 /* Motorola RCE. */\r
+#define EM_ARM 40 /* ARM. */\r
+#define EM_SH 42 /* Hitachi SH. */\r
+#define EM_SPARCV9 43 /* SPARC v9 64-bit. */\r
+#define EM_TRICORE 44 /* Siemens TriCore embedded processor. */\r
+#define EM_ARC 45 /* Argonaut RISC Core. */\r
+#define EM_H8_300 46 /* Hitachi H8/300. */\r
+#define EM_H8_300H 47 /* Hitachi H8/300H. */\r
+#define EM_H8S 48 /* Hitachi H8S. */\r
+#define EM_H8_500 49 /* Hitachi H8/500. */\r
+#define EM_MIPS_X 51 /* Stanford MIPS-X. */\r
+#define EM_COLDFIRE 52 /* Motorola ColdFire. */\r
+#define EM_68HC12 53 /* Motorola M68HC12. */\r
+#define EM_MMA 54 /* Fujitsu MMA. */\r
+#define EM_PCP 55 /* Siemens PCP. */\r
+#define EM_NCPU 56 /* Sony nCPU. */\r
+#define EM_NDR1 57 /* Denso NDR1 microprocessor. */\r
+#define EM_STARCORE 58 /* Motorola Star*Core processor. */\r
+#define EM_ME16 59 /* Toyota ME16 processor. */\r
+#define EM_ST100 60 /* STMicroelectronics ST100 processor. */\r
+#define EM_TINYJ 61 /* Advanced Logic Corp. TinyJ processor. */\r
+#define EM_X86_64 62 /* Advanced Micro Devices x86-64 */\r
+#define EM_AMD64 EM_X86_64 /* Advanced Micro Devices x86-64 (compat) */\r
+#define EM_AARCH64 183 /* ARM 64bit Architecture */\r
\r
/* Non-standard or deprecated. */\r
-#define EM_486 6 /* Intel i486. */\r
-#define EM_MIPS_RS4_BE 10 /* MIPS R4000 Big-Endian */\r
-#define EM_ALPHA_STD 41 /* Digital Alpha (standard value). */\r
-#define EM_ALPHA 0x9026 /* Alpha (written in the absence of an ABI) */\r
+#define EM_486 6 /* Intel i486. */\r
+#define EM_MIPS_RS4_BE 10 /* MIPS R4000 Big-Endian */\r
+#define EM_ALPHA_STD 41 /* Digital Alpha (standard value). */\r
+#define EM_ALPHA 0x9026 /* Alpha (written in the absence of an ABI) */\r
\r
/* Special section indexes. */\r
-#define SHN_UNDEF 0 /* Undefined, missing, irrelevant. */\r
-#define SHN_LORESERVE 0xff00 /* First of reserved range. */\r
-#define SHN_LOPROC 0xff00 /* First processor-specific. */\r
-#define SHN_HIPROC 0xff1f /* Last processor-specific. */\r
-#define SHN_LOOS 0xff20 /* First operating system-specific. */\r
-#define SHN_HIOS 0xff3f /* Last operating system-specific. */\r
-#define SHN_ABS 0xfff1 /* Absolute values. */\r
-#define SHN_COMMON 0xfff2 /* Common data. */\r
-#define SHN_XINDEX 0xffff /* Escape -- index stored elsewhere. */\r
-#define SHN_HIRESERVE 0xffff /* Last of reserved range. */\r
+#define SHN_UNDEF 0 /* Undefined, missing, irrelevant. */\r
+#define SHN_LORESERVE 0xff00 /* First of reserved range. */\r
+#define SHN_LOPROC 0xff00 /* First processor-specific. */\r
+#define SHN_HIPROC 0xff1f /* Last processor-specific. */\r
+#define SHN_LOOS 0xff20 /* First operating system-specific. */\r
+#define SHN_HIOS 0xff3f /* Last operating system-specific. */\r
+#define SHN_ABS 0xfff1 /* Absolute values. */\r
+#define SHN_COMMON 0xfff2 /* Common data. */\r
+#define SHN_XINDEX 0xffff /* Escape -- index stored elsewhere. */\r
+#define SHN_HIRESERVE 0xffff /* Last of reserved range. */\r
\r
/* sh_type */\r
-#define SHT_NULL 0 /* inactive */\r
-#define SHT_PROGBITS 1 /* program defined information */\r
-#define SHT_SYMTAB 2 /* symbol table section */\r
-#define SHT_STRTAB 3 /* string table section */\r
-#define SHT_RELA 4 /* relocation section with addends */\r
-#define SHT_HASH 5 /* symbol hash table section */\r
-#define SHT_DYNAMIC 6 /* dynamic section */\r
-#define SHT_NOTE 7 /* note section */\r
-#define SHT_NOBITS 8 /* no space section */\r
-#define SHT_REL 9 /* relocation section - no addends */\r
-#define SHT_SHLIB 10 /* reserved - purpose unknown */\r
-#define SHT_DYNSYM 11 /* dynamic symbol table section */\r
-#define SHT_INIT_ARRAY 14 /* Initialization function pointers. */\r
-#define SHT_FINI_ARRAY 15 /* Termination function pointers. */\r
-#define SHT_PREINIT_ARRAY 16 /* Pre-initialization function ptrs. */\r
-#define SHT_GROUP 17 /* Section group. */\r
-#define SHT_SYMTAB_SHNDX 18 /* Section indexes (see SHN_XINDEX). */\r
-#define SHT_LOOS 0x60000000 /* First of OS specific semantics */\r
-#define SHT_LOSUNW 0x6ffffff4\r
-#define SHT_SUNW_dof 0x6ffffff4\r
-#define SHT_SUNW_cap 0x6ffffff5\r
+#define SHT_NULL 0 /* inactive */\r
+#define SHT_PROGBITS 1 /* program defined information */\r
+#define SHT_SYMTAB 2 /* symbol table section */\r
+#define SHT_STRTAB 3 /* string table section */\r
+#define SHT_RELA 4 /* relocation section with addends */\r
+#define SHT_HASH 5 /* symbol hash table section */\r
+#define SHT_DYNAMIC 6 /* dynamic section */\r
+#define SHT_NOTE 7 /* note section */\r
+#define SHT_NOBITS 8 /* no space section */\r
+#define SHT_REL 9 /* relocation section - no addends */\r
+#define SHT_SHLIB 10 /* reserved - purpose unknown */\r
+#define SHT_DYNSYM 11 /* dynamic symbol table section */\r
+#define SHT_INIT_ARRAY 14 /* Initialization function pointers. */\r
+#define SHT_FINI_ARRAY 15 /* Termination function pointers. */\r
+#define SHT_PREINIT_ARRAY 16 /* Pre-initialization function ptrs. */\r
+#define SHT_GROUP 17 /* Section group. */\r
+#define SHT_SYMTAB_SHNDX 18 /* Section indexes (see SHN_XINDEX). */\r
+#define SHT_LOOS 0x60000000 /* First of OS specific semantics */\r
+#define SHT_LOSUNW 0x6ffffff4\r
+#define SHT_SUNW_dof 0x6ffffff4\r
+#define SHT_SUNW_cap 0x6ffffff5\r
#define SHT_SUNW_SIGNATURE 0x6ffffff6\r
-#define SHT_SUNW_ANNOTATE 0x6ffffff7\r
-#define SHT_SUNW_DEBUGSTR 0x6ffffff8\r
-#define SHT_SUNW_DEBUG 0x6ffffff9\r
-#define SHT_SUNW_move 0x6ffffffa\r
-#define SHT_SUNW_COMDAT 0x6ffffffb\r
-#define SHT_SUNW_syminfo 0x6ffffffc\r
-#define SHT_SUNW_verdef 0x6ffffffd\r
-#define SHT_GNU_verdef 0x6ffffffd /* Symbol versions provided */\r
-#define SHT_SUNW_verneed 0x6ffffffe\r
-#define SHT_GNU_verneed 0x6ffffffe /* Symbol versions required */\r
-#define SHT_SUNW_versym 0x6fffffff\r
-#define SHT_GNU_versym 0x6fffffff /* Symbol version table */\r
-#define SHT_HISUNW 0x6fffffff\r
-#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */\r
-#define SHT_LOPROC 0x70000000 /* reserved range for processor */\r
-#define SHT_AMD64_UNWIND 0x70000001 /* unwind information */\r
-#define SHT_HIPROC 0x7fffffff /* specific section header types */\r
-#define SHT_LOUSER 0x80000000 /* reserved range for application */\r
-#define SHT_HIUSER 0xffffffff /* specific indexes */\r
+#define SHT_SUNW_ANNOTATE 0x6ffffff7\r
+#define SHT_SUNW_DEBUGSTR 0x6ffffff8\r
+#define SHT_SUNW_DEBUG 0x6ffffff9\r
+#define SHT_SUNW_move 0x6ffffffa\r
+#define SHT_SUNW_COMDAT 0x6ffffffb\r
+#define SHT_SUNW_syminfo 0x6ffffffc\r
+#define SHT_SUNW_verdef 0x6ffffffd\r
+#define SHT_GNU_verdef 0x6ffffffd/* Symbol versions provided */\r
+#define SHT_SUNW_verneed 0x6ffffffe\r
+#define SHT_GNU_verneed 0x6ffffffe /* Symbol versions required */\r
+#define SHT_SUNW_versym 0x6fffffff\r
+#define SHT_GNU_versym 0x6fffffff/* Symbol version table */\r
+#define SHT_HISUNW 0x6fffffff\r
+#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */\r
+#define SHT_LOPROC 0x70000000 /* reserved range for processor */\r
+#define SHT_AMD64_UNWIND 0x70000001 /* unwind information */\r
+#define SHT_HIPROC 0x7fffffff /* specific section header types */\r
+#define SHT_LOUSER 0x80000000 /* reserved range for application */\r
+#define SHT_HIUSER 0xffffffff /* specific indexes */\r
\r
/* Flags for sh_flags. */\r
-#define SHF_WRITE 0x1 /* Section contains writable data. */\r
-#define SHF_ALLOC 0x2 /* Section occupies memory. */\r
-#define SHF_EXECINSTR 0x4 /* Section contains instructions. */\r
-#define SHF_MERGE 0x10 /* Section may be merged. */\r
-#define SHF_STRINGS 0x20 /* Section contains strings. */\r
-#define SHF_INFO_LINK 0x40 /* sh_info holds section index. */\r
-#define SHF_LINK_ORDER 0x80 /* Special ordering requirements. */\r
-#define SHF_OS_NONCONFORMING 0x100 /* OS-specific processing required. */\r
-#define SHF_GROUP 0x200 /* Member of section group. */\r
-#define SHF_TLS 0x400 /* Section contains TLS data. */\r
-#define SHF_MASKOS 0x0ff00000 /* OS-specific semantics. */\r
-#define SHF_MASKPROC 0xf0000000 /* Processor-specific semantics. */\r
+#define SHF_WRITE 0x1 /* Section contains writable data. */\r
+#define SHF_ALLOC 0x2 /* Section occupies memory. */\r
+#define SHF_EXECINSTR 0x4 /* Section contains instructions. */\r
+#define SHF_MERGE 0x10 /* Section may be merged. */\r
+#define SHF_STRINGS 0x20 /* Section contains strings. */\r
+#define SHF_INFO_LINK 0x40 /* sh_info holds section index. */\r
+#define SHF_LINK_ORDER 0x80 /* Special ordering requirements. */\r
+#define SHF_OS_NONCONFORMING 0x100 /* OS-specific processing required. */\r
+#define SHF_GROUP 0x200 /* Member of section group. */\r
+#define SHF_TLS 0x400 /* Section contains TLS data. */\r
+#define SHF_MASKOS 0x0ff00000 /* OS-specific semantics. */\r
+#define SHF_MASKPROC 0xf0000000 /* Processor-specific semantics. */\r
\r
/* Values for p_type. */\r
-#define PT_NULL 0 /* Unused entry. */\r
-#define PT_LOAD 1 /* Loadable segment. */\r
-#define PT_DYNAMIC 2 /* Dynamic linking information segment. */\r
-#define PT_INTERP 3 /* Pathname of interpreter. */\r
-#define PT_NOTE 4 /* Auxiliary information. */\r
-#define PT_SHLIB 5 /* Reserved (not used). */\r
-#define PT_PHDR 6 /* Location of program header itself. */\r
-#define PT_TLS 7 /* Thread local storage segment */\r
-#define PT_LOOS 0x60000000 /* First OS-specific. */\r
-#define PT_SUNW_UNWIND 0x6464e550 /* amd64 UNWIND program header */\r
+#define PT_NULL 0 /* Unused entry. */\r
+#define PT_LOAD 1 /* Loadable segment. */\r
+#define PT_DYNAMIC 2 /* Dynamic linking information segment. */\r
+#define PT_INTERP 3 /* Pathname of interpreter. */\r
+#define PT_NOTE 4 /* Auxiliary information. */\r
+#define PT_SHLIB 5 /* Reserved (not used). */\r
+#define PT_PHDR 6 /* Location of program header itself. */\r
+#define PT_TLS 7 /* Thread local storage segment */\r
+#define PT_LOOS 0x60000000 /* First OS-specific. */\r
+#define PT_SUNW_UNWIND 0x6464e550 /* amd64 UNWIND program header */\r
#define PT_GNU_EH_FRAME 0x6474e550\r
-#define PT_LOSUNW 0x6ffffffa\r
-#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */\r
-#define PT_SUNWSTACK 0x6ffffffb /* describes the stack segment */\r
-#define PT_SUNWDTRACE 0x6ffffffc /* private */\r
-#define PT_SUNWCAP 0x6ffffffd /* hard/soft capabilities segment */\r
-#define PT_HISUNW 0x6fffffff\r
-#define PT_HIOS 0x6fffffff /* Last OS-specific. */\r
-#define PT_LOPROC 0x70000000 /* First processor-specific type. */\r
-#define PT_HIPROC 0x7fffffff /* Last processor-specific type. */\r
+#define PT_LOSUNW 0x6ffffffa\r
+#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */\r
+#define PT_SUNWSTACK 0x6ffffffb /* describes the stack segment */\r
+#define PT_SUNWDTRACE 0x6ffffffc /* private */\r
+#define PT_SUNWCAP 0x6ffffffd /* hard/soft capabilities segment */\r
+#define PT_HISUNW 0x6fffffff\r
+#define PT_HIOS 0x6fffffff /* Last OS-specific. */\r
+#define PT_LOPROC 0x70000000 /* First processor-specific type. */\r
+#define PT_HIPROC 0x7fffffff /* Last processor-specific type. */\r
\r
/* Values for p_flags. */\r
-#define PF_X 0x1 /* Executable. */\r
-#define PF_W 0x2 /* Writable. */\r
-#define PF_R 0x4 /* Readable. */\r
-#define PF_MASKOS 0x0ff00000 /* Operating system-specific. */\r
-#define PF_MASKPROC 0xf0000000 /* Processor-specific. */\r
+#define PF_X 0x1 /* Executable. */\r
+#define PF_W 0x2 /* Writable. */\r
+#define PF_R 0x4 /* Readable. */\r
+#define PF_MASKOS 0x0ff00000 /* Operating system-specific. */\r
+#define PF_MASKPROC 0xf0000000 /* Processor-specific. */\r
\r
/* Extended program header index. */\r
-#define PN_XNUM 0xffff\r
+#define PN_XNUM 0xffff\r
\r
/* Values for d_tag. */\r
-#define DT_NULL 0 /* Terminating entry. */\r
-#define DT_NEEDED 1 /* String table offset of a needed shared\r
+#define DT_NULL 0 /* Terminating entry. */\r
+#define DT_NEEDED 1 /* String table offset of a needed shared\r
library. */\r
-#define DT_PLTRELSZ 2 /* Total size in bytes of PLT relocations. */\r
-#define DT_PLTGOT 3 /* Processor-dependent address. */\r
-#define DT_HASH 4 /* Address of symbol hash table. */\r
-#define DT_STRTAB 5 /* Address of string table. */\r
-#define DT_SYMTAB 6 /* Address of symbol table. */\r
-#define DT_RELA 7 /* Address of ElfNN_Rela relocations. */\r
-#define DT_RELASZ 8 /* Total size of ElfNN_Rela relocations. */\r
-#define DT_RELAENT 9 /* Size of each ElfNN_Rela relocation entry. */\r
-#define DT_STRSZ 10 /* Size of string table. */\r
-#define DT_SYMENT 11 /* Size of each symbol table entry. */\r
-#define DT_INIT 12 /* Address of initialization function. */\r
-#define DT_FINI 13 /* Address of finalization function. */\r
-#define DT_SONAME 14 /* String table offset of shared object\r
+#define DT_PLTRELSZ 2 /* Total size in bytes of PLT relocations. */\r
+#define DT_PLTGOT 3 /* Processor-dependent address. */\r
+#define DT_HASH 4 /* Address of symbol hash table. */\r
+#define DT_STRTAB 5 /* Address of string table. */\r
+#define DT_SYMTAB 6 /* Address of symbol table. */\r
+#define DT_RELA 7 /* Address of ElfNN_Rela relocations. */\r
+#define DT_RELASZ 8 /* Total size of ElfNN_Rela relocations. */\r
+#define DT_RELAENT 9 /* Size of each ElfNN_Rela relocation entry. */\r
+#define DT_STRSZ 10 /* Size of string table. */\r
+#define DT_SYMENT 11 /* Size of each symbol table entry. */\r
+#define DT_INIT 12 /* Address of initialization function. */\r
+#define DT_FINI 13 /* Address of finalization function. */\r
+#define DT_SONAME 14 /* String table offset of shared object\r
name. */\r
-#define DT_RPATH 15 /* String table offset of library path. [sup] */\r
-#define DT_SYMBOLIC 16 /* Indicates "symbolic" linking. [sup] */\r
-#define DT_REL 17 /* Address of ElfNN_Rel relocations. */\r
-#define DT_RELSZ 18 /* Total size of ElfNN_Rel relocations. */\r
-#define DT_RELENT 19 /* Size of each ElfNN_Rel relocation. */\r
-#define DT_PLTREL 20 /* Type of relocation used for PLT. */\r
-#define DT_DEBUG 21 /* Reserved (not used). */\r
-#define DT_TEXTREL 22 /* Indicates there may be relocations in\r
+#define DT_RPATH 15 /* String table offset of library path. [sup] */\r
+#define DT_SYMBOLIC 16 /* Indicates "symbolic" linking. [sup] */\r
+#define DT_REL 17 /* Address of ElfNN_Rel relocations. */\r
+#define DT_RELSZ 18 /* Total size of ElfNN_Rel relocations. */\r
+#define DT_RELENT 19 /* Size of each ElfNN_Rel relocation. */\r
+#define DT_PLTREL 20 /* Type of relocation used for PLT. */\r
+#define DT_DEBUG 21 /* Reserved (not used). */\r
+#define DT_TEXTREL 22 /* Indicates there may be relocations in\r
non-writable segments. [sup] */\r
-#define DT_JMPREL 23 /* Address of PLT relocations. */\r
-#define DT_BIND_NOW 24 /* [sup] */\r
-#define DT_INIT_ARRAY 25 /* Address of the array of pointers to\r
+#define DT_JMPREL 23 /* Address of PLT relocations. */\r
+#define DT_BIND_NOW 24 /* [sup] */\r
+#define DT_INIT_ARRAY 25 /* Address of the array of pointers to\r
initialization functions */\r
-#define DT_FINI_ARRAY 26 /* Address of the array of pointers to\r
+#define DT_FINI_ARRAY 26 /* Address of the array of pointers to\r
termination functions */\r
-#define DT_INIT_ARRAYSZ 27 /* Size in bytes of the array of\r
+#define DT_INIT_ARRAYSZ 27 /* Size in bytes of the array of\r
initialization functions. */\r
-#define DT_FINI_ARRAYSZ 28 /* Size in bytes of the array of\r
+#define DT_FINI_ARRAYSZ 28 /* Size in bytes of the array of\r
terminationfunctions. */\r
-#define DT_RUNPATH 29 /* String table offset of a null-terminated\r
+#define DT_RUNPATH 29 /* String table offset of a null-terminated\r
library search path string. */\r
-#define DT_FLAGS 30 /* Object specific flag values. */\r
-#define DT_ENCODING 32 /* Values greater than or equal to DT_ENCODING\r
+#define DT_FLAGS 30 /* Object specific flag values. */\r
+#define DT_ENCODING 32 /* Values greater than or equal to DT_ENCODING\r
and less than DT_LOOS follow the rules for\r
the interpretation of the d_un union\r
as follows: even == 'd_ptr', even == 'd_val'\r
or none */\r
-#define DT_PREINIT_ARRAY 32 /* Address of the array of pointers to\r
+#define DT_PREINIT_ARRAY 32 /* Address of the array of pointers to\r
pre-initialization functions. */\r
-#define DT_PREINIT_ARRAYSZ 33 /* Size in bytes of the array of\r
+#define DT_PREINIT_ARRAYSZ 33 /* Size in bytes of the array of\r
pre-initialization functions. */\r
-#define DT_MAXPOSTAGS 34 /* number of positive tags */\r
-#define DT_LOOS 0x6000000d /* First OS-specific */\r
-#define DT_SUNW_AUXILIARY 0x6000000d /* symbol auxiliary name */\r
-#define DT_SUNW_RTLDINF 0x6000000e /* ld.so.1 info (private) */\r
-#define DT_SUNW_FILTER 0x6000000f /* symbol filter name */\r
-#define DT_SUNW_CAP 0x60000010 /* hardware/software */\r
-#define DT_HIOS 0x6ffff000 /* Last OS-specific */\r
+#define DT_MAXPOSTAGS 34 /* number of positive tags */\r
+#define DT_LOOS 0x6000000d /* First OS-specific */\r
+#define DT_SUNW_AUXILIARY 0x6000000d /* symbol auxiliary name */\r
+#define DT_SUNW_RTLDINF 0x6000000e /* ld.so.1 info (private) */\r
+#define DT_SUNW_FILTER 0x6000000f /* symbol filter name */\r
+#define DT_SUNW_CAP 0x60000010 /* hardware/software */\r
+#define DT_HIOS 0x6ffff000 /* Last OS-specific */\r
\r
/*\r
* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the\r
* Dyn.d_un.d_val field of the Elf*_Dyn structure.\r
*/\r
-#define DT_VALRNGLO 0x6ffffd00\r
-#define DT_CHECKSUM 0x6ffffdf8 /* elf checksum */\r
-#define DT_PLTPADSZ 0x6ffffdf9 /* pltpadding size */\r
-#define DT_MOVEENT 0x6ffffdfa /* move table entry size */\r
-#define DT_MOVESZ 0x6ffffdfb /* move table size */\r
-#define DT_FEATURE_1 0x6ffffdfc /* feature holder */\r
-#define DT_POSFLAG_1 0x6ffffdfd /* flags for DT_* entries, effecting */\r
- /* the following DT_* entry. */\r
- /* See DF_P1_* definitions */\r
-#define DT_SYMINSZ 0x6ffffdfe /* syminfo table size (in bytes) */\r
-#define DT_SYMINENT 0x6ffffdff /* syminfo entry size (in bytes) */\r
+#define DT_VALRNGLO 0x6ffffd00\r
+#define DT_CHECKSUM 0x6ffffdf8 /* elf checksum */\r
+#define DT_PLTPADSZ 0x6ffffdf9 /* pltpadding size */\r
+#define DT_MOVEENT 0x6ffffdfa /* move table entry size */\r
+#define DT_MOVESZ 0x6ffffdfb /* move table size */\r
+#define DT_FEATURE_1 0x6ffffdfc /* feature holder */\r
+#define DT_POSFLAG_1 0x6ffffdfd /* flags for DT_* entries, effecting */\r
+/* the following DT_* entry. */\r
+/* See DF_P1_* definitions */\r
+#define DT_SYMINSZ 0x6ffffdfe /* syminfo table size (in bytes) */\r
+#define DT_SYMINENT 0x6ffffdff /* syminfo entry size (in bytes) */\r
#define DT_VALRNGHI 0x6ffffdff\r
\r
/*\r
* built, these entries will need to be adjusted.\r
*/\r
#define DT_ADDRRNGLO 0x6ffffe00\r
-#define DT_CONFIG 0x6ffffefa /* configuration information */\r
-#define DT_DEPAUDIT 0x6ffffefb /* dependency auditing */\r
-#define DT_AUDIT 0x6ffffefc /* object auditing */\r
-#define DT_PLTPAD 0x6ffffefd /* pltpadding (sparcv9) */\r
-#define DT_MOVETAB 0x6ffffefe /* move table */\r
-#define DT_SYMINFO 0x6ffffeff /* syminfo table */\r
+#define DT_CONFIG 0x6ffffefa /* configuration information */\r
+#define DT_DEPAUDIT 0x6ffffefb /* dependency auditing */\r
+#define DT_AUDIT 0x6ffffefc /* object auditing */\r
+#define DT_PLTPAD 0x6ffffefd /* pltpadding (sparcv9) */\r
+#define DT_MOVETAB 0x6ffffefe /* move table */\r
+#define DT_SYMINFO 0x6ffffeff /* syminfo table */\r
#define DT_ADDRRNGHI 0x6ffffeff\r
\r
-#define DT_VERSYM 0x6ffffff0 /* Address of versym section. */\r
-#define DT_RELACOUNT 0x6ffffff9 /* number of RELATIVE relocations */\r
-#define DT_RELCOUNT 0x6ffffffa /* number of RELATIVE relocations */\r
-#define DT_FLAGS_1 0x6ffffffb /* state flags - see DF_1_* defs */\r
-#define DT_VERDEF 0x6ffffffc /* Address of verdef section. */\r
-#define DT_VERDEFNUM 0x6ffffffd /* Number of elems in verdef section */\r
-#define DT_VERNEED 0x6ffffffe /* Address of verneed section. */\r
-#define DT_VERNEEDNUM 0x6fffffff /* Number of elems in verneed section */\r
+#define DT_VERSYM 0x6ffffff0 /* Address of versym section. */\r
+#define DT_RELACOUNT 0x6ffffff9 /* number of RELATIVE relocations */\r
+#define DT_RELCOUNT 0x6ffffffa /* number of RELATIVE relocations */\r
+#define DT_FLAGS_1 0x6ffffffb /* state flags - see DF_1_* defs */\r
+#define DT_VERDEF 0x6ffffffc /* Address of verdef section. */\r
+#define DT_VERDEFNUM 0x6ffffffd /* Number of elems in verdef section */\r
+#define DT_VERNEED 0x6ffffffe /* Address of verneed section. */\r
+#define DT_VERNEEDNUM 0x6fffffff /* Number of elems in verneed section */\r
\r
-#define DT_LOPROC 0x70000000 /* First processor-specific type. */\r
+#define DT_LOPROC 0x70000000/* First processor-specific type. */\r
#define DT_DEPRECATED_SPARC_REGISTER 0x7000001\r
-#define DT_AUXILIARY 0x7ffffffd /* shared library auxiliary name */\r
-#define DT_USED 0x7ffffffe /* ignored - same as needed */\r
-#define DT_FILTER 0x7fffffff /* shared library filter name */\r
-#define DT_HIPROC 0x7fffffff /* Last processor-specific type. */\r
+#define DT_AUXILIARY 0x7ffffffd /* shared library auxiliary name */\r
+#define DT_USED 0x7ffffffe /* ignored - same as needed */\r
+#define DT_FILTER 0x7fffffff /* shared library filter name */\r
+#define DT_HIPROC 0x7fffffff /* Last processor-specific type. */\r
\r
/* Values for DT_FLAGS */\r
-#define DF_ORIGIN 0x0001 /* Indicates that the object being loaded may\r
+#define DF_ORIGIN 0x0001 /* Indicates that the object being loaded may\r
make reference to the $ORIGIN substitution\r
string */\r
-#define DF_SYMBOLIC 0x0002 /* Indicates "symbolic" linking. */\r
-#define DF_TEXTREL 0x0004 /* Indicates there may be relocations in\r
+#define DF_SYMBOLIC 0x0002 /* Indicates "symbolic" linking. */\r
+#define DF_TEXTREL 0x0004 /* Indicates there may be relocations in\r
non-writable segments. */\r
-#define DF_BIND_NOW 0x0008 /* Indicates that the dynamic linker should\r
+#define DF_BIND_NOW 0x0008 /* Indicates that the dynamic linker should\r
process all relocations for the object\r
containing this entry before transferring\r
control to the program. */\r
-#define DF_STATIC_TLS 0x0010 /* Indicates that the shared object or\r
+#define DF_STATIC_TLS 0x0010 /* Indicates that the shared object or\r
executable contains code using a static\r
thread-local storage scheme. */\r
\r
#define NT_PRPSINFO 3 /* Process state info. */\r
\r
/* Symbol Binding - ELFNN_ST_BIND - st_info */\r
-#define STB_LOCAL 0 /* Local symbol */\r
+#define STB_LOCAL 0 /* Local symbol */\r
#define STB_GLOBAL 1 /* Global symbol */\r
-#define STB_WEAK 2 /* like global - lower precedence */\r
-#define STB_LOOS 10 /* Reserved range for operating system */\r
-#define STB_HIOS 12 /* specific semantics. */\r
-#define STB_LOPROC 13 /* reserved range for processor */\r
-#define STB_HIPROC 15 /* specific semantics. */\r
+#define STB_WEAK 2 /* like global - lower precedence */\r
+#define STB_LOOS 10 /* Reserved range for operating system */\r
+#define STB_HIOS 12 /* specific semantics. */\r
+#define STB_LOPROC 13 /* reserved range for processor */\r
+#define STB_HIPROC 15 /* specific semantics. */\r
\r
/* Symbol type - ELFNN_ST_TYPE - st_info */\r
-#define STT_NOTYPE 0 /* Unspecified type. */\r
-#define STT_OBJECT 1 /* Data object. */\r
-#define STT_FUNC 2 /* Function. */\r
-#define STT_SECTION 3 /* Section. */\r
-#define STT_FILE 4 /* Source file. */\r
-#define STT_COMMON 5 /* Uninitialized common block. */\r
-#define STT_TLS 6 /* TLS object. */\r
-#define STT_NUM 7\r
-#define STT_LOOS 10 /* Reserved range for operating system */\r
-#define STT_HIOS 12 /* specific semantics. */\r
-#define STT_LOPROC 13 /* reserved range for processor */\r
-#define STT_HIPROC 15 /* specific semantics. */\r
+#define STT_NOTYPE 0 /* Unspecified type. */\r
+#define STT_OBJECT 1 /* Data object. */\r
+#define STT_FUNC 2 /* Function. */\r
+#define STT_SECTION 3 /* Section. */\r
+#define STT_FILE 4 /* Source file. */\r
+#define STT_COMMON 5 /* Uninitialized common block. */\r
+#define STT_TLS 6 /* TLS object. */\r
+#define STT_NUM 7\r
+#define STT_LOOS 10 /* Reserved range for operating system */\r
+#define STT_HIOS 12 /* specific semantics. */\r
+#define STT_LOPROC 13 /* reserved range for processor */\r
+#define STT_HIPROC 15 /* specific semantics. */\r
\r
/* Symbol visibility - ELFNN_ST_VISIBILITY - st_other */\r
-#define STV_DEFAULT 0x0 /* Default visibility (see binding). */\r
-#define STV_INTERNAL 0x1 /* Special meaning in relocatable objects. */\r
-#define STV_HIDDEN 0x2 /* Not visible. */\r
-#define STV_PROTECTED 0x3 /* Visible but not preemptible. */\r
+#define STV_DEFAULT 0x0 /* Default visibility (see binding). */\r
+#define STV_INTERNAL 0x1 /* Special meaning in relocatable objects. */\r
+#define STV_HIDDEN 0x2 /* Not visible. */\r
+#define STV_PROTECTED 0x3 /* Visible but not preemptible. */\r
\r
/* Special symbol table indexes. */\r
#define STN_UNDEF 0 /* Undefined symbol index. */\r
#define VER_FLG_WEAK 0x02\r
\r
#define VER_NEED_CURRENT 1\r
-#define VER_NEED_WEAK (1u << 15)\r
-#define VER_NEED_HIDDEN VER_NDX_HIDDEN\r
+#define VER_NEED_WEAK (1u << 15)\r
+#define VER_NEED_HIDDEN VER_NDX_HIDDEN\r
#define VER_NEED_IDX(x) VER_NDX(x)\r
\r
-#define VER_NDX_LOCAL 0\r
+#define VER_NDX_LOCAL 0\r
#define VER_NDX_GLOBAL 1\r
-#define VER_NDX_GIVEN 2\r
+#define VER_NDX_GIVEN 2\r
\r
#define VER_NDX_HIDDEN (1u << 15)\r
#define VER_NDX(x) ((x) & ~(1u << 15))\r
* Syminfo flag values\r
*/\r
#define SYMINFO_FLG_DIRECT 0x0001 /* symbol ref has direct association */\r
- /* to object containing defn. */\r
-#define SYMINFO_FLG_PASSTHRU 0x0002 /* ignored - see SYMINFO_FLG_FILTER */\r
-#define SYMINFO_FLG_COPY 0x0004 /* symbol is a copy-reloc */\r
-#define SYMINFO_FLG_LAZYLOAD 0x0008 /* object containing defn should be */\r
- /* lazily-loaded */\r
+/* to object containing defn. */\r
+#define SYMINFO_FLG_PASSTHRU 0x0002 /* ignored - see SYMINFO_FLG_FILTER */\r
+#define SYMINFO_FLG_COPY 0x0004 /* symbol is a copy-reloc */\r
+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* object containing defn should be */\r
+/* lazily-loaded */\r
#define SYMINFO_FLG_DIRECTBIND 0x0010 /* ref should be bound directly to */\r
- /* object containing defn. */\r
+/* object containing defn. */\r
#define SYMINFO_FLG_NOEXTDIRECT 0x0020 /* don't let an external reference */\r
- /* directly bind to this symbol */\r
-#define SYMINFO_FLG_FILTER 0x0002 /* symbol ref is associated to a */\r
-#define SYMINFO_FLG_AUXILIARY 0x0040 /* standard or auxiliary filter */\r
+/* directly bind to this symbol */\r
+#define SYMINFO_FLG_FILTER 0x0002 /* symbol ref is associated to a */\r
+#define SYMINFO_FLG_AUXILIARY 0x0040 /* standard or auxiliary filter */\r
\r
/*\r
* Syminfo.si_boundto values.\r
*/\r
-#define SYMINFO_BT_SELF 0xffff /* symbol bound to self */\r
-#define SYMINFO_BT_PARENT 0xfffe /* symbol bound to parent */\r
-#define SYMINFO_BT_NONE 0xfffd /* no special symbol binding */\r
-#define SYMINFO_BT_EXTERN 0xfffc /* symbol defined as external */\r
-#define SYMINFO_BT_LOWRESERVE 0xff00 /* beginning of reserved entries */\r
+#define SYMINFO_BT_SELF 0xffff /* symbol bound to self */\r
+#define SYMINFO_BT_PARENT 0xfffe /* symbol bound to parent */\r
+#define SYMINFO_BT_NONE 0xfffd /* no special symbol binding */\r
+#define SYMINFO_BT_EXTERN 0xfffc /* symbol defined as external */\r
+#define SYMINFO_BT_LOWRESERVE 0xff00 /* beginning of reserved entries */\r
\r
/*\r
* Syminfo version values.\r
*/\r
-#define SYMINFO_NONE 0 /* Syminfo version */\r
-#define SYMINFO_CURRENT 1\r
-#define SYMINFO_NUM 2\r
+#define SYMINFO_NONE 0 /* Syminfo version */\r
+#define SYMINFO_CURRENT 1\r
+#define SYMINFO_NUM 2\r
\r
/*\r
* Relocation types.\r
* handle others.\r
*/\r
\r
-#define R_386_NONE 0 /* No relocation. */\r
-#define R_386_32 1 /* Add symbol value. */\r
-#define R_386_PC32 2 /* Add PC-relative symbol value. */\r
-#define R_386_GOT32 3 /* Add PC-relative GOT offset. */\r
-#define R_386_PLT32 4 /* Add PC-relative PLT offset. */\r
-#define R_386_COPY 5 /* Copy data from shared object. */\r
-#define R_386_GLOB_DAT 6 /* Set GOT entry to data address. */\r
-#define R_386_JMP_SLOT 7 /* Set GOT entry to code address. */\r
-#define R_386_RELATIVE 8 /* Add load address of shared object. */\r
-#define R_386_GOTOFF 9 /* Add GOT-relative symbol address. */\r
-#define R_386_GOTPC 10 /* Add PC-relative GOT table address. */\r
-#define R_386_TLS_TPOFF 14 /* Negative offset in static TLS block */\r
-#define R_386_TLS_IE 15 /* Absolute address of GOT for -ve static TLS */\r
-#define R_386_TLS_GOTIE 16 /* GOT entry for negative static TLS block */\r
-#define R_386_TLS_LE 17 /* Negative offset relative to static TLS */\r
-#define R_386_TLS_GD 18 /* 32 bit offset to GOT (index,off) pair */\r
-#define R_386_TLS_LDM 19 /* 32 bit offset to GOT (index,zero) pair */\r
-#define R_386_TLS_GD_32 24 /* 32 bit offset to GOT (index,off) pair */\r
-#define R_386_TLS_GD_PUSH 25 /* pushl instruction for Sun ABI GD sequence */\r
-#define R_386_TLS_GD_CALL 26 /* call instruction for Sun ABI GD sequence */\r
-#define R_386_TLS_GD_POP 27 /* popl instruction for Sun ABI GD sequence */\r
-#define R_386_TLS_LDM_32 28 /* 32 bit offset to GOT (index,zero) pair */\r
-#define R_386_TLS_LDM_PUSH 29 /* pushl instruction for Sun ABI LD sequence */\r
-#define R_386_TLS_LDM_CALL 30 /* call instruction for Sun ABI LD sequence */\r
-#define R_386_TLS_LDM_POP 31 /* popl instruction for Sun ABI LD sequence */\r
-#define R_386_TLS_LDO_32 32 /* 32 bit offset from start of TLS block */\r
-#define R_386_TLS_IE_32 33 /* 32 bit offset to GOT static TLS offset entry */\r
-#define R_386_TLS_LE_32 34 /* 32 bit offset within static TLS block */\r
-#define R_386_TLS_DTPMOD32 35 /* GOT entry containing TLS index */\r
-#define R_386_TLS_DTPOFF32 36 /* GOT entry containing TLS offset */\r
-#define R_386_TLS_TPOFF32 37 /* GOT entry of -ve static TLS offset */\r
+#define R_386_NONE 0 /* No relocation. */\r
+#define R_386_32 1 /* Add symbol value. */\r
+#define R_386_PC32 2 /* Add PC-relative symbol value. */\r
+#define R_386_GOT32 3 /* Add PC-relative GOT offset. */\r
+#define R_386_PLT32 4 /* Add PC-relative PLT offset. */\r
+#define R_386_COPY 5 /* Copy data from shared object. */\r
+#define R_386_GLOB_DAT 6 /* Set GOT entry to data address. */\r
+#define R_386_JMP_SLOT 7 /* Set GOT entry to code address. */\r
+#define R_386_RELATIVE 8 /* Add load address of shared object. */\r
+#define R_386_GOTOFF 9 /* Add GOT-relative symbol address. */\r
+#define R_386_GOTPC 10 /* Add PC-relative GOT table address. */\r
+#define R_386_TLS_TPOFF 14 /* Negative offset in static TLS block */\r
+#define R_386_TLS_IE 15 /* Absolute address of GOT for -ve static TLS */\r
+#define R_386_TLS_GOTIE 16 /* GOT entry for negative static TLS block */\r
+#define R_386_TLS_LE 17 /* Negative offset relative to static TLS */\r
+#define R_386_TLS_GD 18 /* 32 bit offset to GOT (index,off) pair */\r
+#define R_386_TLS_LDM 19 /* 32 bit offset to GOT (index,zero) pair */\r
+#define R_386_TLS_GD_32 24 /* 32 bit offset to GOT (index,off) pair */\r
+#define R_386_TLS_GD_PUSH 25 /* pushl instruction for Sun ABI GD sequence */\r
+#define R_386_TLS_GD_CALL 26 /* call instruction for Sun ABI GD sequence */\r
+#define R_386_TLS_GD_POP 27 /* popl instruction for Sun ABI GD sequence */\r
+#define R_386_TLS_LDM_32 28 /* 32 bit offset to GOT (index,zero) pair */\r
+#define R_386_TLS_LDM_PUSH 29 /* pushl instruction for Sun ABI LD sequence */\r
+#define R_386_TLS_LDM_CALL 30 /* call instruction for Sun ABI LD sequence */\r
+#define R_386_TLS_LDM_POP 31 /* popl instruction for Sun ABI LD sequence */\r
+#define R_386_TLS_LDO_32 32 /* 32 bit offset from start of TLS block */\r
+#define R_386_TLS_IE_32 33 /* 32 bit offset to GOT static TLS offset entry */\r
+#define R_386_TLS_LE_32 34 /* 32 bit offset within static TLS block */\r
+#define R_386_TLS_DTPMOD32 35 /* GOT entry containing TLS index */\r
+#define R_386_TLS_DTPOFF32 36 /* GOT entry containing TLS offset */\r
+#define R_386_TLS_TPOFF32 37 /* GOT entry of -ve static TLS offset */\r
\r
/* Null relocation */\r
-#define R_AARCH64_NONE 256 /* No relocation */\r
+#define R_AARCH64_NONE 256 /* No relocation */\r
/* Static AArch64 relocations */\r
- /* Static data relocations */\r
-#define R_AARCH64_ABS64 257 /* S + A */\r
-#define R_AARCH64_ABS32 258 /* S + A */\r
-#define R_AARCH64_ABS16 259 /* S + A */\r
-#define R_AARCH64_PREL64 260 /* S + A - P */\r
-#define R_AARCH64_PREL32 261 /* S + A - P */\r
-#define R_AARCH64_PREL16 262 /* S + A - P */\r
- /* Group relocations to create a 16, 32, 48, or 64 bit unsigned data value or address inline */\r
-#define R_AARCH64_MOVW_UABS_G0 263 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G0_NC 264 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G1 265 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G1_NC 266 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G2 267 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G2_NC 268 /* S + A */\r
-#define R_AARCH64_MOVW_UABS_G3 269 /* S + A */\r
- /* Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline */\r
-#define R_AARCH64_MOVW_SABS_G0 270 /* S + A */\r
-#define R_AARCH64_MOVW_SABS_G1 271 /* S + A */\r
-#define R_AARCH64_MOVW_SABS_G2 272 /* S + A */\r
- /* Relocations to generate 19, 21 and 33 bit PC-relative addresses */\r
-#define R_AARCH64_LD_PREL_LO19 273 /* S + A - P */\r
-#define R_AARCH64_ADR_PREL_LO21 274 /* S + A - P */\r
-#define R_AARCH64_ADR_PREL_PG_HI21 275 /* Page(S+A) - Page(P) */\r
-#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 /* Page(S+A) - Page(P) */\r
-#define R_AARCH64_ADD_ABS_LO12_NC 277 /* S + A */\r
-#define R_AARCH64_LDST8_ABS_LO12_NC 278 /* S + A */\r
-#define R_AARCH64_LDST16_ABS_LO12_NC 284 /* S + A */\r
-#define R_AARCH64_LDST32_ABS_LO12_NC 285 /* S + A */\r
-#define R_AARCH64_LDST64_ABS_LO12_NC 286 /* S + A */\r
-#define R_AARCH64_LDST128_ABS_LO12_NC 299 /* S + A */\r
- /* Relocations for control-flow instructions - all offsets are a multiple of 4 */\r
-#define R_AARCH64_TSTBR14 279 /* S+A-P */\r
-#define R_AARCH64_CONDBR19 280 /* S+A-P */\r
-#define R_AARCH64_JUMP26 282 /* S+A-P */\r
-#define R_AARCH64_CALL26 283 /* S+A-P */\r
- /* Group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline */\r
-#define R_AARCH64_MOVW_PREL_G0 287 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G0_NC 288 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G1 289 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G1_NC 290 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G2 291 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G2_NC 292 /* S+A-P */\r
-#define R_AARCH64_MOVW_PREL_G3 293 /* S+A-P */\r
- /* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative offsets inline */\r
-#define R_AARCH64_MOVW_GOTOFF_G0 300 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G1 302 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G2 304 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 /* G(S)-GOT */\r
-#define R_AARCH64_MOVW_GOTOFF_G3 306 /* G(S)-GOT */\r
- /* GOT-relative data relocations */\r
-#define R_AARCH64_GOTREL64 307 /* S+A-GOT */\r
-#define R_AARCH64_GOTREL32 308 /* S+A-GOT */\r
- /* GOT-relative instruction relocations */\r
-#define R_AARCH64_GOT_LD_PREL19 309 /* G(S)-P */\r
-#define R_AARCH64_LD64_GOTOFF_LO15 310 /* G(S)-GOT */\r
-#define R_AARCH64_ADR_GOT_PAGE 311 /* Page(G(S))-Page(P) */\r
-#define R_AARCH64_LD64_GOT_LO12_NC 312 /* G(S) */\r
-#define R_AARCH64_LD64_GOTPAGE_LO15 313 /* G(S)-Page(GOT) */\r
+/* Static data relocations */\r
+#define R_AARCH64_ABS64 257 /* S + A */\r
+#define R_AARCH64_ABS32 258 /* S + A */\r
+#define R_AARCH64_ABS16 259 /* S + A */\r
+#define R_AARCH64_PREL64 260 /* S + A - P */\r
+#define R_AARCH64_PREL32 261 /* S + A - P */\r
+#define R_AARCH64_PREL16 262 /* S + A - P */\r
+/* Group relocations to create a 16, 32, 48, or 64 bit unsigned data value or address inline */\r
+#define R_AARCH64_MOVW_UABS_G0 263 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G0_NC 264 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G1 265 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G1_NC 266 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G2 267 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G2_NC 268 /* S + A */\r
+#define R_AARCH64_MOVW_UABS_G3 269 /* S + A */\r
+/* Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline */\r
+#define R_AARCH64_MOVW_SABS_G0 270 /* S + A */\r
+#define R_AARCH64_MOVW_SABS_G1 271 /* S + A */\r
+#define R_AARCH64_MOVW_SABS_G2 272 /* S + A */\r
+/* Relocations to generate 19, 21 and 33 bit PC-relative addresses */\r
+#define R_AARCH64_LD_PREL_LO19 273 /* S + A - P */\r
+#define R_AARCH64_ADR_PREL_LO21 274 /* S + A - P */\r
+#define R_AARCH64_ADR_PREL_PG_HI21 275 /* Page(S+A) - Page(P) */\r
+#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 /* Page(S+A) - Page(P) */\r
+#define R_AARCH64_ADD_ABS_LO12_NC 277 /* S + A */\r
+#define R_AARCH64_LDST8_ABS_LO12_NC 278 /* S + A */\r
+#define R_AARCH64_LDST16_ABS_LO12_NC 284 /* S + A */\r
+#define R_AARCH64_LDST32_ABS_LO12_NC 285 /* S + A */\r
+#define R_AARCH64_LDST64_ABS_LO12_NC 286 /* S + A */\r
+#define R_AARCH64_LDST128_ABS_LO12_NC 299 /* S + A */\r
+/* Relocations for control-flow instructions - all offsets are a multiple of 4 */\r
+#define R_AARCH64_TSTBR14 279 /* S+A-P */\r
+#define R_AARCH64_CONDBR19 280 /* S+A-P */\r
+#define R_AARCH64_JUMP26 282 /* S+A-P */\r
+#define R_AARCH64_CALL26 283 /* S+A-P */\r
+/* Group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline */\r
+#define R_AARCH64_MOVW_PREL_G0 287 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G0_NC 288 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G1 289 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G1_NC 290 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G2 291 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G2_NC 292 /* S+A-P */\r
+#define R_AARCH64_MOVW_PREL_G3 293 /* S+A-P */\r
+/* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative offsets inline */\r
+#define R_AARCH64_MOVW_GOTOFF_G0 300 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G1 302 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G2 304 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 /* G(S)-GOT */\r
+#define R_AARCH64_MOVW_GOTOFF_G3 306 /* G(S)-GOT */\r
+/* GOT-relative data relocations */\r
+#define R_AARCH64_GOTREL64 307 /* S+A-GOT */\r
+#define R_AARCH64_GOTREL32 308 /* S+A-GOT */\r
+/* GOT-relative instruction relocations */\r
+#define R_AARCH64_GOT_LD_PREL19 309 /* G(S)-P */\r
+#define R_AARCH64_LD64_GOTOFF_LO15 310 /* G(S)-GOT */\r
+#define R_AARCH64_ADR_GOT_PAGE 311 /* Page(G(S))-Page(P) */\r
+#define R_AARCH64_LD64_GOT_LO12_NC 312 /* G(S) */\r
+#define R_AARCH64_LD64_GOTPAGE_LO15 313 /* G(S)-Page(GOT) */\r
/* Relocations for thread-local storage */\r
- /* General Dynamic TLS relocations */\r
-#define R_AARCH64_TLSGD_ADR_PREL21 512 /* G(TLSIDX(S+A)) - P */\r
-#define R_AARCH64_TLSGD_ADR_PAGE21 513 /* Page(G(TLSIDX(S+A))) - Page(P) */\r
-#define R_AARCH64_TLSGD_ADD_LO12_NC 514 /* G(TLSIDX(S+A)) */\r
+/* General Dynamic TLS relocations */\r
+#define R_AARCH64_TLSGD_ADR_PREL21 512 /* G(TLSIDX(S+A)) - P */\r
+#define R_AARCH64_TLSGD_ADR_PAGE21 513 /* Page(G(TLSIDX(S+A))) - Page(P) */\r
+#define R_AARCH64_TLSGD_ADD_LO12_NC 514 /* G(TLSIDX(S+A)) */\r
#define R_AARCH64_TLSGD_MOVW_G1 515 /* G(TLSIDX(S+A)) - GOT */\r
-#define R_AARCH64_TLSGD_MOVW_G0_NC 516 /* G(TLSIDX(S+A)) - GOT */\r
- /* Local Dynamic TLS relocations */\r
-#define R_AARCH64_TLSLD_ADR_PREL21 517 /* G(LDM(S))) - P */\r
-#define R_AARCH64_TLSLD_ADR_PAGE21 518 /* Page(G(LDM(S)))-Page(P) */\r
-#define R_AARCH64_TLSLD_ADD_LO12_NC 519 /* G(LDM(S)) */\r
-#define R_AARCH64_TLSLD_MOVW_G1 520 /* G(LDM(S)) - GOT */\r
-#define R_AARCH64_TLSLD_MOVW_G0_NC 521 /* G(LDM(S)) - GOT */\r
-#define R_AARCH64_TLSLD_LD_PREL19 522 /* G(LDM(S)) - P */\r
-#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 /* DTPREL(S+A) */\r
- /* Initial Exec TLS relocations */\r
-#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 /* G(TPREL(S+A)) - GOT */\r
-#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 /* G(TPREL(S+A)) - GOT */\r
-#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 /* Page(G(TPREL(S+A))) - Page(P) */\r
-#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 /* G(TPREL(S+A)) */\r
-#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 /* G(TPREL(S+A)) - P */\r
- /* Local Exec TLS relocations */\r
-#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 /* TPREL(S+A) */\r
-#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSGD_MOVW_G0_NC 516 /* G(TLSIDX(S+A)) - GOT */\r
+/* Local Dynamic TLS relocations */\r
+#define R_AARCH64_TLSLD_ADR_PREL21 517 /* G(LDM(S))) - P */\r
+#define R_AARCH64_TLSLD_ADR_PAGE21 518 /* Page(G(LDM(S)))-Page(P) */\r
+#define R_AARCH64_TLSLD_ADD_LO12_NC 519 /* G(LDM(S)) */\r
+#define R_AARCH64_TLSLD_MOVW_G1 520 /* G(LDM(S)) - GOT */\r
+#define R_AARCH64_TLSLD_MOVW_G0_NC 521 /* G(LDM(S)) - GOT */\r
+#define R_AARCH64_TLSLD_LD_PREL19 522 /* G(LDM(S)) - P */\r
+#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 /* DTPREL(S+A) */\r
+/* Initial Exec TLS relocations */\r
+#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 /* G(TPREL(S+A)) - GOT */\r
+#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 /* G(TPREL(S+A)) - GOT */\r
+#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 /* Page(G(TPREL(S+A))) - Page(P) */\r
+#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 /* G(TPREL(S+A)) */\r
+#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 /* G(TPREL(S+A)) - P */\r
+/* Local Exec TLS relocations */\r
+#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 /* TPREL(S+A) */\r
+#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 /* TPREL(S+A) */\r
/* Dynamic relocations */\r
- /* Dynamic relocations */\r
-#define R_AARCH64_COPY 1024\r
+/* Dynamic relocations */\r
+#define R_AARCH64_COPY 1024\r
#define R_AARCH64_GLOB_DAT 1025 /* S + A */\r
-#define R_AARCH64_JUMP_SLOT 1026 /* S + A */\r
+#define R_AARCH64_JUMP_SLOT 1026 /* S + A */\r
#define R_AARCH64_RELATIVE 1027 /* Delta(S) + A , Delta(P) + A */\r
-#define R_AARCH64_TLS_DTPREL64 1028 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLS_DTPMOD64 1029 /* LDM(S) */\r
-#define R_AARCH64_TLS_TPREL64 1030 /* TPREL(S+A) */\r
-#define R_AARCH64_TLS_DTPREL32 1031 /* DTPREL(S+A) */\r
-#define R_AARCH64_TLS_DTPMOD32 1032 /* LDM(S) */\r
-#define R_AARCH64_TLS_TPREL32 1033 /* DTPREL(S+A) */\r
-\r
-#define R_ALPHA_NONE 0 /* No reloc */\r
-#define R_ALPHA_REFLONG 1 /* Direct 32 bit */\r
-#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */\r
-#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */\r
-#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */\r
-#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */\r
-#define R_ALPHA_GPDISP 6 /* Add displacement to GP */\r
-#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */\r
-#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */\r
-#define R_ALPHA_SREL16 9 /* PC relative 16 bit */\r
-#define R_ALPHA_SREL32 10 /* PC relative 32 bit */\r
-#define R_ALPHA_SREL64 11 /* PC relative 64 bit */\r
-#define R_ALPHA_OP_PUSH 12 /* OP stack push */\r
-#define R_ALPHA_OP_STORE 13 /* OP stack pop and store */\r
-#define R_ALPHA_OP_PSUB 14 /* OP stack subtract */\r
-#define R_ALPHA_OP_PRSHIFT 15 /* OP stack right shift */\r
-#define R_ALPHA_GPVALUE 16\r
-#define R_ALPHA_GPRELHIGH 17\r
-#define R_ALPHA_GPRELLOW 18\r
-#define R_ALPHA_IMMED_GP_16 19\r
-#define R_ALPHA_IMMED_GP_HI32 20\r
+#define R_AARCH64_TLS_DTPREL64 1028 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLS_DTPMOD64 1029 /* LDM(S) */\r
+#define R_AARCH64_TLS_TPREL64 1030 /* TPREL(S+A) */\r
+#define R_AARCH64_TLS_DTPREL32 1031 /* DTPREL(S+A) */\r
+#define R_AARCH64_TLS_DTPMOD32 1032 /* LDM(S) */\r
+#define R_AARCH64_TLS_TPREL32 1033 /* DTPREL(S+A) */\r
+\r
+#define R_ALPHA_NONE 0 /* No reloc */\r
+#define R_ALPHA_REFLONG 1 /* Direct 32 bit */\r
+#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */\r
+#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */\r
+#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */\r
+#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */\r
+#define R_ALPHA_GPDISP 6 /* Add displacement to GP */\r
+#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */\r
+#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */\r
+#define R_ALPHA_SREL16 9 /* PC relative 16 bit */\r
+#define R_ALPHA_SREL32 10 /* PC relative 32 bit */\r
+#define R_ALPHA_SREL64 11 /* PC relative 64 bit */\r
+#define R_ALPHA_OP_PUSH 12 /* OP stack push */\r
+#define R_ALPHA_OP_STORE 13 /* OP stack pop and store */\r
+#define R_ALPHA_OP_PSUB 14 /* OP stack subtract */\r
+#define R_ALPHA_OP_PRSHIFT 15 /* OP stack right shift */\r
+#define R_ALPHA_GPVALUE 16\r
+#define R_ALPHA_GPRELHIGH 17\r
+#define R_ALPHA_GPRELLOW 18\r
+#define R_ALPHA_IMMED_GP_16 19\r
+#define R_ALPHA_IMMED_GP_HI32 20\r
#define R_ALPHA_IMMED_SCN_HI32 21\r
-#define R_ALPHA_IMMED_BR_HI32 22\r
-#define R_ALPHA_IMMED_LO32 23\r
-#define R_ALPHA_COPY 24 /* Copy symbol at runtime */\r
-#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */\r
-#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */\r
-#define R_ALPHA_RELATIVE 27 /* Adjust by program base */\r
-\r
-#define R_ARM_NONE 0 /* No relocation. */\r
-#define R_ARM_PC24 1\r
-#define R_ARM_ABS32 2\r
-#define R_ARM_REL32 3\r
-#define R_ARM_PC13 4\r
-#define R_ARM_ABS16 5\r
-#define R_ARM_ABS12 6\r
-#define R_ARM_THM_ABS5 7\r
-#define R_ARM_ABS8 8\r
-#define R_ARM_SBREL32 9\r
-#define R_ARM_THM_PC22 10\r
-#define R_ARM_THM_PC8 11\r
-#define R_ARM_AMP_VCALL9 12\r
-#define R_ARM_SWI24 13\r
-#define R_ARM_THM_SWI8 14\r
-#define R_ARM_XPC25 15\r
-#define R_ARM_THM_XPC22 16\r
-#define R_ARM_COPY 20 /* Copy data from shared object. */\r
-#define R_ARM_GLOB_DAT 21 /* Set GOT entry to data address. */\r
-#define R_ARM_JUMP_SLOT 22 /* Set GOT entry to code address. */\r
-#define R_ARM_RELATIVE 23 /* Add load address of shared object. */\r
-#define R_ARM_GOTOFF 24 /* Add GOT-relative symbol address. */\r
-#define R_ARM_GOTPC 25 /* Add PC-relative GOT table address. */\r
-#define R_ARM_GOT32 26 /* Add PC-relative GOT offset. */\r
-#define R_ARM_PLT32 27 /* Add PC-relative PLT offset. */\r
-#define R_ARM_CALL 28\r
-#define R_ARM_JMP24 29\r
-#define R_ARM_THM_MOVW_ABS_NC 47\r
-#define R_ARM_THM_MOVT_ABS 48\r
+#define R_ALPHA_IMMED_BR_HI32 22\r
+#define R_ALPHA_IMMED_LO32 23\r
+#define R_ALPHA_COPY 24 /* Copy symbol at runtime */\r
+#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */\r
+#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */\r
+#define R_ALPHA_RELATIVE 27 /* Adjust by program base */\r
+\r
+#define R_ARM_NONE 0/* No relocation. */\r
+#define R_ARM_PC24 1\r
+#define R_ARM_ABS32 2\r
+#define R_ARM_REL32 3\r
+#define R_ARM_PC13 4\r
+#define R_ARM_ABS16 5\r
+#define R_ARM_ABS12 6\r
+#define R_ARM_THM_ABS5 7\r
+#define R_ARM_ABS8 8\r
+#define R_ARM_SBREL32 9\r
+#define R_ARM_THM_PC22 10\r
+#define R_ARM_THM_PC8 11\r
+#define R_ARM_AMP_VCALL9 12\r
+#define R_ARM_SWI24 13\r
+#define R_ARM_THM_SWI8 14\r
+#define R_ARM_XPC25 15\r
+#define R_ARM_THM_XPC22 16\r
+#define R_ARM_COPY 20 /* Copy data from shared object. */\r
+#define R_ARM_GLOB_DAT 21 /* Set GOT entry to data address. */\r
+#define R_ARM_JUMP_SLOT 22 /* Set GOT entry to code address. */\r
+#define R_ARM_RELATIVE 23 /* Add load address of shared object. */\r
+#define R_ARM_GOTOFF 24 /* Add GOT-relative symbol address. */\r
+#define R_ARM_GOTPC 25 /* Add PC-relative GOT table address. */\r
+#define R_ARM_GOT32 26 /* Add PC-relative GOT offset. */\r
+#define R_ARM_PLT32 27 /* Add PC-relative PLT offset. */\r
+#define R_ARM_CALL 28\r
+#define R_ARM_JMP24 29\r
+#define R_ARM_THM_MOVW_ABS_NC 47\r
+#define R_ARM_THM_MOVT_ABS 48\r
\r
// Block of PC-relative relocations added to work around gcc putting\r
// object relocations in static executables.\r
-#define R_ARM_THM_JUMP24 30\r
-#define R_ARM_PREL31 42\r
-#define R_ARM_MOVW_PREL_NC 45\r
-#define R_ARM_MOVT_PREL 46\r
-#define R_ARM_THM_MOVW_PREL_NC 49\r
-#define R_ARM_THM_MOVT_PREL 50\r
-#define R_ARM_THM_JMP6 52\r
-#define R_ARM_THM_ALU_PREL_11_0 53\r
-#define R_ARM_THM_PC12 54\r
-#define R_ARM_REL32_NOI 56\r
-#define R_ARM_ALU_PC_G0_NC 57\r
+#define R_ARM_THM_JUMP24 30\r
+#define R_ARM_PREL31 42\r
+#define R_ARM_MOVW_PREL_NC 45\r
+#define R_ARM_MOVT_PREL 46\r
+#define R_ARM_THM_MOVW_PREL_NC 49\r
+#define R_ARM_THM_MOVT_PREL 50\r
+#define R_ARM_THM_JMP6 52\r
+#define R_ARM_THM_ALU_PREL_11_0 53\r
+#define R_ARM_THM_PC12 54\r
+#define R_ARM_REL32_NOI 56\r
+#define R_ARM_ALU_PC_G0_NC 57\r
#define R_ARM_ALU_PC_G0 58\r
-#define R_ARM_ALU_PC_G1_NC 59\r
+#define R_ARM_ALU_PC_G1_NC 59\r
#define R_ARM_ALU_PC_G1 60\r
-#define R_ARM_ALU_PC_G2 61\r
+#define R_ARM_ALU_PC_G2 61\r
#define R_ARM_LDR_PC_G1 62\r
#define R_ARM_LDR_PC_G2 63\r
-#define R_ARM_LDRS_PC_G0 64\r
-#define R_ARM_LDRS_PC_G1 65\r
-#define R_ARM_LDRS_PC_G2 66\r
+#define R_ARM_LDRS_PC_G0 64\r
+#define R_ARM_LDRS_PC_G1 65\r
+#define R_ARM_LDRS_PC_G2 66\r
#define R_ARM_LDC_PC_G0 67\r
#define R_ARM_LDC_PC_G1 68\r
#define R_ARM_LDC_PC_G2 69\r
-#define R_ARM_GOT_PREL 96\r
-#define R_ARM_THM_JUMP11 102\r
-#define R_ARM_THM_JUMP8 103\r
-#define R_ARM_TLS_GD32 104\r
-#define R_ARM_TLS_LDM32 105\r
-#define R_ARM_TLS_IE32 107\r
-\r
-#define R_ARM_THM_JUMP19 51\r
-#define R_ARM_GNU_VTENTRY 100\r
+#define R_ARM_GOT_PREL 96\r
+#define R_ARM_THM_JUMP11 102\r
+#define R_ARM_THM_JUMP8 103\r
+#define R_ARM_TLS_GD32 104\r
+#define R_ARM_TLS_LDM32 105\r
+#define R_ARM_TLS_IE32 107\r
+\r
+#define R_ARM_THM_JUMP19 51\r
+#define R_ARM_GNU_VTENTRY 100\r
#define R_ARM_GNU_VTINHERIT 101\r
-#define R_ARM_RSBREL32 250\r
-#define R_ARM_THM_RPC22 251\r
-#define R_ARM_RREL32 252\r
-#define R_ARM_RABS32 253\r
-#define R_ARM_RPC24 254\r
-#define R_ARM_RBASE 255\r
-\r
-#define R_PPC_NONE 0 /* No relocation. */\r
-#define R_PPC_ADDR32 1\r
-#define R_PPC_ADDR24 2\r
-#define R_PPC_ADDR16 3\r
-#define R_PPC_ADDR16_LO 4\r
-#define R_PPC_ADDR16_HI 5\r
-#define R_PPC_ADDR16_HA 6\r
-#define R_PPC_ADDR14 7\r
-#define R_PPC_ADDR14_BRTAKEN 8\r
+#define R_ARM_RSBREL32 250\r
+#define R_ARM_THM_RPC22 251\r
+#define R_ARM_RREL32 252\r
+#define R_ARM_RABS32 253\r
+#define R_ARM_RPC24 254\r
+#define R_ARM_RBASE 255\r
+\r
+#define R_PPC_NONE 0/* No relocation. */\r
+#define R_PPC_ADDR32 1\r
+#define R_PPC_ADDR24 2\r
+#define R_PPC_ADDR16 3\r
+#define R_PPC_ADDR16_LO 4\r
+#define R_PPC_ADDR16_HI 5\r
+#define R_PPC_ADDR16_HA 6\r
+#define R_PPC_ADDR14 7\r
+#define R_PPC_ADDR14_BRTAKEN 8\r
#define R_PPC_ADDR14_BRNTAKEN 9\r
-#define R_PPC_REL24 10\r
-#define R_PPC_REL14 11\r
-#define R_PPC_REL14_BRTAKEN 12\r
-#define R_PPC_REL14_BRNTAKEN 13\r
-#define R_PPC_GOT16 14\r
-#define R_PPC_GOT16_LO 15\r
-#define R_PPC_GOT16_HI 16\r
-#define R_PPC_GOT16_HA 17\r
-#define R_PPC_PLTREL24 18\r
-#define R_PPC_COPY 19\r
-#define R_PPC_GLOB_DAT 20\r
-#define R_PPC_JMP_SLOT 21\r
-#define R_PPC_RELATIVE 22\r
-#define R_PPC_LOCAL24PC 23\r
-#define R_PPC_UADDR32 24\r
-#define R_PPC_UADDR16 25\r
-#define R_PPC_REL32 26\r
-#define R_PPC_PLT32 27\r
-#define R_PPC_PLTREL32 28\r
-#define R_PPC_PLT16_LO 29\r
-#define R_PPC_PLT16_HI 30\r
-#define R_PPC_PLT16_HA 31\r
-#define R_PPC_SDAREL16 32\r
-#define R_PPC_SECTOFF 33\r
-#define R_PPC_SECTOFF_LO 34\r
-#define R_PPC_SECTOFF_HI 35\r
-#define R_PPC_SECTOFF_HA 36\r
+#define R_PPC_REL24 10\r
+#define R_PPC_REL14 11\r
+#define R_PPC_REL14_BRTAKEN 12\r
+#define R_PPC_REL14_BRNTAKEN 13\r
+#define R_PPC_GOT16 14\r
+#define R_PPC_GOT16_LO 15\r
+#define R_PPC_GOT16_HI 16\r
+#define R_PPC_GOT16_HA 17\r
+#define R_PPC_PLTREL24 18\r
+#define R_PPC_COPY 19\r
+#define R_PPC_GLOB_DAT 20\r
+#define R_PPC_JMP_SLOT 21\r
+#define R_PPC_RELATIVE 22\r
+#define R_PPC_LOCAL24PC 23\r
+#define R_PPC_UADDR32 24\r
+#define R_PPC_UADDR16 25\r
+#define R_PPC_REL32 26\r
+#define R_PPC_PLT32 27\r
+#define R_PPC_PLTREL32 28\r
+#define R_PPC_PLT16_LO 29\r
+#define R_PPC_PLT16_HI 30\r
+#define R_PPC_PLT16_HA 31\r
+#define R_PPC_SDAREL16 32\r
+#define R_PPC_SECTOFF 33\r
+#define R_PPC_SECTOFF_LO 34\r
+#define R_PPC_SECTOFF_HI 35\r
+#define R_PPC_SECTOFF_HA 36\r
\r
/*\r
* TLS relocations\r
*/\r
-#define R_PPC_TLS 67\r
-#define R_PPC_DTPMOD32 68\r
-#define R_PPC_TPREL16 69\r
-#define R_PPC_TPREL16_LO 70\r
-#define R_PPC_TPREL16_HI 71\r
-#define R_PPC_TPREL16_HA 72\r
-#define R_PPC_TPREL32 73\r
-#define R_PPC_DTPREL16 74\r
-#define R_PPC_DTPREL16_LO 75\r
-#define R_PPC_DTPREL16_HI 76\r
-#define R_PPC_DTPREL16_HA 77\r
-#define R_PPC_DTPREL32 78\r
-#define R_PPC_GOT_TLSGD16 79\r
+#define R_PPC_TLS 67\r
+#define R_PPC_DTPMOD32 68\r
+#define R_PPC_TPREL16 69\r
+#define R_PPC_TPREL16_LO 70\r
+#define R_PPC_TPREL16_HI 71\r
+#define R_PPC_TPREL16_HA 72\r
+#define R_PPC_TPREL32 73\r
+#define R_PPC_DTPREL16 74\r
+#define R_PPC_DTPREL16_LO 75\r
+#define R_PPC_DTPREL16_HI 76\r
+#define R_PPC_DTPREL16_HA 77\r
+#define R_PPC_DTPREL32 78\r
+#define R_PPC_GOT_TLSGD16 79\r
#define R_PPC_GOT_TLSGD16_LO 80\r
#define R_PPC_GOT_TLSGD16_HI 81\r
#define R_PPC_GOT_TLSGD16_HA 82\r
-#define R_PPC_GOT_TLSLD16 83\r
+#define R_PPC_GOT_TLSLD16 83\r
#define R_PPC_GOT_TLSLD16_LO 84\r
#define R_PPC_GOT_TLSLD16_HI 85\r
#define R_PPC_GOT_TLSLD16_HA 86\r
-#define R_PPC_GOT_TPREL16 87\r
+#define R_PPC_GOT_TPREL16 87\r
#define R_PPC_GOT_TPREL16_LO 88\r
#define R_PPC_GOT_TPREL16_HI 89\r
#define R_PPC_GOT_TPREL16_HA 90\r
* SVR4 ELF ABI.\r
*/\r
\r
-#define R_PPC_EMB_NADDR32 101\r
-#define R_PPC_EMB_NADDR16 102\r
+#define R_PPC_EMB_NADDR32 101\r
+#define R_PPC_EMB_NADDR16 102\r
#define R_PPC_EMB_NADDR16_LO 103\r
#define R_PPC_EMB_NADDR16_HI 104\r
#define R_PPC_EMB_NADDR16_HA 105\r
-#define R_PPC_EMB_SDAI16 106\r
-#define R_PPC_EMB_SDA2I16 107\r
-#define R_PPC_EMB_SDA2REL 108\r
-#define R_PPC_EMB_SDA21 109\r
-#define R_PPC_EMB_MRKREF 110\r
-#define R_PPC_EMB_RELSEC16 111\r
-#define R_PPC_EMB_RELST_LO 112\r
-#define R_PPC_EMB_RELST_HI 113\r
-#define R_PPC_EMB_RELST_HA 114\r
-#define R_PPC_EMB_BIT_FLD 115\r
-#define R_PPC_EMB_RELSDA 116\r
-\r
-#define R_SPARC_NONE 0\r
-#define R_SPARC_8 1\r
-#define R_SPARC_16 2\r
-#define R_SPARC_32 3\r
-#define R_SPARC_DISP8 4\r
-#define R_SPARC_DISP16 5\r
-#define R_SPARC_DISP32 6\r
-#define R_SPARC_WDISP30 7\r
-#define R_SPARC_WDISP22 8\r
-#define R_SPARC_HI22 9\r
-#define R_SPARC_22 10\r
-#define R_SPARC_13 11\r
-#define R_SPARC_LO10 12\r
-#define R_SPARC_GOT10 13\r
-#define R_SPARC_GOT13 14\r
-#define R_SPARC_GOT22 15\r
-#define R_SPARC_PC10 16\r
-#define R_SPARC_PC22 17\r
-#define R_SPARC_WPLT30 18\r
-#define R_SPARC_COPY 19\r
-#define R_SPARC_GLOB_DAT 20\r
-#define R_SPARC_JMP_SLOT 21\r
-#define R_SPARC_RELATIVE 22\r
-#define R_SPARC_UA32 23\r
-#define R_SPARC_PLT32 24\r
-#define R_SPARC_HIPLT22 25\r
-#define R_SPARC_LOPLT10 26\r
-#define R_SPARC_PCPLT32 27\r
-#define R_SPARC_PCPLT22 28\r
-#define R_SPARC_PCPLT10 29\r
-#define R_SPARC_10 30\r
-#define R_SPARC_11 31\r
-#define R_SPARC_64 32\r
-#define R_SPARC_OLO10 33\r
-#define R_SPARC_HH22 34\r
-#define R_SPARC_HM10 35\r
-#define R_SPARC_LM22 36\r
-#define R_SPARC_PC_HH22 37\r
-#define R_SPARC_PC_HM10 38\r
-#define R_SPARC_PC_LM22 39\r
-#define R_SPARC_WDISP16 40\r
-#define R_SPARC_WDISP19 41\r
-#define R_SPARC_GLOB_JMP 42\r
-#define R_SPARC_7 43\r
-#define R_SPARC_5 44\r
-#define R_SPARC_6 45\r
-#define R_SPARC_DISP64 46\r
-#define R_SPARC_PLT64 47\r
-#define R_SPARC_HIX22 48\r
-#define R_SPARC_LOX10 49\r
-#define R_SPARC_H44 50\r
-#define R_SPARC_M44 51\r
-#define R_SPARC_L44 52\r
-#define R_SPARC_REGISTER 53\r
-#define R_SPARC_UA64 54\r
-#define R_SPARC_UA16 55\r
-#define R_SPARC_TLS_GD_HI22 56\r
-#define R_SPARC_TLS_GD_LO10 57\r
-#define R_SPARC_TLS_GD_ADD 58\r
-#define R_SPARC_TLS_GD_CALL 59\r
-#define R_SPARC_TLS_LDM_HI22 60\r
-#define R_SPARC_TLS_LDM_LO10 61\r
-#define R_SPARC_TLS_LDM_ADD 62\r
-#define R_SPARC_TLS_LDM_CALL 63\r
+#define R_PPC_EMB_SDAI16 106\r
+#define R_PPC_EMB_SDA2I16 107\r
+#define R_PPC_EMB_SDA2REL 108\r
+#define R_PPC_EMB_SDA21 109\r
+#define R_PPC_EMB_MRKREF 110\r
+#define R_PPC_EMB_RELSEC16 111\r
+#define R_PPC_EMB_RELST_LO 112\r
+#define R_PPC_EMB_RELST_HI 113\r
+#define R_PPC_EMB_RELST_HA 114\r
+#define R_PPC_EMB_BIT_FLD 115\r
+#define R_PPC_EMB_RELSDA 116\r
+\r
+#define R_SPARC_NONE 0\r
+#define R_SPARC_8 1\r
+#define R_SPARC_16 2\r
+#define R_SPARC_32 3\r
+#define R_SPARC_DISP8 4\r
+#define R_SPARC_DISP16 5\r
+#define R_SPARC_DISP32 6\r
+#define R_SPARC_WDISP30 7\r
+#define R_SPARC_WDISP22 8\r
+#define R_SPARC_HI22 9\r
+#define R_SPARC_22 10\r
+#define R_SPARC_13 11\r
+#define R_SPARC_LO10 12\r
+#define R_SPARC_GOT10 13\r
+#define R_SPARC_GOT13 14\r
+#define R_SPARC_GOT22 15\r
+#define R_SPARC_PC10 16\r
+#define R_SPARC_PC22 17\r
+#define R_SPARC_WPLT30 18\r
+#define R_SPARC_COPY 19\r
+#define R_SPARC_GLOB_DAT 20\r
+#define R_SPARC_JMP_SLOT 21\r
+#define R_SPARC_RELATIVE 22\r
+#define R_SPARC_UA32 23\r
+#define R_SPARC_PLT32 24\r
+#define R_SPARC_HIPLT22 25\r
+#define R_SPARC_LOPLT10 26\r
+#define R_SPARC_PCPLT32 27\r
+#define R_SPARC_PCPLT22 28\r
+#define R_SPARC_PCPLT10 29\r
+#define R_SPARC_10 30\r
+#define R_SPARC_11 31\r
+#define R_SPARC_64 32\r
+#define R_SPARC_OLO10 33\r
+#define R_SPARC_HH22 34\r
+#define R_SPARC_HM10 35\r
+#define R_SPARC_LM22 36\r
+#define R_SPARC_PC_HH22 37\r
+#define R_SPARC_PC_HM10 38\r
+#define R_SPARC_PC_LM22 39\r
+#define R_SPARC_WDISP16 40\r
+#define R_SPARC_WDISP19 41\r
+#define R_SPARC_GLOB_JMP 42\r
+#define R_SPARC_7 43\r
+#define R_SPARC_5 44\r
+#define R_SPARC_6 45\r
+#define R_SPARC_DISP64 46\r
+#define R_SPARC_PLT64 47\r
+#define R_SPARC_HIX22 48\r
+#define R_SPARC_LOX10 49\r
+#define R_SPARC_H44 50\r
+#define R_SPARC_M44 51\r
+#define R_SPARC_L44 52\r
+#define R_SPARC_REGISTER 53\r
+#define R_SPARC_UA64 54\r
+#define R_SPARC_UA16 55\r
+#define R_SPARC_TLS_GD_HI22 56\r
+#define R_SPARC_TLS_GD_LO10 57\r
+#define R_SPARC_TLS_GD_ADD 58\r
+#define R_SPARC_TLS_GD_CALL 59\r
+#define R_SPARC_TLS_LDM_HI22 60\r
+#define R_SPARC_TLS_LDM_LO10 61\r
+#define R_SPARC_TLS_LDM_ADD 62\r
+#define R_SPARC_TLS_LDM_CALL 63\r
#define R_SPARC_TLS_LDO_HIX22 64\r
#define R_SPARC_TLS_LDO_LOX10 65\r
-#define R_SPARC_TLS_LDO_ADD 66\r
-#define R_SPARC_TLS_IE_HI22 67\r
-#define R_SPARC_TLS_IE_LO10 68\r
-#define R_SPARC_TLS_IE_LD 69\r
-#define R_SPARC_TLS_IE_LDX 70\r
-#define R_SPARC_TLS_IE_ADD 71\r
-#define R_SPARC_TLS_LE_HIX22 72\r
-#define R_SPARC_TLS_LE_LOX10 73\r
-#define R_SPARC_TLS_DTPMOD32 74\r
-#define R_SPARC_TLS_DTPMOD64 75\r
-#define R_SPARC_TLS_DTPOFF32 76\r
-#define R_SPARC_TLS_DTPOFF64 77\r
-#define R_SPARC_TLS_TPOFF32 78\r
-#define R_SPARC_TLS_TPOFF64 79\r
-\r
-#define R_X86_64_NONE 0 /* No relocation. */\r
-#define R_X86_64_64 1 /* Add 64 bit symbol value. */\r
-#define R_X86_64_PC32 2 /* PC-relative 32 bit signed sym value. */\r
-#define R_X86_64_GOT32 3 /* PC-relative 32 bit GOT offset. */\r
-#define R_X86_64_PLT32 4 /* PC-relative 32 bit PLT offset. */\r
-#define R_X86_64_COPY 5 /* Copy data from shared object. */\r
-#define R_X86_64_GLOB_DAT 6 /* Set GOT entry to data address. */\r
-#define R_X86_64_JMP_SLOT 7 /* Set GOT entry to code address. */\r
-#define R_X86_64_RELATIVE 8 /* Add load address of shared object. */\r
-#define R_X86_64_GOTPCREL 9 /* Add 32 bit signed pcrel offset to GOT. */\r
-#define R_X86_64_32 10 /* Add 32 bit zero extended symbol value */\r
-#define R_X86_64_32S 11 /* Add 32 bit sign extended symbol value */\r
-#define R_X86_64_16 12 /* Add 16 bit zero extended symbol value */\r
-#define R_X86_64_PC16 13 /* Add 16 bit signed extended pc relative symbol value */\r
-#define R_X86_64_8 14 /* Add 8 bit zero extended symbol value */\r
-#define R_X86_64_PC8 15 /* Add 8 bit signed extended pc relative symbol value */\r
-#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */\r
-#define R_X86_64_DTPOFF64 17 /* Offset in TLS block */\r
-#define R_X86_64_TPOFF64 18 /* Offset in static TLS block */\r
-#define R_X86_64_TLSGD 19 /* PC relative offset to GD GOT entry */\r
-#define R_X86_64_TLSLD 20 /* PC relative offset to LD GOT entry */\r
-#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */\r
-#define R_X86_64_GOTTPOFF 22 /* PC relative offset to IE GOT entry */\r
-#define R_X86_64_TPOFF32 23 /* Offset in static TLS block */\r
-#define R_X86_64_PC64 24 /* PC relative 64 bit */\r
-#define R_X86_64_GOTOFF64 25 /* 64 bit offset to GOT */\r
-#define R_X86_64_GOTPC3 26 /* 32 bit signed pc relative offset to GOT */\r
-#define R_X86_64_GOT64 27 /* 64-bit GOT entry offset */\r
-#define R_X86_64_GOTPCREL64 28 /* 64-bit PC relative offset to GOT entry */\r
-#define R_X86_64_GOTPC64 29 /* 64-bit PC relative offset to GOT */\r
-#define R_X86_64_GOTPLT64 30 /* like GOT64, says PLT entry needed */\r
-#define R_X86_64_PLTOFF64 31 /* 64-bit GOT relative offset to PLT entry */\r
-#define R_X86_64_SIZE32 32 /* Size of symbol plus 32-bit addend */\r
-#define R_X86_64_SIZE64 33 /* Size of symbol plus 64-bit addend */\r
-#define R_X86_64_GOTPC32_TLSDESC 34 /* GOT offset for TLS descriptor. */\r
-#define R_X86_64_TLSDESC_CALL 35 /* Marker for call through TLS descriptor. */\r
-#define R_X86_64_TLSDESC 36 /* TLS descriptor. */\r
-#define R_X86_64_IRELATIVE 37 /* Adjust indirectly by program base */\r
-#define R_X86_64_RELATIVE64 38 /* 64-bit adjust by program base */\r
-#define R_X86_64_GOTPCRELX 41 /* Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable. */\r
-#define R_X86_64_REX_GOTPCRELX 42 /* Load from 32 bit signed pc relative offset to GOT entry with REX prefix, relaxable. */\r
-\r
+#define R_SPARC_TLS_LDO_ADD 66\r
+#define R_SPARC_TLS_IE_HI22 67\r
+#define R_SPARC_TLS_IE_LO10 68\r
+#define R_SPARC_TLS_IE_LD 69\r
+#define R_SPARC_TLS_IE_LDX 70\r
+#define R_SPARC_TLS_IE_ADD 71\r
+#define R_SPARC_TLS_LE_HIX22 72\r
+#define R_SPARC_TLS_LE_LOX10 73\r
+#define R_SPARC_TLS_DTPMOD32 74\r
+#define R_SPARC_TLS_DTPMOD64 75\r
+#define R_SPARC_TLS_DTPOFF32 76\r
+#define R_SPARC_TLS_DTPOFF64 77\r
+#define R_SPARC_TLS_TPOFF32 78\r
+#define R_SPARC_TLS_TPOFF64 79\r
+\r
+#define R_X86_64_NONE 0 /* No relocation. */\r
+#define R_X86_64_64 1 /* Add 64 bit symbol value. */\r
+#define R_X86_64_PC32 2 /* PC-relative 32 bit signed sym value. */\r
+#define R_X86_64_GOT32 3 /* PC-relative 32 bit GOT offset. */\r
+#define R_X86_64_PLT32 4 /* PC-relative 32 bit PLT offset. */\r
+#define R_X86_64_COPY 5 /* Copy data from shared object. */\r
+#define R_X86_64_GLOB_DAT 6 /* Set GOT entry to data address. */\r
+#define R_X86_64_JMP_SLOT 7 /* Set GOT entry to code address. */\r
+#define R_X86_64_RELATIVE 8 /* Add load address of shared object. */\r
+#define R_X86_64_GOTPCREL 9 /* Add 32 bit signed pcrel offset to GOT. */\r
+#define R_X86_64_32 10 /* Add 32 bit zero extended symbol value */\r
+#define R_X86_64_32S 11 /* Add 32 bit sign extended symbol value */\r
+#define R_X86_64_16 12 /* Add 16 bit zero extended symbol value */\r
+#define R_X86_64_PC16 13 /* Add 16 bit signed extended pc relative symbol value */\r
+#define R_X86_64_8 14 /* Add 8 bit zero extended symbol value */\r
+#define R_X86_64_PC8 15 /* Add 8 bit signed extended pc relative symbol value */\r
+#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */\r
+#define R_X86_64_DTPOFF64 17 /* Offset in TLS block */\r
+#define R_X86_64_TPOFF64 18 /* Offset in static TLS block */\r
+#define R_X86_64_TLSGD 19 /* PC relative offset to GD GOT entry */\r
+#define R_X86_64_TLSLD 20 /* PC relative offset to LD GOT entry */\r
+#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */\r
+#define R_X86_64_GOTTPOFF 22 /* PC relative offset to IE GOT entry */\r
+#define R_X86_64_TPOFF32 23 /* Offset in static TLS block */\r
+#define R_X86_64_PC64 24 /* PC relative 64 bit */\r
+#define R_X86_64_GOTOFF64 25 /* 64 bit offset to GOT */\r
+#define R_X86_64_GOTPC3 26 /* 32 bit signed pc relative offset to GOT */\r
+#define R_X86_64_GOT64 27 /* 64-bit GOT entry offset */\r
+#define R_X86_64_GOTPCREL64 28 /* 64-bit PC relative offset to GOT entry */\r
+#define R_X86_64_GOTPC64 29 /* 64-bit PC relative offset to GOT */\r
+#define R_X86_64_GOTPLT64 30 /* like GOT64, says PLT entry needed */\r
+#define R_X86_64_PLTOFF64 31 /* 64-bit GOT relative offset to PLT entry */\r
+#define R_X86_64_SIZE32 32 /* Size of symbol plus 32-bit addend */\r
+#define R_X86_64_SIZE64 33 /* Size of symbol plus 64-bit addend */\r
+#define R_X86_64_GOTPC32_TLSDESC 34 /* GOT offset for TLS descriptor. */\r
+#define R_X86_64_TLSDESC_CALL 35 /* Marker for call through TLS descriptor. */\r
+#define R_X86_64_TLSDESC 36 /* TLS descriptor. */\r
+#define R_X86_64_IRELATIVE 37 /* Adjust indirectly by program base */\r
+#define R_X86_64_RELATIVE64 38 /* 64-bit adjust by program base */\r
+#define R_X86_64_GOTPCRELX 41 /* Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable. */\r
+#define R_X86_64_REX_GOTPCRELX 42 /* Load from 32 bit signed pc relative offset to GOT entry with REX prefix, relaxable. */\r
\r
#endif /* !_SYS_ELF_COMMON_H_ */\r
**/\r
BOOLEAN\r
IsElfFormat (\r
- IN CONST UINT8 *ImageBase\r
+ IN CONST UINT8 *ImageBase\r
)\r
{\r
- Elf32_Ehdr *Elf32Hdr;\r
- Elf64_Ehdr *Elf64Hdr;\r
+ Elf32_Ehdr *Elf32Hdr;\r
+ Elf64_Ehdr *Elf64Hdr;\r
\r
ASSERT (ImageBase != NULL);\r
\r
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||\r
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||\r
(Elf32Hdr->e_ident[EI_MAG2] != ELFMAG2)\r
- ) {\r
+ )\r
+ {\r
return FALSE;\r
}\r
\r
return FALSE;\r
}\r
}\r
+\r
return TRUE;\r
}\r
\r
**/\r
EFI_STATUS\r
CalculateElfFileSize (\r
- IN ELF_IMAGE_CONTEXT *ElfCt,\r
- OUT UINTN *FileSize\r
+ IN ELF_IMAGE_CONTEXT *ElfCt,\r
+ OUT UINTN *FileSize\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN FileSize1;\r
- UINTN FileSize2;\r
- Elf32_Ehdr *Elf32Hdr;\r
- Elf64_Ehdr *Elf64Hdr;\r
- UINTN Offset;\r
- UINTN Size;\r
+ EFI_STATUS Status;\r
+ UINTN FileSize1;\r
+ UINTN FileSize2;\r
+ Elf32_Ehdr *Elf32Hdr;\r
+ Elf64_Ehdr *Elf64Hdr;\r
+ UINTN Offset;\r
+ UINTN Size;\r
\r
if ((ElfCt == NULL) || (FileSize == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
\r
// Use last section as end of file\r
Status = GetElfSectionPos (ElfCt, ElfCt->ShNum - 1, &Offset, &Size);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return EFI_UNSUPPORTED;\r
}\r
+\r
FileSize1 = Offset + Size;\r
\r
// Use end of section header as end of file\r
FileSize2 = 0;\r
if (ElfCt->EiClass == ELFCLASS32) {\r
- Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
+ Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
FileSize2 = Elf32Hdr->e_shoff + Elf32Hdr->e_shentsize * Elf32Hdr->e_shnum;\r
} else if (ElfCt->EiClass == ELFCLASS64) {\r
- Elf64Hdr = (Elf64_Ehdr *)ElfCt->FileBase;\r
+ Elf64Hdr = (Elf64_Ehdr *)ElfCt->FileBase;\r
FileSize2 = (UINTN)(Elf64Hdr->e_shoff + Elf64Hdr->e_shentsize * Elf64Hdr->e_shnum);\r
}\r
\r
- *FileSize = MAX(FileSize1, FileSize2);\r
+ *FileSize = MAX (FileSize1, FileSize2);\r
\r
return EFI_SUCCESS;\r
}\r
**/\r
EFI_STATUS\r
GetElfSegmentInfo (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 EiClass,\r
- IN UINT32 Index,\r
- OUT SEGMENT_INFO *SegInfo\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 EiClass,\r
+ IN UINT32 Index,\r
+ OUT SEGMENT_INFO *SegInfo\r
)\r
{\r
- Elf32_Phdr *Elf32Phdr;\r
- Elf64_Phdr *Elf64Phdr;\r
+ Elf32_Phdr *Elf32Phdr;\r
+ Elf64_Phdr *Elf64Phdr;\r
\r
if ((ImageBase == NULL) || (SegInfo == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
if (EiClass == ELFCLASS32) {\r
Elf32Phdr = GetElf32SegmentByIndex (ImageBase, Index);\r
if (Elf32Phdr != NULL) {\r
- SegInfo->PtType = Elf32Phdr->p_type;\r
- SegInfo->Offset = Elf32Phdr->p_offset;\r
- SegInfo->Length = Elf32Phdr->p_filesz;\r
- SegInfo->MemLen = Elf32Phdr->p_memsz;\r
- SegInfo->MemAddr = Elf32Phdr->p_paddr;\r
+ SegInfo->PtType = Elf32Phdr->p_type;\r
+ SegInfo->Offset = Elf32Phdr->p_offset;\r
+ SegInfo->Length = Elf32Phdr->p_filesz;\r
+ SegInfo->MemLen = Elf32Phdr->p_memsz;\r
+ SegInfo->MemAddr = Elf32Phdr->p_paddr;\r
SegInfo->Alignment = Elf32Phdr->p_align;\r
return EFI_SUCCESS;\r
}\r
} else if (EiClass == ELFCLASS64) {\r
Elf64Phdr = GetElf64SegmentByIndex (ImageBase, Index);\r
if (Elf64Phdr != NULL) {\r
- SegInfo->PtType = Elf64Phdr->p_type;\r
- SegInfo->Offset = (UINTN)Elf64Phdr->p_offset;\r
- SegInfo->Length = (UINTN)Elf64Phdr->p_filesz;\r
- SegInfo->MemLen = (UINTN)Elf64Phdr->p_memsz;\r
- SegInfo->MemAddr = (UINTN)Elf64Phdr->p_paddr;\r
+ SegInfo->PtType = Elf64Phdr->p_type;\r
+ SegInfo->Offset = (UINTN)Elf64Phdr->p_offset;\r
+ SegInfo->Length = (UINTN)Elf64Phdr->p_filesz;\r
+ SegInfo->MemLen = (UINTN)Elf64Phdr->p_memsz;\r
+ SegInfo->MemAddr = (UINTN)Elf64Phdr->p_paddr;\r
SegInfo->Alignment = (UINTN)Elf64Phdr->p_align;\r
return EFI_SUCCESS;\r
}\r
EFI_STATUS\r
EFIAPI\r
ParseElfImage (\r
- IN VOID *ImageBase,\r
- OUT ELF_IMAGE_CONTEXT *ElfCt\r
+ IN VOID *ImageBase,\r
+ OUT ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- Elf32_Ehdr *Elf32Hdr;\r
- Elf64_Ehdr *Elf64Hdr;\r
- Elf32_Shdr *Elf32Shdr;\r
- Elf64_Shdr *Elf64Shdr;\r
- EFI_STATUS Status;\r
- UINT32 Index;\r
- SEGMENT_INFO SegInfo;\r
- UINTN End;\r
- UINTN Base;\r
+ Elf32_Ehdr *Elf32Hdr;\r
+ Elf64_Ehdr *Elf64Hdr;\r
+ Elf32_Shdr *Elf32Shdr;\r
+ Elf64_Shdr *Elf64Shdr;\r
+ EFI_STATUS Status;\r
+ UINT32 Index;\r
+ SEGMENT_INFO SegInfo;\r
+ UINTN End;\r
+ UINTN Base;\r
\r
if (ElfCt == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- ZeroMem (ElfCt, sizeof(ELF_IMAGE_CONTEXT));\r
+\r
+ ZeroMem (ElfCt, sizeof (ELF_IMAGE_CONTEXT));\r
\r
if (ImageBase == NULL) {\r
return (ElfCt->ParseStatus = EFI_INVALID_PARAMETER);\r
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);\r
}\r
\r
- Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
+ Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;\r
ElfCt->EiClass = Elf32Hdr->e_ident[EI_CLASS];\r
if (ElfCt->EiClass == ELFCLASS32) {\r
if ((Elf32Hdr->e_type != ET_EXEC) && (Elf32Hdr->e_type != ET_DYN)) {\r
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);\r
}\r
+\r
Elf32Shdr = (Elf32_Shdr *)GetElf32SectionByIndex (ElfCt->FileBase, Elf32Hdr->e_shstrndx);\r
if (Elf32Shdr == NULL) {\r
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);\r
}\r
+\r
ElfCt->EntryPoint = (UINTN)Elf32Hdr->e_entry;\r
ElfCt->ShNum = Elf32Hdr->e_shnum;\r
ElfCt->PhNum = Elf32Hdr->e_phnum;\r
ElfCt->ShStrLen = Elf32Shdr->sh_size;\r
ElfCt->ShStrOff = Elf32Shdr->sh_offset;\r
} else {\r
- Elf64Hdr = (Elf64_Ehdr *)Elf32Hdr;\r
+ Elf64Hdr = (Elf64_Ehdr *)Elf32Hdr;\r
if ((Elf64Hdr->e_type != ET_EXEC) && (Elf64Hdr->e_type != ET_DYN)) {\r
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);\r
}\r
+\r
Elf64Shdr = (Elf64_Shdr *)GetElf64SectionByIndex (ElfCt->FileBase, Elf64Hdr->e_shstrndx);\r
if (Elf64Shdr == NULL) {\r
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);\r
}\r
+\r
ElfCt->EntryPoint = (UINTN)Elf64Hdr->e_entry;\r
ElfCt->ShNum = Elf64Hdr->e_shnum;\r
ElfCt->PhNum = Elf64Hdr->e_phnum;\r
//\r
// Get the preferred image base and required memory size when loaded to new location.\r
//\r
- End = 0;\r
- Base = MAX_UINT32;\r
+ End = 0;\r
+ Base = MAX_UINT32;\r
ElfCt->ReloadRequired = FALSE;\r
for (Index = 0; Index < ElfCt->PhNum; Index++) {\r
Status = GetElfSegmentInfo (ElfCt->FileBase, ElfCt->EiClass, Index, &SegInfo);\r
if (Base > (SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1))) {\r
Base = SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1);\r
}\r
+\r
if (End < ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1) {\r
End = ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1;\r
}\r
}\r
+\r
//\r
// 0 - MAX_UINT32 + 1 equals to 0.\r
//\r
ElfCt->ImageSize = End - Base + 1;\r
- ElfCt->PreferredImageAddress = (VOID *) Base;\r
+ ElfCt->PreferredImageAddress = (VOID *)Base;\r
\r
CalculateElfFileSize (ElfCt, &ElfCt->FileSize);\r
- return (ElfCt->ParseStatus = EFI_SUCCESS);;\r
+ return (ElfCt->ParseStatus = EFI_SUCCESS);\r
}\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
LoadElfImage (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
if (ElfCt == NULL) {\r
return EFI_INVALID_PARAMETER;\r
return Status;\r
}\r
\r
-\r
/**\r
Get a ELF section name from its index.\r
\r
EFI_STATUS\r
EFIAPI\r
GetElfSectionName (\r
- IN ELF_IMAGE_CONTEXT *ElfCt,\r
- IN UINT32 SectionIndex,\r
- OUT CHAR8 **SectionName\r
+ IN ELF_IMAGE_CONTEXT *ElfCt,\r
+ IN UINT32 SectionIndex,\r
+ OUT CHAR8 **SectionName\r
)\r
{\r
- Elf32_Shdr *Elf32Shdr;\r
- Elf64_Shdr *Elf64Shdr;\r
- CHAR8 *Name;\r
+ Elf32_Shdr *Elf32Shdr;\r
+ Elf64_Shdr *Elf64Shdr;\r
+ CHAR8 *Name;\r
\r
if ((ElfCt == NULL) || (SectionName == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Get the offset and size of x-th ELF section.\r
\r
EFI_STATUS\r
EFIAPI\r
GetElfSectionPos (\r
- IN ELF_IMAGE_CONTEXT *ElfCt,\r
- IN UINT32 Index,\r
- OUT UINTN *Offset,\r
- OUT UINTN *Size\r
+ IN ELF_IMAGE_CONTEXT *ElfCt,\r
+ IN UINT32 Index,\r
+ OUT UINTN *Offset,\r
+ OUT UINTN *Size\r
)\r
{\r
- Elf32_Shdr *Elf32Shdr;\r
- Elf64_Shdr *Elf64Shdr;\r
+ Elf32_Shdr *Elf32Shdr;\r
+ Elf64_Shdr *Elf64Shdr;\r
\r
if ((ElfCt == NULL) || (Offset == NULL) || (Size == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
#define ELF_NEXT_ENTRY(EntryType, Current, EntrySize) \\r
((EntryType *) ((UINT8 *)Current + EntrySize))\r
\r
-\r
/**\r
Return the section header specified by Index.\r
\r
**/\r
Elf32_Shdr *\r
GetElf32SectionByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
);\r
\r
/**\r
**/\r
Elf64_Shdr *\r
GetElf64SectionByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
);\r
\r
/**\r
**/\r
Elf32_Phdr *\r
GetElf32SegmentByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
);\r
\r
/**\r
**/\r
Elf64_Phdr *\r
GetElf64SegmentByIndex (\r
- IN UINT8 *ImageBase,\r
- IN UINT32 Index\r
+ IN UINT8 *ImageBase,\r
+ IN UINT32 Index\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LoadElf32Image (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LoadElf64Image (\r
- IN ELF_IMAGE_CONTEXT *ElfCt\r
+ IN ELF_IMAGE_CONTEXT *ElfCt\r
);\r
\r
#endif\r
OUT UINT32 *AuthenticationState\r
)\r
{\r
- EFI_STATUS Status;\r
- VOID *Elf;\r
- UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
- ELF_IMAGE_CONTEXT Context;\r
- UNIVERSAL_PAYLOAD_INFO_HEADER *PldInfo;\r
- UINT32 Index;\r
- UINT16 ExtraDataIndex;\r
- CHAR8 *SectionName;\r
- UINTN Offset;\r
- UINTN Size;\r
- UINT32 ExtraDataCount;\r
- UINTN Instance;\r
- UINTN Length;\r
+ EFI_STATUS Status;\r
+ VOID *Elf;\r
+ UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
+ ELF_IMAGE_CONTEXT Context;\r
+ UNIVERSAL_PAYLOAD_INFO_HEADER *PldInfo;\r
+ UINT32 Index;\r
+ UINT16 ExtraDataIndex;\r
+ CHAR8 *SectionName;\r
+ UINTN Offset;\r
+ UINTN Size;\r
+ UINT32 ExtraDataCount;\r
+ UINTN Instance;\r
+ UINTN Length;\r
\r
//\r
// ELF is added to file as RAW section for EDKII bootloader.\r
} while (EFI_ERROR (Status));\r
\r
DEBUG ((\r
- DEBUG_INFO, "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",\r
- Context.FileSize, Context.ImageSize, Context.ReloadRequired\r
+ DEBUG_INFO,\r
+ "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",\r
+ Context.FileSize,\r
+ Context.ImageSize,\r
+ Context.ReloadRequired\r
));\r
\r
//\r
ExtraDataCount = 0;\r
for (Index = 0; Index < Context.ShNum; Index++) {\r
Status = GetElfSectionName (&Context, Index, &SectionName);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
continue;\r
}\r
+\r
DEBUG ((DEBUG_INFO, "Payload Section[%d]: %a\n", Index, SectionName));\r
- if (AsciiStrCmp(SectionName, UNIVERSAL_PAYLOAD_INFO_SEC_NAME) == 0) {\r
+ if (AsciiStrCmp (SectionName, UNIVERSAL_PAYLOAD_INFO_SEC_NAME) == 0) {\r
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);\r
- if (!EFI_ERROR(Status)) {\r
+ if (!EFI_ERROR (Status)) {\r
PldInfo = (UNIVERSAL_PAYLOAD_INFO_HEADER *)(Context.FileBase + Offset);\r
}\r
- } else if (AsciiStrnCmp(SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {\r
+ } else if (AsciiStrnCmp (SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {\r
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);\r
if (!EFI_ERROR (Status)) {\r
ExtraDataCount++;\r
//\r
// Report the additional PLD sections through HOB.\r
//\r
- Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraDataCount * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);\r
+ Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraDataCount * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);\r
ExtraData = BuildGuidHob (\r
- &gUniversalPayloadExtraDataGuid,\r
- Length\r
- );\r
- ExtraData->Count = ExtraDataCount;\r
+ &gUniversalPayloadExtraDataGuid,\r
+ Length\r
+ );\r
+ ExtraData->Count = ExtraDataCount;\r
ExtraData->Header.Revision = UNIVERSAL_PAYLOAD_EXTRA_DATA_REVISION;\r
- ExtraData->Header.Length = (UINT16) Length;\r
+ ExtraData->Header.Length = (UINT16)Length;\r
if (ExtraDataCount != 0) {\r
for (ExtraDataIndex = 0, Index = 0; Index < Context.ShNum; Index++) {\r
Status = GetElfSectionName (&Context, Index, &SectionName);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
continue;\r
}\r
- if (AsciiStrnCmp(SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {\r
+\r
+ if (AsciiStrnCmp (SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {\r
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);\r
if (!EFI_ERROR (Status)) {\r
ASSERT (ExtraDataIndex < ExtraDataCount);\r
AsciiStrCpyS (\r
ExtraData->Entry[ExtraDataIndex].Identifier,\r
- sizeof(ExtraData->Entry[ExtraDataIndex].Identifier),\r
+ sizeof (ExtraData->Entry[ExtraDataIndex].Identifier),\r
SectionName + UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH\r
);\r
ExtraData->Entry[ExtraDataIndex].Base = (UINTN)(Context.FileBase + Offset);\r
}\r
}\r
\r
- if (Context.ReloadRequired || Context.PreferredImageAddress != Context.FileBase) {\r
+ if (Context.ReloadRequired || (Context.PreferredImageAddress != Context.FileBase)) {\r
Context.ImageAddress = AllocatePages (EFI_SIZE_TO_PAGES (Context.ImageSize));\r
} else {\r
Context.ImageAddress = Context.FileBase;\r
// Load ELF into the required base\r
//\r
Status = LoadElfImage (&Context);\r
- if (!EFI_ERROR(Status)) {\r
- *ImageAddressArg = (UINTN) Context.ImageAddress;\r
+ if (!EFI_ERROR (Status)) {\r
+ *ImageAddressArg = (UINTN)Context.ImageAddress;\r
*EntryPoint = Context.EntryPoint;\r
*ImageSizeArg = Context.ImageSize;\r
}\r
+\r
return Status;\r
}\r
\r
-\r
-EFI_PEI_LOAD_FILE_PPI mPeiLoadFilePpi = {\r
+EFI_PEI_LOAD_FILE_PPI mPeiLoadFilePpi = {\r
PeiLoadFileLoadPayload\r
};\r
\r
-\r
-EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {\r
+EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {\r
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
&gEfiPeiLoadFilePpiGuid,\r
&mPeiLoadFilePpi\r
};\r
+\r
/**\r
\r
Install Pei Load File PPI.\r
)\r
{\r
EFI_STATUS Status;\r
+\r
Status = PeiServicesInstallPpi (&gPpiLoadFilePpiList);\r
\r
return Status;\r
#include "PchSmiDispatchSmm.h"\r
\r
typedef struct {\r
- UINT8 EosBitOffset;\r
- UINT8 ApmBitOffset;\r
- UINT32 SmiEosAddr;\r
- UINT32 SmiApmStsAddr;\r
+ UINT8 EosBitOffset;\r
+ UINT8 ApmBitOffset;\r
+ UINT32 SmiEosAddr;\r
+ UINT32 SmiApmStsAddr;\r
} SMM_PCH_REGISTER;\r
\r
-SMM_PCH_REGISTER mSmiPchReg;\r
+SMM_PCH_REGISTER mSmiPchReg;\r
\r
-EFI_SMM_CPU_PROTOCOL *mSmmCpuProtocol;\r
-LIST_ENTRY mSmmSwDispatch2Queue = INITIALIZE_LIST_HEAD_VARIABLE (mSmmSwDispatch2Queue);\r
+EFI_SMM_CPU_PROTOCOL *mSmmCpuProtocol;\r
+LIST_ENTRY mSmmSwDispatch2Queue = INITIALIZE_LIST_HEAD_VARIABLE (mSmmSwDispatch2Queue);\r
\r
/**\r
Find SmmSwDispatch2Context by SwSmiInputValue.\r
**/\r
EFI_SMM_SW_DISPATCH2_CONTEXT *\r
FindContextBySwSmiInputValue (\r
- IN UINTN SwSmiInputValue\r
+ IN UINTN SwSmiInputValue\r
)\r
{\r
- LIST_ENTRY *Node;\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
+ LIST_ENTRY *Node;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
\r
Node = mSmmSwDispatch2Queue.ForwardLink;\r
- for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
+ for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);\r
if (Dispatch2Context->SwSmiInputValue == SwSmiInputValue) {\r
return Dispatch2Context;\r
}\r
}\r
+\r
return NULL;\r
}\r
\r
**/\r
EFI_SMM_SW_DISPATCH2_CONTEXT *\r
FindContextByDispatchHandle (\r
- IN EFI_HANDLE DispatchHandle\r
+ IN EFI_HANDLE DispatchHandle\r
)\r
{\r
- LIST_ENTRY *Node;\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
+ LIST_ENTRY *Node;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
\r
Node = mSmmSwDispatch2Queue.ForwardLink;\r
- for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
+ for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);\r
if (Dispatch2Context->DispatchHandle == DispatchHandle) {\r
return Dispatch2Context;\r
}\r
}\r
+\r
return NULL;\r
}\r
\r
**/\r
EFI_STATUS\r
SmmSwDispatcher (\r
- IN EFI_HANDLE DispatchHandle,\r
- IN CONST VOID *RegisterContext,\r
- IN OUT VOID *CommBuffer,\r
- IN OUT UINTN *CommBufferSize\r
+ IN EFI_HANDLE DispatchHandle,\r
+ IN CONST VOID *RegisterContext,\r
+ IN OUT VOID *CommBuffer,\r
+ IN OUT UINTN *CommBufferSize\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_SMM_SW_CONTEXT SwContext;\r
- UINTN Index;\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
- EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction;\r
- EFI_SMM_SW_REGISTER_CONTEXT DispatchContext;\r
- UINTN Size;\r
- EFI_SMM_SAVE_STATE_IO_INFO IoInfo;\r
+ EFI_STATUS Status;\r
+ EFI_SMM_SW_CONTEXT SwContext;\r
+ UINTN Index;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
+ EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction;\r
+ EFI_SMM_SW_REGISTER_CONTEXT DispatchContext;\r
+ UINTN Size;\r
+ EFI_SMM_SAVE_STATE_IO_INFO IoInfo;\r
\r
//\r
// Construct new context\r
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {\r
Status = mSmmCpuProtocol->ReadSaveState (\r
mSmmCpuProtocol,\r
- sizeof(IoInfo),\r
+ sizeof (IoInfo),\r
EFI_SMM_SAVE_STATE_REGISTER_IO,\r
Index,\r
&IoInfo\r
if (EFI_ERROR (Status)) {\r
continue;\r
}\r
+\r
if (IoInfo.IoPort == SMM_CONTROL_PORT) {\r
//\r
// Great! Find it.\r
Status = EFI_SUCCESS;\r
goto End;\r
}\r
+\r
DEBUG ((DEBUG_VERBOSE, "Prepare to call handler for 0x%x\n", SwContext.CommandPort));\r
\r
//\r
// Dispatch\r
//\r
DispatchContext.SwSmiInputValue = SwContext.CommandPort;\r
- Size = sizeof(SwContext);\r
- DispatchFunction = (EFI_SMM_HANDLER_ENTRY_POINT2)Context->DispatchFunction;\r
- Status = DispatchFunction (DispatchHandle, &DispatchContext, &SwContext, &Size);\r
+ Size = sizeof (SwContext);\r
+ DispatchFunction = (EFI_SMM_HANDLER_ENTRY_POINT2)Context->DispatchFunction;\r
+ Status = DispatchFunction (DispatchHandle, &DispatchContext, &SwContext, &Size);\r
\r
End:\r
//\r
//\r
IoOr32 (mSmiPchReg.SmiApmStsAddr, 1 << mSmiPchReg.ApmBitOffset);\r
\r
-\r
//\r
// Set EOS bit\r
//\r
return Status;\r
}\r
\r
-\r
/**\r
Check the SwSmiInputValue is already used\r
\r
**/\r
EFI_STATUS\r
SmiInputValueCheck (\r
- IN UINTN SwSmiInputValue\r
+ IN UINTN SwSmiInputValue\r
)\r
{\r
- LIST_ENTRY *Node;\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
+ LIST_ENTRY *Node;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;\r
\r
Node = mSmmSwDispatch2Queue.ForwardLink;\r
- for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
+ for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {\r
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);\r
if (Dispatch2Context->SwSmiInputValue == SwSmiInputValue) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Register a child SMI source dispatch function for the specified software SMI.\r
\r
OUT EFI_HANDLE *DispatchHandle\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index;\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
+ EFI_STATUS Status;\r
+ UINTN Index;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
\r
if (RegContext->SwSmiInputValue == (UINTN)-1) {\r
//\r
break;\r
}\r
}\r
+\r
if (RegContext->SwSmiInputValue == (UINTN)-1) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
//\r
// Register\r
//\r
- Status = gSmst->SmmAllocatePool (EfiRuntimeServicesData, sizeof(*Context), (VOID **)&Context);\r
+ Status = gSmst->SmmAllocatePool (EfiRuntimeServicesData, sizeof (*Context), (VOID **)&Context);\r
ASSERT_EFI_ERROR (Status);\r
if (EFI_ERROR (Status)) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
- *DispatchHandle = (EFI_HANDLE )Context;\r
+ *DispatchHandle = (EFI_HANDLE)Context;\r
Context->Signature = SMI_SW_HANDLER_SIGNATURE;\r
Context->SwSmiInputValue = RegContext->SwSmiInputValue;\r
Context->DispatchFunction = (UINTN)DispatchFunction;\r
return Status;\r
}\r
\r
-\r
/**\r
Unregister a child SMI source dispatch function for the specified software SMI.\r
\r
IN EFI_HANDLE DispatchHandle\r
)\r
{\r
- EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
+ EFI_SMM_SW_DISPATCH2_CONTEXT *Context;\r
\r
//\r
// Unregister\r
return EFI_SUCCESS;\r
}\r
\r
-\r
-EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {\r
+EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {\r
SmmSwDispatch2Register,\r
SmmSwDispatch2UnRegister,\r
MAXIMUM_SWI_VALUE\r
};\r
\r
-\r
/**\r
Get specified SMI register based on given register ID\r
\r
**/\r
PLD_GENERIC_REGISTER *\r
GetSmmCtrlRegById (\r
- IN PLD_SMM_REGISTERS *SmmRegister,\r
- IN UINT32 Id\r
+ IN PLD_SMM_REGISTERS *SmmRegister,\r
+ IN UINT32 Id\r
)\r
{\r
- UINT32 Index;\r
- PLD_GENERIC_REGISTER *PldReg;\r
+ UINT32 Index;\r
+ PLD_GENERIC_REGISTER *PldReg;\r
\r
PldReg = NULL;\r
for (Index = 0; Index < SmmRegister->Count; Index++) {\r
(PldReg->Address.Address == 0) ||\r
(PldReg->Address.RegisterBitWidth != 1) ||\r
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||\r
- (PldReg->Value != 1)) {\r
+ (PldReg->Value != 1))\r
+ {\r
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));\r
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));\r
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));\r
DEBUG ((DEBUG_INFO, "RegBitOffset = 0x%x\n", PldReg->Address.RegisterBitOffset));\r
DEBUG ((DEBUG_INFO, "AccessSize = 0x%x\n", PldReg->Address.AccessSize));\r
- DEBUG ((DEBUG_INFO, "Address = 0x%lx\n",PldReg->Address.Address ));\r
+ DEBUG ((DEBUG_INFO, "Address = 0x%lx\n", PldReg->Address.Address));\r
return NULL;\r
}\r
\r
return PldReg;\r
}\r
\r
-\r
/**\r
Entry Point for this driver.\r
\r
EFI_STATUS\r
EFIAPI\r
PchSmiDispatchEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_HANDLE DispatchHandle;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- PLD_SMM_REGISTERS *SmmRegister;\r
- PLD_GENERIC_REGISTER *SmiEosReg;\r
- PLD_GENERIC_REGISTER *SmiApmStsReg;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE DispatchHandle;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ PLD_SMM_REGISTERS *SmmRegister;\r
+ PLD_GENERIC_REGISTER *SmiEosReg;\r
+ PLD_GENERIC_REGISTER *SmiApmStsReg;\r
\r
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);\r
if (GuidHob == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
- SmmRegister = (PLD_SMM_REGISTERS *) GET_GUID_HOB_DATA(GuidHob);\r
- SmiEosReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_EOS);\r
+ SmmRegister = (PLD_SMM_REGISTERS *)GET_GUID_HOB_DATA (GuidHob);\r
+ SmiEosReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_EOS);\r
if (SmiEosReg == NULL) {\r
DEBUG ((DEBUG_ERROR, "SMI EOS reg not found.\n"));\r
return EFI_NOT_FOUND;\r
}\r
+\r
mSmiPchReg.SmiEosAddr = (UINT32)SmiEosReg->Address.Address;\r
mSmiPchReg.EosBitOffset = SmiEosReg->Address.RegisterBitOffset;\r
\r
DEBUG ((DEBUG_ERROR, "SMI APM status reg not found.\n"));\r
return EFI_NOT_FOUND;\r
}\r
+\r
mSmiPchReg.SmiApmStsAddr = (UINT32)SmiApmStsReg->Address.Address;\r
mSmiPchReg.ApmBitOffset = SmiApmStsReg->Address.RegisterBitOffset;\r
\r
// Publish PI SMM SwDispatch2 Protocol\r
//\r
ImageHandle = NULL;\r
- Status = gSmst->SmmInstallProtocolInterface (\r
- &ImageHandle,\r
- &gEfiSmmSwDispatch2ProtocolGuid,\r
- EFI_NATIVE_INTERFACE,\r
- &gSmmSwDispatch2\r
- );\r
+ Status = gSmst->SmmInstallProtocolInterface (\r
+ &ImageHandle,\r
+ &gEfiSmmSwDispatch2ProtocolGuid,\r
+ EFI_NATIVE_INTERFACE,\r
+ &gSmmSwDispatch2\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
return Status;\r
}\r
-\r
#define SMM_DATA_PORT 0xB3\r
\r
typedef struct {\r
- UINTN Signature;\r
- LIST_ENTRY Link;\r
- EFI_HANDLE DispatchHandle;\r
- UINTN SwSmiInputValue;\r
- UINTN DispatchFunction;\r
+ UINTN Signature;\r
+ LIST_ENTRY Link;\r
+ EFI_HANDLE DispatchHandle;\r
+ UINTN SwSmiInputValue;\r
+ UINTN DispatchFunction;\r
} EFI_SMM_SW_DISPATCH2_CONTEXT;\r
\r
#endif\r
-\r
\r
#include "SmmAccessDxe.h"\r
\r
-SMM_ACCESS_PRIVATE_DATA mSmmAccess;\r
+SMM_ACCESS_PRIVATE_DATA mSmmAccess;\r
\r
/**\r
Update region state from SMRAM description\r
\r
**/\r
VOID\r
-SyncRegionState2SmramDesc(\r
- IN BOOLEAN OrLogic,\r
- IN UINT64 Value\r
+SyncRegionState2SmramDesc (\r
+ IN BOOLEAN OrLogic,\r
+ IN UINT64 Value\r
)\r
{\r
- UINT32 Index;\r
+ UINT32 Index;\r
\r
for (Index = 0; Index < mSmmAccess.NumberRegions; Index++) {\r
if (OrLogic) {\r
EFI_STATUS\r
EFIAPI\r
Open (\r
- IN EFI_SMM_ACCESS2_PROTOCOL *This\r
+ IN EFI_SMM_ACCESS2_PROTOCOL *This\r
)\r
{\r
if ((mSmmAccess.SmmRegionState & EFI_SMRAM_LOCKED) != 0) {\r
}\r
\r
mSmmAccess.SmmRegionState &= ~(EFI_SMRAM_CLOSED | EFI_ALLOCATED);\r
- SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~(EFI_SMRAM_CLOSED | EFI_ALLOCATED)));\r
+ SyncRegionState2SmramDesc (FALSE, (UINT64)(UINTN)(~(EFI_SMRAM_CLOSED | EFI_ALLOCATED)));\r
\r
mSmmAccess.SmmRegionState |= EFI_SMRAM_OPEN;\r
- SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_OPEN);\r
+ SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_OPEN);\r
mSmmAccess.SmmAccess.OpenState = TRUE;\r
\r
return EFI_SUCCESS;\r
EFI_STATUS\r
EFIAPI\r
Close (\r
- IN EFI_SMM_ACCESS2_PROTOCOL *This\r
+ IN EFI_SMM_ACCESS2_PROTOCOL *This\r
)\r
{\r
if ((mSmmAccess.SmmRegionState & EFI_SMRAM_LOCKED) != 0) {\r
}\r
\r
mSmmAccess.SmmRegionState &= ~EFI_SMRAM_OPEN;\r
- SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~EFI_SMRAM_OPEN));\r
+ SyncRegionState2SmramDesc (FALSE, (UINT64)(UINTN)(~EFI_SMRAM_OPEN));\r
\r
mSmmAccess.SmmRegionState |= (EFI_SMRAM_CLOSED | EFI_ALLOCATED);\r
- SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_CLOSED | EFI_ALLOCATED);\r
+ SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_CLOSED | EFI_ALLOCATED);\r
\r
mSmmAccess.SmmAccess.OpenState = FALSE;\r
\r
EFI_STATUS\r
EFIAPI\r
Lock (\r
- IN EFI_SMM_ACCESS2_PROTOCOL *This\r
+ IN EFI_SMM_ACCESS2_PROTOCOL *This\r
)\r
{\r
if (mSmmAccess.SmmAccess.OpenState) {\r
}\r
\r
mSmmAccess.SmmRegionState |= EFI_SMRAM_LOCKED;\r
- SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_LOCKED);\r
+ SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_LOCKED);\r
mSmmAccess.SmmAccess.LockState = TRUE;\r
return EFI_SUCCESS;\r
}\r
EFI_STATUS\r
EFIAPI\r
GetCapabilities (\r
- IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,\r
- IN OUT UINTN *SmramMapSize,\r
- IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap\r
+ IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,\r
+ IN OUT UINTN *SmramMapSize,\r
+ IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN NecessaryBufferSize;\r
+ EFI_STATUS Status;\r
+ UINTN NecessaryBufferSize;\r
\r
- NecessaryBufferSize = mSmmAccess.NumberRegions * sizeof(EFI_SMRAM_DESCRIPTOR);\r
+ NecessaryBufferSize = mSmmAccess.NumberRegions * sizeof (EFI_SMRAM_DESCRIPTOR);\r
if (*SmramMapSize < NecessaryBufferSize) {\r
Status = EFI_BUFFER_TOO_SMALL;\r
} else {\r
- CopyMem(SmramMap, mSmmAccess.SmramDesc, NecessaryBufferSize);\r
+ CopyMem (SmramMap, mSmmAccess.SmramDesc, NecessaryBufferSize);\r
Status = EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
SmmAccessEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
EFI_STATUS Status;\r
DEBUG ((DEBUG_INFO, "SMRAM HOB NOT found\n"));\r
return EFI_NOT_FOUND;\r
}\r
- SmramHob = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) GET_GUID_HOB_DATA(GuidHob);\r
- SmmRegionNum = SmramHob->NumberOfSmmReservedRegions;\r
+\r
+ SmramHob = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)GET_GUID_HOB_DATA (GuidHob);\r
+ SmmRegionNum = SmramHob->NumberOfSmmReservedRegions;\r
mSmmAccess.SmramDesc = AllocateZeroPool (sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);\r
if (mSmmAccess.SmramDesc == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
+\r
CopyMem (mSmmAccess.SmramDesc, &SmramHob->Descriptor, sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);\r
\r
DEBUG ((DEBUG_INFO, "NumberOfSmmReservedRegions = 0x%x\n", SmmRegionNum));\r
for (Index = 0; Index < SmmRegionNum; Index++) {\r
- DEBUG ((DEBUG_INFO, "%d: base=0x%x, size = 0x%x, State=0x%x\n",Index,\r
- SmramHob->Descriptor[Index].PhysicalStart,\r
- SmramHob->Descriptor[Index].PhysicalSize,\r
- SmramHob->Descriptor[Index].RegionState));\r
- mSmmAccess.SmramDesc[Index].RegionState &= EFI_ALLOCATED;\r
- mSmmAccess.SmramDesc[Index].RegionState |= EFI_SMRAM_CLOSED | EFI_CACHEABLE;\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%d: base=0x%x, size = 0x%x, State=0x%x\n",\r
+ Index,\r
+ SmramHob->Descriptor[Index].PhysicalStart,\r
+ SmramHob->Descriptor[Index].PhysicalSize,\r
+ SmramHob->Descriptor[Index].RegionState\r
+ ));\r
+ mSmmAccess.SmramDesc[Index].RegionState &= EFI_ALLOCATED;\r
+ mSmmAccess.SmramDesc[Index].RegionState |= EFI_SMRAM_CLOSED | EFI_CACHEABLE;\r
}\r
\r
- mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;\r
- mSmmAccess.NumberRegions = SmmRegionNum;\r
- mSmmAccess.SmmAccess.Open = Open;\r
- mSmmAccess.SmmAccess.Close = Close;\r
- mSmmAccess.SmmAccess.Lock = Lock;\r
- mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;\r
- mSmmAccess.SmmAccess.LockState = FALSE;\r
- mSmmAccess.SmmAccess.OpenState = FALSE;\r
- mSmmAccess.SmmRegionState = EFI_SMRAM_CLOSED;\r
+ mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;\r
+ mSmmAccess.NumberRegions = SmmRegionNum;\r
+ mSmmAccess.SmmAccess.Open = Open;\r
+ mSmmAccess.SmmAccess.Close = Close;\r
+ mSmmAccess.SmmAccess.Lock = Lock;\r
+ mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;\r
+ mSmmAccess.SmmAccess.LockState = FALSE;\r
+ mSmmAccess.SmmAccess.OpenState = FALSE;\r
+ mSmmAccess.SmmRegionState = EFI_SMRAM_CLOSED;\r
\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
&mSmmAccess.Handle,\r
#include <Library/BaseMemoryLib.h>\r
#include <Guid/SmramMemoryReserve.h>\r
\r
-\r
#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('S', 'M', 'M', 'A')\r
\r
typedef struct {\r
- UINTN Signature;\r
- EFI_HANDLE Handle;\r
- EFI_SMM_ACCESS2_PROTOCOL SmmAccess;\r
+ UINTN Signature;\r
+ EFI_HANDLE Handle;\r
+ EFI_SMM_ACCESS2_PROTOCOL SmmAccess;\r
//\r
// Local Data for SMM Access interface goes here\r
//\r
- UINT32 SmmRegionState;\r
- UINT32 NumberRegions;\r
- EFI_SMRAM_DESCRIPTOR *SmramDesc;\r
+ UINT32 SmmRegionState;\r
+ UINT32 NumberRegions;\r
+ EFI_SMRAM_DESCRIPTOR *SmramDesc;\r
} SMM_ACCESS_PRIVATE_DATA;\r
\r
#endif\r
#include <Library/BaseMemoryLib.h>\r
#include <Guid/SmmRegisterInfoGuid.h>\r
\r
-#define SMM_DATA_PORT 0xB3\r
-#define SMM_CONTROL_PORT 0xB2\r
+#define SMM_DATA_PORT 0xB3\r
+#define SMM_CONTROL_PORT 0xB2\r
\r
typedef struct {\r
- UINT8 GblBitOffset;\r
- UINT8 ApmBitOffset;\r
- UINT32 Address;\r
+ UINT8 GblBitOffset;\r
+ UINT8 ApmBitOffset;\r
+ UINT32 Address;\r
} SMM_CONTROL2_REG;\r
\r
-SMM_CONTROL2_REG mSmiCtrlReg;\r
+SMM_CONTROL2_REG mSmiCtrlReg;\r
\r
/**\r
Invokes SMI activation from either the preboot or runtime environment.\r
EFI_STATUS\r
EFIAPI\r
Activate (\r
- IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
- IN OUT UINT8 *CommandPort OPTIONAL,\r
- IN OUT UINT8 *DataPort OPTIONAL,\r
- IN BOOLEAN Periodic OPTIONAL,\r
- IN EFI_SMM_PERIOD ActivationInterval OPTIONAL\r
+ IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
+ IN OUT UINT8 *CommandPort OPTIONAL,\r
+ IN OUT UINT8 *DataPort OPTIONAL,\r
+ IN BOOLEAN Periodic OPTIONAL,\r
+ IN EFI_SMM_PERIOD ActivationInterval OPTIONAL\r
)\r
{\r
- UINT32 SmiEn;\r
- UINT32 SmiEnableBits;\r
+ UINT32 SmiEn;\r
+ UINT32 SmiEnableBits;\r
\r
if (Periodic) {\r
return EFI_INVALID_PARAMETER;\r
IoWrite32 (mSmiCtrlReg.Address, SmiEn | SmiEnableBits);\r
}\r
\r
- IoWrite8 (SMM_DATA_PORT, DataPort == NULL ? 0 : *DataPort);\r
+ IoWrite8 (SMM_DATA_PORT, DataPort == NULL ? 0 : *DataPort);\r
IoWrite8 (SMM_CONTROL_PORT, CommandPort == NULL ? 0 : *CommandPort);\r
return EFI_SUCCESS;\r
}\r
EFI_STATUS\r
EFIAPI\r
Deactivate (\r
- IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
- IN BOOLEAN Periodic\r
+ IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
+ IN BOOLEAN Periodic\r
)\r
{\r
if (Periodic) {\r
///\r
/// SMM COntrol2 Protocol instance\r
///\r
-EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {\r
+EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {\r
Activate,\r
Deactivate,\r
0\r
**/\r
PLD_GENERIC_REGISTER *\r
GetSmmCtrlRegById (\r
- IN PLD_SMM_REGISTERS *SmmRegister,\r
- IN UINT32 Id\r
+ IN PLD_SMM_REGISTERS *SmmRegister,\r
+ IN UINT32 Id\r
)\r
{\r
- UINT32 Index;\r
- PLD_GENERIC_REGISTER *PldReg;\r
+ UINT32 Index;\r
+ PLD_GENERIC_REGISTER *PldReg;\r
\r
PldReg = NULL;\r
for (Index = 0; Index < SmmRegister->Count; Index++) {\r
(PldReg->Address.Address == 0) ||\r
(PldReg->Address.RegisterBitWidth != 1) ||\r
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||\r
- (PldReg->Value != 1)) {\r
+ (PldReg->Value != 1))\r
+ {\r
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));\r
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));\r
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));\r
DEBUG ((DEBUG_INFO, "RegBitOffset = 0x%x\n", PldReg->Address.RegisterBitOffset));\r
DEBUG ((DEBUG_INFO, "AccessSize = 0x%x\n", PldReg->Address.AccessSize));\r
- DEBUG ((DEBUG_INFO, "Address = 0x%lx\n",PldReg->Address.Address ));\r
+ DEBUG ((DEBUG_INFO, "Address = 0x%lx\n", PldReg->Address.Address));\r
return NULL;\r
}\r
+\r
return PldReg;\r
}\r
\r
-\r
/**\r
Fixup data pointers so that the services can be called in virtual mode.\r
\r
VOID\r
EFIAPI\r
SmmControlVirtualAddressChangeEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
)\r
{\r
- EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Trigger));\r
- EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Clear));\r
+ EfiConvertPointer (0x0, (VOID **)&(mSmmControl2.Trigger));\r
+ EfiConvertPointer (0x0, (VOID **)&(mSmmControl2.Clear));\r
}\r
\r
-\r
/**\r
This function installs EFI_SMM_CONTROL2_PROTOCOL.\r
\r
EFI_STATUS\r
EFIAPI\r
SmmControlEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- PLD_SMM_REGISTERS *SmmRegister;\r
- PLD_GENERIC_REGISTER *SmiGblEnReg;\r
- PLD_GENERIC_REGISTER *SmiApmEnReg;\r
- EFI_EVENT Event;\r
+ EFI_STATUS Status;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ PLD_SMM_REGISTERS *SmmRegister;\r
+ PLD_GENERIC_REGISTER *SmiGblEnReg;\r
+ PLD_GENERIC_REGISTER *SmiApmEnReg;\r
+ EFI_EVENT Event;\r
\r
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);\r
if (GuidHob == NULL) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
- SmmRegister = (PLD_SMM_REGISTERS *) (GET_GUID_HOB_DATA(GuidHob));\r
+ SmmRegister = (PLD_SMM_REGISTERS *)(GET_GUID_HOB_DATA (GuidHob));\r
SmiGblEnReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_GBL_EN);\r
if (SmiGblEnReg == NULL) {\r
DEBUG ((DEBUG_ERROR, "SMI global enable reg not found.\n"));\r
return EFI_NOT_FOUND;\r
}\r
+\r
mSmiCtrlReg.Address = (UINT32)SmiGblEnReg->Address.Address;\r
mSmiCtrlReg.GblBitOffset = SmiGblEnReg->Address.RegisterBitOffset;\r
\r
DEBUG ((DEBUG_ERROR, "APM:0x%x, GBL:0x%x\n", SmiApmEnReg->Address.Address, mSmiCtrlReg.Address));\r
return EFI_UNSUPPORTED;\r
}\r
+\r
mSmiCtrlReg.ApmBitOffset = SmiApmEnReg->Address.RegisterBitOffset;\r
\r
//\r
\r
#include "UefiPayloadEntry.h"\r
\r
-\r
/**\r
Find the board related info from ACPI table\r
\r
**/\r
RETURN_STATUS\r
ParseAcpiInfo (\r
- IN UINT64 AcpiTableBase,\r
- OUT ACPI_BOARD_INFO *AcpiBoardInfo\r
+ IN UINT64 AcpiTableBase,\r
+ OUT ACPI_BOARD_INFO *AcpiBoardInfo\r
)\r
{\r
- EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;\r
- EFI_ACPI_DESCRIPTION_HEADER *Rsdt;\r
- UINT32 *Entry32;\r
- UINTN Entry32Num;\r
- EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;\r
- EFI_ACPI_DESCRIPTION_HEADER *Xsdt;\r
- UINT64 *Entry64;\r
- UINTN Entry64Num;\r
- UINTN Idx;\r
- UINT32 *Signature;\r
- EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;\r
- EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;\r
+ EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;\r
+ EFI_ACPI_DESCRIPTION_HEADER *Rsdt;\r
+ UINT32 *Entry32;\r
+ UINTN Entry32Num;\r
+ EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;\r
+ EFI_ACPI_DESCRIPTION_HEADER *Xsdt;\r
+ UINT64 *Entry64;\r
+ UINTN Entry64Num;\r
+ UINTN Idx;\r
+ UINT32 *Signature;\r
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;\r
+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;\r
\r
Rsdp = (EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)(UINTN)AcpiTableBase;\r
DEBUG ((DEBUG_INFO, "Rsdp at 0x%p\n", Rsdp));\r
MmCfgHdr = NULL;\r
Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);\r
if (Rsdt != NULL) {\r
- Entry32 = (UINT32 *)(Rsdt + 1);\r
- Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;\r
+ Entry32 = (UINT32 *)(Rsdt + 1);\r
+ Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;\r
for (Idx = 0; Idx < Entry32Num; Idx++) {\r
Signature = (UINT32 *)(UINTN)Entry32[Idx];\r
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
//\r
// Search Xsdt Second\r
//\r
- Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);\r
+ Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);\r
if (Xsdt != NULL) {\r
- Entry64 = (UINT64 *)(Xsdt + 1);\r
- Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;\r
+ Entry64 = (UINT64 *)(Xsdt + 1);\r
+ Entry64Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 3;\r
for (Idx = 0; Idx < Entry64Num; Idx++) {\r
Signature = (UINT32 *)(UINTN)Entry64[Idx];\r
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
AcpiBoardInfo->PmGpeEnBase = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;\r
\r
if (MmCfgHdr != NULL) {\r
- MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8*) MmCfgHdr + sizeof (*MmCfgHdr));\r
+ MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8 *)MmCfgHdr + sizeof (*MmCfgHdr));\r
AcpiBoardInfo->PcieBaseAddress = MmCfgBase->BaseAddress;\r
- AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;\r
+ AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;\r
} else {\r
AcpiBoardInfo->PcieBaseAddress = 0;\r
- AcpiBoardInfo->PcieBaseSize = 0;\r
+ AcpiBoardInfo->PcieBaseSize = 0;\r
}\r
- DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));\r
- DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));\r
- DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));\r
+\r
+ DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));\r
+ DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));\r
+ DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));\r
DEBUG ((DEBUG_INFO, "Reset Value 0x%x\n", AcpiBoardInfo->ResetValue));\r
- DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));\r
- DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));\r
+ DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));\r
+ DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));\r
DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));\r
DEBUG ((DEBUG_INFO, "PcieBaseSize 0x%lx\n", AcpiBoardInfo->PcieBaseSize));\r
\r
//\r
// Verify values for proper operation\r
//\r
- ASSERT(Fadt->Pm1aCntBlk != 0);\r
- ASSERT(Fadt->PmTmrBlk != 0);\r
- ASSERT(Fadt->ResetReg.Address != 0);\r
- ASSERT(Fadt->Pm1aEvtBlk != 0);\r
- ASSERT(Fadt->Gpe0Blk != 0);\r
+ ASSERT (Fadt->Pm1aCntBlk != 0);\r
+ ASSERT (Fadt->PmTmrBlk != 0);\r
+ ASSERT (Fadt->ResetReg.Address != 0);\r
+ ASSERT (Fadt->Pm1aEvtBlk != 0);\r
+ ASSERT (Fadt->Gpe0Blk != 0);\r
\r
DEBUG_CODE_BEGIN ();\r
- BOOLEAN SciEnabled;\r
+ BOOLEAN SciEnabled;\r
+\r
+ //\r
+ // Check the consistency of SCI enabling\r
+ //\r
\r
+ //\r
+ // Get SCI_EN value\r
+ //\r
+ if (Fadt->Pm1CntLen == 4) {\r
+ SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;\r
+ } else {\r
//\r
- // Check the consistency of SCI enabling\r
+ // if (Pm1CntLen == 2), use 16 bit IO read;\r
+ // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback\r
//\r
+ SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;\r
+ }\r
\r
+ if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&\r
+ (Fadt->SmiCmd == 0) &&\r
+ !SciEnabled)\r
+ {\r
//\r
- // Get SCI_EN value\r
+ // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI\r
+ // table does not provide a means to enable it through FADT->SmiCmd\r
//\r
- if (Fadt->Pm1CntLen == 4) {\r
- SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;\r
- } else {\r
- //\r
- // if (Pm1CntLen == 2), use 16 bit IO read;\r
- // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback\r
- //\r
- SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;\r
- }\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "ERROR: The ACPI enabling status is inconsistent: SCI is not"\r
+ " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."\r
+ " This may cause issues in OS.\n"\r
+ ));\r
+ }\r
\r
- if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&\r
- (Fadt->SmiCmd == 0) &&\r
- !SciEnabled) {\r
- //\r
- // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI\r
- // table does not provide a means to enable it through FADT->SmiCmd\r
- //\r
- DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"\r
- " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."\r
- " This may cause issues in OS.\n"));\r
- }\r
DEBUG_CODE_END ();\r
\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
/**\r
Build ACPI board info HOB using infomation from ACPI table\r
\r
**/\r
ACPI_BOARD_INFO *\r
BuildHobFromAcpi (\r
- IN UINT64 AcpiTableBase\r
+ IN UINT64 AcpiTableBase\r
)\r
{\r
- EFI_STATUS Status;\r
- ACPI_BOARD_INFO AcpiBoardInfo;\r
- ACPI_BOARD_INFO *NewAcpiBoardInfo;\r
+ EFI_STATUS Status;\r
+ ACPI_BOARD_INFO AcpiBoardInfo;\r
+ ACPI_BOARD_INFO *NewAcpiBoardInfo;\r
\r
NewAcpiBoardInfo = NULL;\r
- Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);\r
+ Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);\r
ASSERT_EFI_ERROR (Status);\r
if (!EFI_ERROR (Status)) {\r
NewAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));\r
CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));\r
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));\r
}\r
+\r
return NewAcpiBoardInfo;\r
}\r
-\r
-\r
#include "VirtualMemory.h"\r
#include "UefiPayloadEntry.h"\r
\r
-#define STACK_SIZE 0x20000\r
-#define IDT_ENTRY_COUNT 32\r
+#define STACK_SIZE 0x20000\r
+#define IDT_ENTRY_COUNT 32\r
\r
typedef struct _X64_IDT_TABLE {\r
//\r
// Reserved 4 bytes preceding PeiService and IdtTable,\r
// since IDT base address should be 8-byte alignment.\r
//\r
- UINT32 Reserved;\r
- CONST EFI_PEI_SERVICES **PeiService;\r
- X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];\r
+ UINT32 Reserved;\r
+ CONST EFI_PEI_SERVICES **PeiService;\r
+ X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];\r
} X64_IDT_TABLE;\r
\r
//\r
// Global Descriptor Table (GDT)\r
//\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r
-/* selector { Global Segment Descriptor } */\r
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r
-/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
-/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
-/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
-/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
-/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r
+ /* selector { Global Segment Descriptor } */\r
+ /* 0x00 */ {\r
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r
+ }, // null descriptor\r
+ /* 0x08 */ {\r
+ { 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }\r
+ }, // linear data segment descriptor\r
+ /* 0x10 */ {\r
+ { 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }\r
+ }, // linear code segment descriptor\r
+ /* 0x18 */ {\r
+ { 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }\r
+ }, // system data segment descriptor\r
+ /* 0x20 */ {\r
+ { 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }\r
+ }, // system code segment descriptor\r
+ /* 0x28 */ {\r
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r
+ }, // spare segment descriptor\r
+ /* 0x30 */ {\r
+ { 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }\r
+ }, // system data segment descriptor\r
+ /* 0x38 */ {\r
+ { 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 }\r
+ }, // system code segment descriptor\r
+ /* 0x40 */ {\r
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r
+ }, // spare segment descriptor\r
};\r
\r
//\r
// IA32 Gdt register\r
//\r
-GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
+GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
sizeof (gGdtEntries) - 1,\r
- (UINTN) gGdtEntries\r
- };\r
+ (UINTN)gGdtEntries\r
+};\r
\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r
sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,\r
0\r
};\r
**/\r
UINTN\r
Create4GPageTablesIa32Pae (\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize\r
)\r
{\r
- UINT8 PhysicalAddressBits;\r
- EFI_PHYSICAL_ADDRESS PhysicalAddress;\r
- UINTN IndexOfPdpEntries;\r
- UINTN IndexOfPageDirectoryEntries;\r
- UINT32 NumberOfPdpEntriesNeeded;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
- PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
- UINTN TotalPagesNum;\r
- UINTN PageAddress;\r
- UINT64 AddressEncMask;\r
+ UINT8 PhysicalAddressBits;\r
+ EFI_PHYSICAL_ADDRESS PhysicalAddress;\r
+ UINTN IndexOfPdpEntries;\r
+ UINTN IndexOfPageDirectoryEntries;\r
+ UINT32 NumberOfPdpEntriesNeeded;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
+ PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
+ UINTN TotalPagesNum;\r
+ UINTN PageAddress;\r
+ UINT64 AddressEncMask;\r
\r
//\r
// Make sure AddressEncMask is contained to smallest supported address field\r
//\r
// Calculate the table entries needed.\r
//\r
- NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 30));\r
+ NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r
\r
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;\r
- PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);\r
+ PageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);\r
ASSERT (PageAddress != 0);\r
\r
- PageMap = (VOID *) PageAddress;\r
+ PageMap = (VOID *)PageAddress;\r
PageAddress += SIZE_4KB;\r
\r
PageDirectoryPointerEntry = PageMap;\r
- PhysicalAddress = 0;\r
+ PhysicalAddress = 0;\r
\r
for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
//\r
// Each Directory Pointer entries points to a page of Page Directory entires.\r
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
//\r
- PageDirectoryEntry = (VOID *) PageAddress;\r
- PageAddress += SIZE_4KB;\r
+ PageDirectoryEntry = (VOID *)PageAddress;\r
+ PageAddress += SIZE_4KB;\r
\r
//\r
// Fill in a Page Directory Pointer Entries\r
//\r
- PageDirectoryPointerEntry->Uint64 = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask;\r
+ PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
PageDirectoryPointerEntry->Bits.Present = 1;\r
\r
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {\r
- if ((IsNullDetectionEnabled () && PhysicalAddress == 0)\r
- || ((PhysicalAddress < StackBase + StackSize)\r
- && ((PhysicalAddress + SIZE_2MB) > StackBase))) {\r
+ if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0))\r
+ || ( (PhysicalAddress < StackBase + StackSize)\r
+ && ((PhysicalAddress + SIZE_2MB) > StackBase)))\r
+ {\r
//\r
// Need to split this 2M page that covers stack range.\r
//\r
- Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, 0, 0);\r
+ Split2MPageTo4K (PhysicalAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, 0, 0);\r
} else {\r
//\r
// Fill in the Page Directory entries\r
//\r
- PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress | AddressEncMask;\r
+ PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress | AddressEncMask;\r
PageDirectoryEntry->Bits.ReadWrite = 1;\r
- PageDirectoryEntry->Bits.Present = 1;\r
- PageDirectoryEntry->Bits.MustBe1 = 1;\r
+ PageDirectoryEntry->Bits.Present = 1;\r
+ PageDirectoryEntry->Bits.MustBe1 = 1;\r
}\r
}\r
}\r
\r
- for (; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
+ for ( ; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
ZeroMem (\r
PageDirectoryPointerEntry,\r
sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)\r
//\r
EnablePageTableProtection ((UINTN)PageMap, FALSE);\r
\r
- return (UINTN) PageMap;\r
+ return (UINTN)PageMap;\r
}\r
\r
/**\r
VOID\r
)\r
{\r
- UINT32 RegEax;\r
- UINT32 RegEdx;\r
- BOOLEAN Ia32PaeSupport;\r
+ UINT32 RegEax;\r
+ UINT32 RegEdx;\r
+ BOOLEAN Ia32PaeSupport;\r
\r
Ia32PaeSupport = FALSE;\r
AsmCpuid (0x0, &RegEax, NULL, NULL, NULL);\r
**/\r
VOID\r
HandOffToDxeCore (\r
- IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
- IN EFI_PEI_HOB_POINTERS HobList\r
+ IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
+ IN EFI_PEI_HOB_POINTERS HobList\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS BaseOfStack;\r
- EFI_PHYSICAL_ADDRESS TopOfStack;\r
- UINTN PageTables;\r
- X64_IDT_GATE_DESCRIPTOR *IdtTable;\r
- UINTN SizeOfTemplate;\r
- VOID *TemplateBase;\r
- EFI_PHYSICAL_ADDRESS VectorAddress;\r
- UINT32 Index;\r
- X64_IDT_TABLE *IdtTableForX64;\r
+ EFI_PHYSICAL_ADDRESS BaseOfStack;\r
+ EFI_PHYSICAL_ADDRESS TopOfStack;\r
+ UINTN PageTables;\r
+ X64_IDT_GATE_DESCRIPTOR *IdtTable;\r
+ UINTN SizeOfTemplate;\r
+ VOID *TemplateBase;\r
+ EFI_PHYSICAL_ADDRESS VectorAddress;\r
+ UINT32 Index;\r
+ X64_IDT_TABLE *IdtTableForX64;\r
\r
//\r
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.\r
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);\r
}\r
\r
- BaseOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
+ BaseOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
ASSERT (BaseOfStack != 0);\r
\r
- if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
+ if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
//\r
// Compute the top of the stack we were allocated, which is used to load X64 dxe core.\r
// Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
//\r
// x64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
//\r
- TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
+ TopOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)ALIGN_POINTER (TopOfStack, 16);\r
\r
//\r
// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
\r
SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
\r
- VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES(sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));\r
+ VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));\r
ASSERT (VectorAddress != 0);\r
\r
//\r
// Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that\r
// it may not be gotten correctly after IDT register is re-written.\r
//\r
- IdtTableForX64 = (X64_IDT_TABLE *) (UINTN) VectorAddress;\r
+ IdtTableForX64 = (X64_IDT_TABLE *)(UINTN)VectorAddress;\r
IdtTableForX64->PeiService = NULL;\r
\r
- VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) (IdtTableForX64 + 1);\r
+ VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(IdtTableForX64 + 1);\r
IdtTable = IdtTableForX64->IdtTable;\r
for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {\r
- IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r
- IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r
- IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r
+ IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r
+ IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r
+ IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r
\r
- IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;\r
- IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));\r
- IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));\r
- IdtTable[Index].Reserved = 0;\r
+ IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16)VectorAddress;\r
+ IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16)(RShiftU64 (VectorAddress, 16));\r
+ IdtTable[Index].Offset32To63 = (UINT32)(RShiftU64 (VectorAddress, 32));\r
+ IdtTable[Index].Reserved = 0;\r
\r
- CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r
- AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r
+ CopyMem ((VOID *)(UINTN)VectorAddress, TemplateBase, SizeOfTemplate);\r
+ AsmVectorFixup ((VOID *)(UINTN)VectorAddress, (UINT8)Index);\r
\r
VectorAddress += SizeOfTemplate;\r
}\r
\r
- gLidtDescriptor.Base = (UINTN) IdtTable;\r
-\r
+ gLidtDescriptor.Base = (UINTN)IdtTable;\r
\r
AsmWriteIdtr (&gLidtDescriptor);\r
\r
// 32bit UEFI payload could be supported if required later.\r
DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n"));\r
ASSERT (FALSE);\r
- CpuDeadLoop();\r
+ CpuDeadLoop ();\r
}\r
-\r
}\r
-\r
\r
@return Allocated memory.\r
**/\r
-VOID*\r
+VOID *\r
AllocateCodePages (\r
- IN UINTN Pages\r
+ IN UINTN Pages\r
)\r
{\r
- VOID *Alloc;\r
- EFI_PEI_HOB_POINTERS Hob;\r
+ VOID *Alloc;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
\r
Alloc = AllocatePages (Pages);\r
if (Alloc == NULL) {\r
Hob.MemoryAllocation->AllocDescriptor.MemoryType = EfiBootServicesCode;\r
return Alloc;\r
}\r
+\r
Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, GET_NEXT_HOB (Hob));\r
}\r
\r
return NULL;\r
}\r
\r
-\r
/**\r
Loads and relocates a PE/COFF image\r
\r
**/\r
EFI_STATUS\r
LoadPeCoffImage (\r
- IN VOID *PeCoffImage,\r
- OUT EFI_PHYSICAL_ADDRESS *ImageAddress,\r
- OUT UINT64 *ImageSize,\r
- OUT EFI_PHYSICAL_ADDRESS *EntryPoint\r
+ IN VOID *PeCoffImage,\r
+ OUT EFI_PHYSICAL_ADDRESS *ImageAddress,\r
+ OUT UINT64 *ImageSize,\r
+ OUT EFI_PHYSICAL_ADDRESS *EntryPoint\r
)\r
{\r
- RETURN_STATUS Status;\r
- PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
- VOID *Buffer;\r
+ RETURN_STATUS Status;\r
+ PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
+ VOID *Buffer;\r
\r
ZeroMem (&ImageContext, sizeof (ImageContext));\r
\r
//\r
// Allocate Memory for the image\r
//\r
- Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES((UINT32)ImageContext.ImageSize));\r
+ Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES ((UINT32)ImageContext.ImageSize));\r
if (Buffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
+\r
ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;\r
\r
//\r
OUT EFI_FFS_FILE_HEADER **FileHeader\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS CurrentAddress;\r
- EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;\r
- EFI_FFS_FILE_HEADER *File;\r
- UINT32 Size;\r
- EFI_PHYSICAL_ADDRESS EndOfFile;\r
+ EFI_PHYSICAL_ADDRESS CurrentAddress;\r
+ EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;\r
+ EFI_FFS_FILE_HEADER *File;\r
+ UINT32 Size;\r
+ EFI_PHYSICAL_ADDRESS EndOfFile;\r
\r
- CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) FvHeader;\r
+ CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)FvHeader;\r
EndOfFirmwareVolume = CurrentAddress + FvHeader->FvLength;\r
\r
//\r
break;\r
}\r
\r
- File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;\r
+ File = (EFI_FFS_FILE_HEADER *)(UINTN)CurrentAddress;\r
if (IS_FFS_FILE2 (File)) {\r
Size = FFS_FILE2_SIZE (File);\r
if (Size <= 0x00FFFFFF) {\r
// Look for file type\r
//\r
if (File->Type == FileType) {\r
- if (Guid == NULL || CompareGuid(&File->Name, Guid)) {\r
+ if ((Guid == NULL) || CompareGuid (&File->Name, Guid)) {\r
*FileHeader = File;\r
return EFI_SUCCESS;\r
}\r
return EFI_NOT_FOUND;\r
}\r
\r
-\r
/**\r
This function searchs a given section type within a valid FFS file.\r
\r
**/\r
EFI_STATUS\r
FileFindSection (\r
- IN EFI_FFS_FILE_HEADER *FileHeader,\r
- IN EFI_SECTION_TYPE SectionType,\r
- OUT VOID **SectionData\r
+ IN EFI_FFS_FILE_HEADER *FileHeader,\r
+ IN EFI_SECTION_TYPE SectionType,\r
+ OUT VOID **SectionData\r
)\r
{\r
- UINT32 FileSize;\r
- EFI_COMMON_SECTION_HEADER *Section;\r
- UINT32 SectionSize;\r
- UINT32 Index;\r
+ UINT32 FileSize;\r
+ EFI_COMMON_SECTION_HEADER *Section;\r
+ UINT32 SectionSize;\r
+ UINT32 Index;\r
\r
if (IS_FFS_FILE2 (FileHeader)) {\r
FileSize = FFS_FILE2_SIZE (FileHeader);\r
} else {\r
FileSize = FFS_FILE_SIZE (FileHeader);\r
}\r
- FileSize -= sizeof (EFI_FFS_FILE_HEADER);\r
\r
- Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);\r
- Index = 0;\r
+ FileSize -= sizeof (EFI_FFS_FILE_HEADER);\r
+\r
+ Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);\r
+ Index = 0;\r
while (Index < FileSize) {\r
if (Section->Type == SectionType) {\r
if (IS_SECTION2 (Section)) {\r
- *SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
+ *SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
} else {\r
- *SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
+ *SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_NOT_FOUND;\r
}\r
\r
-\r
/**\r
Find DXE core from FV and build DXE core HOBs.\r
\r
**/\r
EFI_STATUS\r
LoadDxeCore (\r
- OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
+ OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
)\r
{\r
EFI_STATUS Status;\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
Status = FileFindSection (FileHeader, EFI_SECTION_FIRMWARE_VOLUME_IMAGE, (VOID **)&DxeCoreFv);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
//\r
// Report DXE FV to DXE core\r
//\r
- BuildFvHob ((EFI_PHYSICAL_ADDRESS) (UINTN) DxeCoreFv, DxeCoreFv->FvLength);\r
+ BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN)DxeCoreFv, DxeCoreFv->FvLength);\r
\r
//\r
// Find DXE core file from DXE FV\r
return Status;\r
}\r
\r
- BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);\r
+ BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);\r
\r
return EFI_SUCCESS;\r
}\r
**/\r
EFI_STATUS\r
UniversalLoadDxeCore (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,\r
- OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
+ IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,\r
+ OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_FFS_FILE_HEADER *FileHeader;\r
- VOID *PeCoffImage;\r
- EFI_PHYSICAL_ADDRESS ImageAddress;\r
- UINT64 ImageSize;\r
+ EFI_STATUS Status;\r
+ EFI_FFS_FILE_HEADER *FileHeader;\r
+ VOID *PeCoffImage;\r
+ EFI_PHYSICAL_ADDRESS ImageAddress;\r
+ UINT64 ImageSize;\r
\r
//\r
// Find DXE core file from DXE FV\r
return Status;\r
}\r
\r
- BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);\r
+ BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);\r
\r
return EFI_SUCCESS;\r
}\r
VOID *\r
EFIAPI\r
AllocatePages (\r
- IN UINTN Pages\r
+ IN UINTN Pages\r
)\r
{\r
- EFI_PEI_HOB_POINTERS Hob;\r
- EFI_PHYSICAL_ADDRESS Offset;\r
- EFI_HOB_HANDOFF_INFO_TABLE *HobTable;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_PHYSICAL_ADDRESS Offset;\r
+ EFI_HOB_HANDOFF_INFO_TABLE *HobTable;\r
\r
Hob.Raw = GetHobList ();\r
HobTable = Hob.HandoffInformationTable;\r
VOID *\r
EFIAPI\r
AllocateAlignedPages (\r
- IN UINTN Pages,\r
- IN UINTN Alignment\r
+ IN UINTN Pages,\r
+ IN UINTN Alignment\r
)\r
{\r
- VOID *Memory;\r
- UINTN AlignmentMask;\r
+ VOID *Memory;\r
+ UINTN AlignmentMask;\r
\r
//\r
// Alignment must be a power of two or zero.\r
AlignmentMask = Alignment - 1;\r
}\r
\r
- return (VOID *) (UINTN) (((UINTN) Memory + AlignmentMask) & ~AlignmentMask);\r
+ return (VOID *)(UINTN)(((UINTN)Memory + AlignmentMask) & ~AlignmentMask);\r
}\r
\r
-\r
/**\r
Allocates a buffer of type EfiBootServicesData.\r
\r
IN UINTN AllocationSize\r
)\r
{\r
- EFI_HOB_MEMORY_POOL *Hob;\r
+ EFI_HOB_MEMORY_POOL *Hob;\r
\r
if (AllocationSize > 0x4000) {\r
// Please use AllocatePages for big allocations\r
IN UINTN AllocationSize\r
)\r
{\r
- VOID *Buffer;\r
+ VOID *Buffer;\r
\r
Buffer = AllocatePool (AllocationSize);\r
if (Buffer == NULL) {\r
\r
return Buffer;\r
}\r
-\r
-\r
#include <Guid/AcpiBoardInfoGuid.h>\r
#include <Guid/BootManagerMenu.h>\r
\r
-#define ROW_LIMITER 16\r
+#define ROW_LIMITER 16\r
\r
typedef\r
EFI_STATUS\r
(*HOB_PRINT_HANDLER) (\r
- IN VOID *Hob,\r
- IN UINT16 HobLength\r
-);\r
+ IN VOID *Hob,\r
+ IN UINT16 HobLength\r
+ );\r
\r
-typedef struct{\r
+typedef struct {\r
UINT16 Type;\r
CHAR8 *Name;\r
HOB_PRINT_HANDLER PrintHandler;\r
} HOB_PRINT_HANDLER_TABLE;\r
\r
-CHAR8 * mMemoryTypeStr[] = {\r
+CHAR8 *mMemoryTypeStr[] = {\r
"EfiReservedMemoryType",\r
"EfiLoaderCode",\r
"EfiLoaderData",\r
"EfiMaxMemoryType"\r
};\r
\r
-CHAR8 * mResource_Type_List[] = {\r
- "EFI_RESOURCE_SYSTEM_MEMORY ", //0x00000000\r
- "EFI_RESOURCE_MEMORY_MAPPED_IO ", //0x00000001\r
- "EFI_RESOURCE_IO ", //0x00000002\r
- "EFI_RESOURCE_FIRMWARE_DEVICE ", //0x00000003\r
- "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", //0x00000004\r
- "EFI_RESOURCE_MEMORY_RESERVED ", //0x00000005\r
- "EFI_RESOURCE_IO_RESERVED ", //0x00000006\r
- "EFI_RESOURCE_MAX_MEMORY_TYPE " //0x00000007\r
+CHAR8 *mResource_Type_List[] = {\r
+ "EFI_RESOURCE_SYSTEM_MEMORY ", // 0x00000000\r
+ "EFI_RESOURCE_MEMORY_MAPPED_IO ", // 0x00000001\r
+ "EFI_RESOURCE_IO ", // 0x00000002\r
+ "EFI_RESOURCE_FIRMWARE_DEVICE ", // 0x00000003\r
+ "EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", // 0x00000004\r
+ "EFI_RESOURCE_MEMORY_RESERVED ", // 0x00000005\r
+ "EFI_RESOURCE_IO_RESERVED ", // 0x00000006\r
+ "EFI_RESOURCE_MAX_MEMORY_TYPE " // 0x00000007\r
};\r
\r
typedef\r
EFI_STATUS\r
(*GUID_HOB_PRINT) (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
-);\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
+ );\r
\r
typedef struct {\r
EFI_GUID *Guid;\r
CHAR8 *GuidName;\r
} GUID_HOB_PRINT_HANDLE;\r
\r
-typedef struct{\r
- EFI_GUID *Guid;\r
- CHAR8 *Type;\r
+typedef struct {\r
+ EFI_GUID *Guid;\r
+ CHAR8 *Type;\r
} PRINT_MEMORY_ALLOCCATION_HOB;\r
\r
-\r
/**\r
Print the Hex value of a given range.\r
@param[in] DataStart A pointer to the start of data to be printed.\r
**/\r
EFI_STATUS\r
PrintHex (\r
- IN UINT8 *DataStart,\r
- IN UINT16 DataSize\r
+ IN UINT8 *DataStart,\r
+ IN UINT16 DataSize\r
)\r
{\r
UINTN Index1;\r
StartAddr = DataStart;\r
for (Index1 = 0; Index1 * ROW_LIMITER < DataSize; Index1++) {\r
DEBUG ((DEBUG_VERBOSE, " 0x%04p:", (DataStart - StartAddr)));\r
- for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++){\r
+ for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++) {\r
DEBUG ((DEBUG_VERBOSE, " %02x", *DataStart));\r
DataStart++;\r
}\r
+\r
DEBUG ((DEBUG_VERBOSE, "\n"));\r
}\r
\r
@retval EFI_SUCCESS If it completed successfully.\r
**/\r
EFI_STATUS\r
-PrintHandOffHob(\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+PrintHandOffHob (\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
- Hob.Raw = (UINT8 *) HobStart;\r
+\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.HandoffInformationTable));\r
- DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));\r
+ DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));\r
DEBUG ((DEBUG_INFO, " EfiMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryTop));\r
DEBUG ((DEBUG_INFO, " EfiMemoryBottom = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryBottom));\r
DEBUG ((DEBUG_INFO, " EfiFreeMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiFreeMemoryTop));\r
**/\r
EFI_STATUS\r
PrintMemoryAllocationHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
\r
- if(CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {\r
+ if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {\r
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocationStack));\r
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_MEMORY_ALLOCATION_STACK\n"));\r
} else if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocBspStoreGuid)) {\r
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocation));\r
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_TYPE_MEMORY_ALLOCATION\n"));\r
}\r
+\r
DEBUG ((DEBUG_INFO, " MemoryBaseAddress = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress));\r
DEBUG ((DEBUG_INFO, " MemoryLength = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength));\r
- DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));\r
+ DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintResourceDiscriptorHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.ResourceDescriptor));\r
\r
DEBUG ((DEBUG_INFO, " ResourceType = %a\n", mResource_Type_List[Hob.ResourceDescriptor->ResourceType]));\r
- if(!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {\r
+ if (!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {\r
DEBUG ((DEBUG_INFO, " Owner = %g\n", Hob.ResourceDescriptor->Owner));\r
}\r
- DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));\r
+\r
+ DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));\r
DEBUG ((DEBUG_INFO, " PhysicalStart = 0x%lx\n", Hob.ResourceDescriptor->PhysicalStart));\r
DEBUG ((DEBUG_INFO, " ResourceLength = 0x%lx\n", Hob.ResourceDescriptor->ResourceLength));\r
return EFI_SUCCESS;\r
**/\r
EFI_STATUS\r
PrintAcpiGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;\r
- AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (HobRaw);\r
+ UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;\r
+\r
+ AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= AcpiTableHob->Header.Length);\r
- DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));\r
- DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));\r
- DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64) AcpiTableHob->Rsdp));\r
+ DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));\r
+ DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));\r
+ DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64)AcpiTableHob->Rsdp));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintSerialGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;\r
- SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *) GET_GUID_HOB_DATA (HobRaw);\r
+ UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;\r
+\r
+ SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= SerialPortInfo->Header.Length);\r
- DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));\r
- DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));\r
- DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));\r
- DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));\r
- DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));\r
+ DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));\r
+ DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));\r
+ DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));\r
+ DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));\r
+ DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));\r
DEBUG ((DEBUG_INFO, " RegisterBase = 0x%lx\n", SerialPortInfo->RegisterBase));\r
return EFI_SUCCESS;\r
}\r
**/\r
EFI_STATUS\r
PrintSmbios3GuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;\r
- SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);\r
+ UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;\r
+\r
+ SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= SmBiosTable->Header.Length);\r
- DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));\r
- DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));\r
- DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));\r
+ DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));\r
+ DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));\r
+ DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintSmbiosTablGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;\r
- SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);\r
+ UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;\r
+\r
+ SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= SmBiosTable->Header.Length);\r
- DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));\r
- DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));\r
- DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));\r
+ DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));\r
+ DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));\r
+ DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintAcpiBoardInfoGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- ACPI_BOARD_INFO *AcpBoardInfo;\r
- AcpBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (HobRaw);\r
+ ACPI_BOARD_INFO *AcpBoardInfo;\r
+\r
+ AcpBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= sizeof (*AcpBoardInfo));\r
- DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));\r
- DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));\r
- DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));\r
+ DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));\r
+ DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));\r
+ DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));\r
DEBUG ((DEBUG_INFO, " PmEvtBase = 0x%lx\n", AcpBoardInfo->PmEvtBase));\r
DEBUG ((DEBUG_INFO, " PmGpeEnBase = 0x%lx\n", AcpBoardInfo->PmGpeEnBase));\r
DEBUG ((DEBUG_INFO, " PmCtrlRegBase = 0x%lx\n", AcpBoardInfo->PmCtrlRegBase));\r
**/\r
EFI_STATUS\r
PrintPciRootBridgeInfoGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;\r
- UINTN Index;\r
- UINTN Length;\r
- Index = 0;\r
- PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (HobRaw);\r
- Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);\r
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;\r
+ UINTN Index;\r
+ UINTN Length;\r
+\r
+ Index = 0;\r
+ PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (HobRaw);\r
+ Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);\r
ASSERT (HobLength >= Length);\r
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", PciRootBridges->Header.Revision));\r
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", PciRootBridges->Header.Length));\r
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", PciRootBridges->Count));\r
- DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));\r
+ DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));\r
\r
- while(Index < PciRootBridges->Count) {\r
+ while (Index < PciRootBridges->Count) {\r
DEBUG ((DEBUG_INFO, " Root Bridge Index[%d]:\n", Index));\r
- DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));\r
+ DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));\r
DEBUG ((DEBUG_INFO, " Supports = 0x%lx\n", PciRootBridges->RootBridge[Index].Supports));\r
DEBUG ((DEBUG_INFO, " Attributes = 0x%lx\n", PciRootBridges->RootBridge[Index].Attributes));\r
- DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));\r
- DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));\r
+ DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));\r
+ DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));\r
DEBUG ((DEBUG_INFO, " AllocationAttributes = 0x%lx\n", PciRootBridges->RootBridge[Index].AllocationAttributes));\r
DEBUG ((DEBUG_INFO, " Bus.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Base));\r
DEBUG ((DEBUG_INFO, " Bus.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Limit));\r
DEBUG ((DEBUG_INFO, " PMemAbove4G.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Base));\r
DEBUG ((DEBUG_INFO, " PMemAbove4G.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Limit));\r
DEBUG ((DEBUG_INFO, " PMemAbove4G.Translation = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Translation));\r
- Index+=1;\r
+ Index += 1;\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintExtraDataGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
- UINTN Index;\r
- UINTN Length;\r
+ UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
+ UINTN Index;\r
+ UINTN Length;\r
\r
Index = 0;\r
- ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (HobRaw);\r
- Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);\r
+ ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (HobRaw);\r
+ Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);\r
ASSERT (HobLength >= Length);\r
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", ExtraData->Header.Revision));\r
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", ExtraData->Header.Length));\r
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", ExtraData->Count));\r
\r
while (Index < ExtraData->Count) {\r
- DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index,ExtraData->Entry[Index].Identifier));\r
- DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Base));\r
- DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Size));\r
- Index+=1;\r
+ DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index, ExtraData->Entry[Index].Identifier));\r
+ DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Base));\r
+ DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Size));\r
+ Index += 1;\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintMemoryTypeInfoGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;\r
+ EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;\r
\r
- MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *) GET_GUID_HOB_DATA (HobRaw);\r
+ MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= sizeof (*MemoryTypeInfo));\r
DEBUG ((DEBUG_INFO, " Type = 0x%x\n", MemoryTypeInfo->Type));\r
DEBUG ((DEBUG_INFO, " NumberOfPages = 0x%x\n", MemoryTypeInfo->NumberOfPages));\r
**/\r
EFI_STATUS\r
PrintBootManagerMenuGuidHob (\r
- IN UINT8 *HobRaw,\r
- IN UINT16 HobLength\r
+ IN UINT8 *HobRaw,\r
+ IN UINT16 HobLength\r
)\r
{\r
- UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;\r
+ UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;\r
\r
- BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *) GET_GUID_HOB_DATA (HobRaw);\r
+ BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (HobRaw);\r
ASSERT (HobLength >= sizeof (*BootManagerMenuFile));\r
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", BootManagerMenuFile->Header.Revision));\r
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", BootManagerMenuFile->Header.Length));\r
- DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));\r
+ DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));\r
return EFI_SUCCESS;\r
}\r
\r
// Mappint table for dump Guid Hob information.\r
// This table can be easily extented.\r
//\r
-GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {\r
- {&gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)"},\r
- {&gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)"},\r
- {&gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)"},\r
- {&gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)"},\r
- {&gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)"},\r
- {&gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)"},\r
- {&gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)"},\r
- {&gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)"},\r
- {&gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)"}\r
+GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {\r
+ { &gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)" },\r
+ { &gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)" },\r
+ { &gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)" },\r
+ { &gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)" },\r
+ { &gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)" },\r
+ { &gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)" },\r
+ { &gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)" },\r
+ { &gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)" },\r
+ { &gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)" }\r
};\r
\r
/**\r
**/\r
EFI_STATUS\r
PrintGuidHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
UINTN Index;\r
EFI_STATUS Status;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (Hob.Guid));\r
\r
for (Index = 0; Index < ARRAY_SIZE (GuidHobPrintHandleTable); Index++) {\r
return Status;\r
}\r
}\r
+\r
DEBUG ((DEBUG_INFO, " Name = %g\n", &Hob.Guid->Name));\r
PrintHex (GET_GUID_HOB_DATA (Hob.Raw), GET_GUID_HOB_DATA_SIZE (Hob.Raw));\r
return EFI_SUCCESS;\r
**/\r
EFI_STATUS\r
PrintFvHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume));\r
\r
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume->BaseAddress));\r
**/\r
EFI_STATUS\r
PrintCpuHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.Cpu));\r
\r
DEBUG ((DEBUG_INFO, " SizeOfMemorySpace = 0x%lx\n", Hob.Cpu->SizeOfMemorySpace));\r
**/\r
EFI_STATUS\r
PrintMemoryPoolHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
return EFI_SUCCESS;\r
**/\r
EFI_STATUS\r
PrintFv2Hob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume2));\r
\r
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume2->BaseAddress));\r
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume2->Length));\r
- DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));\r
- DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));\r
+ DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));\r
+ DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintCapsuleHob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.Capsule));\r
\r
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.Capsule->BaseAddress));\r
- DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));\r
+ DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));\r
return EFI_SUCCESS;\r
}\r
\r
**/\r
EFI_STATUS\r
PrintFv3Hob (\r
- IN VOID *HobStart,\r
- IN UINT16 HobLength\r
+ IN VOID *HobStart,\r
+ IN UINT16 HobLength\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
- Hob.Raw = (UINT8 *) HobStart;\r
+\r
+ Hob.Raw = (UINT8 *)HobStart;\r
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume3));\r
\r
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume3->BaseAddress));\r
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume3->Length));\r
- DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));\r
- DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));\r
- DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));\r
- DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));\r
+ DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));\r
+ DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));\r
+ DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));\r
+ DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));\r
return EFI_SUCCESS;\r
}\r
\r
//\r
// Mappint table from Hob type to Hob print function.\r
//\r
-HOB_PRINT_HANDLER_TABLE mHobHandles[] = {\r
- {EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob},\r
- {EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob},\r
- {EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob},\r
- {EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob},\r
- {EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob},\r
- {EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob},\r
- {EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob},\r
- {EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob},\r
- {EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob},\r
- {EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob}\r
+HOB_PRINT_HANDLER_TABLE mHobHandles[] = {\r
+ { EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob },\r
+ { EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob },\r
+ { EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob },\r
+ { EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob },\r
+ { EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob },\r
+ { EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob },\r
+ { EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob },\r
+ { EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob },\r
+ { EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob },\r
+ { EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob }\r
};\r
\r
-\r
/**\r
Print all HOBs info from the HOB list.\r
@param[in] HobStart A pointer to the HOB list\r
**/\r
VOID\r
PrintHob (\r
- IN CONST VOID *HobStart\r
+ IN CONST VOID *HobStart\r
)\r
{\r
EFI_PEI_HOB_POINTERS Hob;\r
UINTN Count;\r
UINTN Index;\r
+\r
ASSERT (HobStart != NULL);\r
\r
- Hob.Raw = (UINT8 *) HobStart;\r
+ Hob.Raw = (UINT8 *)HobStart;\r
DEBUG ((DEBUG_INFO, "Print all Hob information from Hob 0x%p\n", Hob.Raw));\r
\r
Count = 0;\r
while (!END_OF_HOB_LIST (Hob)) {\r
for (Index = 0; Index < ARRAY_SIZE (mHobHandles); Index++) {\r
if (Hob.Header->HobType == mHobHandles[Index].Type) {\r
- DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *) HobStart), Hob.Header->HobLength));\r
+ DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));\r
mHobHandles[Index].PrintHandler (Hob.Raw, Hob.Header->HobLength);\r
break;\r
}\r
}\r
+\r
if (Index == ARRAY_SIZE (mHobHandles)) {\r
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %d, Offset = 0x%p, Length = 0x%x\n", Count, Hob.Header->HobType, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));\r
DEBUG ((DEBUG_INFO, " Unkown Hob type\n"));\r
PrintHex (Hob.Raw, Hob.Header->HobLength);\r
}\r
+\r
Count++;\r
Hob.Raw = GET_NEXT_HOB (Hob);\r
}\r
+\r
DEBUG ((DEBUG_INFO, "There are totally %d Hobs, the End Hob address is %p\n", Count, Hob.Raw));\r
}\r
\r
#include "UefiPayloadEntry.h"\r
\r
-STATIC UINT32 mTopOfLowerUsableDram = 0;\r
+STATIC UINT32 mTopOfLowerUsableDram = 0;\r
\r
/**\r
Callback function to build resource descriptor HOB\r
**/\r
EFI_STATUS\r
MemInfoCallbackMmio (\r
- IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
- IN VOID *Params\r
+ IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
+ IN VOID *Params\r
)\r
{\r
EFI_PHYSICAL_ADDRESS Base;\r
//\r
// Skip types already handled in MemInfoCallback\r
//\r
- if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type == E820_ACPI) {\r
+ if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI)) {\r
return EFI_SUCCESS;\r
}\r
\r
Type = EFI_RESOURCE_MEMORY_RESERVED;\r
}\r
\r
- Base = MemoryMapEntry->Base;\r
- Size = MemoryMapEntry->Size;\r
+ Base = MemoryMapEntry->Base;\r
+ Size = MemoryMapEntry->Size;\r
\r
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;\r
\r
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);\r
- DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));\r
+ DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));\r
\r
- if (MemoryMapEntry->Type == E820_UNUSABLE ||\r
- MemoryMapEntry->Type == E820_DISABLED) {\r
+ if ((MemoryMapEntry->Type == E820_UNUSABLE) ||\r
+ (MemoryMapEntry->Type == E820_DISABLED))\r
+ {\r
BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);\r
} else if (MemoryMapEntry->Type == E820_PMEM) {\r
BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Callback function to find TOLUD (Top of Lower Usable DRAM)\r
\r
**/\r
EFI_STATUS\r
FindToludCallback (\r
- IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
- IN VOID *Params\r
+ IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
+ IN VOID *Params\r
)\r
{\r
//\r
// Skip memory types not RAM or reserved\r
//\r
if ((MemoryMapEntry->Type == E820_UNUSABLE) || (MemoryMapEntry->Type == E820_DISABLED) ||\r
- (MemoryMapEntry->Type == E820_PMEM)) {\r
+ (MemoryMapEntry->Type == E820_PMEM))\r
+ {\r
return EFI_SUCCESS;\r
}\r
\r
}\r
\r
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI) ||\r
- (MemoryMapEntry->Type == E820_NVS)) {\r
+ (MemoryMapEntry->Type == E820_NVS))\r
+ {\r
//\r
// It's usable DRAM. Update TOLUD.\r
//\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Callback function to build resource descriptor HOB\r
\r
**/\r
EFI_STATUS\r
MemInfoCallback (\r
- IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
- IN VOID *Params\r
+ IN MEMORY_MAP_ENTRY *MemoryMapEntry,\r
+ IN VOID *Params\r
)\r
{\r
EFI_PHYSICAL_ADDRESS Base;\r
// It will be added later.\r
//\r
if ((MemoryMapEntry->Type != E820_RAM) && (MemoryMapEntry->Type != E820_ACPI) &&\r
- (MemoryMapEntry->Type != E820_NVS)) {\r
+ (MemoryMapEntry->Type != E820_NVS))\r
+ {\r
return RETURN_SUCCESS;\r
}\r
\r
- Type = EFI_RESOURCE_SYSTEM_MEMORY;\r
- Base = MemoryMapEntry->Base;\r
- Size = MemoryMapEntry->Size;\r
+ Type = EFI_RESOURCE_SYSTEM_MEMORY;\r
+ Base = MemoryMapEntry->Base;\r
+ Size = MemoryMapEntry->Size;\r
\r
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;\r
\r
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);\r
- DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));\r
+ DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));\r
\r
if (MemoryMapEntry->Type == E820_ACPI) {\r
BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);\r
return RETURN_SUCCESS;\r
}\r
\r
-\r
-\r
/**\r
It will build HOBs based on information from bootloaders.\r
\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
- ACPI_BOARD_INFO *AcpiBoardInfo;\r
- EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;\r
- EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;\r
- EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;\r
- EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;\r
- UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;\r
- UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;\r
+ EFI_STATUS Status;\r
+ ACPI_BOARD_INFO *AcpiBoardInfo;\r
+ EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;\r
+ EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;\r
+ EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;\r
+ EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;\r
+ UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;\r
+ UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;\r
\r
//\r
// First find TOLUD\r
//\r
- DEBUG ((DEBUG_INFO , "Guessing Top of Lower Usable DRAM:\n"));\r
+ DEBUG ((DEBUG_INFO, "Guessing Top of Lower Usable DRAM:\n"));\r
Status = ParseMemoryInfo (FindToludCallback, NULL);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));\r
+\r
+ DEBUG ((DEBUG_INFO, "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));\r
\r
//\r
// Parse memory info and build memory HOBs for Usable RAM\r
//\r
- DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for usable memory:\n"));\r
+ DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for usable memory:\n"));\r
Status = ParseMemoryInfo (MemInfoCallback, NULL);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));\r
}\r
\r
-\r
Status = ParseGfxDeviceInfo (&GfxDeviceInfo);\r
if (!EFI_ERROR (Status)) {\r
NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));\r
DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));\r
}\r
\r
-\r
//\r
// Creat SmBios table Hob\r
//\r
SmBiosTableHob = BuildGuidHob (&gUniversalPayloadSmbiosTableGuid, sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE));\r
ASSERT (SmBiosTableHob != NULL);\r
SmBiosTableHob->Header.Revision = UNIVERSAL_PAYLOAD_SMBIOS_TABLE_REVISION;\r
- SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);\r
+ SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);\r
DEBUG ((DEBUG_INFO, "Create smbios table gUniversalPayloadSmbiosTableGuid guid hob\n"));\r
- Status = ParseSmbiosTable(SmBiosTableHob);\r
+ Status = ParseSmbiosTable (SmBiosTableHob);\r
if (!EFI_ERROR (Status)) {\r
DEBUG ((DEBUG_INFO, "Detected Smbios Table at 0x%lx\n", SmBiosTableHob->SmBiosEntryPoint));\r
}\r
AcpiTableHob = BuildGuidHob (&gUniversalPayloadAcpiTableGuid, sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE));\r
ASSERT (AcpiTableHob != NULL);\r
AcpiTableHob->Header.Revision = UNIVERSAL_PAYLOAD_ACPI_TABLE_REVISION;\r
- AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);\r
+ AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);\r
DEBUG ((DEBUG_INFO, "Create ACPI table gUniversalPayloadAcpiTableGuid guid hob\n"));\r
- Status = ParseAcpiTableInfo(AcpiTableHob);\r
+ Status = ParseAcpiTableInfo (AcpiTableHob);\r
if (!EFI_ERROR (Status)) {\r
DEBUG ((DEBUG_INFO, "Detected ACPI Table at 0x%lx\n", AcpiTableHob->Rsdp));\r
}\r
//\r
// Parse memory info and build memory HOBs for reserved DRAM and MMIO\r
//\r
- DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for reserved memory:\n"));\r
+ DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for reserved memory:\n"));\r
Status = ParseMemoryInfo (MemInfoCallbackMmio, AcpiBoardInfo);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
This function will build some generic HOBs that doesn't depend on information from bootloaders.\r
\r
VOID\r
)\r
{\r
- UINT32 RegEax;\r
- UINT8 PhysicalAddressBits;\r
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;\r
+ UINT32 RegEax;\r
+ UINT8 PhysicalAddressBits;\r
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;\r
\r
// The UEFI payload FV\r
BuildMemoryAllocationHob (PcdGet32 (PcdPayloadFdMemBase), PcdGet32 (PcdPayloadFdMemSize), EfiBootServicesData);\r
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
if (RegEax >= 0x80000008) {\r
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
- PhysicalAddressBits = (UINT8) RegEax;\r
+ PhysicalAddressBits = (UINT8)RegEax;\r
} else {\r
- PhysicalAddressBits = 36;\r
+ PhysicalAddressBits = 36;\r
}\r
\r
BuildCpuHob (PhysicalAddressBits, 16);\r
// Report Local APIC range, cause sbl HOB to be NULL, comment now\r
//\r
ResourceAttribute = (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED\r
- );\r
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_TESTED\r
+ );\r
BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_MAPPED_IO, ResourceAttribute, 0xFEC80000, SIZE_512KB);\r
- BuildMemoryAllocationHob ( 0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);\r
-\r
+ BuildMemoryAllocationHob (0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);\r
}\r
\r
-\r
/**\r
Entry point to the C language phase of UEFI payload.\r
\r
EFI_STATUS\r
EFIAPI\r
_ModuleEntryPoint (\r
- IN UINTN BootloaderParameter\r
+ IN UINTN BootloaderParameter\r
)\r
{\r
- EFI_STATUS Status;\r
- PHYSICAL_ADDRESS DxeCoreEntryPoint;\r
- UINTN MemBase;\r
- UINTN HobMemBase;\r
- UINTN HobMemTop;\r
- EFI_PEI_HOB_POINTERS Hob;\r
- SERIAL_PORT_INFO SerialPortInfo;\r
+ EFI_STATUS Status;\r
+ PHYSICAL_ADDRESS DxeCoreEntryPoint;\r
+ UINTN MemBase;\r
+ UINTN HobMemBase;\r
+ UINTN HobMemTop;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ SERIAL_PORT_INFO SerialPortInfo;\r
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *UniversalSerialPort;\r
\r
Status = PcdSet64S (PcdBootloaderParameter, BootloaderParameter);\r
ASSERT (UniversalSerialPort != NULL);\r
UniversalSerialPort->Header.Revision = UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION;\r
UniversalSerialPort->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO);\r
- UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1)?FALSE:TRUE;\r
+ UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1) ? FALSE : TRUE;\r
UniversalSerialPort->RegisterBase = SerialPortInfo.BaseAddr;\r
UniversalSerialPort->BaudRate = SerialPortInfo.Baud;\r
UniversalSerialPort->RegisterStride = (UINT8)SerialPortInfo.RegWidth;\r
\r
// The library constructors might depend on serial port, so call it after serial port hob\r
ProcessLibraryConstructorList ();\r
- DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));\r
+ DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));\r
\r
// Build HOB based on information from Bootloader\r
Status = BuildHobFromBl ();\r
// Mask off all legacy 8259 interrupt sources\r
//\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);\r
- IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);\r
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);\r
\r
- Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);\r
+ Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);\r
HandOffToDxeCore (DxeCoreEntryPoint, Hob);\r
\r
// Should not get here\r
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \\r
((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))\r
\r
-\r
-#define E820_RAM 1\r
-#define E820_RESERVED 2\r
-#define E820_ACPI 3\r
-#define E820_NVS 4\r
-#define E820_UNUSABLE 5\r
-#define E820_DISABLED 6\r
-#define E820_PMEM 7\r
-#define E820_UNDEFINED 8\r
+#define E820_RAM 1\r
+#define E820_RESERVED 2\r
+#define E820_ACPI 3\r
+#define E820_NVS 4\r
+#define E820_UNUSABLE 5\r
+#define E820_DISABLED 6\r
+#define E820_PMEM 7\r
+#define E820_UNDEFINED 8\r
\r
/**\r
Auto-generated function that calls the library constructors for all of the module's\r
VOID *\r
EFIAPI\r
CreateHob (\r
- IN UINT16 HobType,\r
- IN UINT16 HobLength\r
+ IN UINT16 HobType,\r
+ IN UINT16 HobLength\r
);\r
\r
/**\r
VOID\r
EFIAPI\r
UpdateStackHob (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
);\r
\r
/**\r
@return The pointer to the handoff HOB table.\r
\r
**/\r
-EFI_HOB_HANDOFF_INFO_TABLE*\r
+EFI_HOB_HANDOFF_INFO_TABLE *\r
EFIAPI\r
HobConstructor (\r
- IN VOID *EfiMemoryBottom,\r
- IN VOID *EfiMemoryTop,\r
- IN VOID *EfiFreeMemoryBottom,\r
- IN VOID *EfiFreeMemoryTop\r
+ IN VOID *EfiMemoryBottom,\r
+ IN VOID *EfiMemoryTop,\r
+ IN VOID *EfiFreeMemoryBottom,\r
+ IN VOID *EfiFreeMemoryTop\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
LoadDxeCore (\r
- OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
+ OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
UniversalLoadDxeCore (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,\r
- OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
+ IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,\r
+ OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint\r
);\r
\r
/**\r
**/\r
VOID\r
HandOffToDxeCore (\r
- IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
- IN EFI_PEI_HOB_POINTERS HobList\r
+ IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
+ IN EFI_PEI_HOB_POINTERS HobList\r
);\r
\r
EFI_STATUS\r
FixUpPcdDatabase (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv\r
+ IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
FileFindSection (\r
- IN EFI_FFS_FILE_HEADER *FileHeader,\r
- IN EFI_SECTION_TYPE SectionType,\r
- OUT VOID **SectionData\r
+ IN EFI_FFS_FILE_HEADER *FileHeader,\r
+ IN EFI_SECTION_TYPE SectionType,\r
+ OUT VOID **SectionData\r
);\r
\r
/**\r
**/\r
ACPI_BOARD_INFO *\r
BuildHobFromAcpi (\r
- IN UINT64 AcpiTableBase\r
+ IN UINT64 AcpiTableBase\r
);\r
\r
#endif\r
\r
#include "UefiPayloadEntry.h"\r
\r
-#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \\r
+#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \\r
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \\r
EFI_RESOURCE_ATTRIBUTE_TESTED | \\r
EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED | \\r
EFI_RESOURCE_ATTRIBUTE_64_BIT_IO | \\r
EFI_RESOURCE_ATTRIBUTE_PERSISTENT )\r
\r
-#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \\r
+#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \\r
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \\r
EFI_RESOURCE_ATTRIBUTE_TESTED )\r
\r
**/\r
VOID\r
PrintHob (\r
- IN CONST VOID *HobStart\r
+ IN CONST VOID *HobStart\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
FixUpPcdDatabase (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv\r
+ IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_FFS_FILE_HEADER *FileHeader;\r
- VOID *PcdRawData;\r
- PEI_PCD_DATABASE *PeiDatabase;\r
- PEI_PCD_DATABASE *UplDatabase;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- DYNAMICEX_MAPPING *ExMapTable;\r
- UINTN Index;\r
+ EFI_STATUS Status;\r
+ EFI_FFS_FILE_HEADER *FileHeader;\r
+ VOID *PcdRawData;\r
+ PEI_PCD_DATABASE *PeiDatabase;\r
+ PEI_PCD_DATABASE *UplDatabase;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ DYNAMICEX_MAPPING *ExMapTable;\r
+ UINTN Index;\r
\r
GuidHob = GetFirstGuidHob (&gPcdDataBaseHobGuid);\r
if (GuidHob == NULL) {\r
//\r
return EFI_SUCCESS;\r
}\r
- PeiDatabase = (PEI_PCD_DATABASE *) GET_GUID_HOB_DATA (GuidHob);\r
+\r
+ PeiDatabase = (PEI_PCD_DATABASE *)GET_GUID_HOB_DATA (GuidHob);\r
DEBUG ((DEBUG_INFO, "Find the Pei PCD data base, the total local token number is %d\n", PeiDatabase->LocalTokenCount));\r
\r
Status = FvFindFileByTypeGuid (DxeFv, EFI_FV_FILETYPE_DRIVER, PcdGetPtr (PcdPcdDriverFile), &FileHeader);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
Status = FileFindSection (FileHeader, EFI_SECTION_RAW, &PcdRawData);\r
ASSERT_EFI_ERROR (Status);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- UplDatabase = (PEI_PCD_DATABASE *) PcdRawData;\r
- ExMapTable = (DYNAMICEX_MAPPING *) (UINTN) ((UINTN) PcdRawData + UplDatabase->ExMapTableOffset);\r
+ UplDatabase = (PEI_PCD_DATABASE *)PcdRawData;\r
+ ExMapTable = (DYNAMICEX_MAPPING *)(UINTN)((UINTN)PcdRawData + UplDatabase->ExMapTableOffset);\r
\r
for (Index = 0; Index < UplDatabase->ExTokenCount; Index++) {\r
ExMapTable[Index].TokenNumber += PeiDatabase->LocalTokenCount;\r
}\r
+\r
DEBUG ((DEBUG_INFO, "Fix up UPL PCD database successfully\n"));\r
return EFI_SUCCESS;\r
}\r
**/\r
VOID\r
AddNewHob (\r
- IN EFI_PEI_HOB_POINTERS *Hob\r
+ IN EFI_PEI_HOB_POINTERS *Hob\r
)\r
{\r
- EFI_PEI_HOB_POINTERS NewHob;\r
+ EFI_PEI_HOB_POINTERS NewHob;\r
\r
if (Hob->Raw == NULL) {\r
return;\r
}\r
+\r
NewHob.Header = CreateHob (Hob->Header->HobType, Hob->Header->HobLength);\r
\r
if (NewHob.Header != NULL) {\r
**/\r
EFI_HOB_RESOURCE_DESCRIPTOR *\r
FindResourceDescriptorByRange (\r
- IN VOID *HobList,\r
- IN EFI_PHYSICAL_ADDRESS Base,\r
- IN EFI_PHYSICAL_ADDRESS Top\r
+ IN VOID *HobList,\r
+ IN EFI_PHYSICAL_ADDRESS Base,\r
+ IN EFI_PHYSICAL_ADDRESS Top\r
)\r
{\r
- EFI_PEI_HOB_POINTERS Hob;\r
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
\r
- for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {\r
+ for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {\r
//\r
// Skip all HOBs except Resource Descriptor HOBs\r
//\r
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {\r
continue;\r
}\r
+\r
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {\r
continue;\r
}\r
if (Base < ResourceHob->PhysicalStart) {\r
continue;\r
}\r
+\r
if (Top > (ResourceHob->PhysicalStart + ResourceHob->ResourceLength)) {\r
continue;\r
}\r
+\r
return ResourceHob;\r
}\r
+\r
return NULL;\r
}\r
\r
**/\r
EFI_HOB_RESOURCE_DESCRIPTOR *\r
FindAnotherHighestBelow4GResourceDescriptor (\r
- IN VOID *HobList,\r
- IN UINTN MinimalNeededSize,\r
- IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob\r
+ IN VOID *HobList,\r
+ IN UINTN MinimalNeededSize,\r
+ IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob\r
)\r
{\r
- EFI_PEI_HOB_POINTERS Hob;\r
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
- EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
+ EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;\r
+\r
ReturnResourceHob = NULL;\r
\r
- for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {\r
+ for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {\r
//\r
// Skip all HOBs except Resource Descriptor HOBs\r
//\r
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {\r
continue;\r
}\r
+\r
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {\r
continue;\r
}\r
if (ResourceHob == ExceptResourceHob) {\r
continue;\r
}\r
+\r
//\r
// Skip Resource Descriptor HOBs that are beyond 4G\r
//\r
if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) > BASE_4GB) {\r
continue;\r
}\r
+\r
//\r
// Skip Resource Descriptor HOBs that are too small\r
//\r
}\r
}\r
}\r
+\r
return ReturnResourceHob;\r
}\r
\r
OUT EFI_FIRMWARE_VOLUME_HEADER **DxeFv\r
)\r
{\r
- EFI_PEI_HOB_POINTERS Hob;\r
- UINTN MinimalNeededSize;\r
- EFI_PHYSICAL_ADDRESS FreeMemoryBottom;\r
- EFI_PHYSICAL_ADDRESS FreeMemoryTop;\r
- EFI_PHYSICAL_ADDRESS MemoryBottom;\r
- EFI_PHYSICAL_ADDRESS MemoryTop;\r
- EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;\r
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
- UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
- UINT8 *GuidHob;\r
- EFI_HOB_FIRMWARE_VOLUME *FvHob;\r
- UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;\r
- ACPI_BOARD_INFO *AcpiBoardInfo;\r
-\r
- Hob.Raw = (UINT8 *) BootloaderParameter;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ UINTN MinimalNeededSize;\r
+ EFI_PHYSICAL_ADDRESS FreeMemoryBottom;\r
+ EFI_PHYSICAL_ADDRESS FreeMemoryTop;\r
+ EFI_PHYSICAL_ADDRESS MemoryBottom;\r
+ EFI_PHYSICAL_ADDRESS MemoryTop;\r
+ EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;\r
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;\r
+ UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;\r
+ UINT8 *GuidHob;\r
+ EFI_HOB_FIRMWARE_VOLUME *FvHob;\r
+ UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;\r
+ ACPI_BOARD_INFO *AcpiBoardInfo;\r
+\r
+ Hob.Raw = (UINT8 *)BootloaderParameter;\r
MinimalNeededSize = FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
\r
ASSERT (Hob.Raw != NULL);\r
- ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);\r
- ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);\r
- ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);\r
- ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);\r
-\r
+ ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);\r
+ ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);\r
+ ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);\r
+ ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);\r
\r
//\r
// Try to find Resource Descriptor HOB that contains Hob range EfiMemoryBottom..EfiMemoryTop\r
//\r
- PhitResourceHob = FindResourceDescriptorByRange(Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);\r
+ PhitResourceHob = FindResourceDescriptorByRange (Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);\r
if (PhitResourceHob == NULL) {\r
//\r
// Boot loader's Phit Hob is not in an available Resource Descriptor, find another Resource Descriptor for new Phit Hob\r
//\r
- ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, NULL);\r
+ ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, NULL);\r
if (ResourceHob == NULL) {\r
return EFI_NOT_FOUND;\r
}\r
// In the Resource Descriptor HOB contains boot loader Hob, there is no enough free memory size for payload hob\r
// Find another Resource Descriptor Hob\r
//\r
- ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, PhitResourceHob);\r
+ ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, PhitResourceHob);\r
if (ResourceHob == NULL) {\r
return EFI_NOT_FOUND;\r
}\r
FreeMemoryTop = ResourceHob->PhysicalStart + ResourceHob->ResourceLength;\r
MemoryTop = FreeMemoryTop;\r
}\r
- HobConstructor ((VOID *) (UINTN) MemoryBottom, (VOID *) (UINTN) MemoryTop, (VOID *) (UINTN) FreeMemoryBottom, (VOID *) (UINTN) FreeMemoryTop);\r
+\r
+ HobConstructor ((VOID *)(UINTN)MemoryBottom, (VOID *)(UINTN)MemoryTop, (VOID *)(UINTN)FreeMemoryBottom, (VOID *)(UINTN)FreeMemoryTop);\r
//\r
// From now on, mHobList will point to the new Hob range.\r
//\r
//\r
// Create an empty FvHob for the DXE FV that contains DXE core.\r
//\r
- BuildFvHob ((EFI_PHYSICAL_ADDRESS) 0, 0);\r
+ BuildFvHob ((EFI_PHYSICAL_ADDRESS)0, 0);\r
//\r
// Since payload created new Hob, move all hobs except PHIT from boot loader hob list.\r
//\r
// Add this hob to payload HOB\r
AddNewHob (&Hob);\r
}\r
+\r
Hob.Raw = GET_NEXT_HOB (Hob);\r
}\r
\r
//\r
// Get DXE FV location\r
//\r
- GuidHob = GetFirstGuidHob(&gUniversalPayloadExtraDataGuid);\r
+ GuidHob = GetFirstGuidHob (&gUniversalPayloadExtraDataGuid);\r
ASSERT (GuidHob != NULL);\r
- ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (GuidHob);\r
+ ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (GuidHob);\r
ASSERT (ExtraData->Count == 1);\r
ASSERT (AsciiStrCmp (ExtraData->Entry[0].Identifier, "uefi_fv") == 0);\r
\r
- *DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) ExtraData->Entry[0].Base;\r
+ *DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)ExtraData->Entry[0].Base;\r
ASSERT ((*DxeFv)->FvLength == ExtraData->Entry[0].Size);\r
\r
//\r
// Create guid hob for acpi board information\r
//\r
- GuidHob = GetFirstGuidHob(&gUniversalPayloadAcpiTableGuid);\r
+ GuidHob = GetFirstGuidHob (&gUniversalPayloadAcpiTableGuid);\r
if (GuidHob != NULL) {\r
- AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (GuidHob);\r
+ AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (GuidHob);\r
AcpiBoardInfo = BuildHobFromAcpi ((UINT64)AcpiTable->Rsdp);\r
ASSERT (AcpiBoardInfo != NULL);\r
}\r
// Update DXE FV information to first fv hob in the hob list, which\r
// is the empty FvHob created before.\r
//\r
- FvHob = GetFirstHob (EFI_HOB_TYPE_FV);\r
- FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) *DxeFv;\r
- FvHob->Length = (*DxeFv)->FvLength;\r
+ FvHob = GetFirstHob (EFI_HOB_TYPE_FV);\r
+ FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)*DxeFv;\r
+ FvHob->Length = (*DxeFv)->FvLength;\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
_ModuleEntryPoint (\r
- IN UINTN BootloaderParameter\r
+ IN UINTN BootloaderParameter\r
)\r
{\r
- EFI_STATUS Status;\r
- PHYSICAL_ADDRESS DxeCoreEntryPoint;\r
- EFI_PEI_HOB_POINTERS Hob;\r
- EFI_FIRMWARE_VOLUME_HEADER *DxeFv;\r
+ EFI_STATUS Status;\r
+ PHYSICAL_ADDRESS DxeCoreEntryPoint;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_FIRMWARE_VOLUME_HEADER *DxeFv;\r
\r
- mHobList = (VOID *) BootloaderParameter;\r
+ mHobList = (VOID *)BootloaderParameter;\r
DxeFv = NULL;\r
// Call constructor for all libraries\r
ProcessLibraryConstructorList ();\r
\r
DEBUG ((DEBUG_INFO, "Entering Universal Payload...\n"));\r
- DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));\r
+ DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));\r
\r
DEBUG_CODE (\r
//\r
// Dump the Hobs from boot loader\r
//\r
PrintHob (mHobList);\r
- );\r
+ );\r
\r
// Initialize floating point operating environment to be compliant with UEFI spec.\r
InitializeFloatingPointUnits ();\r
// Mask off all legacy 8259 interrupt sources\r
//\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);\r
- IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);\r
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);\r
\r
- Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);\r
+ Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);\r
HandOffToDxeCore (DxeCoreEntryPoint, Hob);\r
\r
// Should not get here\r
#include <Library/HobLib.h>\r
#include "X64/VirtualMemory.h"\r
#include "UefiPayloadEntry.h"\r
-#define STACK_SIZE 0x20000\r
-\r
+#define STACK_SIZE 0x20000\r
\r
/**\r
Transfers control to DxeCore.\r
**/\r
VOID\r
HandOffToDxeCore (\r
- IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
- IN EFI_PEI_HOB_POINTERS HobList\r
+ IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
+ IN EFI_PEI_HOB_POINTERS HobList\r
)\r
{\r
- VOID *BaseOfStack;\r
- VOID *TopOfStack;\r
- UINTN PageTables;\r
- VOID *GhcbBase;\r
- UINTN GhcbSize;\r
+ VOID *BaseOfStack;\r
+ VOID *TopOfStack;\r
+ UINTN PageTables;\r
+ VOID *GhcbBase;\r
+ UINTN GhcbSize;\r
\r
//\r
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.\r
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);\r
}\r
\r
-\r
//\r
// Allocate 128KB for the Stack\r
//\r
// Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
// for safety.\r
//\r
- TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
+ TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
//\r
//\r
// Create page table and save PageMapLevel4 to CR3\r
//\r
- PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,\r
- (EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);\r
+ PageTables = CreateIdentityMappingPageTables (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,\r
+ STACK_SIZE,\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,\r
+ GhcbSize\r
+ );\r
} else {\r
//\r
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE\r
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);\r
}\r
\r
-\r
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r
AsmWriteCr3 (PageTables);\r
}\r
//\r
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
//\r
- UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
+ UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);\r
\r
//\r
// Transfer the control to the entry point of DxeCore.\r
//\r
// Global variable to keep track current available memory used as page table.\r
//\r
-PAGE_TABLE_POOL *mPageTablePool = NULL;\r
+PAGE_TABLE_POOL *mPageTablePool = NULL;\r
\r
/**\r
Clear legacy memory located at the first 4K-page, if available.\r
**/\r
VOID\r
ClearFirst4KPage (\r
- IN VOID *HobStart\r
+ IN VOID *HobStart\r
)\r
{\r
- EFI_PEI_HOB_POINTERS RscHob;\r
- EFI_PEI_HOB_POINTERS MemHob;\r
- BOOLEAN DoClear;\r
+ EFI_PEI_HOB_POINTERS RscHob;\r
+ EFI_PEI_HOB_POINTERS MemHob;\r
+ BOOLEAN DoClear;\r
\r
RscHob.Raw = HobStart;\r
MemHob.Raw = HobStart;\r
- DoClear = FALSE;\r
+ DoClear = FALSE;\r
\r
//\r
// Check if page 0 exists and free\r
//\r
- while ((RscHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,\r
- RscHob.Raw)) != NULL) {\r
- if (RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY &&\r
- RscHob.ResourceDescriptor->PhysicalStart == 0) {\r
+ while ((RscHob.Raw = GetNextHob (\r
+ EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,\r
+ RscHob.Raw\r
+ )) != NULL)\r
+ {\r
+ if ((RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
+ (RscHob.ResourceDescriptor->PhysicalStart == 0))\r
+ {\r
DoClear = TRUE;\r
//\r
// Make sure memory at 0-4095 has not been allocated.\r
//\r
- while ((MemHob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION,\r
- MemHob.Raw)) != NULL) {\r
+ while ((MemHob.Raw = GetNextHob (\r
+ EFI_HOB_TYPE_MEMORY_ALLOCATION,\r
+ MemHob.Raw\r
+ )) != NULL)\r
+ {\r
if (MemHob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress\r
- < EFI_PAGE_SIZE) {\r
+ < EFI_PAGE_SIZE)\r
+ {\r
DoClear = FALSE;\r
break;\r
}\r
+\r
MemHob.Raw = GET_NEXT_HOB (MemHob);\r
}\r
+\r
break;\r
}\r
+\r
RscHob.Raw = GET_NEXT_HOB (RscHob);\r
}\r
\r
VOID\r
)\r
{\r
- UINT32 RegEax;\r
- UINT32 RegEdx;\r
- BOOLEAN Available;\r
+ UINT32 RegEax;\r
+ UINT32 RegEdx;\r
+ BOOLEAN Available;\r
\r
Available = FALSE;\r
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
VOID\r
)\r
{\r
- UINT64 MsrRegisters;\r
+ UINT64 MsrRegisters;\r
\r
- MsrRegisters = AsmReadMsr64 (0xC0000080);\r
+ MsrRegisters = AsmReadMsr64 (0xC0000080);\r
MsrRegisters |= BIT11;\r
AsmWriteMsr64 (0xC0000080, MsrRegisters);\r
}\r
**/\r
BOOLEAN\r
ToSplitPageTable (\r
- IN EFI_PHYSICAL_ADDRESS Address,\r
- IN UINTN Size,\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbSize\r
+ IN EFI_PHYSICAL_ADDRESS Address,\r
+ IN UINTN Size,\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbSize\r
)\r
{\r
- if (IsNullDetectionEnabled () && Address == 0) {\r
+ if (IsNullDetectionEnabled () && (Address == 0)) {\r
return TRUE;\r
}\r
\r
if (PcdGetBool (PcdCpuStackGuard)) {\r
- if (StackBase >= Address && StackBase < (Address + Size)) {\r
+ if ((StackBase >= Address) && (StackBase < (Address + Size))) {\r
return TRUE;\r
}\r
}\r
\r
return FALSE;\r
}\r
+\r
/**\r
Initialize a buffer pool for page table use only.\r
\r
**/\r
BOOLEAN\r
InitializePageTablePool (\r
- IN UINTN PoolPages\r
+ IN UINTN PoolPages\r
)\r
{\r
- VOID *Buffer;\r
+ VOID *Buffer;\r
\r
//\r
// Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one page for\r
// header.\r
//\r
PoolPages += 1; // Add one page for header.\r
- PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *\r
- PAGE_TABLE_POOL_UNIT_PAGES;\r
+ PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *\r
+ PAGE_TABLE_POOL_UNIT_PAGES;\r
Buffer = AllocateAlignedPages (PoolPages, PAGE_TABLE_POOL_ALIGNMENT);\r
if (Buffer == NULL) {\r
DEBUG ((DEBUG_ERROR, "ERROR: Out of aligned pages\r\n"));\r
// Link all pools into a list for easier track later.\r
//\r
if (mPageTablePool == NULL) {\r
- mPageTablePool = Buffer;\r
+ mPageTablePool = Buffer;\r
mPageTablePool->NextPool = mPageTablePool;\r
} else {\r
((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;\r
- mPageTablePool->NextPool = Buffer;\r
- mPageTablePool = Buffer;\r
+ mPageTablePool->NextPool = Buffer;\r
+ mPageTablePool = Buffer;\r
}\r
\r
//\r
// Reserve one page for pool header.\r
//\r
- mPageTablePool->FreePages = PoolPages - 1;\r
- mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);\r
+ mPageTablePool->FreePages = PoolPages - 1;\r
+ mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);\r
\r
return TRUE;\r
}\r
**/\r
VOID *\r
AllocatePageTableMemory (\r
- IN UINTN Pages\r
+ IN UINTN Pages\r
)\r
{\r
- VOID *Buffer;\r
+ VOID *Buffer;\r
\r
if (Pages == 0) {\r
return NULL;\r
//\r
// Renew the pool if necessary.\r
//\r
- if (mPageTablePool == NULL ||\r
- Pages > mPageTablePool->FreePages) {\r
+ if ((mPageTablePool == NULL) ||\r
+ (Pages > mPageTablePool->FreePages))\r
+ {\r
if (!InitializePageTablePool (Pages)) {\r
return NULL;\r
}\r
\r
Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;\r
\r
- mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);\r
- mPageTablePool->FreePages -= Pages;\r
+ mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);\r
+ mPageTablePool->FreePages -= Pages;\r
\r
return Buffer;\r
}\r
**/\r
VOID\r
Split2MPageTo4K (\r
- IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
- IN OUT UINT64 *PageEntry2M,\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbSize\r
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
+ IN OUT UINT64 *PageEntry2M,\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbSize\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS PhysicalAddress4K;\r
- UINTN IndexOfPageTableEntries;\r
- PAGE_TABLE_4K_ENTRY *PageTableEntry;\r
- UINT64 AddressEncMask;\r
+ EFI_PHYSICAL_ADDRESS PhysicalAddress4K;\r
+ UINTN IndexOfPageTableEntries;\r
+ PAGE_TABLE_4K_ENTRY *PageTableEntry;\r
+ UINT64 AddressEncMask;\r
\r
//\r
// Make sure AddressEncMask is contained to smallest supported address field\r
//\r
// Fill in 2M page entry.\r
//\r
- *PageEntry2M = (UINT64) (UINTN) PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;\r
+ *PageEntry2M = (UINT64)(UINTN)PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;\r
\r
PhysicalAddress4K = PhysicalAddress;\r
for (IndexOfPageTableEntries = 0; IndexOfPageTableEntries < 512; IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K += SIZE_4KB) {\r
//\r
// Fill in the Page Table entries\r
//\r
- PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K;\r
+ PageTableEntry->Uint64 = (UINT64)PhysicalAddress4K;\r
\r
//\r
// The GHCB range consists of two pages per CPU, the GHCB and a\r
// unencrypted page while the per-CPU variable page needs to be\r
// mapped encrypted. These pages alternate in assignment.\r
//\r
- if ((GhcbBase == 0)\r
- || (PhysicalAddress4K < GhcbBase)\r
- || (PhysicalAddress4K >= GhcbBase + GhcbSize)\r
- || (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0)) {\r
+ if ( (GhcbBase == 0)\r
+ || (PhysicalAddress4K < GhcbBase)\r
+ || (PhysicalAddress4K >= GhcbBase + GhcbSize)\r
+ || (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0))\r
+ {\r
PageTableEntry->Uint64 |= AddressEncMask;\r
}\r
+\r
PageTableEntry->Bits.ReadWrite = 1;\r
\r
- if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||\r
- (PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K == StackBase)) {\r
+ if ((IsNullDetectionEnabled () && (PhysicalAddress4K == 0)) ||\r
+ (PcdGetBool (PcdCpuStackGuard) && (PhysicalAddress4K == StackBase)))\r
+ {\r
PageTableEntry->Bits.Present = 0;\r
} else {\r
PageTableEntry->Bits.Present = 1;\r
}\r
\r
- if (PcdGetBool (PcdSetNxForStack)\r
- && (PhysicalAddress4K >= StackBase)\r
- && (PhysicalAddress4K < StackBase + StackSize)) {\r
+ if ( PcdGetBool (PcdSetNxForStack)\r
+ && (PhysicalAddress4K >= StackBase)\r
+ && (PhysicalAddress4K < StackBase + StackSize))\r
+ {\r
//\r
// Set Nx bit for stack.\r
//\r
**/\r
VOID\r
Split1GPageTo2M (\r
- IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
- IN OUT UINT64 *PageEntry1G,\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbSize\r
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
+ IN OUT UINT64 *PageEntry1G,\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbSize\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS PhysicalAddress2M;\r
- UINTN IndexOfPageDirectoryEntries;\r
- PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
- UINT64 AddressEncMask;\r
+ EFI_PHYSICAL_ADDRESS PhysicalAddress2M;\r
+ UINTN IndexOfPageDirectoryEntries;\r
+ PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
+ UINT64 AddressEncMask;\r
\r
//\r
// Make sure AddressEncMask is contained to smallest supported address field\r
//\r
// Fill in 1G page entry.\r
//\r
- *PageEntry1G = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;\r
+ *PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;\r
\r
PhysicalAddress2M = PhysicalAddress;\r
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {\r
//\r
// Need to split this 2M page that covers NULL or stack range.\r
//\r
- Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
+ Split2MPageTo4K (PhysicalAddress2M, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
} else {\r
//\r
// Fill in the Page Directory entries\r
//\r
- PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress2M | AddressEncMask;\r
+ PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress2M | AddressEncMask;\r
PageDirectoryEntry->Bits.ReadWrite = 1;\r
- PageDirectoryEntry->Bits.Present = 1;\r
- PageDirectoryEntry->Bits.MustBe1 = 1;\r
+ PageDirectoryEntry->Bits.Present = 1;\r
+ PageDirectoryEntry->Bits.MustBe1 = 1;\r
}\r
}\r
}\r
**/\r
VOID\r
SetPageTablePoolReadOnly (\r
- IN UINTN PageTableBase,\r
- IN EFI_PHYSICAL_ADDRESS Address,\r
- IN BOOLEAN Level4Paging\r
+ IN UINTN PageTableBase,\r
+ IN EFI_PHYSICAL_ADDRESS Address,\r
+ IN BOOLEAN Level4Paging\r
)\r
{\r
UINTN Index;\r
LevelSize[3] = SIZE_1GB;\r
LevelSize[4] = SIZE_512GB;\r
\r
- AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &\r
- PAGING_1G_ADDRESS_MASK_64;\r
- PageTable = (UINT64 *)(UINTN)PageTableBase;\r
- PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;\r
+ AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &\r
+ PAGING_1G_ADDRESS_MASK_64;\r
+ PageTable = (UINT64 *)(UINTN)PageTableBase;\r
+ PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;\r
\r
for (Level = (Level4Paging) ? 4 : 3; Level > 0; --Level) {\r
- Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));\r
+ Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));\r
Index &= PAGING_PAE_INDEX_MASK;\r
\r
PageAttr = PageTable[Index];\r
ASSERT (Index < EFI_PAGE_SIZE/sizeof (UINT64));\r
\r
PageTable[Index] &= ~(UINT64)IA32_PG_RW;\r
- PoolUnitSize -= LevelSize[Level];\r
+ PoolUnitSize -= LevelSize[Level];\r
\r
++Index;\r
}\r
}\r
\r
break;\r
-\r
} else {\r
//\r
// The smaller granularity of page must be needed.\r
\r
PhysicalAddress = PageAttr & LevelMask[Level];\r
for (EntryIndex = 0;\r
- EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);\r
- ++EntryIndex) {\r
+ EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);\r
+ ++EntryIndex)\r
+ {\r
NewPageTable[EntryIndex] = PhysicalAddress | AddressEncMask |\r
IA32_PG_P | IA32_PG_RW;\r
if (Level > 2) {\r
NewPageTable[EntryIndex] |= IA32_PG_PS;\r
}\r
+\r
PhysicalAddress += LevelSize[Level - 1];\r
}\r
\r
PageTable[Index] = (UINT64)(UINTN)NewPageTable | AddressEncMask |\r
- IA32_PG_P | IA32_PG_RW;\r
+ IA32_PG_P | IA32_PG_RW;\r
PageTable = NewPageTable;\r
}\r
}\r
**/\r
VOID\r
EnablePageTableProtection (\r
- IN UINTN PageTableBase,\r
- IN BOOLEAN Level4Paging\r
+ IN UINTN PageTableBase,\r
+ IN BOOLEAN Level4Paging\r
)\r
{\r
- PAGE_TABLE_POOL *HeadPool;\r
- PAGE_TABLE_POOL *Pool;\r
- UINT64 PoolSize;\r
- EFI_PHYSICAL_ADDRESS Address;\r
+ PAGE_TABLE_POOL *HeadPool;\r
+ PAGE_TABLE_POOL *Pool;\r
+ UINT64 PoolSize;\r
+ EFI_PHYSICAL_ADDRESS Address;\r
\r
if (mPageTablePool == NULL) {\r
return;\r
// Disable write protection, because we need to mark page table to be write\r
// protected.\r
//\r
- AsmWriteCr0 (AsmReadCr0() & ~CR0_WP);\r
+ AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);\r
\r
//\r
// SetPageTablePoolReadOnly might update mPageTablePool. It's safer to\r
// remember original one in advance.\r
//\r
HeadPool = mPageTablePool;\r
- Pool = HeadPool;\r
+ Pool = HeadPool;\r
do {\r
Address = (EFI_PHYSICAL_ADDRESS)(UINTN)Pool;\r
PoolSize = Pool->Offset + EFI_PAGES_TO_SIZE (Pool->FreePages);\r
// protection to them one by one.\r
//\r
while (PoolSize > 0) {\r
- SetPageTablePoolReadOnly(PageTableBase, Address, Level4Paging);\r
- Address += PAGE_TABLE_POOL_UNIT_SIZE;\r
- PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;\r
+ SetPageTablePoolReadOnly (PageTableBase, Address, Level4Paging);\r
+ Address += PAGE_TABLE_POOL_UNIT_SIZE;\r
+ PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;\r
}\r
\r
Pool = Pool->NextPool;\r
//\r
// Enable write protection, after page table attribute updated.\r
//\r
- AsmWriteCr0 (AsmReadCr0() | CR0_WP);\r
+ AsmWriteCr0 (AsmReadCr0 () | CR0_WP);\r
}\r
\r
/**\r
**/\r
UINTN\r
CreateIdentityMappingPageTables (\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbSize\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbSize\r
)\r
{\r
- UINT32 RegEax;\r
- CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;\r
- UINT32 RegEdx;\r
- UINT8 PhysicalAddressBits;\r
- EFI_PHYSICAL_ADDRESS PageAddress;\r
- UINTN IndexOfPml5Entries;\r
- UINTN IndexOfPml4Entries;\r
- UINTN IndexOfPdpEntries;\r
- UINTN IndexOfPageDirectoryEntries;\r
- UINT32 NumberOfPml5EntriesNeeded;\r
- UINT32 NumberOfPml4EntriesNeeded;\r
- UINT32 NumberOfPdpEntriesNeeded;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
- PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
- PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
- UINTN TotalPagesNum;\r
- UINTN BigPageAddress;\r
- VOID *Hob;\r
- BOOLEAN Page5LevelSupport;\r
- BOOLEAN Page1GSupport;\r
- PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r
- UINT64 AddressEncMask;\r
- IA32_CR4 Cr4;\r
+ UINT32 RegEax;\r
+ CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;\r
+ UINT32 RegEdx;\r
+ UINT8 PhysicalAddressBits;\r
+ EFI_PHYSICAL_ADDRESS PageAddress;\r
+ UINTN IndexOfPml5Entries;\r
+ UINTN IndexOfPml4Entries;\r
+ UINTN IndexOfPdpEntries;\r
+ UINTN IndexOfPageDirectoryEntries;\r
+ UINT32 NumberOfPml5EntriesNeeded;\r
+ UINT32 NumberOfPml4EntriesNeeded;\r
+ UINT32 NumberOfPdpEntriesNeeded;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
+ PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
+ PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
+ UINTN TotalPagesNum;\r
+ UINTN BigPageAddress;\r
+ VOID *Hob;\r
+ BOOLEAN Page5LevelSupport;\r
+ BOOLEAN Page1GSupport;\r
+ PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r
+ UINT64 AddressEncMask;\r
+ IA32_CR4 Cr4;\r
\r
//\r
// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings\r
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r
\r
Page1GSupport = FALSE;\r
- if (PcdGetBool(PcdUse1GPageTable)) {\r
+ if (PcdGetBool (PcdUse1GPageTable)) {\r
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
if (RegEax >= 0x80000001) {\r
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
//\r
Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r
if (Hob != NULL) {\r
- PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;\r
+ PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;\r
} else {\r
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
if (RegEax >= 0x80000008) {\r
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
- PhysicalAddressBits = (UINT8) RegEax;\r
+ PhysicalAddressBits = (UINT8)RegEax;\r
} else {\r
PhysicalAddressBits = 36;\r
}\r
Page5LevelSupport = FALSE;\r
if (PcdGetBool (PcdUse5LevelPageTable)) {\r
AsmCpuidEx (\r
- CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL,\r
- &EcxFlags.Uint32, NULL, NULL\r
+ CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,\r
+ CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,\r
+ NULL,\r
+ &EcxFlags.Uint32,\r
+ NULL,\r
+ NULL\r
);\r
if (EcxFlags.Bits.FiveLevelPage != 0) {\r
Page5LevelSupport = TRUE;\r
// due to either unsupported by HW, or disabled by PCD.\r
//\r
ASSERT (PhysicalAddressBits <= 52);\r
- if (!Page5LevelSupport && PhysicalAddressBits > 48) {\r
+ if (!Page5LevelSupport && (PhysicalAddressBits > 48)) {\r
PhysicalAddressBits = 48;\r
}\r
\r
//\r
NumberOfPml5EntriesNeeded = 1;\r
if (PhysicalAddressBits > 48) {\r
- NumberOfPml5EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 48);\r
- PhysicalAddressBits = 48;\r
+ NumberOfPml5EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 48);\r
+ PhysicalAddressBits = 48;\r
}\r
\r
NumberOfPml4EntriesNeeded = 1;\r
if (PhysicalAddressBits > 39) {\r
- NumberOfPml4EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 39);\r
- PhysicalAddressBits = 39;\r
+ NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 39);\r
+ PhysicalAddressBits = 39;\r
}\r
\r
NumberOfPdpEntriesNeeded = 1;\r
ASSERT (PhysicalAddressBits > 30);\r
- NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 30);\r
+ NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 30);\r
\r
//\r
// Pre-allocate big pages to avoid later allocations.\r
TotalPagesNum--;\r
}\r
\r
- DEBUG ((DEBUG_INFO, "Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",\r
- NumberOfPml5EntriesNeeded, NumberOfPml4EntriesNeeded,\r
- NumberOfPdpEntriesNeeded, (UINT64)TotalPagesNum));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",\r
+ NumberOfPml5EntriesNeeded,\r
+ NumberOfPml4EntriesNeeded,\r
+ NumberOfPdpEntriesNeeded,\r
+ (UINT64)TotalPagesNum\r
+ ));\r
\r
- BigPageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);\r
+ BigPageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);\r
ASSERT (BigPageAddress != 0);\r
\r
//\r
// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r
//\r
- PageMap = (VOID *) BigPageAddress;\r
+ PageMap = (VOID *)BigPageAddress;\r
if (Page5LevelSupport) {\r
//\r
// By architecture only one PageMapLevel5 exists - so lets allocate storage for it.\r
PageMapLevel5Entry = PageMap;\r
BigPageAddress += SIZE_4KB;\r
}\r
- PageAddress = 0;\r
+\r
+ PageAddress = 0;\r
\r
for ( IndexOfPml5Entries = 0\r
- ; IndexOfPml5Entries < NumberOfPml5EntriesNeeded\r
- ; IndexOfPml5Entries++) {\r
+ ; IndexOfPml5Entries < NumberOfPml5EntriesNeeded\r
+ ; IndexOfPml5Entries++)\r
+ {\r
//\r
// Each PML5 entry points to a page of PML4 entires.\r
// So lets allocate space for them and fill them in in the IndexOfPml4Entries loop.\r
// When 5-Level Paging is disabled, below allocation happens only once.\r
//\r
- PageMapLevel4Entry = (VOID *) BigPageAddress;\r
+ PageMapLevel4Entry = (VOID *)BigPageAddress;\r
BigPageAddress += SIZE_4KB;\r
\r
if (Page5LevelSupport) {\r
//\r
// Make a PML5 Entry\r
//\r
- PageMapLevel5Entry->Uint64 = (UINT64) (UINTN) PageMapLevel4Entry | AddressEncMask;\r
+ PageMapLevel5Entry->Uint64 = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;\r
PageMapLevel5Entry->Bits.ReadWrite = 1;\r
PageMapLevel5Entry->Bits.Present = 1;\r
PageMapLevel5Entry++;\r
}\r
\r
for ( IndexOfPml4Entries = 0\r
- ; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)\r
- ; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
+ ; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)\r
+ ; IndexOfPml4Entries++, PageMapLevel4Entry++)\r
+ {\r
//\r
// Each PML4 entry points to a page of Page Directory Pointer entires.\r
// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r
//\r
- PageDirectoryPointerEntry = (VOID *) BigPageAddress;\r
- BigPageAddress += SIZE_4KB;\r
+ PageDirectoryPointerEntry = (VOID *)BigPageAddress;\r
+ BigPageAddress += SIZE_4KB;\r
\r
//\r
// Make a PML4 Entry\r
//\r
- PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r
+ PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r
PageMapLevel4Entry->Bits.ReadWrite = 1;\r
- PageMapLevel4Entry->Bits.Present = 1;\r
+ PageMapLevel4Entry->Bits.Present = 1;\r
\r
if (Page1GSupport) {\r
- PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;\r
+ PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;\r
\r
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {\r
if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize, GhcbBase, GhcbSize)) {\r
- Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
+ Split1GPageTo2M (PageAddress, (UINT64 *)PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
} else {\r
//\r
// Fill in the Page Directory entries\r
//\r
- PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
+ PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
PageDirectory1GEntry->Bits.ReadWrite = 1;\r
- PageDirectory1GEntry->Bits.Present = 1;\r
- PageDirectory1GEntry->Bits.MustBe1 = 1;\r
+ PageDirectory1GEntry->Bits.Present = 1;\r
+ PageDirectory1GEntry->Bits.MustBe1 = 1;\r
}\r
}\r
} else {\r
for ( IndexOfPdpEntries = 0\r
- ; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)\r
- ; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
+ ; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)\r
+ ; IndexOfPdpEntries++, PageDirectoryPointerEntry++)\r
+ {\r
//\r
// Each Directory Pointer entries points to a page of Page Directory entires.\r
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
//\r
- PageDirectoryEntry = (VOID *) BigPageAddress;\r
- BigPageAddress += SIZE_4KB;\r
+ PageDirectoryEntry = (VOID *)BigPageAddress;\r
+ BigPageAddress += SIZE_4KB;\r
\r
//\r
// Fill in a Page Directory Pointer Entries\r
//\r
- PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
+ PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
- PageDirectoryPointerEntry->Bits.Present = 1;\r
+ PageDirectoryPointerEntry->Bits.Present = 1;\r
\r
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {\r
if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {\r
//\r
// Need to split this 2M page that covers NULL or stack range.\r
//\r
- Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
+ Split2MPageTo4K (PageAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);\r
} else {\r
//\r
// Fill in the Page Directory entries\r
//\r
- PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
+ PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
PageDirectoryEntry->Bits.ReadWrite = 1;\r
- PageDirectoryEntry->Bits.Present = 1;\r
- PageDirectoryEntry->Bits.MustBe1 = 1;\r
+ PageDirectoryEntry->Bits.Present = 1;\r
+ PageDirectoryEntry->Bits.MustBe1 = 1;\r
}\r
}\r
}\r
//\r
// Fill with null entry for unused PDPTE\r
//\r
- ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof(PAGE_MAP_AND_DIRECTORY_POINTER));\r
+ ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof (PAGE_MAP_AND_DIRECTORY_POINTER));\r
}\r
}\r
\r
}\r
\r
if (Page5LevelSupport) {\r
- Cr4.UintN = AsmReadCr4 ();\r
+ Cr4.UintN = AsmReadCr4 ();\r
Cr4.Bits.LA57 = 1;\r
AsmWriteCr4 (Cr4.UintN);\r
//\r
\r
return (UINTN)PageMap;\r
}\r
-\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef _VIRTUAL_MEMORY_H_\r
#define _VIRTUAL_MEMORY_H_\r
\r
-\r
-#define SYS_CODE64_SEL 0x38\r
-\r
+#define SYS_CODE64_SEL 0x38\r
\r
#pragma pack(1)\r
\r
typedef union {\r
struct {\r
- UINT32 LimitLow : 16;\r
- UINT32 BaseLow : 16;\r
- UINT32 BaseMid : 8;\r
- UINT32 Type : 4;\r
- UINT32 System : 1;\r
- UINT32 Dpl : 2;\r
- UINT32 Present : 1;\r
- UINT32 LimitHigh : 4;\r
- UINT32 Software : 1;\r
- UINT32 Reserved : 1;\r
- UINT32 DefaultSize : 1;\r
- UINT32 Granularity : 1;\r
- UINT32 BaseHigh : 8;\r
+ UINT32 LimitLow : 16;\r
+ UINT32 BaseLow : 16;\r
+ UINT32 BaseMid : 8;\r
+ UINT32 Type : 4;\r
+ UINT32 System : 1;\r
+ UINT32 Dpl : 2;\r
+ UINT32 Present : 1;\r
+ UINT32 LimitHigh : 4;\r
+ UINT32 Software : 1;\r
+ UINT32 Reserved : 1;\r
+ UINT32 DefaultSize : 1;\r
+ UINT32 Granularity : 1;\r
+ UINT32 BaseHigh : 8;\r
} Bits;\r
- UINT64 Uint64;\r
+ UINT64 Uint64;\r
} IA32_GDT;\r
\r
typedef struct {\r
- IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;\r
- UINT32 Offset32To63;\r
- UINT32 Reserved;\r
+ IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;\r
+ UINT32 Offset32To63;\r
+ UINT32 Reserved;\r
} X64_IDT_GATE_DESCRIPTOR;\r
\r
//\r
\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Reserved:1; // Reserved\r
- UINT64 MustBeZero:2; // Must Be Zero\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // No Execute bit\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Reserved : 1; // Reserved\r
+ UINT64 MustBeZero : 2; // Must Be Zero\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PageTableBaseAddress : 40; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // No Execute bit\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_MAP_AND_DIRECTORY_POINTER;\r
//\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 PAT:1; //\r
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r
+ UINT64 PAT : 1; //\r
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PageTableBaseAddress : 40; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_TABLE_4K_ENTRY;\r
//\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 MustBe1:1; // Must be 1\r
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PAT:1; //\r
- UINT64 MustBeZero:8; // Must be zero;\r
- UINT64 PageTableBaseAddress:31; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r
+ UINT64 MustBe1 : 1; // Must be 1\r
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PAT : 1; //\r
+ UINT64 MustBeZero : 8; // Must be zero;\r
+ UINT64 PageTableBaseAddress : 31; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_TABLE_ENTRY;\r
//\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 MustBe1:1; // Must be 1\r
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PAT:1; //\r
- UINT64 MustBeZero:17; // Must be zero;\r
- UINT64 PageTableBaseAddress:22; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r
+ UINT64 MustBe1 : 1; // Must be 1\r
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PAT : 1; //\r
+ UINT64 MustBeZero : 17; // Must be zero;\r
+ UINT64 PageTableBaseAddress : 22; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_TABLE_1G_ENTRY;\r
\r
#pragma pack()\r
\r
-#define CR0_WP BIT16\r
+#define CR0_WP BIT16\r
\r
-#define IA32_PG_P BIT0\r
-#define IA32_PG_RW BIT1\r
-#define IA32_PG_PS BIT7\r
+#define IA32_PG_P BIT0\r
+#define IA32_PG_RW BIT1\r
+#define IA32_PG_PS BIT7\r
\r
-#define PAGING_PAE_INDEX_MASK 0x1FF\r
+#define PAGING_PAE_INDEX_MASK 0x1FF\r
\r
-#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r
-#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r
-#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r
+#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r
+#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r
+#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r
\r
-#define PAGING_L1_ADDRESS_SHIFT 12\r
-#define PAGING_L2_ADDRESS_SHIFT 21\r
-#define PAGING_L3_ADDRESS_SHIFT 30\r
-#define PAGING_L4_ADDRESS_SHIFT 39\r
+#define PAGING_L1_ADDRESS_SHIFT 12\r
+#define PAGING_L2_ADDRESS_SHIFT 21\r
+#define PAGING_L3_ADDRESS_SHIFT 30\r
+#define PAGING_L4_ADDRESS_SHIFT 39\r
\r
-#define PAGING_PML4E_NUMBER 4\r
+#define PAGING_PML4E_NUMBER 4\r
\r
#define PAGE_TABLE_POOL_ALIGNMENT BASE_2MB\r
#define PAGE_TABLE_POOL_UNIT_SIZE SIZE_2MB\r
(~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))\r
\r
typedef struct {\r
- VOID *NextPool;\r
- UINTN Offset;\r
- UINTN FreePages;\r
+ VOID *NextPool;\r
+ UINTN Offset;\r
+ UINTN FreePages;\r
} PAGE_TABLE_POOL;\r
\r
/**\r
**/\r
VOID\r
Split2MPageTo4K (\r
- IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
- IN OUT UINT64 *PageEntry2M,\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbSize\r
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddress,\r
+ IN OUT UINT64 *PageEntry2M,\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbSize\r
);\r
\r
/**\r
**/\r
UINTN\r
CreateIdentityMappingPageTables (\r
- IN EFI_PHYSICAL_ADDRESS StackBase,\r
- IN UINTN StackSize,\r
- IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
- IN UINTN GhcbkSize\r
+ IN EFI_PHYSICAL_ADDRESS StackBase,\r
+ IN UINTN StackSize,\r
+ IN EFI_PHYSICAL_ADDRESS GhcbBase,\r
+ IN UINTN GhcbkSize\r
);\r
\r
-\r
/**\r
\r
Fix up the vector number in the vector code.\r
VOID\r
EFIAPI\r
AsmVectorFixup (\r
- VOID *VectorBase,\r
- UINT8 VectorNum\r
+ VOID *VectorBase,\r
+ UINT8 VectorNum\r
);\r
\r
-\r
/**\r
\r
Get the information of vector template.\r
**/\r
VOID\r
ClearFirst4KPage (\r
- IN VOID *HobStart\r
+ IN VOID *HobStart\r
);\r
\r
/**\r
**/\r
VOID\r
EnablePageTableProtection (\r
- IN UINTN PageTableBase,\r
- IN BOOLEAN Level4Paging\r
+ IN UINTN PageTableBase,\r
+ IN BOOLEAN Level4Paging\r
);\r
\r
/**\r
**/\r
VOID *\r
AllocatePageTableMemory (\r
- IN UINTN Pages\r
+ IN UINTN Pages\r
);\r
\r
#endif\r
projects / mirror_edk2.git / commitdiff