UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c

   1 /** @file
   2   x64-specifc functionality for DxeLoad.
   3
   4 Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>
   5 SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #include <PiPei.h>
  10 #include <Library/BaseLib.h>
  11 #include <Library/DebugLib.h>
  12 #include <Library/BaseMemoryLib.h>
  13 #include <Library/MemoryAllocationLib.h>
  14 #include <Library/PcdLib.h>
  15 #include <Library/HobLib.h>
  16 #include "X64/VirtualMemory.h"
  17 #include "UefiPayloadEntry.h"
  18 #define STACK_SIZE            0x20000
  19
  20
  21 /**
  22    Transfers control to DxeCore.
  23
  24    This function performs a CPU architecture specific operations to execute
  25    the entry point of DxeCore with the parameters of HobList.
  26    It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
  27
  28    @param DxeCoreEntryPoint         The entry point of DxeCore.
  29    @param HobList                   The start of HobList passed to DxeCore.
  30
  31 **/
  32 VOID
  33 HandOffToDxeCore (
  34   IN EFI_PHYSICAL_ADDRESS   DxeCoreEntryPoint,
  35   IN EFI_PEI_HOB_POINTERS   HobList
  36   )
  37 {
  38   VOID                            *BaseOfStack;
  39   VOID                            *TopOfStack;
  40   UINTN                           PageTables;
  41   VOID                            *GhcbBase;
  42   UINTN                           GhcbSize;
  43
  44   //
  45   // Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
  46   //
  47   if (IsNullDetectionEnabled ()) {
  48     ClearFirst4KPage (HobList.Raw);
  49     BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
  50   }
  51
  52
  53   //
  54   // Allocate 128KB for the Stack
  55   //
  56   BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
  57   ASSERT (BaseOfStack != NULL);
  58
  59   //
  60   // Compute the top of the stack we were allocated. Pre-allocate a UINTN
  61   // for safety.
  62   //
  63   TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
  64   TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
  65
  66   //
  67   // Get the address and size of the GHCB pages
  68   //
  69   GhcbBase = 0;
  70   GhcbSize = 0;
  71
  72   PageTables = 0;
  73   if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
  74     //
  75     // Create page table and save PageMapLevel4 to CR3
  76     //
  77     PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
  78                                                   (EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
  79   } else {
  80     //
  81     // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
  82     // for the DxeIpl and the DxeCore are both X64.
  83     //
  84     ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
  85     ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
  86   }
  87
  88
  89   if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
  90     AsmWriteCr3 (PageTables);
  91   }
  92
  93   //
  94   // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
  95   //
  96   UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
  97
  98   //
  99   // Transfer the control to the entry point of DxeCore.
 100   //
 101   SwitchStack (
 102     (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
 103     HobList.Raw,
 104     NULL,
 105     TopOfStack
 106     );
 107 }