projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3cbfba02 DW |
1 | /** @file\r |
| 2 | \r | |
| d71c25cf DW |
3 | Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r |
| 4 | \r | |
| 5 | \r | |
| 6 | This program and the accompanying materials are licensed and made available under\r | |
| 7 | \r | |
| 8 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
| 9 | \r | |
| 10 | The full text of the license may be found at \r | |
| 11 | \r | |
| 12 | http://opensource.org/licenses/bsd-license.php. \r | |
| 13 | \r | |
| 14 | \r | |
| 15 | \r | |
| 16 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
| 17 | \r | |
| 18 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
| 19 | \r | |
| 20 | \r | |
| 21 | \r | |
| 3cbfba02 DW |
22 | \r |
| 23 | Module Name:\r | |
| 24 | \r | |
| 25 | \r | |
| 26 | Platform.c\r | |
| 27 | \r | |
| 28 | Abstract:\r | |
| 29 | \r | |
| 30 | Platform Initialization Driver.\r | |
| 31 | \r | |
| 32 | \r | |
| 33 | --*/\r | |
| 34 | \r | |
| 35 | #include "PlatformDxe.h"\r | |
| 36 | #include "Platform.h"\r | |
| 37 | #include "PchCommonDefinitions.h"\r | |
| 38 | #include <Protocol/UsbPolicy.h>\r | |
| 39 | #include <Protocol/PchPlatformPolicy.h>\r | |
| 40 | #include <Protocol/TpmMp.h>\r | |
| 41 | #include <Protocol/CpuIo2.h>\r | |
| 42 | #include <Library/S3BootScriptLib.h>\r | |
| 43 | #include <Guid/PciLanInfo.h>\r | |
| 44 | #include <Guid/ItkData.h>\r | |
| 45 | #include <Library/PciLib.h>\r | |
| 46 | #include <PlatformBootMode.h>\r | |
| 47 | #include <Guid/EventGroup.h>\r | |
| 48 | #include <Guid/Vlv2Variable.h>\r | |
| 49 | #include <Protocol/GlobalNvsArea.h>\r | |
| 50 | #include <Protocol/IgdOpRegion.h>\r | |
| 51 | #include <Library/PcdLib.h>\r | |
| 620f2891 TH |
52 | #include <Protocol/VariableLock.h>\r |
| 53 | \r | |
| 3cbfba02 DW |
54 | \r |
| 55 | //\r | |
| 56 | // VLV2 GPIO GROUP OFFSET\r | |
| 57 | //\r | |
| 58 | #define GPIO_SCORE_OFFSET 0x0000\r | |
| 59 | #define GPIO_NCORE_OFFSET 0x1000\r | |
| 60 | #define GPIO_SSUS_OFFSET 0x2000\r | |
| 61 | \r | |
| 62 | typedef struct {\r | |
| 63 | UINT32 offset;\r | |
| 64 | UINT32 val;\r | |
| 65 | } CFIO_PNP_INIT;\r | |
| 66 | \r | |
| 67 | GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =\r | |
| 68 | {\r | |
| 69 | // Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset\r | |
| 70 | GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47),\r | |
| 71 | GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41),\r | |
| 72 | };\r | |
| 73 | \r | |
| 74 | \r | |
| 75 | EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;\r | |
| 76 | EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;\r | |
| 77 | SYSTEM_CONFIGURATION mSystemConfiguration;\r | |
| 78 | SYSTEM_PASSWORDS mSystemPassword;\r | |
| 79 | EFI_HANDLE mImageHandle;\r | |
| 80 | BOOLEAN mMfgMode = FALSE;\r | |
| 81 | VOID *mDxePlatformStringPack;\r | |
| 82 | UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE;\r | |
| 83 | extern CHAR16 gItkDataVarName[];\r | |
| 84 | \r | |
| 85 | \r | |
| 86 | EFI_PLATFORM_INFO_HOB mPlatformInfo;\r | |
| 87 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo;\r | |
| 88 | EFI_EVENT mReadyToBootEvent;\r | |
| 89 | \r | |
| 90 | UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES;\r | |
| 91 | UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] );\r | |
| 92 | UINT32 mSubsystemVidDid;\r | |
| 93 | UINT32 mSubsystemAudioVidDid;\r | |
| 94 | \r | |
| 95 | UINTN mPciLanCount = 0;\r | |
| 96 | VOID *mPciLanInfo = NULL;\r | |
| 97 | UINTN SpiBase;\r | |
| 98 | \r | |
| 99 | static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = {\r | |
| 100 | ProgramToneFrequency,\r | |
| 101 | GenerateBeepTone\r | |
| 102 | };\r | |
| 103 | \r | |
| 104 | EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0};\r | |
| 105 | \r | |
| 106 | \r | |
| 107 | CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] =\r | |
| 108 | {\r | |
| 109 | {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0\r | |
| 110 | {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0\r | |
| 111 | {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0\r | |
| 112 | {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0\r | |
| 113 | {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0\r | |
| 114 | {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0\r | |
| 115 | {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0\r | |
| 116 | {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0\r | |
| 117 | {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0\r | |
| 118 | {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val\r | |
| 119 | {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val\r | |
| 120 | {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val\r | |
| 121 | {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val\r | |
| 122 | {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val\r | |
| 123 | {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val\r | |
| 124 | {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val\r | |
| 125 | {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val\r | |
| 126 | {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val\r | |
| 127 | };\r | |
| 128 | \r | |
| 129 | VOID\r | |
| 130 | EfiOrMem (\r | |
| 131 | IN VOID *Destination,\r | |
| 132 | IN VOID *Source,\r | |
| 133 | IN UINTN Length\r | |
| 134 | );\r | |
| 135 | \r | |
| 136 | #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r | |
| 137 | STATIC\r | |
| 138 | VOID\r | |
| 139 | InitFirmwareId();\r | |
| 140 | #endif\r | |
| 141 | \r | |
| 142 | \r | |
| 143 | VOID\r | |
| 144 | InitializeClockRouting(\r | |
| 145 | );\r | |
| 146 | \r | |
| 147 | VOID\r | |
| 148 | InitializeSlotInfo (\r | |
| 149 | );\r | |
| 150 | \r | |
| 151 | #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r | |
| 152 | VOID\r | |
| 153 | InitializeSensorInfoVariable (\r | |
| 154 | );\r | |
| 155 | #endif\r | |
| 156 | \r | |
| 157 | VOID\r | |
| 158 | InitTcoReset (\r | |
| 159 | );\r | |
| 160 | \r | |
| 161 | VOID\r | |
| 162 | InitExI ();\r | |
| 163 | \r | |
| 164 | VOID\r | |
| 165 | InitItk();\r | |
| 166 | \r | |
| 167 | VOID\r | |
| 168 | InitPlatformBootMode();\r | |
| 169 | \r | |
| 170 | VOID\r | |
| 171 | InitMfgAndConfigModeStateVar();\r | |
| 172 | \r | |
| 173 | VOID\r | |
| 174 | InitPchPlatformPolicy (\r | |
| 175 | IN EFI_PLATFORM_INFO_HOB *PlatformInfo\r | |
| 176 | );\r | |
| 177 | \r | |
| 178 | VOID\r | |
| 179 | InitVlvPlatformPolicy (\r | |
| 180 | );\r | |
| 181 | \r | |
| 182 | VOID\r | |
| 183 | InitSioPlatformPolicy(\r | |
| 184 | );\r | |
| 185 | \r | |
| 186 | VOID\r | |
| 187 | PchInitBeforeBoot(\r | |
| 188 | );\r | |
| 189 | \r | |
| 190 | VOID\r | |
| 191 | UpdateDVMTSetup(\r | |
| 192 | );\r | |
| 193 | \r | |
| 194 | VOID\r | |
| 195 | InitPlatformUsbPolicy (\r | |
| 196 | VOID\r | |
| 197 | );\r | |
| 198 | \r | |
| 199 | VOID\r | |
| 200 | InitRC6Policy(\r | |
| 201 | VOID\r | |
| 202 | );\r | |
| 203 | \r | |
| 204 | \r | |
| 620f2891 TH |
205 | EFI_STATUS\r |
| 206 | EFIAPI\r | |
| 207 | SaveSetupRecoveryVar(\r | |
| 208 | VOID\r | |
| 209 | )\r | |
| 210 | {\r | |
| 211 | EFI_STATUS Status = EFI_SUCCESS;\r | |
| 212 | UINTN SizeOfNvStore = 0;\r | |
| 213 | UINTN SizeOfSetupVar = 0;\r | |
| 214 | SYSTEM_CONFIGURATION *SetupData = NULL;\r | |
| 215 | SYSTEM_CONFIGURATION *RecoveryNvData = NULL;\r | |
| 216 | EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL;\r | |
| 217 | \r | |
| 218 | \r | |
| 219 | DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n"));\r | |
| 220 | SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION);\r | |
| 221 | RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r | |
| 222 | if (NULL == RecoveryNvData) {\r | |
| 223 | Status = EFI_OUT_OF_RESOURCES;\r | |
| 224 | goto Exit; \r | |
| 225 | }\r | |
| 226 | \r | |
| 227 | Status = gRT->GetVariable(\r | |
| 228 | L"SetupRecovery",\r | |
| 229 | &gEfiNormalSetupGuid,\r | |
| 230 | NULL,\r | |
| 231 | &SizeOfNvStore,\r | |
| 232 | RecoveryNvData\r | |
| 233 | );\r | |
| 234 | \r | |
| 235 | if (EFI_ERROR (Status)) {\r | |
| 236 | // Don't find the "SetupRecovery" variable.\r | |
| 237 | // have to copy "Setup" variable to "SetupRecovery" variable.\r | |
| 238 | SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r | |
| 239 | if (NULL == SetupData) {\r | |
| 240 | Status = EFI_OUT_OF_RESOURCES;\r | |
| 241 | goto Exit; \r | |
| 242 | }\r | |
| 243 | SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION);\r | |
| 244 | Status = gRT->GetVariable(\r | |
| 245 | NORMAL_SETUP_NAME,\r | |
| 246 | &gEfiNormalSetupGuid,\r | |
| 247 | NULL,\r | |
| 248 | &SizeOfSetupVar,\r | |
| 249 | SetupData\r | |
| 250 | );\r | |
| 251 | ASSERT_EFI_ERROR (Status);\r | |
| 252 | \r | |
| 253 | Status = gRT->SetVariable (\r | |
| 254 | L"SetupRecovery",\r | |
| 255 | &gEfiNormalSetupGuid,\r | |
| 256 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r | |
| 257 | sizeof(SYSTEM_CONFIGURATION),\r | |
| 258 | SetupData\r | |
| 259 | );\r | |
| 260 | ASSERT_EFI_ERROR (Status);\r | |
| 261 | \r | |
| 262 | Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock);\r | |
| 263 | if (!EFI_ERROR (Status)) {\r | |
| 264 | Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid);\r | |
| 265 | ASSERT_EFI_ERROR (Status);\r | |
| 266 | }\r | |
| 267 | \r | |
| 268 | }\r | |
| 269 | \r | |
| 270 | Exit:\r | |
| 271 | if (RecoveryNvData)\r | |
| 272 | FreePool (RecoveryNvData);\r | |
| 273 | if (SetupData)\r | |
| 274 | FreePool (SetupData);\r | |
| 275 | \r | |
| 276 | return Status;\r | |
| 277 | \r | |
| 278 | }\r | |
| 279 | \r | |
| 280 | \r | |
| 3cbfba02 DW |
281 | VOID\r |
| 282 | TristateLpcGpioConfig (\r | |
| 283 | IN UINT32 Gpio_Mmio_Offset,\r | |
| 284 | IN UINT32 Gpio_Pin_Num,\r | |
| 285 | GPIO_CONF_PAD_INIT* Gpio_Conf_Data\r | |
| 286 | )\r | |
| 287 | \r | |
| 288 | {\r | |
| 289 | UINT32 index;\r | |
| 290 | UINT32 mmio_conf0;\r | |
| 291 | UINT32 mmio_padval;\r | |
| 292 | PAD_CONF0 conf0_val;\r | |
| 293 | PAD_VAL pad_val;\r | |
| 294 | \r | |
| 295 | //\r | |
| 296 | // GPIO WELL -- Memory base registers\r | |
| 297 | //\r | |
| 298 | \r | |
| 299 | //\r | |
| 300 | // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r | |
| 301 | // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900\r | |
| 302 | //\r | |
| 303 | \r | |
| 304 | for(index=0; index < Gpio_Pin_Num; index++)\r | |
| 305 | {\r | |
| 306 | //\r | |
| 307 | // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.\r | |
| 308 | //\r | |
| 309 | mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16;\r | |
| 310 | mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16;\r | |
| 311 | \r | |
| 312 | #ifdef EFI_DEBUG\r | |
| 313 | DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name));\r | |
| 314 | \r | |
| 315 | #endif\r | |
| 316 | DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",\r | |
| 317 | Gpio_Conf_Data[index].usage,\r | |
| 318 | Gpio_Conf_Data[index].func,\r | |
| 319 | Gpio_Conf_Data[index].int_type,\r | |
| 320 | Gpio_Conf_Data[index].pull,\r | |
| 321 | mmio_conf0));\r | |
| 322 | \r | |
| 323 | //\r | |
| 324 | // Step 1: PadVal Programming\r | |
| 325 | //\r | |
| 326 | pad_val.dw = MmioRead32(mmio_padval);\r | |
| 327 | \r | |
| 328 | //\r | |
| 329 | // Config PAD_VAL only for GPIO (Non-Native) Pin\r | |
| 330 | //\r | |
| 331 | if(Native != Gpio_Conf_Data[index].usage)\r | |
| 332 | {\r | |
| 333 | pad_val.dw &= ~0x6; // Clear bits 1:2\r | |
| 334 | pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal\r | |
| 335 | \r | |
| 336 | //\r | |
| 337 | // set GPO default value\r | |
| 338 | //\r | |
| 339 | if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA)\r | |
| 340 | {\r | |
| 341 | pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4;\r | |
| 342 | }\r | |
| 343 | }\r | |
| 344 | \r | |
| 345 | \r | |
| 346 | DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw));\r | |
| 347 | \r | |
| 348 | MmioWrite32(mmio_padval, pad_val.dw);\r | |
| 349 | \r | |
| 350 | //\r | |
| 351 | // Step 2: CONF0 Programming\r | |
| 352 | // Read GPIO default CONF0 value, which is assumed to be default value after reset.\r | |
| 353 | //\r | |
| 354 | conf0_val.dw = MmioRead32(mmio_conf0);\r | |
| 355 | \r | |
| 356 | //\r | |
| 357 | // Set Function #\r | |
| 358 | //\r | |
| 359 | conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func;\r | |
| 360 | \r | |
| 361 | if(GPO == Gpio_Conf_Data[index].usage)\r | |
| 362 | {\r | |
| 363 | //\r | |
| 364 | // If used as GPO, then internal pull need to be disabled\r | |
| 365 | //\r | |
| 366 | conf0_val.r.Pull_assign = 0; // Non-pull\r | |
| 367 | }\r | |
| 368 | else\r | |
| 369 | {\r | |
| 370 | //\r | |
| 371 | // Set PullUp / PullDown\r | |
| 372 | //\r | |
| 373 | if(P_20K_H == Gpio_Conf_Data[index].pull)\r | |
| 374 | {\r | |
| 375 | conf0_val.r.Pull_assign = 0x1; // PullUp\r | |
| 376 | conf0_val.r.Pull_strength = 0x2;// 20K\r | |
| 377 | }\r | |
| 378 | else if(P_20K_L == Gpio_Conf_Data[index].pull)\r | |
| 379 | {\r | |
| 380 | conf0_val.r.Pull_assign = 0x2; // PullDown\r | |
| 381 | conf0_val.r.Pull_strength = 0x2;// 20K\r | |
| 382 | }\r | |
| 383 | else if(P_NONE == Gpio_Conf_Data[index].pull)\r | |
| 384 | {\r | |
| 385 | conf0_val.r.Pull_assign = 0; // Non-pull\r | |
| 386 | }\r | |
| 387 | else\r | |
| 388 | {\r | |
| 389 | ASSERT(FALSE); // Invalid value\r | |
| 390 | }\r | |
| 391 | }\r | |
| 392 | \r | |
| 393 | //\r | |
| 394 | // Set INT Trigger Type\r | |
| 395 | //\r | |
| 396 | conf0_val.dw &= ~0x0f000000; // Clear bits 27:24\r | |
| 397 | \r | |
| 398 | //\r | |
| 399 | // Set INT Trigger Type\r | |
| 400 | //\r | |
| 401 | if(TRIG_ == Gpio_Conf_Data[index].int_type)\r | |
| 402 | {\r | |
| 403 | //\r | |
| 404 | // Interrupt not capable, clear bits 27:24\r | |
| 405 | //\r | |
| 406 | }\r | |
| 407 | else\r | |
| 408 | {\r | |
| 409 | conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24;\r | |
| 410 | }\r | |
| 411 | \r | |
| 412 | DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw));\r | |
| 413 | \r | |
| 414 | //\r | |
| 415 | // Write back the targeted GPIO config value according to platform (board) GPIO setting\r | |
| 416 | //\r | |
| 417 | MmioWrite32 (mmio_conf0, conf0_val.dw);\r | |
| 418 | }\r | |
| 419 | \r | |
| 420 | // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r | |
| 421 | // GPIO SCORE write 0x01001002 to IOBASE + 0x0900\r | |
| 422 | //\r | |
| 423 | }\r | |
| 424 | \r | |
| 425 | VOID\r | |
| 426 | EFIAPI\r | |
| 427 | SpiBiosProtectionFunction(\r | |
| 428 | EFI_EVENT Event,\r | |
| 429 | VOID *Context\r | |
| 430 | )\r | |
| 431 | {\r | |
| 432 | \r | |
| 433 | UINTN mPciD31F0RegBase;\r | |
| fb1a4e36 SL |
434 | UINTN BiosFlaLower0;\r |
| 435 | UINTN BiosFlaLimit0;\r | |
| 436 | UINTN BiosFlaLower1;\r | |
| 437 | UINTN BiosFlaLimit1; \r | |
| 438 | \r | |
| 3cbfba02 | 439 | \r |
| fb1a4e36 SL |
440 | BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress);\r |
| 441 | BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1; \r | |
| 442 | #ifdef MINNOW2_FSP_BUILD\r | |
| 443 | BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress);\r | |
| 444 | BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r | |
| 445 | #else\r | |
| 446 | BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress);\r | |
| 447 | BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r | |
| 448 | #endif\r | |
| 3cbfba02 | 449 | \r |
| fb1a4e36 | 450 | \r |
| 3cbfba02 DW |
451 | mPciD31F0RegBase = MmPciAddress (0,\r |
| 452 | DEFAULT_PCI_BUS_NUMBER_PCH,\r | |
| 453 | PCI_DEVICE_NUMBER_PCH_LPC,\r | |
| 454 | PCI_FUNCTION_NUMBER_PCH_LPC,\r | |
| 455 | 0\r | |
| 456 | );\r | |
| 457 | SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR;\r | |
| 458 | \r | |
| 459 | //\r | |
| 460 | //Set SMM_BWP, WPD and LE bit\r | |
| 461 | //\r | |
| 462 | MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP);\r | |
| 463 | MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE));\r | |
| 464 | MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE);\r | |
| 465 | \r | |
| 466 | //\r | |
| 467 | //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.\r | |
| 468 | //\r | |
| 469 | if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 ||\r | |
| 470 | (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) {\r | |
| 471 | //\r | |
| 472 | //Already locked. we could take no action here\r | |
| 473 | //\r | |
| 474 | DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n"));\r | |
| 475 | return;\r | |
| 476 | }\r | |
| 477 | \r | |
| 478 | //\r | |
| 479 | //Set PR0\r | |
| 480 | //\r | |
| 481 | MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0),\r | |
| 482 | B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\\r | |
| fb1a4e36 | 483 | (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));\r |
| 3cbfba02 DW |
484 | \r |
| 485 | //\r | |
| 486 | //Lock down PR0\r | |
| 487 | //\r | |
| 488 | MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r | |
| 489 | \r | |
| 490 | //\r | |
| 491 | // Verify if it's really locked.\r | |
| 492 | //\r | |
| 493 | if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r | |
| 494 | DEBUG((EFI_D_ERROR, "Failed to lock down PR0.\n"));\r | |
| 495 | }\r | |
| 496 | \r | |
| fb1a4e36 SL |
497 | //\r |
| 498 | //Set PR1\r | |
| 499 | //\r | |
| 500 | \r | |
| 501 | MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1),\r | |
| 502 | B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\\r | |
| 503 | (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));\r | |
| 504 | \r | |
| 505 | //\r | |
| 506 | //Lock down PR1\r | |
| 507 | //\r | |
| 508 | MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r | |
| 509 | \r | |
| 510 | //\r | |
| 511 | // Verify if it's really locked.\r | |
| 512 | //\r | |
| 513 | if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r | |
| 514 | DEBUG((EFI_D_ERROR, "Failed to lock down PR1.\n"));\r | |
| 515 | }\r | |
| 3cbfba02 DW |
516 | return;\r |
| 517 | \r | |
| 518 | }\r | |
| 519 | \r | |
| 520 | VOID\r | |
| 521 | EFIAPI\r | |
| 522 | InitPciDevPME (\r | |
| 523 | EFI_EVENT Event,\r | |
| 524 | VOID *Context\r | |
| 525 | )\r | |
| 526 | {\r | |
| 527 | UINTN VarSize;\r | |
| 528 | EFI_STATUS Status;\r | |
| 529 | \r | |
| 530 | VarSize = sizeof(SYSTEM_CONFIGURATION);\r | |
| 531 | Status = gRT->GetVariable(\r | |
| 532 | NORMAL_SETUP_NAME,\r | |
| 533 | &gEfiNormalSetupGuid,\r | |
| 534 | NULL,\r | |
| 535 | &VarSize,\r | |
| 536 | &mSystemConfiguration\r | |
| 537 | );\r | |
| 538 | \r | |
| 539 | //\r | |
| 540 | //Program HDA PME_EN\r | |
| 541 | //\r | |
| 542 | PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE);\r | |
| 543 | \r | |
| 544 | //\r | |
| 545 | //Program SATA PME_EN\r | |
| 546 | //\r | |
| 547 | PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE);\r | |
| 548 | \r | |
| 549 | DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable));\r | |
| 550 | if (mSystemConfiguration.EhciPllCfgEnable != 1) {\r | |
| 551 | //\r | |
| 552 | //Program EHCI PME_EN\r | |
| 553 | //\r | |
| 554 | PchMmPci32Or (\r | |
| 555 | 0,\r | |
| 556 | 0,\r | |
| 557 | PCI_DEVICE_NUMBER_PCH_USB,\r | |
| 558 | PCI_FUNCTION_NUMBER_PCH_EHCI,\r | |
| 559 | R_PCH_EHCI_PWR_CNTL_STS,\r | |
| 560 | B_PCH_EHCI_PWR_CNTL_STS_PME_EN\r | |
| 561 | );\r | |
| 562 | }\r | |
| 563 | {\r | |
| 564 | UINTN EhciPciMmBase;\r | |
| 565 | UINT32 Buffer32 = 0;\r | |
| 566 | \r | |
| 567 | EhciPciMmBase = MmPciAddress (0,\r | |
| 568 | 0,\r | |
| 569 | PCI_DEVICE_NUMBER_PCH_USB,\r | |
| 570 | PCI_FUNCTION_NUMBER_PCH_EHCI,\r | |
| 571 | 0\r | |
| 572 | );\r | |
| 573 | DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase));\r | |
| 574 | Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);\r | |
| 575 | DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));\r | |
| 576 | }\r | |
| 577 | }\r | |
| 578 | \r | |
| 579 | #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r | |
| 580 | \r | |
| 581 | #endif\r | |
| 582 | \r | |
| 583 | \r | |
| 584 | EFI_STATUS\r | |
| 585 | EFIAPI\r | |
| 586 | TristateLpcGpioS0i3Config (\r | |
| 587 | UINT32 Gpio_Mmio_Offset,\r | |
| 588 | UINT32 Gpio_Pin_Num,\r | |
| 589 | CFIO_PNP_INIT* Gpio_Conf_Data\r | |
| 590 | )\r | |
| 591 | {\r | |
| 592 | \r | |
| 593 | UINT32 index;\r | |
| 594 | UINT32 mmio_reg;\r | |
| 595 | UINT32 mmio_val;\r | |
| 596 | \r | |
| 597 | DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n"));\r | |
| 598 | \r | |
| 599 | for(index=0; index < Gpio_Pin_Num; index++)\r | |
| 600 | {\r | |
| 601 | mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset;\r | |
| 602 | \r | |
| 603 | MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val);\r | |
| 604 | mmio_val = 0;\r | |
| 605 | mmio_val = MmioRead32(mmio_reg);\r | |
| 606 | \r | |
| 607 | DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val));\r | |
| 608 | }\r | |
| 609 | \r | |
| 610 | return EFI_SUCCESS;\r | |
| 611 | }\r | |
| 612 | \r | |
| 613 | \r | |
| 614 | EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave;\r | |
| 615 | \r | |
| 616 | /**\r | |
| 617 | Event Notification during exit boot service to enabel ACPI mode\r | |
| 618 | \r | |
| 619 | Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r | |
| 620 | \r | |
| 621 | Clear all ACPI event status and disable all ACPI events\r | |
| 622 | Disable PM sources except power button\r | |
| 623 | Clear status bits\r | |
| 624 | \r | |
| 625 | Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r | |
| 626 | \r | |
| 627 | Update EC to disable SMI and enable SCI\r | |
| 628 | \r | |
| 629 | Enable SCI\r | |
| 630 | \r | |
| 631 | Enable PME_B0_EN in GPE0a_EN\r | |
| 632 | \r | |
| 633 | @param Event - EFI Event Handle\r | |
| 634 | @param Context - Pointer to Notify Context\r | |
| 635 | \r | |
| 636 | @retval Nothing\r | |
| 637 | \r | |
| 638 | **/\r | |
| 639 | VOID\r | |
| 640 | EFIAPI\r | |
| 641 | EnableAcpiCallback (\r | |
| 642 | IN EFI_EVENT Event,\r | |
| 643 | IN VOID *Context\r | |
| 644 | )\r | |
| 645 | {\r | |
| 646 | UINT32 RegData32;\r | |
| 647 | UINT16 Pm1Cnt;\r | |
| 648 | UINT16 AcpiBase;\r | |
| 649 | UINT32 Gpe0aEn;\r | |
| 650 | \r | |
| 651 | AcpiBase = MmioRead16 (\r | |
| 652 | PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH,\r | |
| 653 | PCI_DEVICE_NUMBER_PCH_LPC,\r | |
| 654 | PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE\r | |
| 655 | ) & B_PCH_LPC_ACPI_BASE_BAR;\r | |
| 656 | \r | |
| 657 | DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase));\r | |
| 658 | \r | |
| 659 | //\r | |
| 660 | // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r | |
| 661 | //\r | |
| 662 | RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN);\r | |
| 663 | RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2);\r | |
| 664 | IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32);\r | |
| 665 | \r | |
| 666 | RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS);\r | |
| 667 | RegData32 |= B_PCH_SMI_STS_SWSMI_TMR;\r | |
| 668 | IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32);\r | |
| 669 | \r | |
| 670 | //\r | |
| 671 | // Disable PM sources except power button\r | |
| 672 | // power button is enabled only for PCAT. Disabled it on Tablet platform\r | |
| 673 | //\r | |
| 674 | \r | |
| 675 | IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN);\r | |
| 676 | IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff);\r | |
| 677 | \r | |
| 678 | //\r | |
| 679 | // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r | |
| 680 | // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid\r | |
| 681 | //\r | |
| 682 | IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D);\r | |
| 683 | IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0);\r | |
| 684 | \r | |
| 685 | RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN);\r | |
| 686 | RegData32 &= ~(BIT7);\r | |
| 687 | IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32);\r | |
| 688 | \r | |
| 689 | //\r | |
| 690 | // Enable SCI\r | |
| 691 | //\r | |
| 692 | Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT);\r | |
| 693 | Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;\r | |
| 694 | IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);\r | |
| 695 | \r | |
| 696 | IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE\r | |
| 697 | \r | |
| 698 | //\r | |
| 699 | // Enable PME_B0_EN in GPE0a_EN\r | |
| 700 | // Caution: Enable PME_B0_EN must be placed after enabling SCI.\r | |
| 701 | // Otherwise, USB PME could not be handled as SMI event since no handler is there.\r | |
| 702 | //\r | |
| 703 | Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN);\r | |
| 704 | Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0;\r | |
| 705 | IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn);\r | |
| 706 | \r | |
| 707 | }\r | |
| 708 | \r | |
| 709 | /**\r | |
| 710 | \r | |
| 711 | Routine Description:\r | |
| 712 | \r | |
| 713 | This is the standard EFI driver point for the Driver. This\r | |
| 714 | driver is responsible for setting up any platform specific policy or\r | |
| 715 | initialization information.\r | |
| 716 | \r | |
| 717 | @param ImageHandle Handle for the image of this driver.\r | |
| 718 | @param SystemTable Pointer to the EFI System Table.\r | |
| 719 | \r | |
| 720 | @retval EFI_SUCCESS Policy decisions set.\r | |
| 721 | \r | |
| 722 | **/\r | |
| 723 | EFI_STATUS\r | |
| 724 | EFIAPI\r | |
| 725 | InitializePlatform (\r | |
| 726 | IN EFI_HANDLE ImageHandle,\r | |
| 727 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
| 728 | )\r | |
| 729 | {\r | |
| 730 | EFI_STATUS Status;\r | |
| 731 | UINTN VarSize;\r | |
| 732 | EFI_HANDLE Handle = NULL;\r | |
| 3cbfba02 | 733 | EFI_EVENT mEfiExitBootServicesEvent;\r |
| d71c25cf DW |
734 | EFI_EVENT RtcEvent;\r |
| 735 | VOID *RtcCallbackReg = NULL;\r | |
| 736 | \r | |
| 737 | mImageHandle = ImageHandle;\r | |
| 3cbfba02 DW |
738 | \r |
| 739 | Status = gBS->InstallProtocolInterface (\r | |
| 740 | &Handle,\r | |
| 741 | &gEfiSpeakerInterfaceProtocolGuid,\r | |
| 742 | EFI_NATIVE_INTERFACE,\r | |
| 743 | &mSpeakerInterface\r | |
| 744 | );\r | |
| 745 | \r | |
| 746 | Status = gBS->LocateProtocol (\r | |
| 747 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
| 748 | NULL,\r | |
| 749 | (VOID **) &mPciRootBridgeIo\r | |
| 750 | );\r | |
| 751 | ASSERT_EFI_ERROR (Status);\r | |
| 752 | \r | |
| 753 | VarSize = sizeof(EFI_PLATFORM_INFO_HOB);\r | |
| 754 | Status = gRT->GetVariable(\r | |
| 755 | L"PlatformInfo",\r | |
| 756 | &gEfiVlv2VariableGuid,\r | |
| 757 | NULL,\r | |
| 758 | &VarSize,\r | |
| 759 | &mPlatformInfo\r | |
| 760 | );\r | |
| 761 | \r | |
| 762 | //\r | |
| 763 | // Initialize Product Board ID variable\r | |
| 764 | //\r | |
| 765 | InitMfgAndConfigModeStateVar();\r | |
| 766 | InitPlatformBootMode();\r | |
| 767 | \r | |
| 768 | //\r | |
| 769 | // Install Observable protocol\r | |
| 770 | //\r | |
| 771 | InitializeObservableProtocol();\r | |
| 772 | \r | |
| 620f2891 TH |
773 | Status = SaveSetupRecoveryVar();\r |
| 774 | if (EFI_ERROR (Status)) {\r | |
| 775 | DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n"));\r | |
| 776 | }\r | |
| 3cbfba02 DW |
777 | \r |
| 778 | VarSize = sizeof(SYSTEM_CONFIGURATION);\r | |
| 779 | Status = gRT->GetVariable(\r | |
| 780 | NORMAL_SETUP_NAME,\r | |
| 781 | &gEfiNormalSetupGuid,\r | |
| 782 | NULL,\r | |
| 783 | &VarSize,\r | |
| 784 | &mSystemConfiguration\r | |
| 785 | );\r | |
| 620f2891 TH |
786 | if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r |
| 787 | //The setup variable is corrupted\r | |
| 788 | VarSize = sizeof(SYSTEM_CONFIGURATION);\r | |
| 789 | Status = gRT->GetVariable(\r | |
| 790 | L"SetupRecovery",\r | |
| 791 | &gEfiNormalSetupGuid,\r | |
| 792 | NULL,\r | |
| 793 | &VarSize,\r | |
| 794 | &mSystemConfiguration\r | |
| 795 | );\r | |
| 796 | ASSERT_EFI_ERROR (Status);\r | |
| 797 | Status = gRT->SetVariable (\r | |
| 798 | NORMAL_SETUP_NAME,\r | |
| 799 | &gEfiNormalSetupGuid,\r | |
| 800 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r | |
| 801 | sizeof(SYSTEM_CONFIGURATION),\r | |
| 802 | &mSystemConfiguration\r | |
| 803 | ); \r | |
| 804 | }\r | |
| 805 | \r | |
| 3cbfba02 DW |
806 | Status = EfiCreateEventReadyToBootEx (\r |
| 807 | TPL_CALLBACK,\r | |
| 808 | ReadyToBootFunction,\r | |
| 809 | NULL,\r | |
| 810 | &mReadyToBootEvent\r | |
| 811 | );\r | |
| 812 | \r | |
| 813 | //\r | |
| 814 | // Create a ReadyToBoot Event to run the PME init process\r | |
| 815 | //\r | |
| 816 | Status = EfiCreateEventReadyToBootEx (\r | |
| 817 | TPL_CALLBACK,\r | |
| 818 | InitPciDevPME,\r | |
| 819 | NULL,\r | |
| 820 | &mReadyToBootEvent\r | |
| 821 | );\r | |
| 822 | //\r | |
| fb1a4e36 | 823 | // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region\r |
| 3cbfba02 DW |
824 | //\r |
| 825 | if(mSystemConfiguration.SpiRwProtect==1) {\r | |
| 826 | Status = EfiCreateEventReadyToBootEx (\r | |
| 827 | TPL_CALLBACK,\r | |
| 828 | SpiBiosProtectionFunction,\r | |
| 829 | NULL,\r | |
| 830 | &mReadyToBootEvent\r | |
| 831 | );\r | |
| 832 | }\r | |
| 833 | \r | |
| 834 | ReportStatusCodeEx (\r | |
| 835 | EFI_PROGRESS_CODE,\r | |
| 836 | EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,\r | |
| 837 | 0,\r | |
| 838 | &gEfiCallerIdGuid,\r | |
| 839 | NULL,\r | |
| 840 | NULL,\r | |
| 841 | 0\r | |
| 842 | );\r | |
| 843 | \r | |
| 844 | #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r | |
| 845 | //\r | |
| 846 | // Initialize Sensor Info variable\r | |
| 847 | //\r | |
| 848 | InitializeSensorInfoVariable();\r | |
| 849 | #endif\r | |
| 850 | InitPchPlatformPolicy(&mPlatformInfo);\r | |
| 851 | InitVlvPlatformPolicy();\r | |
| 852 | \r | |
| 853 | //\r | |
| 854 | // Add usb policy\r | |
| 855 | //\r | |
| 856 | InitPlatformUsbPolicy();\r | |
| 857 | InitSioPlatformPolicy();\r | |
| 858 | InitializeClockRouting();\r | |
| 859 | InitializeSlotInfo();\r | |
| 860 | InitTcoReset();\r | |
| 861 | \r | |
| 862 | //\r | |
| 863 | //Init ExI\r | |
| 864 | //\r | |
| 865 | InitExI();\r | |
| 866 | \r | |
| 867 | ReportStatusCodeEx (\r | |
| 868 | EFI_PROGRESS_CODE,\r | |
| 869 | EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2,\r | |
| 870 | 0,\r | |
| 871 | &gEfiCallerIdGuid,\r | |
| 872 | NULL,\r | |
| 873 | NULL,\r | |
| 874 | 0\r | |
| 875 | );\r | |
| 876 | \r | |
| 877 | //\r | |
| 878 | // Install PCI Bus Driver Hook\r | |
| 879 | //\r | |
| 880 | PciBusDriverHook();\r | |
| 881 | \r | |
| 882 | InitItk();\r | |
| 883 | \r | |
| 884 | ReportStatusCodeEx (\r | |
| 885 | EFI_PROGRESS_CODE,\r | |
| 886 | EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3,\r | |
| 887 | 0,\r | |
| 888 | &gEfiCallerIdGuid,\r | |
| 889 | NULL,\r | |
| 890 | NULL,\r | |
| 891 | 0\r | |
| 892 | );\r | |
| 893 | \r | |
| 894 | \r | |
| 895 | //\r | |
| 896 | // Initialize Password States and Callbacks\r | |
| 897 | //\r | |
| 898 | PchInitBeforeBoot();\r | |
| 899 | \r | |
| 900 | #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r | |
| 901 | \r | |
| 902 | #endif\r | |
| 903 | \r | |
| 904 | #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r | |
| 905 | //\r | |
| 906 | // Re-write Firmware ID if it is changed\r | |
| 907 | //\r | |
| 908 | InitFirmwareId();\r | |
| 909 | #endif\r | |
| 910 | \r | |
| 911 | ReportStatusCodeEx (\r | |
| 912 | EFI_PROGRESS_CODE,\r | |
| 913 | EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4,\r | |
| 914 | 0,\r | |
| 915 | &gEfiCallerIdGuid,\r | |
| 916 | NULL,\r | |
| 917 | NULL,\r | |
| 918 | 0\r | |
| 919 | );\r | |
| 920 | \r | |
| 921 | \r | |
| 922 | Status = gBS->CreateEventEx (\r | |
| 923 | EVT_NOTIFY_SIGNAL,\r | |
| 924 | TPL_NOTIFY,\r | |
| 925 | EnableAcpiCallback,\r | |
| 926 | NULL,\r | |
| 927 | &gEfiEventExitBootServicesGuid,\r | |
| 928 | &mEfiExitBootServicesEvent\r | |
| 929 | );\r | |
| 930 | \r | |
| d71c25cf DW |
931 | //\r |
| 932 | // Adjust RTC deafult time to be BIOS-built time.\r | |
| 933 | //\r | |
| 934 | Status = gBS->CreateEvent (\r | |
| 935 | EVT_NOTIFY_SIGNAL,\r | |
| 936 | TPL_CALLBACK,\r | |
| 937 | AdjustDefaultRtcTimeCallback,\r | |
| 938 | NULL,\r | |
| 939 | &RtcEvent\r | |
| 940 | );\r | |
| 941 | if (!EFI_ERROR (Status)) {\r | |
| 942 | Status = gBS->RegisterProtocolNotify (\r | |
| 943 | &gExitPmAuthProtocolGuid,\r | |
| 944 | RtcEvent,\r | |
| 945 | &RtcCallbackReg\r | |
| 946 | );\r | |
| 3cbfba02 | 947 | \r |
| d71c25cf | 948 | }\r |
| 3cbfba02 DW |
949 | \r |
| 950 | return EFI_SUCCESS;\r | |
| 951 | }\r | |
| 952 | \r | |
| 953 | /**\r | |
| 954 | Source Or Destination with Length bytes.\r | |
| 955 | \r | |
| 956 | @param[in] Destination Target memory\r | |
| 957 | @param[in] Source Source memory\r | |
| 958 | @param[in] Length Number of bytes\r | |
| 959 | \r | |
| 960 | @retval None\r | |
| 961 | \r | |
| 962 | **/\r | |
| 963 | VOID\r | |
| 964 | EfiOrMem (\r | |
| 965 | IN VOID *Destination,\r | |
| 966 | IN VOID *Source,\r | |
| 967 | IN UINTN Length\r | |
| 968 | )\r | |
| 969 | {\r | |
| 970 | CHAR8 *Destination8;\r | |
| 971 | CHAR8 *Source8;\r | |
| 972 | \r | |
| 973 | if (Source < Destination) {\r | |
| 974 | Destination8 = (CHAR8 *) Destination + Length - 1;\r | |
| 975 | Source8 = (CHAR8 *) Source + Length - 1;\r | |
| 976 | while (Length--) {\r | |
| 977 | *(Destination8--) |= *(Source8--);\r | |
| 978 | }\r | |
| 979 | } else {\r | |
| 980 | Destination8 = (CHAR8 *) Destination;\r | |
| 981 | Source8 = (CHAR8 *) Source;\r | |
| 982 | while (Length--) {\r | |
| 983 | *(Destination8++) |= *(Source8++);\r | |
| 984 | }\r | |
| 985 | }\r | |
| 986 | }\r | |
| 987 | \r | |
| 988 | VOID\r | |
| 989 | PchInitBeforeBoot()\r | |
| 990 | {\r | |
| 991 | //\r | |
| 992 | // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.\r | |
| 993 | //\r | |
| 994 | S3BootScriptSaveMemWrite (\r | |
| 995 | EfiBootScriptWidthUint32,\r | |
| 996 | (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),\r | |
| 997 | 1,\r | |
| 998 | (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));\r | |
| 999 | \r | |
| 1000 | S3BootScriptSaveMemWrite (\r | |
| 1001 | EfiBootScriptWidthUint32,\r | |
| 1002 | (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),\r | |
| 1003 | 1,\r | |
| 1004 | (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));\r | |
| 1005 | \r | |
| 1006 | S3BootScriptSaveMemWrite (\r | |
| 1007 | EfiBootScriptWidthUint16,\r | |
| 1008 | (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),\r | |
| 1009 | 1,\r | |
| 1010 | (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));\r | |
| 1011 | \r | |
| 1012 | S3BootScriptSaveMemWrite (\r | |
| 1013 | EfiBootScriptWidthUint16,\r | |
| 1014 | (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),\r | |
| 1015 | 1,\r | |
| 1016 | (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));\r | |
| 1017 | \r | |
| 1018 | //\r | |
| 1019 | // Saved MTPMC_1 for S3 resume.\r | |
| 1020 | //\r | |
| 1021 | S3BootScriptSaveMemWrite (\r | |
| 1022 | EfiBootScriptWidthUint32,\r | |
| 1023 | (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1),\r | |
| 1024 | 1,\r | |
| 1025 | (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1));\r | |
| 1026 | return;\r | |
| 1027 | }\r | |
| 1028 | \r | |
| 1029 | VOID\r | |
| 1030 | EFIAPI\r | |
| 1031 | ReadyToBootFunction (\r | |
| 1032 | EFI_EVENT Event,\r | |
| 1033 | VOID *Context\r | |
| 1034 | )\r | |
| 1035 | {\r | |
| 1036 | EFI_STATUS Status;\r | |
| 1037 | EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r | |
| 1038 | EFI_ISA_ACPI_DEVICE_ID IsaDevice;\r | |
| 1039 | UINTN Size;\r | |
| 1040 | UINT16 State;\r | |
| 1041 | EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver;\r | |
| 1042 | EFI_CPU_IO_PROTOCOL *CpuIo;\r | |
| 1043 | UINT8 Data;\r | |
| 1044 | UINT8 ReceiveBuffer [64];\r | |
| 1045 | UINT32 ReceiveBufferSize;\r | |
| 1046 | \r | |
| 1047 | UINT8 TpmForceClearCommand [] = {0x00, 0xC1,\r | |
| 1048 | 0x00, 0x00, 0x00, 0x0A,\r | |
| 1049 | 0x00, 0x00, 0x00, 0x5D};\r | |
| 1050 | UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1,\r | |
| 1051 | 0x00, 0x00, 0x00, 0x0C,\r | |
| 1052 | 0x40, 0x00, 0x00, 0x0A,\r | |
| 1053 | 0x00, 0x00};\r | |
| 1054 | UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1,\r | |
| 1055 | 0x00, 0x00, 0x00, 0x0A,\r | |
| 1056 | 0x00, 0x00, 0x00, 0x70};\r | |
| 1057 | UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1,\r | |
| 1058 | 0x00, 0x00, 0x00, 0x0A,\r | |
| 1059 | 0x00, 0x00, 0x00, 0x6F};\r | |
| 1060 | UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1,\r | |
| 1061 | 0x00, 0x00, 0x00, 0x0B,\r | |
| 1062 | 0x00, 0x00, 0x00, 0x72,\r | |
| 1063 | 0x00};\r | |
| 1064 | UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1,\r | |
| 1065 | 0x00, 0x00, 0x00, 0x0B,\r | |
| 1066 | 0x00, 0x00, 0x00, 0x71,\r | |
| 1067 | 0x00};\r | |
| 1068 | \r | |
| 1069 | Size = sizeof(UINT16);\r | |
| 1070 | Status = gRT->GetVariable (\r | |
| 1071 | VAR_EQ_FLOPPY_MODE_DECIMAL_NAME,\r | |
| 1072 | &gEfiNormalSetupGuid,\r | |
| 1073 | NULL,\r | |
| 1074 | &Size,\r | |
| 1075 | &State\r | |
| 1076 | );\r | |
| 1077 | \r | |
| 1078 | //\r | |
| 1079 | // Disable Floppy Controller if needed\r | |
| 1080 | //\r | |
| 1081 | Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi);\r | |
| 1082 | if (!EFI_ERROR(Status) && (State == 0x00)) {\r | |
| 1083 | IsaDevice.HID = EISA_PNP_ID(0x604);\r | |
| 1084 | IsaDevice.UID = 0;\r | |
| 1085 | Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE);\r | |
| 1086 | }\r | |
| 1087 | \r | |
| 1088 | //\r | |
| 1089 | // save LAN info to a variable\r | |
| 1090 | //\r | |
| 1091 | if (NULL != mPciLanInfo) {\r | |
| 1092 | gRT->SetVariable (\r | |
| 1093 | L"PciLanInfo",\r | |
| 1094 | &gEfiPciLanInfoGuid,\r | |
| 1095 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,\r | |
| 1096 | mPciLanCount * sizeof(PCI_LAN_INFO),\r | |
| 1097 | mPciLanInfo\r | |
| 1098 | );\r | |
| 1099 | }\r | |
| 1100 | \r | |
| 1101 | if (NULL != mPciLanInfo) {\r | |
| 1102 | gBS->FreePool (mPciLanInfo);\r | |
| 1103 | mPciLanInfo = NULL;\r | |
| 1104 | }\r | |
| 1105 | \r | |
| 1106 | \r | |
| 1107 | //\r | |
| 1108 | // Handle ACPI OS TPM requests here\r | |
| 1109 | //\r | |
| 1110 | Status = gBS->LocateProtocol (\r | |
| 1111 | &gEfiCpuIoProtocolGuid,\r | |
| 1112 | NULL,\r | |
| 1113 | (VOID **)&CpuIo\r | |
| 1114 | );\r | |
| 1115 | Status = gBS->LocateProtocol (\r | |
| 1116 | &gEfiTpmMpDriverProtocolGuid,\r | |
| 1117 | NULL,\r | |
| 1118 | (VOID **)&TpmMpDriver\r | |
| 1119 | );\r | |
| 1120 | if (!EFI_ERROR (Status))\r | |
| 1121 | {\r | |
| 1122 | Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);\r | |
| 1123 | \r | |
| 1124 | //\r | |
| 1125 | // Clear pending ACPI TPM request indicator\r | |
| 1126 | //\r | |
| 1127 | WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00);\r | |
| 1128 | if (Data != 0)\r | |
| 1129 | {\r | |
| 1130 | WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data);\r | |
| 1131 | \r | |
| 1132 | //\r | |
| 1133 | // Assert Physical Presence for these commands\r | |
| 1134 | //\r | |
| 1135 | TpmPhysicalPresenceCommand [11] = 0x20;\r | |
| 1136 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1137 | Status = TpmMpDriver->Transmit (\r | |
| 1138 | TpmMpDriver, TpmPhysicalPresenceCommand,\r | |
| 1139 | sizeof (TpmPhysicalPresenceCommand),\r | |
| 1140 | ReceiveBuffer, &ReceiveBufferSize\r | |
| 1141 | );\r | |
| 1142 | //\r | |
| 1143 | // PF PhysicalPresence = TRUE\r | |
| 1144 | //\r | |
| 1145 | TpmPhysicalPresenceCommand [11] = 0x08;\r | |
| 1146 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1147 | Status = TpmMpDriver->Transmit (\r | |
| 1148 | TpmMpDriver, TpmPhysicalPresenceCommand,\r | |
| 1149 | sizeof (TpmPhysicalPresenceCommand),\r | |
| 1150 | ReceiveBuffer,\r | |
| 1151 | &ReceiveBufferSize\r | |
| 1152 | );\r | |
| 1153 | if (Data == 0x01)\r | |
| 1154 | {\r | |
| 1155 | //\r | |
| 1156 | // TPM_PhysicalEnable\r | |
| 1157 | //\r | |
| 1158 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1159 | Status = TpmMpDriver->Transmit (\r | |
| 1160 | TpmMpDriver, TpmPhysicalEnableCommand,\r | |
| 1161 | sizeof (TpmPhysicalEnableCommand),\r | |
| 1162 | ReceiveBuffer, &ReceiveBufferSize\r | |
| 1163 | );\r | |
| 1164 | }\r | |
| 1165 | if (Data == 0x02)\r | |
| 1166 | {\r | |
| 1167 | //\r | |
| 1168 | // TPM_PhysicalDisable\r | |
| 1169 | //\r | |
| 1170 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1171 | Status = TpmMpDriver->Transmit (\r | |
| 1172 | TpmMpDriver, TpmPhysicalDisableCommand,\r | |
| 1173 | sizeof (TpmPhysicalDisableCommand),\r | |
| 1174 | ReceiveBuffer,\r | |
| 1175 | &ReceiveBufferSize\r | |
| 1176 | );\r | |
| 1177 | }\r | |
| 1178 | if (Data == 0x03)\r | |
| 1179 | {\r | |
| 1180 | //\r | |
| 1181 | // TPM_PhysicalSetDeactivated=FALSE\r | |
| 1182 | //\r | |
| 1183 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1184 | TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r | |
| 1185 | Status = TpmMpDriver->Transmit (\r | |
| 1186 | TpmMpDriver,\r | |
| 1187 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1188 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1189 | ReceiveBuffer, &ReceiveBufferSize\r | |
| 1190 | );\r | |
| 1191 | gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);\r | |
| 1192 | }\r | |
| 1193 | if (Data == 0x04)\r | |
| 1194 | {\r | |
| 1195 | //\r | |
| 1196 | // TPM_PhysicalSetDeactivated=TRUE\r | |
| 1197 | //\r | |
| 1198 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1199 | TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r | |
| 1200 | Status = TpmMpDriver->Transmit (\r | |
| 1201 | TpmMpDriver,\r | |
| 1202 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1203 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1204 | ReceiveBuffer,\r | |
| 1205 | &ReceiveBufferSize\r | |
| 1206 | );\r | |
| 1207 | gRT->ResetSystem (\r | |
| 1208 | EfiResetWarm,\r | |
| 1209 | EFI_SUCCESS,\r | |
| 1210 | 0,\r | |
| 1211 | NULL\r | |
| 1212 | );\r | |
| 1213 | }\r | |
| 1214 | if (Data == 0x05)\r | |
| 1215 | {\r | |
| 1216 | //\r | |
| 1217 | // TPM_ForceClear\r | |
| 1218 | //\r | |
| 1219 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1220 | Status = TpmMpDriver->Transmit (\r | |
| 1221 | TpmMpDriver,\r | |
| 1222 | TpmForceClearCommand,\r | |
| 1223 | sizeof (TpmForceClearCommand),\r | |
| 1224 | ReceiveBuffer,\r | |
| 1225 | &ReceiveBufferSize\r | |
| 1226 | );\r | |
| 1227 | gRT->ResetSystem (\r | |
| 1228 | EfiResetWarm,\r | |
| 1229 | EFI_SUCCESS,\r | |
| 1230 | 0,\r | |
| 1231 | NULL\r | |
| 1232 | );\r | |
| 1233 | }\r | |
| 1234 | if (Data == 0x06)\r | |
| 1235 | {\r | |
| 1236 | //\r | |
| 1237 | // TPM_PhysicalEnable\r | |
| 1238 | //\r | |
| 1239 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1240 | Status = TpmMpDriver->Transmit (\r | |
| 1241 | TpmMpDriver,\r | |
| 1242 | TpmPhysicalEnableCommand,\r | |
| 1243 | sizeof (TpmPhysicalEnableCommand),\r | |
| 1244 | ReceiveBuffer,\r | |
| 1245 | &ReceiveBufferSize\r | |
| 1246 | );\r | |
| 1247 | //\r | |
| 1248 | // TPM_PhysicalSetDeactivated=FALSE\r | |
| 1249 | //\r | |
| 1250 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1251 | TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r | |
| 1252 | Status = TpmMpDriver->Transmit (\r | |
| 1253 | TpmMpDriver,\r | |
| 1254 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1255 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1256 | ReceiveBuffer,\r | |
| 1257 | &ReceiveBufferSize\r | |
| 1258 | );\r | |
| 1259 | gRT->ResetSystem (\r | |
| 1260 | EfiResetWarm,\r | |
| 1261 | EFI_SUCCESS,\r | |
| 1262 | 0,\r | |
| 1263 | NULL\r | |
| 1264 | );\r | |
| 1265 | }\r | |
| 1266 | if (Data == 0x07)\r | |
| 1267 | {\r | |
| 1268 | //\r | |
| 1269 | // TPM_PhysicalSetDeactivated=TRUE\r | |
| 1270 | //\r | |
| 1271 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1272 | TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r | |
| 1273 | Status = TpmMpDriver->Transmit (\r | |
| 1274 | TpmMpDriver,\r | |
| 1275 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1276 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1277 | ReceiveBuffer,\r | |
| 1278 | &ReceiveBufferSize\r | |
| 1279 | );\r | |
| 1280 | //\r | |
| 1281 | // TPM_PhysicalDisable\r | |
| 1282 | //\r | |
| 1283 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1284 | Status = TpmMpDriver->Transmit (\r | |
| 1285 | TpmMpDriver,\r | |
| 1286 | TpmPhysicalDisableCommand,\r | |
| 1287 | sizeof (TpmPhysicalDisableCommand),\r | |
| 1288 | ReceiveBuffer,\r | |
| 1289 | &ReceiveBufferSize\r | |
| 1290 | );\r | |
| 1291 | gRT->ResetSystem (\r | |
| 1292 | EfiResetWarm,\r | |
| 1293 | EFI_SUCCESS,\r | |
| 1294 | 0,\r | |
| 1295 | NULL\r | |
| 1296 | );\r | |
| 1297 | }\r | |
| 1298 | if (Data == 0x08)\r | |
| 1299 | {\r | |
| 1300 | //\r | |
| 1301 | // TPM_SetOwnerInstall=TRUE\r | |
| 1302 | //\r | |
| 1303 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1304 | TpmSetOwnerInstallCommand [10] = 0x01;\r | |
| 1305 | Status = TpmMpDriver->Transmit (\r | |
| 1306 | TpmMpDriver,\r | |
| 1307 | TpmSetOwnerInstallCommand,\r | |
| 1308 | sizeof (TpmSetOwnerInstallCommand),\r | |
| 1309 | ReceiveBuffer,\r | |
| 1310 | &ReceiveBufferSize\r | |
| 1311 | );\r | |
| 1312 | }\r | |
| 1313 | if (Data == 0x09)\r | |
| 1314 | {\r | |
| 1315 | //\r | |
| 1316 | // TPM_SetOwnerInstall=FALSE\r | |
| 1317 | //\r | |
| 1318 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1319 | TpmSetOwnerInstallCommand [10] = 0x00;\r | |
| 1320 | Status = TpmMpDriver->Transmit (\r | |
| 1321 | TpmMpDriver,\r | |
| 1322 | TpmSetOwnerInstallCommand,\r | |
| 1323 | sizeof (TpmSetOwnerInstallCommand),\r | |
| 1324 | ReceiveBuffer,\r | |
| 1325 | &ReceiveBufferSize\r | |
| 1326 | );\r | |
| 1327 | }\r | |
| 1328 | if (Data == 0x0A)\r | |
| 1329 | {\r | |
| 1330 | //\r | |
| 1331 | // TPM_PhysicalEnable\r | |
| 1332 | //\r | |
| 1333 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1334 | Status = TpmMpDriver->Transmit (\r | |
| 1335 | TpmMpDriver,\r | |
| 1336 | TpmPhysicalEnableCommand,\r | |
| 1337 | sizeof (TpmPhysicalEnableCommand),\r | |
| 1338 | ReceiveBuffer,\r | |
| 1339 | &ReceiveBufferSize\r | |
| 1340 | );\r | |
| 1341 | //\r | |
| 1342 | // TPM_PhysicalSetDeactivated=FALSE\r | |
| 1343 | //\r | |
| 1344 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1345 | TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r | |
| 1346 | Status = TpmMpDriver->Transmit (\r | |
| 1347 | TpmMpDriver,\r | |
| 1348 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1349 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1350 | ReceiveBuffer,\r | |
| 1351 | &ReceiveBufferSize\r | |
| 1352 | );\r | |
| 1353 | //\r | |
| 1354 | // Do TPM_SetOwnerInstall=TRUE on next reboot\r | |
| 1355 | //\r | |
| 1356 | \r | |
| 1357 | WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0);\r | |
| 1358 | \r | |
| 1359 | gRT->ResetSystem (\r | |
| 1360 | EfiResetWarm,\r | |
| 1361 | EFI_SUCCESS,\r | |
| 1362 | 0,\r | |
| 1363 | NULL\r | |
| 1364 | );\r | |
| 1365 | }\r | |
| 1366 | if (Data == 0x0B)\r | |
| 1367 | {\r | |
| 1368 | //\r | |
| 1369 | // TPM_SetOwnerInstall=FALSE\r | |
| 1370 | //\r | |
| 1371 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1372 | TpmSetOwnerInstallCommand [10] = 0x00;\r | |
| 1373 | Status = TpmMpDriver->Transmit (\r | |
| 1374 | TpmMpDriver,\r | |
| 1375 | TpmSetOwnerInstallCommand,\r | |
| 1376 | sizeof (TpmSetOwnerInstallCommand),\r | |
| 1377 | ReceiveBuffer,\r | |
| 1378 | &ReceiveBufferSize\r | |
| 1379 | );\r | |
| 1380 | //\r | |
| 1381 | // TPM_PhysicalSetDeactivated=TRUE\r | |
| 1382 | //\r | |
| 1383 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1384 | TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r | |
| 1385 | Status = TpmMpDriver->Transmit (\r | |
| 1386 | TpmMpDriver,\r | |
| 1387 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1388 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1389 | ReceiveBuffer,\r | |
| 1390 | &ReceiveBufferSize\r | |
| 1391 | );\r | |
| 1392 | //\r | |
| 1393 | // TPM_PhysicalDisable\r | |
| 1394 | //\r | |
| 1395 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1396 | Status = TpmMpDriver->Transmit (\r | |
| 1397 | TpmMpDriver,\r | |
| 1398 | TpmPhysicalDisableCommand,\r | |
| 1399 | sizeof (TpmPhysicalDisableCommand),\r | |
| 1400 | ReceiveBuffer,\r | |
| 1401 | &ReceiveBufferSize\r | |
| 1402 | );\r | |
| 1403 | gRT->ResetSystem (\r | |
| 1404 | EfiResetWarm,\r | |
| 1405 | EFI_SUCCESS,\r | |
| 1406 | 0,\r | |
| 1407 | NULL\r | |
| 1408 | );\r | |
| 1409 | }\r | |
| 1410 | if (Data == 0x0E)\r | |
| 1411 | {\r | |
| 1412 | //\r | |
| 1413 | // TPM_ForceClear\r | |
| 1414 | //\r | |
| 1415 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1416 | Status = TpmMpDriver->Transmit (\r | |
| 1417 | TpmMpDriver,\r | |
| 1418 | TpmForceClearCommand,\r | |
| 1419 | sizeof (TpmForceClearCommand),\r | |
| 1420 | ReceiveBuffer,\r | |
| 1421 | &ReceiveBufferSize\r | |
| 1422 | );\r | |
| 1423 | //\r | |
| 1424 | // TPM_PhysicalEnable\r | |
| 1425 | //\r | |
| 1426 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1427 | Status = TpmMpDriver->Transmit (\r | |
| 1428 | TpmMpDriver,\r | |
| 1429 | TpmPhysicalEnableCommand,\r | |
| 1430 | sizeof (TpmPhysicalEnableCommand),\r | |
| 1431 | ReceiveBuffer,\r | |
| 1432 | &ReceiveBufferSize\r | |
| 1433 | );\r | |
| 1434 | //\r | |
| 1435 | // TPM_PhysicalSetDeactivated=FALSE\r | |
| 1436 | //\r | |
| 1437 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1438 | TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r | |
| 1439 | Status = TpmMpDriver->Transmit (\r | |
| 1440 | TpmMpDriver,\r | |
| 1441 | TpmPhysicalSetDeactivatedCommand,\r | |
| 1442 | sizeof (TpmPhysicalSetDeactivatedCommand),\r | |
| 1443 | ReceiveBuffer,\r | |
| 1444 | &ReceiveBufferSize\r | |
| 1445 | );\r | |
| 1446 | gRT->ResetSystem (\r | |
| 1447 | EfiResetWarm,\r | |
| 1448 | EFI_SUCCESS,\r | |
| 1449 | 0,\r | |
| 1450 | NULL\r | |
| 1451 | );\r | |
| 1452 | }\r | |
| 1453 | if (Data == 0xF0)\r | |
| 1454 | {\r | |
| 1455 | //\r | |
| 1456 | // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE\r | |
| 1457 | //\r | |
| 1458 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1459 | TpmSetOwnerInstallCommand [10] = 0x01;\r | |
| 1460 | Status = TpmMpDriver->Transmit (\r | |
| 1461 | TpmMpDriver,\r | |
| 1462 | TpmSetOwnerInstallCommand,\r | |
| 1463 | sizeof (TpmSetOwnerInstallCommand),\r | |
| 1464 | ReceiveBuffer,\r | |
| 1465 | &ReceiveBufferSize\r | |
| 1466 | );\r | |
| 1467 | WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A);\r | |
| 1468 | }\r | |
| 1469 | //\r | |
| 1470 | // Deassert Physical Presence\r | |
| 1471 | //\r | |
| 1472 | TpmPhysicalPresenceCommand [11] = 0x10;\r | |
| 1473 | ReceiveBufferSize = sizeof(ReceiveBuffer);\r | |
| 1474 | Status = TpmMpDriver->Transmit (\r | |
| 1475 | TpmMpDriver,\r | |
| 1476 | TpmPhysicalPresenceCommand,\r | |
| 1477 | sizeof (TpmPhysicalPresenceCommand),\r | |
| 1478 | ReceiveBuffer,\r | |
| 1479 | &ReceiveBufferSize\r | |
| 1480 | );\r | |
| 1481 | }\r | |
| 1482 | }\r | |
| 1483 | \r | |
| 1484 | return;\r | |
| 1485 | }\r | |
| 1486 | \r | |
| 1487 | /**\r | |
| 1488 | \r | |
| 1489 | Initializes manufacturing and config mode setting.\r | |
| 1490 | \r | |
| 1491 | **/\r | |
| 1492 | VOID\r | |
| 1493 | InitMfgAndConfigModeStateVar()\r | |
| 1494 | {\r | |
| 1495 | EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r | |
| 1496 | VOID *HobList;\r | |
| 3cbfba02 | 1497 | \r |
| 3cbfba02 DW |
1498 | \r |
| 1499 | HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r | |
| 1500 | if (HobList != NULL) {\r | |
| 1501 | BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r | |
| 1502 | \r | |
| 1503 | //\r | |
| 1504 | // Check if in Manufacturing mode\r | |
| 1505 | //\r | |
| 1506 | if ( !CompareMem (\r | |
| 1507 | &BootModeBuffer->SetupName,\r | |
| 1508 | MANUFACTURE_SETUP_NAME,\r | |
| 1509 | StrSize (MANUFACTURE_SETUP_NAME)\r | |
| 1510 | ) ) {\r | |
| 1511 | mMfgMode = TRUE;\r | |
| 1512 | }\r | |
| 1513 | \r | |
| 620f2891 TH |
1514 | \r |
| 1515 | \r | |
| 3cbfba02 DW |
1516 | }\r |
| 1517 | \r | |
| 1518 | }\r | |
| 1519 | \r | |
| 1520 | /**\r | |
| 1521 | \r | |
| 1522 | Initializes manufacturing and config mode setting.\r | |
| 1523 | \r | |
| 1524 | **/\r | |
| 1525 | VOID\r | |
| 1526 | InitPlatformBootMode()\r | |
| 1527 | {\r | |
| 1528 | EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r | |
| 1529 | VOID *HobList;\r | |
| 1530 | \r | |
| 1531 | HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r | |
| 1532 | if (HobList != NULL) {\r | |
| 1533 | BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r | |
| 1534 | mPlatformBootMode = BootModeBuffer->PlatformBootMode;\r | |
| 1535 | }\r | |
| 1536 | }\r | |
| 1537 | \r | |
| 1538 | /**\r | |
| 1539 | \r | |
| 1540 | Initializes ITK.\r | |
| 1541 | \r | |
| 1542 | **/\r | |
| 1543 | VOID\r | |
| 1544 | InitItk(\r | |
| 1545 | )\r | |
| 1546 | {\r | |
| 1547 | EFI_STATUS Status;\r | |
| 1548 | UINT16 ItkModBiosState;\r | |
| 1549 | UINT8 Value;\r | |
| 1550 | UINTN DataSize;\r | |
| 1551 | UINT32 Attributes;\r | |
| 1552 | \r | |
| 1553 | //\r | |
| 1554 | // Setup local variable according to ITK variable\r | |
| 1555 | //\r | |
| 1556 | //\r | |
| 1557 | // Read ItkBiosModVar to determine if BIOS has been modified by ITK\r | |
| 1558 | // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified\r | |
| 1559 | // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK\r | |
| 1560 | //\r | |
| 1561 | DataSize = sizeof (Value);\r | |
| 1562 | Status = gRT->GetVariable (\r | |
| 1563 | ITK_BIOS_MOD_VAR_NAME,\r | |
| 1564 | &gItkDataVarGuid,\r | |
| 1565 | &Attributes,\r | |
| 1566 | &DataSize,\r | |
| 1567 | &Value\r | |
| 1568 | );\r | |
| 1569 | if (Status == EFI_NOT_FOUND) {\r | |
| 1570 | //\r | |
| 1571 | // Variable not found, hasn't been initialized, intialize to 0\r | |
| 1572 | //\r | |
| 1573 | Value=0x00;\r | |
| 1574 | //\r | |
| 1575 | // Write variable to flash.\r | |
| 1576 | //\r | |
| 1577 | gRT->SetVariable (\r | |
| 1578 | ITK_BIOS_MOD_VAR_NAME,\r | |
| 1579 | &gItkDataVarGuid,\r | |
| 1580 | EFI_VARIABLE_RUNTIME_ACCESS |\r | |
| 1581 | EFI_VARIABLE_NON_VOLATILE |\r | |
| 1582 | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r | |
| 1583 | sizeof (Value),\r | |
| 1584 | &Value\r | |
| 1585 | );\r | |
| 1586 | \r | |
| 1587 | }\r | |
| 1588 | if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) {\r | |
| 1589 | if (Value == 0x00) {\r | |
| 1590 | ItkModBiosState = 0x00;\r | |
| 1591 | } else {\r | |
| 1592 | ItkModBiosState = 0x01;\r | |
| 1593 | }\r | |
| 1594 | gRT->SetVariable (\r | |
| 1595 | VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME,\r | |
| 1596 | &gEfiNormalSetupGuid,\r | |
| 1597 | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r | |
| 1598 | 2,\r | |
| 1599 | (void *)&ItkModBiosState\r | |
| 1600 | );\r | |
| 1601 | }\r | |
| 1602 | }\r | |
| 1603 | \r | |
| 1604 | #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r | |
| 1605 | \r | |
| 1606 | /**\r | |
| 1607 | \r | |
| 1608 | Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.\r | |
| 1609 | \r | |
| 1610 | **/\r | |
| 1611 | STATIC\r | |
| 1612 | VOID\r | |
| 1613 | InitFirmwareId(\r | |
| 1614 | )\r | |
| 1615 | {\r | |
| 1616 | EFI_STATUS Status;\r | |
| 1617 | CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD;\r | |
| 1618 | \r | |
| 1619 | //\r | |
| 1620 | // First try writing the variable without a password in case we are\r | |
| 1621 | // upgrading from a BIOS without password protection on the FirmwareId\r | |
| 1622 | //\r | |
| 1623 | Status = gRT->SetVariable(\r | |
| 1624 | (CHAR16 *)&gFirmwareIdName,\r | |
| 1625 | &gFirmwareIdGuid,\r | |
| 1626 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r | |
| 1627 | EFI_VARIABLE_RUNTIME_ACCESS,\r | |
| 1628 | sizeof( FIRMWARE_ID ) - 1,\r | |
| 1629 | FIRMWARE_ID\r | |
| 1630 | );\r | |
| 1631 | \r | |
| 1632 | if (Status == EFI_INVALID_PARAMETER) {\r | |
| 1633 | \r | |
| 1634 | //\r | |
| 1635 | // Since setting the firmware id without the password failed,\r | |
| 1636 | // a password must be required.\r | |
| 1637 | //\r | |
| 1638 | Status = gRT->SetVariable(\r | |
| 1639 | (CHAR16 *)&FirmwareIdNameWithPassword,\r | |
| 1640 | &gFirmwareIdGuid,\r | |
| 1641 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r | |
| 1642 | EFI_VARIABLE_RUNTIME_ACCESS,\r | |
| 1643 | sizeof( FIRMWARE_ID ) - 1,\r | |
| 1644 | FIRMWARE_ID\r | |
| 1645 | );\r | |
| 1646 | }\r | |
| 1647 | }\r | |
| 1648 | #endif\r | |
| 1649 | \r | |
| 1650 | VOID\r | |
| 1651 | UpdateDVMTSetup(\r | |
| 1652 | )\r | |
| 1653 | {\r | |
| 1654 | //\r | |
| 1655 | // Workaround to support IIA bug.\r | |
| 1656 | // IIA request to change option value to 4, 5 and 7 relatively\r | |
| 1657 | // instead of 1, 2, and 3 which follow Lakeport Specs.\r | |
| 1658 | // Check option value, temporary hardcode GraphicsDriverMemorySize\r | |
| 1659 | // Option value to fulfill IIA requirment. So that user no need to\r | |
| 1660 | // load default and update setupvariable after update BIOS.\r | |
| 1661 | // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.\r | |
| 1662 | // *This is for broadwater and above product only.\r | |
| 1663 | //\r | |
| 1664 | \r | |
| 1665 | SYSTEM_CONFIGURATION SystemConfiguration;\r | |
| 1666 | UINTN VarSize;\r | |
| 1667 | EFI_STATUS Status;\r | |
| 1668 | \r | |
| 1669 | VarSize = sizeof(SYSTEM_CONFIGURATION);\r | |
| 1670 | Status = gRT->GetVariable(\r | |
| 1671 | NORMAL_SETUP_NAME,\r | |
| 1672 | &gEfiNormalSetupGuid,\r | |
| 1673 | NULL,\r | |
| 1674 | &VarSize,\r | |
| 1675 | &SystemConfiguration\r | |
| 1676 | );\r | |
| 1677 | \r | |
| 620f2891 TH |
1678 | if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r |
| 1679 | //The setup variable is corrupted\r | |
| 1680 | VarSize = sizeof(SYSTEM_CONFIGURATION);\r | |
| 1681 | Status = gRT->GetVariable(\r | |
| 1682 | L"SetupRecovery",\r | |
| 1683 | &gEfiNormalSetupGuid,\r | |
| 1684 | NULL,\r | |
| 1685 | &VarSize,\r | |
| 1686 | &SystemConfiguration\r | |
| 1687 | );\r | |
| 1688 | ASSERT_EFI_ERROR (Status);\r | |
| 1689 | }\r | |
| 1690 | \r | |
| 3cbfba02 DW |
1691 | if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) {\r |
| 1692 | switch (SystemConfiguration.GraphicsDriverMemorySize){\r | |
| 1693 | case 1:\r | |
| 1694 | SystemConfiguration.GraphicsDriverMemorySize = 4;\r | |
| 1695 | break;\r | |
| 1696 | case 2:\r | |
| 1697 | SystemConfiguration.GraphicsDriverMemorySize = 5;\r | |
| 1698 | break;\r | |
| 1699 | case 3:\r | |
| 1700 | SystemConfiguration.GraphicsDriverMemorySize = 7;\r | |
| 1701 | break;\r | |
| 1702 | default:\r | |
| 1703 | break;\r | |
| 1704 | }\r | |
| 1705 | \r | |
| 1706 | Status = gRT->SetVariable (\r | |
| 1707 | NORMAL_SETUP_NAME,\r | |
| 1708 | &gEfiNormalSetupGuid,\r | |
| 1709 | EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r | |
| 1710 | sizeof(SYSTEM_CONFIGURATION),\r | |
| 1711 | &SystemConfiguration\r | |
| 1712 | );\r | |
| 1713 | }\r | |
| 1714 | }\r | |
| 1715 | \r | |
| 1716 | VOID\r | |
| 1717 | InitPlatformUsbPolicy (\r | |
| 1718 | VOID\r | |
| 1719 | )\r | |
| 1720 | \r | |
| 1721 | {\r | |
| 1722 | EFI_HANDLE Handle;\r | |
| 1723 | EFI_STATUS Status;\r | |
| 1724 | \r | |
| 1725 | Handle = NULL;\r | |
| 1726 | \r | |
| 1727 | mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2;\r | |
| 1728 | mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation;\r | |
| 1729 | if(mUsbPolicyData.UsbMassStorageEmulationType == 3) {\r | |
| 1730 | mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize;\r | |
| 1731 | } else {\r | |
| 1732 | mUsbPolicyData.UsbEmulationSize = 0;\r | |
| 1733 | }\r | |
| 1734 | mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation;\r | |
| 1735 | mUsbPolicyData.UsbOperationMode = HIGH_SPEED;\r | |
| 1736 | \r | |
| 1737 | //\r | |
| 1738 | // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP\r | |
| 1739 | //\r | |
| 1740 | mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP;\r | |
| 1741 | \r | |
| 1742 | //\r | |
| 1743 | // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP\r | |
| 1744 | //\r | |
| 1745 | mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP;\r | |
| 1746 | \r | |
| 1747 | //\r | |
| 1748 | // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00\r | |
| 1749 | //\r | |
| 1750 | mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE;\r | |
| 1751 | \r | |
| 1752 | //\r | |
| 1753 | // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,\r | |
| 1754 | // default is Ich acpibase =0x040. acpitimerreg=0x08.\r | |
| 1755 | mUsbPolicyData.LpcAcpiBase = 0x40;\r | |
| 1756 | mUsbPolicyData.AcpiTimerReg = 0x08;\r | |
| 1757 | \r | |
| 1758 | //\r | |
| 1759 | // Set for reduce usb post time\r | |
| 1760 | //\r | |
| 1761 | mUsbPolicyData.UsbTimeTue = 0x00;\r | |
| 1762 | mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH\r | |
| 1763 | mUsbPolicyData.EnumWaitPortStableStall = 100;\r | |
| 1764 | \r | |
| 1765 | \r | |
| 1766 | Status = gBS->InstallProtocolInterface (\r | |
| 1767 | &Handle,\r | |
| 1768 | &gUsbPolicyGuid,\r | |
| 1769 | EFI_NATIVE_INTERFACE,\r | |
| 1770 | &mUsbPolicyData\r | |
| 1771 | );\r | |
| 1772 | ASSERT_EFI_ERROR(Status);\r | |
| 1773 | \r | |
| 1774 | }\r | |
| 1775 | \r | |
| 1776 | UINT8\r | |
| 1777 | ReadCmosBank1Byte (\r | |
| 1778 | IN EFI_CPU_IO_PROTOCOL *CpuIo,\r | |
| 1779 | IN UINT8 Index\r | |
| 1780 | )\r | |
| 1781 | {\r | |
| 1782 | UINT8 Data;\r | |
| 1783 | \r | |
| 1784 | CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index);\r | |
| 1785 | CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data);\r | |
| 1786 | return Data;\r | |
| 1787 | }\r | |
| 1788 | \r | |
| 1789 | VOID\r | |
| 1790 | WriteCmosBank1Byte (\r | |
| 1791 | IN EFI_CPU_IO_PROTOCOL *CpuIo,\r | |
| 1792 | IN UINT8 Index,\r | |
| 1793 | IN UINT8 Data\r | |
| 1794 | )\r | |
| 1795 | {\r | |
| 1796 | CpuIo->Io.Write (\r | |
| 1797 | CpuIo,\r | |
| 1798 | EfiCpuIoWidthUint8,\r | |
| 1799 | 0x72,\r | |
| 1800 | 1,\r | |
| 1801 | &Index\r | |
| 1802 | );\r | |
| 1803 | CpuIo->Io.Write (\r | |
| 1804 | CpuIo,\r | |
| 1805 | EfiCpuIoWidthUint8,\r | |
| 1806 | 0x73,\r | |
| 1807 | 1,\r | |
| 1808 | &Data\r | |
| 1809 | );\r | |
| 1810 | }\r | |
| 1811 | \r |