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1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
5 | This program and the accompanying materials are licensed and made available under\r\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
7 | The full text of the license may be found at \r\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
9 | \r\r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
12 | \r\r | |
13 | \r | |
14 | Module Name:\r | |
15 | \r | |
16 | SlotConfig.c\r | |
17 | \r | |
18 | Abstract:\r | |
19 | \r | |
20 | Sets platform/SKU specific expansion slot information.\r | |
21 | \r | |
22 | \r | |
23 | \r | |
24 | --*/\r | |
25 | #include "SlotConfig.h"\r | |
26 | \r | |
27 | //\r | |
28 | // Implementation\r | |
29 | //\r | |
30 | VOID\r | |
31 | InitializeSlotInfo (\r | |
32 | )\r | |
33 | {\r | |
34 | UINT16 BusSaveState;\r | |
35 | UINT16 Vendor;\r | |
36 | UINT8 CurrentBus;\r | |
37 | UINTN i;\r | |
38 | UINTN j;\r | |
39 | EFI_HANDLE Handle;\r | |
40 | EFI_STATUS Status;\r | |
41 | BOOLEAN RunNext;\r | |
42 | \r | |
43 | //\r | |
44 | // Loop through the slot table and see if any slots have cards in them\r | |
45 | //\r | |
46 | for (i = 0; i < mSlotBridgeTableSize; i++) {\r | |
47 | //\r | |
48 | // Initialize variable\r | |
49 | //\r | |
50 | RunNext = FALSE;\r | |
51 | \r | |
52 | //\r | |
53 | // Hide mini PCIe slots per SKU\r | |
54 | //\r | |
55 | for (j = 0; j < mSlotInformation.NumberOfEntries; j++) {\r | |
56 | if (mSlotInformation.SlotEntries[j].SmbiosSlotId == mSlotBridgeTable[i].SmbiosSlotId) {\r | |
57 | if ((mSlotInformation.SlotEntries[j].SmbiosSlotId == 0x02) &&\r | |
58 | (mBoardFeatures & B_BOARD_FEATURES_NO_MINIPCIE)\r | |
59 | ) {\r | |
60 | mSlotInformation.SlotEntries[j].Disabled = TRUE;\r | |
61 | RunNext = TRUE;\r | |
62 | }\r | |
63 | break;\r | |
64 | }\r | |
65 | }\r | |
66 | \r | |
67 | if (RunNext) {\r | |
68 | //\r | |
69 | // Skip slot device detection since the slot is disabled.\r | |
70 | //\r | |
71 | continue;\r | |
72 | }\r | |
73 | \r | |
74 | //\r | |
75 | // Check to see if the bridge has a bus number and assign one if not\r | |
76 | //\r | |
77 | BusSaveState = MmPci16 (\r | |
78 | 0,\r | |
79 | mSlotBridgeTable[i].Bus,\r | |
80 | mSlotBridgeTable[i].Dev,\r | |
81 | mSlotBridgeTable[i].Function,\r | |
82 | PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET\r | |
83 | );\r | |
84 | if (BusSaveState == 0) {\r | |
85 | //\r | |
86 | // Assign temp bus number\r | |
87 | //\r | |
88 | MmPci16 (\r | |
89 | 0,\r | |
90 | mSlotBridgeTable[i].Bus,\r | |
91 | mSlotBridgeTable[i].Dev,\r | |
92 | mSlotBridgeTable[i].Function,\r | |
93 | PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET\r | |
94 | ) = DEF_BUS_CONFIG;\r | |
95 | CurrentBus = DEF_BUS;\r | |
96 | } else if (BusSaveState == 0xFFFF) {\r | |
97 | //\r | |
98 | // Bridge is disabled so continue with next entry in the table\r | |
99 | //\r | |
100 | continue;\r | |
101 | } else {\r | |
102 | //\r | |
103 | // Use existing bus number\r | |
104 | //\r | |
105 | CurrentBus = (UINT8) BusSaveState & 0xFF;\r | |
106 | }\r | |
107 | \r | |
108 | //\r | |
109 | // Check to see if a device is behind the bridge\r | |
110 | //\r | |
111 | Vendor = MmPci16 (\r | |
112 | 0,\r | |
113 | CurrentBus,\r | |
114 | mSlotBridgeTable[i].TargetDevice,\r | |
115 | 0,\r | |
116 | 0\r | |
117 | );\r | |
118 | if (Vendor != 0xFFFF) {\r | |
119 | //\r | |
120 | // Device found so make sure the slot is marked that way\r | |
121 | //\r | |
122 | for (j = 0; j < mSlotInformation.NumberOfEntries; j++) {\r | |
123 | if (mSlotInformation.SlotEntries[j].SmbiosSlotId == mSlotBridgeTable[i].SmbiosSlotId) {\r | |
124 | mSlotInformation.SlotEntries[j].InUse = TRUE;\r | |
125 | break;\r | |
126 | }\r | |
127 | }\r | |
128 | }\r | |
129 | \r | |
130 | //\r | |
131 | // Restore previous bus information\r | |
132 | //\r | |
133 | if (BusSaveState == 0) {\r | |
134 | MmPci16 (\r | |
135 | 0,\r | |
136 | mSlotBridgeTable[i].Bus,\r | |
137 | mSlotBridgeTable[i].Dev,\r | |
138 | mSlotBridgeTable[i].Function,\r | |
139 | PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET\r | |
140 | ) = 0;\r | |
141 | }\r | |
142 | }\r | |
143 | \r | |
144 | Handle = NULL;\r | |
145 | Status = gBS->InstallProtocolInterface (\r | |
146 | &Handle,\r | |
147 | &gEfiSmbiosSlotPopulationGuid,\r | |
148 | EFI_NATIVE_INTERFACE,\r | |
149 | &mSlotInformation\r | |
150 | );\r | |
151 | ASSERT_EFI_ERROR(Status);\r | |
152 | \r | |
153 | }\r |