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tcg/mips: detect available host instructions at runtime
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CommitLineData
296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
83c9089e 28#include "monitor/monitor.h"
9c17d615 29#include "sysemu/sysemu.h"
022c62cb 30#include "exec/gdbstub.h"
9c17d615
PB
31#include "sysemu/dma.h"
32#include "sysemu/kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
1de7afc9 35#include "qemu/thread.h"
9c17d615
PB
36#include "sysemu/cpus.h"
37#include "sysemu/qtest.h"
1de7afc9
PB
38#include "qemu/main-loop.h"
39#include "qemu/bitmap.h"
0ff0fc19
JK
40
41#ifndef _WIN32
1de7afc9 42#include "qemu/compatfd.h"
0ff0fc19 43#endif
296af7c9 44
6d9cb73c
JK
45#ifdef CONFIG_LINUX
46
47#include <sys/prctl.h>
48
c0532a76
MT
49#ifndef PR_MCE_KILL
50#define PR_MCE_KILL 33
51#endif
52
6d9cb73c
JK
53#ifndef PR_MCE_KILL_SET
54#define PR_MCE_KILL_SET 1
55#endif
56
57#ifndef PR_MCE_KILL_EARLY
58#define PR_MCE_KILL_EARLY 1
59#endif
60
61#endif /* CONFIG_LINUX */
62
182735ef 63static CPUState *next_cpu;
296af7c9 64
321bc0b2
TC
65bool cpu_is_stopped(CPUState *cpu)
66{
67 return cpu->stopped || !runstate_is_running();
68}
69
a98ae1d8 70static bool cpu_thread_is_idle(CPUState *cpu)
ac873f1e 71{
c64ca814 72 if (cpu->stop || cpu->queued_work_first) {
ac873f1e
PM
73 return false;
74 }
321bc0b2 75 if (cpu_is_stopped(cpu)) {
ac873f1e
PM
76 return true;
77 }
259186a7 78 if (!cpu->halted || qemu_cpu_has_work(cpu) ||
215e79c0 79 kvm_halt_in_kernel()) {
ac873f1e
PM
80 return false;
81 }
82 return true;
83}
84
85static bool all_cpu_threads_idle(void)
86{
182735ef 87 CPUState *cpu;
ac873f1e 88
182735ef
AF
89 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
90 if (!cpu_thread_is_idle(cpu)) {
ac873f1e
PM
91 return false;
92 }
93 }
94 return true;
95}
96
946fb27c
PB
97/***********************************************************/
98/* guest cycle counter */
99
100/* Conversion factor from emulated instructions to virtual clock ticks. */
101static int icount_time_shift;
102/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
103#define MAX_ICOUNT_SHIFT 10
104/* Compensate for varying guest execution speed. */
105static int64_t qemu_icount_bias;
106static QEMUTimer *icount_rt_timer;
107static QEMUTimer *icount_vm_timer;
108static QEMUTimer *icount_warp_timer;
109static int64_t vm_clock_warp_start;
110static int64_t qemu_icount;
111
112typedef struct TimersState {
113 int64_t cpu_ticks_prev;
114 int64_t cpu_ticks_offset;
115 int64_t cpu_clock_offset;
116 int32_t cpu_ticks_enabled;
117 int64_t dummy;
118} TimersState;
119
d9cd4007 120static TimersState timers_state;
946fb27c
PB
121
122/* Return the virtual CPU time, based on the instruction counter. */
123int64_t cpu_get_icount(void)
124{
125 int64_t icount;
4917cf44 126 CPUState *cpu = current_cpu;
946fb27c
PB
127
128 icount = qemu_icount;
4917cf44
AF
129 if (cpu) {
130 CPUArchState *env = cpu->env_ptr;
946fb27c
PB
131 if (!can_do_io(env)) {
132 fprintf(stderr, "Bad clock read\n");
133 }
134 icount -= (env->icount_decr.u16.low + env->icount_extra);
135 }
136 return qemu_icount_bias + (icount << icount_time_shift);
137}
138
139/* return the host CPU cycle counter and handle stop/restart */
140int64_t cpu_get_ticks(void)
141{
142 if (use_icount) {
143 return cpu_get_icount();
144 }
145 if (!timers_state.cpu_ticks_enabled) {
146 return timers_state.cpu_ticks_offset;
147 } else {
148 int64_t ticks;
149 ticks = cpu_get_real_ticks();
150 if (timers_state.cpu_ticks_prev > ticks) {
151 /* Note: non increasing ticks may happen if the host uses
152 software suspend */
153 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
154 }
155 timers_state.cpu_ticks_prev = ticks;
156 return ticks + timers_state.cpu_ticks_offset;
157 }
158}
159
160/* return the host CPU monotonic timer and handle stop/restart */
161int64_t cpu_get_clock(void)
162{
163 int64_t ti;
164 if (!timers_state.cpu_ticks_enabled) {
165 return timers_state.cpu_clock_offset;
166 } else {
167 ti = get_clock();
168 return ti + timers_state.cpu_clock_offset;
169 }
170}
171
172/* enable cpu_get_ticks() */
173void cpu_enable_ticks(void)
174{
175 if (!timers_state.cpu_ticks_enabled) {
176 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
177 timers_state.cpu_clock_offset -= get_clock();
178 timers_state.cpu_ticks_enabled = 1;
179 }
180}
181
182/* disable cpu_get_ticks() : the clock is stopped. You must not call
183 cpu_get_ticks() after that. */
184void cpu_disable_ticks(void)
185{
186 if (timers_state.cpu_ticks_enabled) {
187 timers_state.cpu_ticks_offset = cpu_get_ticks();
188 timers_state.cpu_clock_offset = cpu_get_clock();
189 timers_state.cpu_ticks_enabled = 0;
190 }
191}
192
193/* Correlation between real and virtual time is always going to be
194 fairly approximate, so ignore small variation.
195 When the guest is idle real and virtual time will be aligned in
196 the IO wait loop. */
197#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
198
199static void icount_adjust(void)
200{
201 int64_t cur_time;
202 int64_t cur_icount;
203 int64_t delta;
204 static int64_t last_delta;
205 /* If the VM is not running, then do nothing. */
206 if (!runstate_is_running()) {
207 return;
208 }
209 cur_time = cpu_get_clock();
40daca54 210 cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
946fb27c
PB
211 delta = cur_icount - cur_time;
212 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
213 if (delta > 0
214 && last_delta + ICOUNT_WOBBLE < delta * 2
215 && icount_time_shift > 0) {
216 /* The guest is getting too far ahead. Slow time down. */
217 icount_time_shift--;
218 }
219 if (delta < 0
220 && last_delta - ICOUNT_WOBBLE > delta * 2
221 && icount_time_shift < MAX_ICOUNT_SHIFT) {
222 /* The guest is getting too far behind. Speed time up. */
223 icount_time_shift++;
224 }
225 last_delta = delta;
226 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
227}
228
229static void icount_adjust_rt(void *opaque)
230{
40daca54
AB
231 timer_mod(icount_rt_timer,
232 qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000);
946fb27c
PB
233 icount_adjust();
234}
235
236static void icount_adjust_vm(void *opaque)
237{
40daca54
AB
238 timer_mod(icount_vm_timer,
239 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
240 get_ticks_per_sec() / 10);
946fb27c
PB
241 icount_adjust();
242}
243
244static int64_t qemu_icount_round(int64_t count)
245{
246 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
247}
248
249static void icount_warp_rt(void *opaque)
250{
251 if (vm_clock_warp_start == -1) {
252 return;
253 }
254
255 if (runstate_is_running()) {
40daca54 256 int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
946fb27c
PB
257 int64_t warp_delta = clock - vm_clock_warp_start;
258 if (use_icount == 1) {
259 qemu_icount_bias += warp_delta;
260 } else {
261 /*
40daca54 262 * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too
946fb27c
PB
263 * far ahead of real time.
264 */
265 int64_t cur_time = cpu_get_clock();
40daca54 266 int64_t cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
946fb27c
PB
267 int64_t delta = cur_time - cur_icount;
268 qemu_icount_bias += MIN(warp_delta, delta);
269 }
40daca54
AB
270 if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) {
271 qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
946fb27c
PB
272 }
273 }
274 vm_clock_warp_start = -1;
275}
276
8156be56
PB
277void qtest_clock_warp(int64_t dest)
278{
40daca54 279 int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
8156be56
PB
280 assert(qtest_enabled());
281 while (clock < dest) {
40daca54 282 int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
8156be56
PB
283 int64_t warp = MIN(dest - clock, deadline);
284 qemu_icount_bias += warp;
40daca54
AB
285 qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
286 clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
8156be56 287 }
40daca54 288 qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
8156be56
PB
289}
290
40daca54 291void qemu_clock_warp(QEMUClockType type)
946fb27c
PB
292{
293 int64_t deadline;
294
295 /*
296 * There are too many global variables to make the "warp" behavior
297 * applicable to other clocks. But a clock argument removes the
298 * need for if statements all over the place.
299 */
40daca54 300 if (type != QEMU_CLOCK_VIRTUAL || !use_icount) {
946fb27c
PB
301 return;
302 }
303
304 /*
40daca54
AB
305 * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now.
306 * This ensures that the deadline for the timer is computed correctly below.
946fb27c
PB
307 * This also makes sure that the insn counter is synchronized before the
308 * CPU starts running, in case the CPU is woken by an event other than
40daca54 309 * the earliest QEMU_CLOCK_VIRTUAL timer.
946fb27c
PB
310 */
311 icount_warp_rt(NULL);
40daca54
AB
312 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(QEMU_CLOCK_VIRTUAL)) {
313 timer_del(icount_warp_timer);
946fb27c
PB
314 return;
315 }
316
8156be56
PB
317 if (qtest_enabled()) {
318 /* When testing, qtest commands advance icount. */
319 return;
320 }
321
40daca54 322 vm_clock_warp_start = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
ac70aafc 323 /* We want to use the earliest deadline from ALL vm_clocks */
40daca54 324 deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
ac70aafc
AB
325
326 /* Maintain prior (possibly buggy) behaviour where if no deadline
40daca54 327 * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
ac70aafc
AB
328 * INT32_MAX nanoseconds ahead, we still use INT32_MAX
329 * nanoseconds.
330 */
331 if ((deadline < 0) || (deadline > INT32_MAX)) {
332 deadline = INT32_MAX;
333 }
334
946fb27c
PB
335 if (deadline > 0) {
336 /*
40daca54 337 * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to
946fb27c
PB
338 * sleep. Otherwise, the CPU might be waiting for a future timer
339 * interrupt to wake it up, but the interrupt never comes because
340 * the vCPU isn't running any insns and thus doesn't advance the
40daca54 341 * QEMU_CLOCK_VIRTUAL.
946fb27c
PB
342 *
343 * An extreme solution for this problem would be to never let VCPUs
40daca54
AB
344 * sleep in icount mode if there is a pending QEMU_CLOCK_VIRTUAL
345 * timer; rather time could just advance to the next QEMU_CLOCK_VIRTUAL
346 * event. Instead, we do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL
347 * after some e"real" time, (related to the time left until the next
348 * event) has passed. The QEMU_CLOCK_REALTIME timer will do this.
349 * This avoids that the warps are visible externally; for example,
350 * you will not be sending network packets continuously instead of
351 * every 100ms.
946fb27c 352 */
40daca54 353 timer_mod(icount_warp_timer, vm_clock_warp_start + deadline);
ac70aafc 354 } else if (deadline == 0) {
40daca54 355 qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
946fb27c
PB
356 }
357}
358
359static const VMStateDescription vmstate_timers = {
360 .name = "timer",
361 .version_id = 2,
362 .minimum_version_id = 1,
363 .minimum_version_id_old = 1,
364 .fields = (VMStateField[]) {
365 VMSTATE_INT64(cpu_ticks_offset, TimersState),
366 VMSTATE_INT64(dummy, TimersState),
367 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
368 VMSTATE_END_OF_LIST()
369 }
370};
371
372void configure_icount(const char *option)
373{
374 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
375 if (!option) {
376 return;
377 }
378
40daca54
AB
379 icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME,
380 icount_warp_rt, NULL);
946fb27c
PB
381 if (strcmp(option, "auto") != 0) {
382 icount_time_shift = strtol(option, NULL, 0);
383 use_icount = 1;
384 return;
385 }
386
387 use_icount = 2;
388
389 /* 125MIPS seems a reasonable initial guess at the guest speed.
390 It will be corrected fairly quickly anyway. */
391 icount_time_shift = 3;
392
393 /* Have both realtime and virtual time triggers for speed adjustment.
394 The realtime trigger catches emulated time passing too slowly,
395 the virtual time trigger catches emulated time passing too fast.
396 Realtime triggers occur even when idle, so use them less frequently
397 than VM triggers. */
40daca54
AB
398 icount_rt_timer = timer_new_ms(QEMU_CLOCK_REALTIME,
399 icount_adjust_rt, NULL);
400 timer_mod(icount_rt_timer,
401 qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000);
402 icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
403 icount_adjust_vm, NULL);
404 timer_mod(icount_vm_timer,
405 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
406 get_ticks_per_sec() / 10);
946fb27c
PB
407}
408
296af7c9
BS
409/***********************************************************/
410void hw_error(const char *fmt, ...)
411{
412 va_list ap;
55e5c285 413 CPUState *cpu;
296af7c9
BS
414
415 va_start(ap, fmt);
416 fprintf(stderr, "qemu: hardware error: ");
417 vfprintf(stderr, fmt, ap);
418 fprintf(stderr, "\n");
182735ef 419 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
55e5c285 420 fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);
878096ee 421 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU);
296af7c9
BS
422 }
423 va_end(ap);
424 abort();
425}
426
427void cpu_synchronize_all_states(void)
428{
182735ef 429 CPUState *cpu;
296af7c9 430
182735ef
AF
431 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
432 cpu_synchronize_state(cpu);
296af7c9
BS
433 }
434}
435
436void cpu_synchronize_all_post_reset(void)
437{
182735ef 438 CPUState *cpu;
296af7c9
BS
439
440 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
182735ef 441 cpu_synchronize_post_reset(cpu);
296af7c9
BS
442 }
443}
444
445void cpu_synchronize_all_post_init(void)
446{
182735ef 447 CPUState *cpu;
296af7c9
BS
448
449 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
182735ef 450 cpu_synchronize_post_init(cpu);
296af7c9
BS
451 }
452}
453
56983463 454static int do_vm_stop(RunState state)
296af7c9 455{
56983463
KW
456 int ret = 0;
457
1354869c 458 if (runstate_is_running()) {
296af7c9 459 cpu_disable_ticks();
296af7c9 460 pause_all_vcpus();
f5bbfba1 461 runstate_set(state);
1dfb4dd9 462 vm_state_notify(0, state);
296af7c9
BS
463 monitor_protocol_event(QEVENT_STOP, NULL);
464 }
56983463 465
594a45ce
KW
466 bdrv_drain_all();
467 ret = bdrv_flush_all();
468
56983463 469 return ret;
296af7c9
BS
470}
471
a1fcaa73 472static bool cpu_can_run(CPUState *cpu)
296af7c9 473{
4fdeee7c 474 if (cpu->stop) {
a1fcaa73 475 return false;
0ab07c62 476 }
321bc0b2 477 if (cpu_is_stopped(cpu)) {
a1fcaa73 478 return false;
0ab07c62 479 }
a1fcaa73 480 return true;
296af7c9
BS
481}
482
91325046 483static void cpu_handle_guest_debug(CPUState *cpu)
83f338f7 484{
64f6b346 485 gdb_set_stop_cpu(cpu);
8cf71710 486 qemu_system_debug_request();
f324e766 487 cpu->stopped = true;
3c638d06
JK
488}
489
714bd040
PB
490static void cpu_signal(int sig)
491{
4917cf44
AF
492 if (current_cpu) {
493 cpu_exit(current_cpu);
714bd040
PB
494 }
495 exit_request = 1;
496}
714bd040 497
6d9cb73c
JK
498#ifdef CONFIG_LINUX
499static void sigbus_reraise(void)
500{
501 sigset_t set;
502 struct sigaction action;
503
504 memset(&action, 0, sizeof(action));
505 action.sa_handler = SIG_DFL;
506 if (!sigaction(SIGBUS, &action, NULL)) {
507 raise(SIGBUS);
508 sigemptyset(&set);
509 sigaddset(&set, SIGBUS);
510 sigprocmask(SIG_UNBLOCK, &set, NULL);
511 }
512 perror("Failed to re-raise SIGBUS!\n");
513 abort();
514}
515
516static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
517 void *ctx)
518{
519 if (kvm_on_sigbus(siginfo->ssi_code,
520 (void *)(intptr_t)siginfo->ssi_addr)) {
521 sigbus_reraise();
522 }
523}
524
525static void qemu_init_sigbus(void)
526{
527 struct sigaction action;
528
529 memset(&action, 0, sizeof(action));
530 action.sa_flags = SA_SIGINFO;
531 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
532 sigaction(SIGBUS, &action, NULL);
533
534 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
535}
536
290adf38 537static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
538{
539 struct timespec ts = { 0, 0 };
540 siginfo_t siginfo;
541 sigset_t waitset;
542 sigset_t chkset;
543 int r;
544
545 sigemptyset(&waitset);
546 sigaddset(&waitset, SIG_IPI);
547 sigaddset(&waitset, SIGBUS);
548
549 do {
550 r = sigtimedwait(&waitset, &siginfo, &ts);
551 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
552 perror("sigtimedwait");
553 exit(1);
554 }
555
556 switch (r) {
557 case SIGBUS:
290adf38 558 if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) {
1ab3c6c0
JK
559 sigbus_reraise();
560 }
561 break;
562 default:
563 break;
564 }
565
566 r = sigpending(&chkset);
567 if (r == -1) {
568 perror("sigpending");
569 exit(1);
570 }
571 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
572}
573
6d9cb73c
JK
574#else /* !CONFIG_LINUX */
575
576static void qemu_init_sigbus(void)
577{
578}
1ab3c6c0 579
290adf38 580static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
581{
582}
6d9cb73c
JK
583#endif /* !CONFIG_LINUX */
584
296af7c9 585#ifndef _WIN32
55f8d6ac
JK
586static void dummy_signal(int sig)
587{
588}
55f8d6ac 589
13618e05 590static void qemu_kvm_init_cpu_signals(CPUState *cpu)
714bd040
PB
591{
592 int r;
593 sigset_t set;
594 struct sigaction sigact;
595
596 memset(&sigact, 0, sizeof(sigact));
597 sigact.sa_handler = dummy_signal;
598 sigaction(SIG_IPI, &sigact, NULL);
599
714bd040
PB
600 pthread_sigmask(SIG_BLOCK, NULL, &set);
601 sigdelset(&set, SIG_IPI);
714bd040 602 sigdelset(&set, SIGBUS);
491d6e80 603 r = kvm_set_signal_mask(cpu, &set);
714bd040
PB
604 if (r) {
605 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
606 exit(1);
607 }
608}
609
610static void qemu_tcg_init_cpu_signals(void)
611{
714bd040
PB
612 sigset_t set;
613 struct sigaction sigact;
614
615 memset(&sigact, 0, sizeof(sigact));
616 sigact.sa_handler = cpu_signal;
617 sigaction(SIG_IPI, &sigact, NULL);
618
619 sigemptyset(&set);
620 sigaddset(&set, SIG_IPI);
621 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
622}
623
55f8d6ac 624#else /* _WIN32 */
13618e05 625static void qemu_kvm_init_cpu_signals(CPUState *cpu)
ff48eb5f 626{
714bd040
PB
627 abort();
628}
ff48eb5f 629
714bd040
PB
630static void qemu_tcg_init_cpu_signals(void)
631{
ff48eb5f 632}
714bd040 633#endif /* _WIN32 */
ff48eb5f 634
b2532d88 635static QemuMutex qemu_global_mutex;
46daff13
PB
636static QemuCond qemu_io_proceeded_cond;
637static bool iothread_requesting_mutex;
296af7c9
BS
638
639static QemuThread io_thread;
640
641static QemuThread *tcg_cpu_thread;
642static QemuCond *tcg_halt_cond;
643
296af7c9
BS
644/* cpu creation */
645static QemuCond qemu_cpu_cond;
646/* system init */
296af7c9 647static QemuCond qemu_pause_cond;
e82bcec2 648static QemuCond qemu_work_cond;
296af7c9 649
d3b12f5d 650void qemu_init_cpu_loop(void)
296af7c9 651{
6d9cb73c 652 qemu_init_sigbus();
ed94592b 653 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
654 qemu_cond_init(&qemu_pause_cond);
655 qemu_cond_init(&qemu_work_cond);
46daff13 656 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 657 qemu_mutex_init(&qemu_global_mutex);
296af7c9 658
b7680cb6 659 qemu_thread_get_self(&io_thread);
296af7c9
BS
660}
661
f100f0b3 662void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
e82bcec2
MT
663{
664 struct qemu_work_item wi;
665
60e82579 666 if (qemu_cpu_is_self(cpu)) {
e82bcec2
MT
667 func(data);
668 return;
669 }
670
671 wi.func = func;
672 wi.data = data;
3c02270d 673 wi.free = false;
c64ca814
AF
674 if (cpu->queued_work_first == NULL) {
675 cpu->queued_work_first = &wi;
0ab07c62 676 } else {
c64ca814 677 cpu->queued_work_last->next = &wi;
0ab07c62 678 }
c64ca814 679 cpu->queued_work_last = &wi;
e82bcec2
MT
680 wi.next = NULL;
681 wi.done = false;
682
c08d7424 683 qemu_cpu_kick(cpu);
e82bcec2 684 while (!wi.done) {
4917cf44 685 CPUState *self_cpu = current_cpu;
e82bcec2
MT
686
687 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
4917cf44 688 current_cpu = self_cpu;
e82bcec2
MT
689 }
690}
691
3c02270d
CV
692void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
693{
694 struct qemu_work_item *wi;
695
696 if (qemu_cpu_is_self(cpu)) {
697 func(data);
698 return;
699 }
700
701 wi = g_malloc0(sizeof(struct qemu_work_item));
702 wi->func = func;
703 wi->data = data;
704 wi->free = true;
705 if (cpu->queued_work_first == NULL) {
706 cpu->queued_work_first = wi;
707 } else {
708 cpu->queued_work_last->next = wi;
709 }
710 cpu->queued_work_last = wi;
711 wi->next = NULL;
712 wi->done = false;
713
714 qemu_cpu_kick(cpu);
715}
716
6d45b109 717static void flush_queued_work(CPUState *cpu)
e82bcec2
MT
718{
719 struct qemu_work_item *wi;
720
c64ca814 721 if (cpu->queued_work_first == NULL) {
e82bcec2 722 return;
0ab07c62 723 }
e82bcec2 724
c64ca814
AF
725 while ((wi = cpu->queued_work_first)) {
726 cpu->queued_work_first = wi->next;
e82bcec2
MT
727 wi->func(wi->data);
728 wi->done = true;
3c02270d
CV
729 if (wi->free) {
730 g_free(wi);
731 }
e82bcec2 732 }
c64ca814 733 cpu->queued_work_last = NULL;
e82bcec2
MT
734 qemu_cond_broadcast(&qemu_work_cond);
735}
736
509a0d78 737static void qemu_wait_io_event_common(CPUState *cpu)
296af7c9 738{
4fdeee7c
AF
739 if (cpu->stop) {
740 cpu->stop = false;
f324e766 741 cpu->stopped = true;
296af7c9
BS
742 qemu_cond_signal(&qemu_pause_cond);
743 }
6d45b109 744 flush_queued_work(cpu);
216fc9a4 745 cpu->thread_kicked = false;
296af7c9
BS
746}
747
6cabe1f3 748static void qemu_tcg_wait_io_event(void)
296af7c9 749{
182735ef 750 CPUState *cpu;
6cabe1f3 751
16400322 752 while (all_cpu_threads_idle()) {
ab33fcda
PB
753 /* Start accounting real time to the virtual clock if the CPUs
754 are idle. */
40daca54 755 qemu_clock_warp(QEMU_CLOCK_VIRTUAL);
9705fbb5 756 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 757 }
296af7c9 758
46daff13
PB
759 while (iothread_requesting_mutex) {
760 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
761 }
6cabe1f3 762
182735ef
AF
763 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
764 qemu_wait_io_event_common(cpu);
6cabe1f3 765 }
296af7c9
BS
766}
767
fd529e8f 768static void qemu_kvm_wait_io_event(CPUState *cpu)
296af7c9 769{
a98ae1d8 770 while (cpu_thread_is_idle(cpu)) {
f5c121b8 771 qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
16400322 772 }
296af7c9 773
290adf38 774 qemu_kvm_eat_signals(cpu);
509a0d78 775 qemu_wait_io_event_common(cpu);
296af7c9
BS
776}
777
7e97cd88 778static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 779{
48a106bd 780 CPUState *cpu = arg;
84b4915d 781 int r;
296af7c9 782
6164e6d6 783 qemu_mutex_lock(&qemu_global_mutex);
814e612e 784 qemu_thread_get_self(cpu->thread);
9f09e18a 785 cpu->thread_id = qemu_get_thread_id();
4917cf44 786 current_cpu = cpu;
296af7c9 787
504134d2 788 r = kvm_init_vcpu(cpu);
84b4915d
JK
789 if (r < 0) {
790 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
791 exit(1);
792 }
296af7c9 793
13618e05 794 qemu_kvm_init_cpu_signals(cpu);
296af7c9
BS
795
796 /* signal CPU creation */
61a46217 797 cpu->created = true;
296af7c9
BS
798 qemu_cond_signal(&qemu_cpu_cond);
799
296af7c9 800 while (1) {
a1fcaa73 801 if (cpu_can_run(cpu)) {
1458c363 802 r = kvm_cpu_exec(cpu);
83f338f7 803 if (r == EXCP_DEBUG) {
91325046 804 cpu_handle_guest_debug(cpu);
83f338f7 805 }
0ab07c62 806 }
fd529e8f 807 qemu_kvm_wait_io_event(cpu);
296af7c9
BS
808 }
809
810 return NULL;
811}
812
c7f0f3b1
AL
813static void *qemu_dummy_cpu_thread_fn(void *arg)
814{
815#ifdef _WIN32
816 fprintf(stderr, "qtest is not supported under Windows\n");
817 exit(1);
818#else
10a9021d 819 CPUState *cpu = arg;
c7f0f3b1
AL
820 sigset_t waitset;
821 int r;
822
823 qemu_mutex_lock_iothread();
814e612e 824 qemu_thread_get_self(cpu->thread);
9f09e18a 825 cpu->thread_id = qemu_get_thread_id();
c7f0f3b1
AL
826
827 sigemptyset(&waitset);
828 sigaddset(&waitset, SIG_IPI);
829
830 /* signal CPU creation */
61a46217 831 cpu->created = true;
c7f0f3b1
AL
832 qemu_cond_signal(&qemu_cpu_cond);
833
4917cf44 834 current_cpu = cpu;
c7f0f3b1 835 while (1) {
4917cf44 836 current_cpu = NULL;
c7f0f3b1
AL
837 qemu_mutex_unlock_iothread();
838 do {
839 int sig;
840 r = sigwait(&waitset, &sig);
841 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
842 if (r == -1) {
843 perror("sigwait");
844 exit(1);
845 }
846 qemu_mutex_lock_iothread();
4917cf44 847 current_cpu = cpu;
509a0d78 848 qemu_wait_io_event_common(cpu);
c7f0f3b1
AL
849 }
850
851 return NULL;
852#endif
853}
854
bdb7ca67
JK
855static void tcg_exec_all(void);
856
a37677c3
IM
857static void tcg_signal_cpu_creation(CPUState *cpu, void *data)
858{
859 cpu->thread_id = qemu_get_thread_id();
860 cpu->created = true;
861}
862
7e97cd88 863static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 864{
c3586ba7 865 CPUState *cpu = arg;
296af7c9 866
55f8d6ac 867 qemu_tcg_init_cpu_signals();
814e612e 868 qemu_thread_get_self(cpu->thread);
296af7c9 869
296af7c9 870 qemu_mutex_lock(&qemu_global_mutex);
a37677c3 871 qemu_for_each_cpu(tcg_signal_cpu_creation, NULL);
296af7c9
BS
872 qemu_cond_signal(&qemu_cpu_cond);
873
fa7d1867 874 /* wait for initial kick-off after machine start */
182735ef 875 while (first_cpu->stopped) {
fa7d1867 876 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
877
878 /* process any pending work */
182735ef
AF
879 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
880 qemu_wait_io_event_common(cpu);
8e564b4e 881 }
0ab07c62 882 }
296af7c9
BS
883
884 while (1) {
bdb7ca67 885 tcg_exec_all();
ac70aafc
AB
886
887 if (use_icount) {
40daca54 888 int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
ac70aafc
AB
889
890 if (deadline == 0) {
40daca54 891 qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
ac70aafc 892 }
3b2319a3 893 }
6cabe1f3 894 qemu_tcg_wait_io_event();
296af7c9
BS
895 }
896
897 return NULL;
898}
899
2ff09a40 900static void qemu_cpu_kick_thread(CPUState *cpu)
cc015e9a
PB
901{
902#ifndef _WIN32
903 int err;
904
814e612e 905 err = pthread_kill(cpu->thread->thread, SIG_IPI);
cc015e9a
PB
906 if (err) {
907 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
908 exit(1);
909 }
910#else /* _WIN32 */
60e82579 911 if (!qemu_cpu_is_self(cpu)) {
ed9164a3
OH
912 CONTEXT tcgContext;
913
914 if (SuspendThread(cpu->hThread) == (DWORD)-1) {
7f1721df 915 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
916 GetLastError());
917 exit(1);
918 }
919
920 /* On multi-core systems, we are not sure that the thread is actually
921 * suspended until we can get the context.
922 */
923 tcgContext.ContextFlags = CONTEXT_CONTROL;
924 while (GetThreadContext(cpu->hThread, &tcgContext) != 0) {
925 continue;
926 }
927
cc015e9a 928 cpu_signal(0);
ed9164a3
OH
929
930 if (ResumeThread(cpu->hThread) == (DWORD)-1) {
7f1721df 931 fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__,
ed9164a3
OH
932 GetLastError());
933 exit(1);
934 }
cc015e9a
PB
935 }
936#endif
937}
938
c08d7424 939void qemu_cpu_kick(CPUState *cpu)
296af7c9 940{
f5c121b8 941 qemu_cond_broadcast(cpu->halt_cond);
216fc9a4 942 if (!tcg_enabled() && !cpu->thread_kicked) {
2ff09a40 943 qemu_cpu_kick_thread(cpu);
216fc9a4 944 cpu->thread_kicked = true;
aa2c364b 945 }
296af7c9
BS
946}
947
46d62fac 948void qemu_cpu_kick_self(void)
296af7c9 949{
b55c22c6 950#ifndef _WIN32
4917cf44 951 assert(current_cpu);
296af7c9 952
4917cf44
AF
953 if (!current_cpu->thread_kicked) {
954 qemu_cpu_kick_thread(current_cpu);
955 current_cpu->thread_kicked = true;
296af7c9 956 }
b55c22c6
PB
957#else
958 abort();
959#endif
296af7c9
BS
960}
961
60e82579 962bool qemu_cpu_is_self(CPUState *cpu)
296af7c9 963{
814e612e 964 return qemu_thread_is_self(cpu->thread);
296af7c9
BS
965}
966
aa723c23
JQ
967static bool qemu_in_vcpu_thread(void)
968{
4917cf44 969 return current_cpu && qemu_cpu_is_self(current_cpu);
aa723c23
JQ
970}
971
296af7c9
BS
972void qemu_mutex_lock_iothread(void)
973{
c7f0f3b1 974 if (!tcg_enabled()) {
296af7c9 975 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 976 } else {
46daff13 977 iothread_requesting_mutex = true;
1a28cac3 978 if (qemu_mutex_trylock(&qemu_global_mutex)) {
182735ef 979 qemu_cpu_kick_thread(first_cpu);
1a28cac3
MT
980 qemu_mutex_lock(&qemu_global_mutex);
981 }
46daff13
PB
982 iothread_requesting_mutex = false;
983 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 984 }
296af7c9
BS
985}
986
987void qemu_mutex_unlock_iothread(void)
988{
989 qemu_mutex_unlock(&qemu_global_mutex);
990}
991
992static int all_vcpus_paused(void)
993{
182735ef 994 CPUState *cpu = first_cpu;
296af7c9 995
182735ef
AF
996 while (cpu) {
997 if (!cpu->stopped) {
296af7c9 998 return 0;
0ab07c62 999 }
182735ef 1000 cpu = cpu->next_cpu;
296af7c9
BS
1001 }
1002
1003 return 1;
1004}
1005
1006void pause_all_vcpus(void)
1007{
182735ef 1008 CPUState *cpu = first_cpu;
296af7c9 1009
40daca54 1010 qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false);
182735ef
AF
1011 while (cpu) {
1012 cpu->stop = true;
1013 qemu_cpu_kick(cpu);
1014 cpu = cpu->next_cpu;
296af7c9
BS
1015 }
1016
aa723c23 1017 if (qemu_in_vcpu_thread()) {
d798e974
JK
1018 cpu_stop_current();
1019 if (!kvm_enabled()) {
182735ef
AF
1020 cpu = first_cpu;
1021 while (cpu) {
1022 cpu->stop = false;
1023 cpu->stopped = true;
1024 cpu = cpu->next_cpu;
d798e974
JK
1025 }
1026 return;
1027 }
1028 }
1029
296af7c9 1030 while (!all_vcpus_paused()) {
be7d6c57 1031 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
182735ef
AF
1032 cpu = first_cpu;
1033 while (cpu) {
1034 qemu_cpu_kick(cpu);
1035 cpu = cpu->next_cpu;
296af7c9
BS
1036 }
1037 }
1038}
1039
2993683b
IM
1040void cpu_resume(CPUState *cpu)
1041{
1042 cpu->stop = false;
1043 cpu->stopped = false;
1044 qemu_cpu_kick(cpu);
1045}
1046
296af7c9
BS
1047void resume_all_vcpus(void)
1048{
182735ef 1049 CPUState *cpu = first_cpu;
296af7c9 1050
40daca54 1051 qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true);
182735ef
AF
1052 while (cpu) {
1053 cpu_resume(cpu);
1054 cpu = cpu->next_cpu;
296af7c9
BS
1055 }
1056}
1057
e5ab30a2 1058static void qemu_tcg_init_vcpu(CPUState *cpu)
296af7c9 1059{
296af7c9
BS
1060 /* share a single thread for all cpus with TCG */
1061 if (!tcg_cpu_thread) {
814e612e 1062 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1063 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1064 qemu_cond_init(cpu->halt_cond);
1065 tcg_halt_cond = cpu->halt_cond;
c3586ba7 1066 qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
1ecf47bf
PB
1067 QEMU_THREAD_JOINABLE);
1068#ifdef _WIN32
814e612e 1069 cpu->hThread = qemu_thread_get_handle(cpu->thread);
1ecf47bf 1070#endif
61a46217 1071 while (!cpu->created) {
18a85728 1072 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1073 }
814e612e 1074 tcg_cpu_thread = cpu->thread;
296af7c9 1075 } else {
814e612e 1076 cpu->thread = tcg_cpu_thread;
f5c121b8 1077 cpu->halt_cond = tcg_halt_cond;
296af7c9
BS
1078 }
1079}
1080
48a106bd 1081static void qemu_kvm_start_vcpu(CPUState *cpu)
296af7c9 1082{
814e612e 1083 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1084 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1085 qemu_cond_init(cpu->halt_cond);
48a106bd 1086 qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu,
1ecf47bf 1087 QEMU_THREAD_JOINABLE);
61a46217 1088 while (!cpu->created) {
18a85728 1089 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1090 }
296af7c9
BS
1091}
1092
10a9021d 1093static void qemu_dummy_start_vcpu(CPUState *cpu)
c7f0f3b1 1094{
814e612e 1095 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1096 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1097 qemu_cond_init(cpu->halt_cond);
10a9021d 1098 qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu,
c7f0f3b1 1099 QEMU_THREAD_JOINABLE);
61a46217 1100 while (!cpu->created) {
c7f0f3b1
AL
1101 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1102 }
1103}
1104
c643bed9 1105void qemu_init_vcpu(CPUState *cpu)
296af7c9 1106{
ce3960eb
AF
1107 cpu->nr_cores = smp_cores;
1108 cpu->nr_threads = smp_threads;
f324e766 1109 cpu->stopped = true;
0ab07c62 1110 if (kvm_enabled()) {
48a106bd 1111 qemu_kvm_start_vcpu(cpu);
c7f0f3b1 1112 } else if (tcg_enabled()) {
e5ab30a2 1113 qemu_tcg_init_vcpu(cpu);
c7f0f3b1 1114 } else {
10a9021d 1115 qemu_dummy_start_vcpu(cpu);
0ab07c62 1116 }
296af7c9
BS
1117}
1118
b4a3d965 1119void cpu_stop_current(void)
296af7c9 1120{
4917cf44
AF
1121 if (current_cpu) {
1122 current_cpu->stop = false;
1123 current_cpu->stopped = true;
1124 cpu_exit(current_cpu);
67bb172f 1125 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1126 }
296af7c9
BS
1127}
1128
56983463 1129int vm_stop(RunState state)
296af7c9 1130{
aa723c23 1131 if (qemu_in_vcpu_thread()) {
1dfb4dd9 1132 qemu_system_vmstop_request(state);
296af7c9
BS
1133 /*
1134 * FIXME: should not return to device code in case
1135 * vm_stop() has been requested.
1136 */
b4a3d965 1137 cpu_stop_current();
56983463 1138 return 0;
296af7c9 1139 }
56983463
KW
1140
1141 return do_vm_stop(state);
296af7c9
BS
1142}
1143
8a9236f1
LC
1144/* does a state transition even if the VM is already stopped,
1145 current state is forgotten forever */
56983463 1146int vm_stop_force_state(RunState state)
8a9236f1
LC
1147{
1148 if (runstate_is_running()) {
56983463 1149 return vm_stop(state);
8a9236f1
LC
1150 } else {
1151 runstate_set(state);
594a45ce
KW
1152 /* Make sure to return an error if the flush in a previous vm_stop()
1153 * failed. */
1154 return bdrv_flush_all();
8a9236f1
LC
1155 }
1156}
1157
9349b4f9 1158static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1159{
1160 int ret;
1161#ifdef CONFIG_PROFILER
1162 int64_t ti;
1163#endif
1164
1165#ifdef CONFIG_PROFILER
1166 ti = profile_getclock();
1167#endif
1168 if (use_icount) {
1169 int64_t count;
ac70aafc 1170 int64_t deadline;
296af7c9
BS
1171 int decr;
1172 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1173 env->icount_decr.u16.low = 0;
1174 env->icount_extra = 0;
40daca54 1175 deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
ac70aafc
AB
1176
1177 /* Maintain prior (possibly buggy) behaviour where if no deadline
40daca54 1178 * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
ac70aafc
AB
1179 * INT32_MAX nanoseconds ahead, we still use INT32_MAX
1180 * nanoseconds.
1181 */
1182 if ((deadline < 0) || (deadline > INT32_MAX)) {
1183 deadline = INT32_MAX;
1184 }
1185
1186 count = qemu_icount_round(deadline);
296af7c9
BS
1187 qemu_icount += count;
1188 decr = (count > 0xffff) ? 0xffff : count;
1189 count -= decr;
1190 env->icount_decr.u16.low = decr;
1191 env->icount_extra = count;
1192 }
1193 ret = cpu_exec(env);
1194#ifdef CONFIG_PROFILER
1195 qemu_time += profile_getclock() - ti;
1196#endif
1197 if (use_icount) {
1198 /* Fold pending instructions back into the
1199 instruction counter, and clear the interrupt flag. */
1200 qemu_icount -= (env->icount_decr.u16.low
1201 + env->icount_extra);
1202 env->icount_decr.u32 = 0;
1203 env->icount_extra = 0;
1204 }
1205 return ret;
1206}
1207
bdb7ca67 1208static void tcg_exec_all(void)
296af7c9 1209{
9a36085b
JK
1210 int r;
1211
40daca54
AB
1212 /* Account partial waits to QEMU_CLOCK_VIRTUAL. */
1213 qemu_clock_warp(QEMU_CLOCK_VIRTUAL);
ab33fcda 1214
0ab07c62 1215 if (next_cpu == NULL) {
296af7c9 1216 next_cpu = first_cpu;
0ab07c62 1217 }
c629a4bc 1218 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
182735ef
AF
1219 CPUState *cpu = next_cpu;
1220 CPUArchState *env = cpu->env_ptr;
296af7c9 1221
40daca54 1222 qemu_clock_enable(QEMU_CLOCK_VIRTUAL,
ed2803da 1223 (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1224
a1fcaa73 1225 if (cpu_can_run(cpu)) {
bdb7ca67 1226 r = tcg_cpu_exec(env);
9a36085b 1227 if (r == EXCP_DEBUG) {
91325046 1228 cpu_handle_guest_debug(cpu);
3c638d06
JK
1229 break;
1230 }
f324e766 1231 } else if (cpu->stop || cpu->stopped) {
296af7c9
BS
1232 break;
1233 }
1234 }
c629a4bc 1235 exit_request = 0;
296af7c9
BS
1236}
1237
1238void set_numa_modes(void)
1239{
1b1ed8dc 1240 CPUState *cpu;
296af7c9
BS
1241 int i;
1242
182735ef 1243 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
296af7c9 1244 for (i = 0; i < nb_numa_nodes; i++) {
55e5c285 1245 if (test_bit(cpu->cpu_index, node_cpumask[i])) {
1b1ed8dc 1246 cpu->numa_node = i;
296af7c9
BS
1247 }
1248 }
1249 }
1250}
1251
9a78eead 1252void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1253{
1254 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM
1255#if defined(cpu_list)
1256 cpu_list(f, cpu_fprintf);
262353cb
BS
1257#endif
1258}
de0b36b6
LC
1259
1260CpuInfoList *qmp_query_cpus(Error **errp)
1261{
1262 CpuInfoList *head = NULL, *cur_item = NULL;
182735ef 1263 CPUState *cpu;
de0b36b6 1264
182735ef 1265 for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
de0b36b6 1266 CpuInfoList *info;
182735ef
AF
1267#if defined(TARGET_I386)
1268 X86CPU *x86_cpu = X86_CPU(cpu);
1269 CPUX86State *env = &x86_cpu->env;
1270#elif defined(TARGET_PPC)
1271 PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu);
1272 CPUPPCState *env = &ppc_cpu->env;
1273#elif defined(TARGET_SPARC)
1274 SPARCCPU *sparc_cpu = SPARC_CPU(cpu);
1275 CPUSPARCState *env = &sparc_cpu->env;
1276#elif defined(TARGET_MIPS)
1277 MIPSCPU *mips_cpu = MIPS_CPU(cpu);
1278 CPUMIPSState *env = &mips_cpu->env;
1279#endif
de0b36b6 1280
cb446eca 1281 cpu_synchronize_state(cpu);
de0b36b6
LC
1282
1283 info = g_malloc0(sizeof(*info));
1284 info->value = g_malloc0(sizeof(*info->value));
55e5c285 1285 info->value->CPU = cpu->cpu_index;
182735ef 1286 info->value->current = (cpu == first_cpu);
259186a7 1287 info->value->halted = cpu->halted;
9f09e18a 1288 info->value->thread_id = cpu->thread_id;
de0b36b6
LC
1289#if defined(TARGET_I386)
1290 info->value->has_pc = true;
1291 info->value->pc = env->eip + env->segs[R_CS].base;
1292#elif defined(TARGET_PPC)
1293 info->value->has_nip = true;
1294 info->value->nip = env->nip;
1295#elif defined(TARGET_SPARC)
1296 info->value->has_pc = true;
1297 info->value->pc = env->pc;
1298 info->value->has_npc = true;
1299 info->value->npc = env->npc;
1300#elif defined(TARGET_MIPS)
1301 info->value->has_PC = true;
1302 info->value->PC = env->active_tc.PC;
1303#endif
1304
1305 /* XXX: waiting for the qapi to support GSList */
1306 if (!cur_item) {
1307 head = cur_item = info;
1308 } else {
1309 cur_item->next = info;
1310 cur_item = info;
1311 }
1312 }
1313
1314 return head;
1315}
0cfd6a9a
LC
1316
1317void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1318 bool has_cpu, int64_t cpu_index, Error **errp)
1319{
1320 FILE *f;
1321 uint32_t l;
55e5c285 1322 CPUState *cpu;
0cfd6a9a
LC
1323 uint8_t buf[1024];
1324
1325 if (!has_cpu) {
1326 cpu_index = 0;
1327 }
1328
151d1322
AF
1329 cpu = qemu_get_cpu(cpu_index);
1330 if (cpu == NULL) {
0cfd6a9a
LC
1331 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1332 "a CPU number");
1333 return;
1334 }
1335
1336 f = fopen(filename, "wb");
1337 if (!f) {
618da851 1338 error_setg_file_open(errp, errno, filename);
0cfd6a9a
LC
1339 return;
1340 }
1341
1342 while (size != 0) {
1343 l = sizeof(buf);
1344 if (l > size)
1345 l = size;
f17ec444 1346 cpu_memory_rw_debug(cpu, addr, buf, l, 0);
0cfd6a9a
LC
1347 if (fwrite(buf, 1, l, f) != l) {
1348 error_set(errp, QERR_IO_ERROR);
1349 goto exit;
1350 }
1351 addr += l;
1352 size -= l;
1353 }
1354
1355exit:
1356 fclose(f);
1357}
6d3962bf
LC
1358
1359void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1360 Error **errp)
1361{
1362 FILE *f;
1363 uint32_t l;
1364 uint8_t buf[1024];
1365
1366 f = fopen(filename, "wb");
1367 if (!f) {
618da851 1368 error_setg_file_open(errp, errno, filename);
6d3962bf
LC
1369 return;
1370 }
1371
1372 while (size != 0) {
1373 l = sizeof(buf);
1374 if (l > size)
1375 l = size;
1376 cpu_physical_memory_rw(addr, buf, l, 0);
1377 if (fwrite(buf, 1, l, f) != l) {
1378 error_set(errp, QERR_IO_ERROR);
1379 goto exit;
1380 }
1381 addr += l;
1382 size -= l;
1383 }
1384
1385exit:
1386 fclose(f);
1387}
ab49ab5c
LC
1388
1389void qmp_inject_nmi(Error **errp)
1390{
1391#if defined(TARGET_I386)
182735ef
AF
1392 CPUState *cs;
1393
1394 for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
1395 X86CPU *cpu = X86_CPU(cs);
1396 CPUX86State *env = &cpu->env;
ab49ab5c 1397
02c09195 1398 if (!env->apic_state) {
182735ef 1399 cpu_interrupt(cs, CPU_INTERRUPT_NMI);
02c09195
JK
1400 } else {
1401 apic_deliver_nmi(env->apic_state);
1402 }
ab49ab5c 1403 }
7f7f9752
ED
1404#elif defined(TARGET_S390X)
1405 CPUState *cs;
1406 S390CPU *cpu;
1407
1408 for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
1409 cpu = S390_CPU(cs);
1410 if (cpu->env.cpu_num == monitor_get_cpu_index()) {
1411 if (s390_cpu_restart(S390_CPU(cs)) == -1) {
1412 error_set(errp, QERR_UNSUPPORTED);
1413 return;
1414 }
1415 break;
1416 }
1417 }
ab49ab5c
LC
1418#else
1419 error_set(errp, QERR_UNSUPPORTED);
1420#endif
1421}