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b4608c04 FB |
1 | /* |
2 | * gdb server stub | |
5fafdf24 | 3 | * |
3475187d | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
b4608c04 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
978efd6a | 20 | #include "config.h" |
1fddef4b FB |
21 | #ifdef CONFIG_USER_ONLY |
22 | #include <stdlib.h> | |
23 | #include <stdio.h> | |
24 | #include <stdarg.h> | |
25 | #include <string.h> | |
26 | #include <errno.h> | |
27 | #include <unistd.h> | |
978efd6a | 28 | #include <fcntl.h> |
1fddef4b FB |
29 | |
30 | #include "qemu.h" | |
31 | #else | |
87ecb68b PB |
32 | #include "qemu-common.h" |
33 | #include "qemu-char.h" | |
34 | #include "sysemu.h" | |
35 | #include "gdbstub.h" | |
1fddef4b | 36 | #endif |
67b915a5 | 37 | |
8f447cc7 FB |
38 | #include "qemu_socket.h" |
39 | #ifdef _WIN32 | |
40 | /* XXX: these constants may be independent of the host ones even for Unix */ | |
41 | #ifndef SIGTRAP | |
42 | #define SIGTRAP 5 | |
43 | #endif | |
44 | #ifndef SIGINT | |
45 | #define SIGINT 2 | |
46 | #endif | |
47 | #else | |
b4608c04 | 48 | #include <signal.h> |
8f447cc7 | 49 | #endif |
b4608c04 | 50 | |
4abe615b | 51 | //#define DEBUG_GDB |
b4608c04 | 52 | |
858693c6 FB |
53 | enum RSState { |
54 | RS_IDLE, | |
55 | RS_GETLINE, | |
56 | RS_CHKSUM1, | |
57 | RS_CHKSUM2, | |
a2d1ebaf | 58 | RS_SYSCALL, |
858693c6 | 59 | }; |
858693c6 | 60 | typedef struct GDBState { |
6a00d601 | 61 | CPUState *env; /* current CPU */ |
41625033 | 62 | enum RSState state; /* parsing state */ |
858693c6 FB |
63 | char line_buf[4096]; |
64 | int line_buf_index; | |
65 | int line_csum; | |
60fe76f3 | 66 | uint8_t last_packet[4100]; |
4046d913 | 67 | int last_packet_len; |
41625033 | 68 | #ifdef CONFIG_USER_ONLY |
4046d913 | 69 | int fd; |
41625033 | 70 | int running_state; |
4046d913 PB |
71 | #else |
72 | CharDriverState *chr; | |
41625033 | 73 | #endif |
858693c6 | 74 | } GDBState; |
b4608c04 | 75 | |
60897d36 EI |
76 | /* By default use no IRQs and no timers while single stepping so as to |
77 | * make single stepping like an ICE HW step. | |
78 | */ | |
79 | static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; | |
80 | ||
1fddef4b | 81 | #ifdef CONFIG_USER_ONLY |
4046d913 PB |
82 | /* XXX: This is not thread safe. Do we care? */ |
83 | static int gdbserver_fd = -1; | |
84 | ||
1fddef4b FB |
85 | /* XXX: remove this hack. */ |
86 | static GDBState gdbserver_state; | |
1fddef4b | 87 | |
858693c6 | 88 | static int get_char(GDBState *s) |
b4608c04 FB |
89 | { |
90 | uint8_t ch; | |
91 | int ret; | |
92 | ||
93 | for(;;) { | |
8f447cc7 | 94 | ret = recv(s->fd, &ch, 1, 0); |
b4608c04 FB |
95 | if (ret < 0) { |
96 | if (errno != EINTR && errno != EAGAIN) | |
97 | return -1; | |
98 | } else if (ret == 0) { | |
99 | return -1; | |
100 | } else { | |
101 | break; | |
102 | } | |
103 | } | |
104 | return ch; | |
105 | } | |
4046d913 | 106 | #endif |
b4608c04 | 107 | |
a2d1ebaf PB |
108 | /* GDB stub state for use by semihosting syscalls. */ |
109 | static GDBState *gdb_syscall_state; | |
110 | static gdb_syscall_complete_cb gdb_current_syscall_cb; | |
111 | ||
112 | enum { | |
113 | GDB_SYS_UNKNOWN, | |
114 | GDB_SYS_ENABLED, | |
115 | GDB_SYS_DISABLED, | |
116 | } gdb_syscall_mode; | |
117 | ||
118 | /* If gdb is connected when the first semihosting syscall occurs then use | |
119 | remote gdb syscalls. Otherwise use native file IO. */ | |
120 | int use_gdb_syscalls(void) | |
121 | { | |
122 | if (gdb_syscall_mode == GDB_SYS_UNKNOWN) { | |
123 | gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED | |
124 | : GDB_SYS_DISABLED); | |
125 | } | |
126 | return gdb_syscall_mode == GDB_SYS_ENABLED; | |
127 | } | |
128 | ||
ba70a624 EI |
129 | /* Resume execution. */ |
130 | static inline void gdb_continue(GDBState *s) | |
131 | { | |
132 | #ifdef CONFIG_USER_ONLY | |
133 | s->running_state = 1; | |
134 | #else | |
135 | vm_start(); | |
136 | #endif | |
137 | } | |
138 | ||
858693c6 | 139 | static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
b4608c04 | 140 | { |
4046d913 | 141 | #ifdef CONFIG_USER_ONLY |
b4608c04 FB |
142 | int ret; |
143 | ||
144 | while (len > 0) { | |
8f447cc7 | 145 | ret = send(s->fd, buf, len, 0); |
b4608c04 FB |
146 | if (ret < 0) { |
147 | if (errno != EINTR && errno != EAGAIN) | |
148 | return; | |
149 | } else { | |
150 | buf += ret; | |
151 | len -= ret; | |
152 | } | |
153 | } | |
4046d913 PB |
154 | #else |
155 | qemu_chr_write(s->chr, buf, len); | |
156 | #endif | |
b4608c04 FB |
157 | } |
158 | ||
159 | static inline int fromhex(int v) | |
160 | { | |
161 | if (v >= '0' && v <= '9') | |
162 | return v - '0'; | |
163 | else if (v >= 'A' && v <= 'F') | |
164 | return v - 'A' + 10; | |
165 | else if (v >= 'a' && v <= 'f') | |
166 | return v - 'a' + 10; | |
167 | else | |
168 | return 0; | |
169 | } | |
170 | ||
171 | static inline int tohex(int v) | |
172 | { | |
173 | if (v < 10) | |
174 | return v + '0'; | |
175 | else | |
176 | return v - 10 + 'a'; | |
177 | } | |
178 | ||
179 | static void memtohex(char *buf, const uint8_t *mem, int len) | |
180 | { | |
181 | int i, c; | |
182 | char *q; | |
183 | q = buf; | |
184 | for(i = 0; i < len; i++) { | |
185 | c = mem[i]; | |
186 | *q++ = tohex(c >> 4); | |
187 | *q++ = tohex(c & 0xf); | |
188 | } | |
189 | *q = '\0'; | |
190 | } | |
191 | ||
192 | static void hextomem(uint8_t *mem, const char *buf, int len) | |
193 | { | |
194 | int i; | |
195 | ||
196 | for(i = 0; i < len; i++) { | |
197 | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); | |
198 | buf += 2; | |
199 | } | |
200 | } | |
201 | ||
b4608c04 | 202 | /* return -1 if error, 0 if OK */ |
858693c6 | 203 | static int put_packet(GDBState *s, char *buf) |
b4608c04 | 204 | { |
4046d913 | 205 | int len, csum, i; |
60fe76f3 | 206 | uint8_t *p; |
b4608c04 FB |
207 | |
208 | #ifdef DEBUG_GDB | |
209 | printf("reply='%s'\n", buf); | |
210 | #endif | |
211 | ||
212 | for(;;) { | |
4046d913 PB |
213 | p = s->last_packet; |
214 | *(p++) = '$'; | |
b4608c04 | 215 | len = strlen(buf); |
4046d913 PB |
216 | memcpy(p, buf, len); |
217 | p += len; | |
b4608c04 FB |
218 | csum = 0; |
219 | for(i = 0; i < len; i++) { | |
220 | csum += buf[i]; | |
221 | } | |
4046d913 PB |
222 | *(p++) = '#'; |
223 | *(p++) = tohex((csum >> 4) & 0xf); | |
224 | *(p++) = tohex((csum) & 0xf); | |
b4608c04 | 225 | |
4046d913 | 226 | s->last_packet_len = p - s->last_packet; |
ffe8ab83 | 227 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
b4608c04 | 228 | |
4046d913 PB |
229 | #ifdef CONFIG_USER_ONLY |
230 | i = get_char(s); | |
231 | if (i < 0) | |
b4608c04 | 232 | return -1; |
4046d913 | 233 | if (i == '+') |
b4608c04 | 234 | break; |
4046d913 PB |
235 | #else |
236 | break; | |
237 | #endif | |
b4608c04 FB |
238 | } |
239 | return 0; | |
240 | } | |
241 | ||
fde3fd61 | 242 | #if defined(TARGET_I386) |
79808573 FB |
243 | |
244 | #ifdef TARGET_X86_64 | |
245 | static const uint8_t gdb_x86_64_regs[16] = { | |
246 | R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, | |
247 | 8, 9, 10, 11, 12, 13, 14, 15, | |
248 | }; | |
249 | #endif | |
250 | ||
6da41eaf FB |
251 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
252 | { | |
79808573 FB |
253 | int i, fpus, nb_regs; |
254 | uint8_t *p; | |
5ad265ee | 255 | |
79808573 | 256 | p = mem_buf; |
5ad265ee | 257 | #ifdef TARGET_X86_64 |
5ad265ee | 258 | if (env->hflags & HF_CS64_MASK) { |
79808573 FB |
259 | nb_regs = 16; |
260 | for(i = 0; i < 16; i++) { | |
261 | *(uint64_t *)p = tswap64(env->regs[gdb_x86_64_regs[i]]); | |
262 | p += 8; | |
5ad265ee | 263 | } |
79808573 FB |
264 | *(uint64_t *)p = tswap64(env->eip); |
265 | p += 8; | |
266 | } else | |
267 | #endif | |
268 | { | |
269 | nb_regs = 8; | |
5ad265ee | 270 | for(i = 0; i < 8; i++) { |
79808573 FB |
271 | *(uint32_t *)p = tswap32(env->regs[i]); |
272 | p += 4; | |
5ad265ee | 273 | } |
79808573 FB |
274 | *(uint32_t *)p = tswap32(env->eip); |
275 | p += 4; | |
5ad265ee | 276 | } |
6da41eaf | 277 | |
79808573 FB |
278 | *(uint32_t *)p = tswap32(env->eflags); |
279 | p += 4; | |
280 | *(uint32_t *)p = tswap32(env->segs[R_CS].selector); | |
281 | p += 4; | |
282 | *(uint32_t *)p = tswap32(env->segs[R_SS].selector); | |
283 | p += 4; | |
284 | *(uint32_t *)p = tswap32(env->segs[R_DS].selector); | |
285 | p += 4; | |
286 | *(uint32_t *)p = tswap32(env->segs[R_ES].selector); | |
287 | p += 4; | |
288 | *(uint32_t *)p = tswap32(env->segs[R_FS].selector); | |
289 | p += 4; | |
290 | *(uint32_t *)p = tswap32(env->segs[R_GS].selector); | |
291 | p += 4; | |
6da41eaf | 292 | for(i = 0; i < 8; i++) { |
79808573 FB |
293 | /* XXX: convert floats */ |
294 | #ifdef USE_X86LDOUBLE | |
295 | memcpy(p, &env->fpregs[i], 10); | |
296 | #else | |
297 | memset(p, 0, 10); | |
298 | #endif | |
299 | p += 10; | |
6da41eaf | 300 | } |
79808573 FB |
301 | *(uint32_t *)p = tswap32(env->fpuc); /* fctrl */ |
302 | p += 4; | |
6da41eaf | 303 | fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
79808573 FB |
304 | *(uint32_t *)p = tswap32(fpus); /* fstat */ |
305 | p += 4; | |
306 | *(uint32_t *)p = 0; /* ftag */ | |
307 | p += 4; | |
308 | *(uint32_t *)p = 0; /* fiseg */ | |
309 | p += 4; | |
310 | *(uint32_t *)p = 0; /* fioff */ | |
311 | p += 4; | |
312 | *(uint32_t *)p = 0; /* foseg */ | |
313 | p += 4; | |
314 | *(uint32_t *)p = 0; /* fooff */ | |
315 | p += 4; | |
316 | *(uint32_t *)p = 0; /* fop */ | |
317 | p += 4; | |
318 | for(i = 0; i < nb_regs; i++) { | |
319 | *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(0)); | |
320 | p += 8; | |
321 | *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(1)); | |
322 | p += 8; | |
323 | } | |
324 | *(uint32_t *)p = tswap32(env->mxcsr); | |
325 | p += 4; | |
326 | return p - mem_buf; | |
327 | } | |
328 | ||
329 | static inline void cpu_gdb_load_seg(CPUState *env, const uint8_t **pp, | |
330 | int sreg) | |
331 | { | |
332 | const uint8_t *p; | |
333 | uint32_t sel; | |
334 | p = *pp; | |
335 | sel = tswap32(*(uint32_t *)p); | |
336 | p += 4; | |
337 | if (sel != env->segs[sreg].selector) { | |
338 | #if defined(CONFIG_USER_ONLY) | |
339 | cpu_x86_load_seg(env, sreg, sel); | |
340 | #else | |
341 | /* XXX: do it with a debug function which does not raise an | |
342 | exception */ | |
343 | #endif | |
344 | } | |
345 | *pp = p; | |
6da41eaf FB |
346 | } |
347 | ||
348 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
349 | { | |
79808573 FB |
350 | const uint8_t *p = mem_buf; |
351 | int i, nb_regs; | |
352 | uint16_t fpus; | |
6da41eaf | 353 | |
79808573 FB |
354 | #ifdef TARGET_X86_64 |
355 | if (env->hflags & HF_CS64_MASK) { | |
356 | nb_regs = 16; | |
357 | for(i = 0; i < 16; i++) { | |
358 | env->regs[gdb_x86_64_regs[i]] = tswap64(*(uint64_t *)p); | |
359 | p += 8; | |
360 | } | |
361 | env->eip = tswap64(*(uint64_t *)p); | |
362 | p += 8; | |
363 | } else | |
364 | #endif | |
365 | { | |
366 | nb_regs = 8; | |
367 | for(i = 0; i < 8; i++) { | |
368 | env->regs[i] = tswap32(*(uint32_t *)p); | |
369 | p += 4; | |
370 | } | |
371 | env->eip = tswap32(*(uint32_t *)p); | |
372 | p += 4; | |
6da41eaf | 373 | } |
79808573 FB |
374 | env->eflags = tswap32(*(uint32_t *)p); |
375 | p += 4; | |
376 | cpu_gdb_load_seg(env, &p, R_CS); | |
377 | cpu_gdb_load_seg(env, &p, R_SS); | |
378 | cpu_gdb_load_seg(env, &p, R_DS); | |
379 | cpu_gdb_load_seg(env, &p, R_ES); | |
380 | cpu_gdb_load_seg(env, &p, R_FS); | |
381 | cpu_gdb_load_seg(env, &p, R_GS); | |
382 | ||
383 | /* FPU state */ | |
384 | for(i = 0; i < 8; i++) { | |
385 | /* XXX: convert floats */ | |
386 | #ifdef USE_X86LDOUBLE | |
387 | memcpy(&env->fpregs[i], p, 10); | |
6da41eaf | 388 | #endif |
79808573 FB |
389 | p += 10; |
390 | } | |
391 | env->fpuc = tswap32(*(uint32_t *)p); /* fctrl */ | |
392 | p += 4; | |
393 | fpus = tswap32(*(uint32_t *)p); | |
394 | p += 4; | |
395 | env->fpstt = (fpus >> 11) & 7; | |
396 | env->fpus = fpus & ~0x3800; | |
397 | p += 4 * 6; | |
398 | ||
399 | if (size >= ((p - mem_buf) + 16 * nb_regs + 4)) { | |
400 | /* SSE state */ | |
401 | for(i = 0; i < nb_regs; i++) { | |
402 | env->xmm_regs[i].XMM_Q(0) = tswap64(*(uint64_t *)p); | |
403 | p += 8; | |
404 | env->xmm_regs[i].XMM_Q(1) = tswap64(*(uint64_t *)p); | |
405 | p += 8; | |
406 | } | |
407 | env->mxcsr = tswap32(*(uint32_t *)p); | |
408 | p += 4; | |
409 | } | |
6da41eaf FB |
410 | } |
411 | ||
9e62fd7f | 412 | #elif defined (TARGET_PPC) |
9e62fd7f FB |
413 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
414 | { | |
a541f297 | 415 | uint32_t *registers = (uint32_t *)mem_buf, tmp; |
9e62fd7f FB |
416 | int i; |
417 | ||
418 | /* fill in gprs */ | |
a541f297 | 419 | for(i = 0; i < 32; i++) { |
e95c8d51 | 420 | registers[i] = tswapl(env->gpr[i]); |
9e62fd7f FB |
421 | } |
422 | /* fill in fprs */ | |
423 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
424 | registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i])); |
425 | registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1)); | |
9e62fd7f FB |
426 | } |
427 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 428 | registers[96] = tswapl(env->nip); |
0411a972 | 429 | registers[97] = tswapl(env->msr); |
9e62fd7f FB |
430 | tmp = 0; |
431 | for (i = 0; i < 8; i++) | |
a541f297 | 432 | tmp |= env->crf[i] << (32 - ((i + 1) * 4)); |
e95c8d51 FB |
433 | registers[98] = tswapl(tmp); |
434 | registers[99] = tswapl(env->lr); | |
435 | registers[100] = tswapl(env->ctr); | |
76a66253 | 436 | registers[101] = tswapl(ppc_load_xer(env)); |
e95c8d51 | 437 | registers[102] = 0; |
a541f297 FB |
438 | |
439 | return 103 * 4; | |
9e62fd7f FB |
440 | } |
441 | ||
442 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
443 | { | |
444 | uint32_t *registers = (uint32_t *)mem_buf; | |
445 | int i; | |
446 | ||
447 | /* fill in gprs */ | |
448 | for (i = 0; i < 32; i++) { | |
e95c8d51 | 449 | env->gpr[i] = tswapl(registers[i]); |
9e62fd7f FB |
450 | } |
451 | /* fill in fprs */ | |
452 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
453 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]); |
454 | *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]); | |
9e62fd7f FB |
455 | } |
456 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 457 | env->nip = tswapl(registers[96]); |
0411a972 | 458 | ppc_store_msr(env, tswapl(registers[97])); |
e95c8d51 | 459 | registers[98] = tswapl(registers[98]); |
9e62fd7f | 460 | for (i = 0; i < 8; i++) |
a541f297 | 461 | env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF; |
e95c8d51 FB |
462 | env->lr = tswapl(registers[99]); |
463 | env->ctr = tswapl(registers[100]); | |
76a66253 | 464 | ppc_store_xer(env, tswapl(registers[101])); |
e95c8d51 FB |
465 | } |
466 | #elif defined (TARGET_SPARC) | |
467 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
468 | { | |
3475187d | 469 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
470 | int i; |
471 | ||
472 | /* fill in g0..g7 */ | |
48b2c193 | 473 | for(i = 0; i < 8; i++) { |
e95c8d51 FB |
474 | registers[i] = tswapl(env->gregs[i]); |
475 | } | |
476 | /* fill in register window */ | |
477 | for(i = 0; i < 24; i++) { | |
478 | registers[i + 8] = tswapl(env->regwptr[i]); | |
479 | } | |
9d9754a3 | 480 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
481 | /* fill in fprs */ |
482 | for (i = 0; i < 32; i++) { | |
483 | registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i])); | |
484 | } | |
485 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
486 | registers[64] = tswapl(env->y); | |
3475187d FB |
487 | { |
488 | target_ulong tmp; | |
489 | ||
490 | tmp = GET_PSR(env); | |
491 | registers[65] = tswapl(tmp); | |
492 | } | |
e95c8d51 FB |
493 | registers[66] = tswapl(env->wim); |
494 | registers[67] = tswapl(env->tbr); | |
495 | registers[68] = tswapl(env->pc); | |
496 | registers[69] = tswapl(env->npc); | |
497 | registers[70] = tswapl(env->fsr); | |
498 | registers[71] = 0; /* csr */ | |
499 | registers[72] = 0; | |
3475187d FB |
500 | return 73 * sizeof(target_ulong); |
501 | #else | |
9d9754a3 FB |
502 | /* fill in fprs */ |
503 | for (i = 0; i < 64; i += 2) { | |
504 | uint64_t tmp; | |
505 | ||
8979596d BS |
506 | tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32; |
507 | tmp |= *(uint32_t *)&env->fpr[i + 1]; | |
508 | registers[i / 2 + 32] = tswap64(tmp); | |
3475187d | 509 | } |
9d9754a3 FB |
510 | registers[64] = tswapl(env->pc); |
511 | registers[65] = tswapl(env->npc); | |
17d996e1 BS |
512 | registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) | |
513 | ((env->asi & 0xff) << 24) | | |
514 | ((env->pstate & 0xfff) << 8) | | |
515 | GET_CWP64(env)); | |
9d9754a3 FB |
516 | registers[67] = tswapl(env->fsr); |
517 | registers[68] = tswapl(env->fprs); | |
518 | registers[69] = tswapl(env->y); | |
519 | return 70 * sizeof(target_ulong); | |
3475187d | 520 | #endif |
e95c8d51 FB |
521 | } |
522 | ||
523 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
524 | { | |
3475187d | 525 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
526 | int i; |
527 | ||
528 | /* fill in g0..g7 */ | |
529 | for(i = 0; i < 7; i++) { | |
530 | env->gregs[i] = tswapl(registers[i]); | |
531 | } | |
532 | /* fill in register window */ | |
533 | for(i = 0; i < 24; i++) { | |
3475187d | 534 | env->regwptr[i] = tswapl(registers[i + 8]); |
e95c8d51 | 535 | } |
9d9754a3 | 536 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
537 | /* fill in fprs */ |
538 | for (i = 0; i < 32; i++) { | |
539 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]); | |
540 | } | |
541 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
542 | env->y = tswapl(registers[64]); | |
e80cfcfc | 543 | PUT_PSR(env, tswapl(registers[65])); |
e95c8d51 FB |
544 | env->wim = tswapl(registers[66]); |
545 | env->tbr = tswapl(registers[67]); | |
546 | env->pc = tswapl(registers[68]); | |
547 | env->npc = tswapl(registers[69]); | |
548 | env->fsr = tswapl(registers[70]); | |
3475187d | 549 | #else |
9d9754a3 | 550 | for (i = 0; i < 64; i += 2) { |
8979596d BS |
551 | uint64_t tmp; |
552 | ||
553 | tmp = tswap64(registers[i / 2 + 32]); | |
554 | *((uint32_t *)&env->fpr[i]) = tmp >> 32; | |
555 | *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff; | |
3475187d | 556 | } |
9d9754a3 FB |
557 | env->pc = tswapl(registers[64]); |
558 | env->npc = tswapl(registers[65]); | |
17d996e1 BS |
559 | { |
560 | uint64_t tmp = tswapl(registers[66]); | |
561 | ||
562 | PUT_CCR(env, tmp >> 32); | |
563 | env->asi = (tmp >> 24) & 0xff; | |
564 | env->pstate = (tmp >> 8) & 0xfff; | |
565 | PUT_CWP64(env, tmp & 0xff); | |
566 | } | |
9d9754a3 FB |
567 | env->fsr = tswapl(registers[67]); |
568 | env->fprs = tswapl(registers[68]); | |
569 | env->y = tswapl(registers[69]); | |
3475187d | 570 | #endif |
9e62fd7f | 571 | } |
1fddef4b FB |
572 | #elif defined (TARGET_ARM) |
573 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
574 | { | |
575 | int i; | |
576 | uint8_t *ptr; | |
577 | ||
578 | ptr = mem_buf; | |
579 | /* 16 core integer registers (4 bytes each). */ | |
580 | for (i = 0; i < 16; i++) | |
581 | { | |
582 | *(uint32_t *)ptr = tswapl(env->regs[i]); | |
583 | ptr += 4; | |
584 | } | |
585 | /* 8 FPA registers (12 bytes each), FPS (4 bytes). | |
586 | Not yet implemented. */ | |
587 | memset (ptr, 0, 8 * 12 + 4); | |
588 | ptr += 8 * 12 + 4; | |
589 | /* CPSR (4 bytes). */ | |
b5ff1b31 | 590 | *(uint32_t *)ptr = tswapl (cpsr_read(env)); |
1fddef4b FB |
591 | ptr += 4; |
592 | ||
593 | return ptr - mem_buf; | |
594 | } | |
6da41eaf | 595 | |
1fddef4b FB |
596 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
597 | { | |
598 | int i; | |
599 | uint8_t *ptr; | |
600 | ||
601 | ptr = mem_buf; | |
602 | /* Core integer registers. */ | |
603 | for (i = 0; i < 16; i++) | |
604 | { | |
605 | env->regs[i] = tswapl(*(uint32_t *)ptr); | |
606 | ptr += 4; | |
607 | } | |
608 | /* Ignore FPA regs and scr. */ | |
609 | ptr += 8 * 12 + 4; | |
b5ff1b31 | 610 | cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff); |
1fddef4b | 611 | } |
e6e5906b PB |
612 | #elif defined (TARGET_M68K) |
613 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
614 | { | |
615 | int i; | |
616 | uint8_t *ptr; | |
617 | CPU_DoubleU u; | |
618 | ||
619 | ptr = mem_buf; | |
620 | /* D0-D7 */ | |
621 | for (i = 0; i < 8; i++) { | |
622 | *(uint32_t *)ptr = tswapl(env->dregs[i]); | |
623 | ptr += 4; | |
624 | } | |
625 | /* A0-A7 */ | |
626 | for (i = 0; i < 8; i++) { | |
627 | *(uint32_t *)ptr = tswapl(env->aregs[i]); | |
628 | ptr += 4; | |
629 | } | |
630 | *(uint32_t *)ptr = tswapl(env->sr); | |
631 | ptr += 4; | |
632 | *(uint32_t *)ptr = tswapl(env->pc); | |
633 | ptr += 4; | |
634 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
635 | ColdFire has 8-bit double precision registers. */ | |
636 | for (i = 0; i < 8; i++) { | |
637 | u.d = env->fregs[i]; | |
638 | *(uint32_t *)ptr = tswap32(u.l.upper); | |
639 | *(uint32_t *)ptr = tswap32(u.l.lower); | |
640 | } | |
641 | /* FP control regs (not implemented). */ | |
642 | memset (ptr, 0, 3 * 4); | |
643 | ptr += 3 * 4; | |
644 | ||
645 | return ptr - mem_buf; | |
646 | } | |
647 | ||
648 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
649 | { | |
650 | int i; | |
651 | uint8_t *ptr; | |
652 | CPU_DoubleU u; | |
653 | ||
654 | ptr = mem_buf; | |
655 | /* D0-D7 */ | |
656 | for (i = 0; i < 8; i++) { | |
657 | env->dregs[i] = tswapl(*(uint32_t *)ptr); | |
658 | ptr += 4; | |
659 | } | |
660 | /* A0-A7 */ | |
661 | for (i = 0; i < 8; i++) { | |
662 | env->aregs[i] = tswapl(*(uint32_t *)ptr); | |
663 | ptr += 4; | |
664 | } | |
665 | env->sr = tswapl(*(uint32_t *)ptr); | |
666 | ptr += 4; | |
667 | env->pc = tswapl(*(uint32_t *)ptr); | |
668 | ptr += 4; | |
669 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
670 | ColdFire has 8-bit double precision registers. */ | |
671 | for (i = 0; i < 8; i++) { | |
5fafdf24 | 672 | u.l.upper = tswap32(*(uint32_t *)ptr); |
e6e5906b PB |
673 | u.l.lower = tswap32(*(uint32_t *)ptr); |
674 | env->fregs[i] = u.d; | |
675 | } | |
676 | /* FP control regs (not implemented). */ | |
677 | ptr += 3 * 4; | |
678 | } | |
6f970bd9 FB |
679 | #elif defined (TARGET_MIPS) |
680 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
681 | { | |
682 | int i; | |
683 | uint8_t *ptr; | |
684 | ||
685 | ptr = mem_buf; | |
686 | for (i = 0; i < 32; i++) | |
687 | { | |
d0dc7dc3 | 688 | *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]); |
2052caa7 | 689 | ptr += sizeof(target_ulong); |
6f970bd9 FB |
690 | } |
691 | ||
7ac256b8 | 692 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status); |
2052caa7 | 693 | ptr += sizeof(target_ulong); |
6f970bd9 | 694 | |
d0dc7dc3 | 695 | *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]); |
2052caa7 | 696 | ptr += sizeof(target_ulong); |
6f970bd9 | 697 | |
d0dc7dc3 | 698 | *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]); |
2052caa7 | 699 | ptr += sizeof(target_ulong); |
6f970bd9 | 700 | |
2052caa7 TS |
701 | *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr); |
702 | ptr += sizeof(target_ulong); | |
6f970bd9 | 703 | |
7ac256b8 | 704 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause); |
2052caa7 | 705 | ptr += sizeof(target_ulong); |
6f970bd9 | 706 | |
ead9360e | 707 | *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]); |
2052caa7 | 708 | ptr += sizeof(target_ulong); |
6f970bd9 | 709 | |
36d23958 | 710 | if (env->CP0_Config1 & (1 << CP0C1_FP)) |
8e33c08c | 711 | { |
36d23958 TS |
712 | for (i = 0; i < 32; i++) |
713 | { | |
7ac256b8 TS |
714 | if (env->CP0_Status & (1 << CP0St_FR)) |
715 | *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d); | |
716 | else | |
717 | *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]); | |
2052caa7 | 718 | ptr += sizeof(target_ulong); |
36d23958 | 719 | } |
8e33c08c | 720 | |
7ac256b8 | 721 | *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31); |
2052caa7 | 722 | ptr += sizeof(target_ulong); |
8e33c08c | 723 | |
7ac256b8 | 724 | *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0); |
2052caa7 | 725 | ptr += sizeof(target_ulong); |
36d23958 | 726 | } |
8e33c08c | 727 | |
7ac256b8 TS |
728 | /* "fp", pseudo frame pointer. Not yet implemented in gdb. */ |
729 | *(target_ulong *)ptr = 0; | |
730 | ptr += sizeof(target_ulong); | |
731 | ||
732 | /* Registers for embedded use, we just pad them. */ | |
733 | for (i = 0; i < 16; i++) | |
734 | { | |
735 | *(target_ulong *)ptr = 0; | |
736 | ptr += sizeof(target_ulong); | |
737 | } | |
738 | ||
739 | /* Processor ID. */ | |
740 | *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid); | |
741 | ptr += sizeof(target_ulong); | |
6f970bd9 FB |
742 | |
743 | return ptr - mem_buf; | |
744 | } | |
745 | ||
8e33c08c TS |
746 | /* convert MIPS rounding mode in FCR31 to IEEE library */ |
747 | static unsigned int ieee_rm[] = | |
748 | { | |
749 | float_round_nearest_even, | |
750 | float_round_to_zero, | |
751 | float_round_up, | |
752 | float_round_down | |
753 | }; | |
754 | #define RESTORE_ROUNDING_MODE \ | |
ead9360e | 755 | set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status) |
8e33c08c | 756 | |
6f970bd9 FB |
757 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
758 | { | |
759 | int i; | |
760 | uint8_t *ptr; | |
761 | ||
762 | ptr = mem_buf; | |
763 | for (i = 0; i < 32; i++) | |
764 | { | |
d0dc7dc3 | 765 | env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 766 | ptr += sizeof(target_ulong); |
6f970bd9 FB |
767 | } |
768 | ||
2052caa7 TS |
769 | env->CP0_Status = tswapl(*(target_ulong *)ptr); |
770 | ptr += sizeof(target_ulong); | |
6f970bd9 | 771 | |
d0dc7dc3 | 772 | env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 773 | ptr += sizeof(target_ulong); |
6f970bd9 | 774 | |
d0dc7dc3 | 775 | env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 776 | ptr += sizeof(target_ulong); |
6f970bd9 | 777 | |
2052caa7 TS |
778 | env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr); |
779 | ptr += sizeof(target_ulong); | |
6f970bd9 | 780 | |
2052caa7 TS |
781 | env->CP0_Cause = tswapl(*(target_ulong *)ptr); |
782 | ptr += sizeof(target_ulong); | |
6f970bd9 | 783 | |
ead9360e | 784 | env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr); |
2052caa7 | 785 | ptr += sizeof(target_ulong); |
8e33c08c | 786 | |
36d23958 | 787 | if (env->CP0_Config1 & (1 << CP0C1_FP)) |
8e33c08c | 788 | { |
36d23958 TS |
789 | for (i = 0; i < 32; i++) |
790 | { | |
7ac256b8 TS |
791 | if (env->CP0_Status & (1 << CP0St_FR)) |
792 | env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr); | |
793 | else | |
794 | env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr); | |
2052caa7 | 795 | ptr += sizeof(target_ulong); |
36d23958 | 796 | } |
8e33c08c | 797 | |
7ac256b8 | 798 | env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF; |
2052caa7 | 799 | ptr += sizeof(target_ulong); |
8e33c08c | 800 | |
7ac256b8 | 801 | /* The remaining registers are assumed to be read-only. */ |
8e33c08c | 802 | |
36d23958 TS |
803 | /* set rounding mode */ |
804 | RESTORE_ROUNDING_MODE; | |
8e33c08c TS |
805 | |
806 | #ifndef CONFIG_SOFTFLOAT | |
36d23958 TS |
807 | /* no floating point exception for native float */ |
808 | SET_FP_ENABLE(env->fcr31, 0); | |
8e33c08c | 809 | #endif |
36d23958 | 810 | } |
6f970bd9 | 811 | } |
fdf9b3e8 | 812 | #elif defined (TARGET_SH4) |
6ef99fc5 TS |
813 | |
814 | /* Hint: Use "set architecture sh4" in GDB to see fpu registers */ | |
815 | ||
fdf9b3e8 FB |
816 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
817 | { | |
818 | uint32_t *ptr = (uint32_t *)mem_buf; | |
819 | int i; | |
820 | ||
821 | #define SAVE(x) *ptr++=tswapl(x) | |
9c2a9ea1 PB |
822 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
823 | for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); | |
824 | } else { | |
825 | for (i = 0; i < 8; i++) SAVE(env->gregs[i]); | |
826 | } | |
827 | for (i = 8; i < 16; i++) SAVE(env->gregs[i]); | |
fdf9b3e8 FB |
828 | SAVE (env->pc); |
829 | SAVE (env->pr); | |
830 | SAVE (env->gbr); | |
831 | SAVE (env->vbr); | |
832 | SAVE (env->mach); | |
833 | SAVE (env->macl); | |
834 | SAVE (env->sr); | |
6ef99fc5 TS |
835 | SAVE (env->fpul); |
836 | SAVE (env->fpscr); | |
837 | for (i = 0; i < 16; i++) | |
838 | SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); | |
839 | SAVE (env->ssr); | |
840 | SAVE (env->spc); | |
841 | for (i = 0; i < 8; i++) SAVE(env->gregs[i]); | |
842 | for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); | |
fdf9b3e8 FB |
843 | return ((uint8_t *)ptr - mem_buf); |
844 | } | |
845 | ||
846 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
847 | { | |
848 | uint32_t *ptr = (uint32_t *)mem_buf; | |
849 | int i; | |
850 | ||
851 | #define LOAD(x) (x)=*ptr++; | |
9c2a9ea1 PB |
852 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
853 | for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); | |
854 | } else { | |
855 | for (i = 0; i < 8; i++) LOAD(env->gregs[i]); | |
856 | } | |
857 | for (i = 8; i < 16; i++) LOAD(env->gregs[i]); | |
fdf9b3e8 FB |
858 | LOAD (env->pc); |
859 | LOAD (env->pr); | |
860 | LOAD (env->gbr); | |
861 | LOAD (env->vbr); | |
862 | LOAD (env->mach); | |
863 | LOAD (env->macl); | |
864 | LOAD (env->sr); | |
6ef99fc5 TS |
865 | LOAD (env->fpul); |
866 | LOAD (env->fpscr); | |
867 | for (i = 0; i < 16; i++) | |
868 | LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); | |
869 | LOAD (env->ssr); | |
870 | LOAD (env->spc); | |
871 | for (i = 0; i < 8; i++) LOAD(env->gregs[i]); | |
872 | for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); | |
fdf9b3e8 | 873 | } |
f1ccf904 TS |
874 | #elif defined (TARGET_CRIS) |
875 | ||
876 | static int cris_save_32 (unsigned char *d, uint32_t value) | |
877 | { | |
878 | *d++ = (value); | |
879 | *d++ = (value >>= 8); | |
880 | *d++ = (value >>= 8); | |
881 | *d++ = (value >>= 8); | |
882 | return 4; | |
883 | } | |
884 | static int cris_save_16 (unsigned char *d, uint32_t value) | |
885 | { | |
886 | *d++ = (value); | |
887 | *d++ = (value >>= 8); | |
888 | return 2; | |
889 | } | |
890 | static int cris_save_8 (unsigned char *d, uint32_t value) | |
891 | { | |
892 | *d++ = (value); | |
893 | return 1; | |
894 | } | |
895 | ||
896 | /* FIXME: this will bug on archs not supporting unaligned word accesses. */ | |
897 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
898 | { | |
899 | uint8_t *ptr = mem_buf; | |
900 | uint8_t srs; | |
901 | int i; | |
902 | ||
903 | for (i = 0; i < 16; i++) | |
904 | ptr += cris_save_32 (ptr, env->regs[i]); | |
905 | ||
9004627f | 906 | srs = env->pregs[PR_SRS]; |
f1ccf904 TS |
907 | |
908 | ptr += cris_save_8 (ptr, env->pregs[0]); | |
909 | ptr += cris_save_8 (ptr, env->pregs[1]); | |
910 | ptr += cris_save_32 (ptr, env->pregs[2]); | |
911 | ptr += cris_save_8 (ptr, srs); | |
912 | ptr += cris_save_16 (ptr, env->pregs[4]); | |
913 | ||
914 | for (i = 5; i < 16; i++) | |
915 | ptr += cris_save_32 (ptr, env->pregs[i]); | |
916 | ||
917 | ptr += cris_save_32 (ptr, env->pc); | |
918 | ||
919 | for (i = 0; i < 16; i++) | |
920 | ptr += cris_save_32 (ptr, env->sregs[srs][i]); | |
921 | ||
922 | return ((uint8_t *)ptr - mem_buf); | |
923 | } | |
924 | ||
925 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
926 | { | |
927 | uint32_t *ptr = (uint32_t *)mem_buf; | |
928 | int i; | |
929 | ||
930 | #define LOAD(x) (x)=*ptr++; | |
931 | for (i = 0; i < 16; i++) LOAD(env->regs[i]); | |
932 | LOAD (env->pc); | |
933 | } | |
1fddef4b | 934 | #else |
6da41eaf FB |
935 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
936 | { | |
937 | return 0; | |
938 | } | |
939 | ||
940 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
941 | { | |
942 | } | |
943 | ||
944 | #endif | |
b4608c04 | 945 | |
1fddef4b | 946 | static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) |
b4608c04 | 947 | { |
b4608c04 | 948 | const char *p; |
858693c6 | 949 | int ch, reg_size, type; |
b4608c04 | 950 | char buf[4096]; |
f1ccf904 | 951 | uint8_t mem_buf[4096]; |
b4608c04 | 952 | uint32_t *registers; |
9d9754a3 | 953 | target_ulong addr, len; |
3b46e624 | 954 | |
858693c6 FB |
955 | #ifdef DEBUG_GDB |
956 | printf("command='%s'\n", line_buf); | |
957 | #endif | |
958 | p = line_buf; | |
959 | ch = *p++; | |
960 | switch(ch) { | |
961 | case '?': | |
1fddef4b | 962 | /* TODO: Make this return the correct value for user-mode. */ |
858693c6 FB |
963 | snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); |
964 | put_packet(s, buf); | |
7d03f82f EI |
965 | /* Remove all the breakpoints when this query is issued, |
966 | * because gdb is doing and initial connect and the state | |
967 | * should be cleaned up. | |
968 | */ | |
969 | cpu_breakpoint_remove_all(env); | |
970 | cpu_watchpoint_remove_all(env); | |
858693c6 FB |
971 | break; |
972 | case 'c': | |
973 | if (*p != '\0') { | |
9d9754a3 | 974 | addr = strtoull(p, (char **)&p, 16); |
4c3a88a2 | 975 | #if defined(TARGET_I386) |
858693c6 | 976 | env->eip = addr; |
5be1a8e0 | 977 | #elif defined (TARGET_PPC) |
858693c6 | 978 | env->nip = addr; |
8d5f07fa FB |
979 | #elif defined (TARGET_SPARC) |
980 | env->pc = addr; | |
981 | env->npc = addr + 4; | |
b5ff1b31 FB |
982 | #elif defined (TARGET_ARM) |
983 | env->regs[15] = addr; | |
fdf9b3e8 | 984 | #elif defined (TARGET_SH4) |
8fac5803 TS |
985 | env->pc = addr; |
986 | #elif defined (TARGET_MIPS) | |
ead9360e | 987 | env->PC[env->current_tc] = addr; |
f1ccf904 TS |
988 | #elif defined (TARGET_CRIS) |
989 | env->pc = addr; | |
4c3a88a2 | 990 | #endif |
858693c6 | 991 | } |
ba70a624 | 992 | gdb_continue(s); |
41625033 | 993 | return RS_IDLE; |
7d03f82f EI |
994 | case 'k': |
995 | /* Kill the target */ | |
996 | fprintf(stderr, "\nQEMU: Terminated via GDBstub\n"); | |
997 | exit(0); | |
998 | case 'D': | |
999 | /* Detach packet */ | |
1000 | cpu_breakpoint_remove_all(env); | |
1001 | cpu_watchpoint_remove_all(env); | |
1002 | gdb_continue(s); | |
1003 | put_packet(s, "OK"); | |
1004 | break; | |
858693c6 FB |
1005 | case 's': |
1006 | if (*p != '\0') { | |
8fac5803 | 1007 | addr = strtoull(p, (char **)&p, 16); |
c33a346e | 1008 | #if defined(TARGET_I386) |
858693c6 | 1009 | env->eip = addr; |
5be1a8e0 | 1010 | #elif defined (TARGET_PPC) |
858693c6 | 1011 | env->nip = addr; |
8d5f07fa FB |
1012 | #elif defined (TARGET_SPARC) |
1013 | env->pc = addr; | |
1014 | env->npc = addr + 4; | |
b5ff1b31 FB |
1015 | #elif defined (TARGET_ARM) |
1016 | env->regs[15] = addr; | |
fdf9b3e8 | 1017 | #elif defined (TARGET_SH4) |
8fac5803 TS |
1018 | env->pc = addr; |
1019 | #elif defined (TARGET_MIPS) | |
ead9360e | 1020 | env->PC[env->current_tc] = addr; |
f1ccf904 TS |
1021 | #elif defined (TARGET_CRIS) |
1022 | env->pc = addr; | |
c33a346e | 1023 | #endif |
858693c6 | 1024 | } |
60897d36 | 1025 | cpu_single_step(env, sstep_flags); |
ba70a624 | 1026 | gdb_continue(s); |
41625033 | 1027 | return RS_IDLE; |
a2d1ebaf PB |
1028 | case 'F': |
1029 | { | |
1030 | target_ulong ret; | |
1031 | target_ulong err; | |
1032 | ||
1033 | ret = strtoull(p, (char **)&p, 16); | |
1034 | if (*p == ',') { | |
1035 | p++; | |
1036 | err = strtoull(p, (char **)&p, 16); | |
1037 | } else { | |
1038 | err = 0; | |
1039 | } | |
1040 | if (*p == ',') | |
1041 | p++; | |
1042 | type = *p; | |
1043 | if (gdb_current_syscall_cb) | |
1044 | gdb_current_syscall_cb(s->env, ret, err); | |
1045 | if (type == 'C') { | |
1046 | put_packet(s, "T02"); | |
1047 | } else { | |
ba70a624 | 1048 | gdb_continue(s); |
a2d1ebaf PB |
1049 | } |
1050 | } | |
1051 | break; | |
858693c6 FB |
1052 | case 'g': |
1053 | reg_size = cpu_gdb_read_registers(env, mem_buf); | |
1054 | memtohex(buf, mem_buf, reg_size); | |
1055 | put_packet(s, buf); | |
1056 | break; | |
1057 | case 'G': | |
1058 | registers = (void *)mem_buf; | |
1059 | len = strlen(p) / 2; | |
1060 | hextomem((uint8_t *)registers, p, len); | |
1061 | cpu_gdb_write_registers(env, mem_buf, len); | |
1062 | put_packet(s, "OK"); | |
1063 | break; | |
1064 | case 'm': | |
9d9754a3 | 1065 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1066 | if (*p == ',') |
1067 | p++; | |
9d9754a3 | 1068 | len = strtoull(p, NULL, 16); |
6f970bd9 FB |
1069 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { |
1070 | put_packet (s, "E14"); | |
1071 | } else { | |
1072 | memtohex(buf, mem_buf, len); | |
1073 | put_packet(s, buf); | |
1074 | } | |
858693c6 FB |
1075 | break; |
1076 | case 'M': | |
9d9754a3 | 1077 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1078 | if (*p == ',') |
1079 | p++; | |
9d9754a3 | 1080 | len = strtoull(p, (char **)&p, 16); |
b328f873 | 1081 | if (*p == ':') |
858693c6 FB |
1082 | p++; |
1083 | hextomem(mem_buf, p, len); | |
1084 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) | |
905f20b1 | 1085 | put_packet(s, "E14"); |
858693c6 FB |
1086 | else |
1087 | put_packet(s, "OK"); | |
1088 | break; | |
1089 | case 'Z': | |
1090 | type = strtoul(p, (char **)&p, 16); | |
1091 | if (*p == ',') | |
1092 | p++; | |
9d9754a3 | 1093 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1094 | if (*p == ',') |
1095 | p++; | |
9d9754a3 | 1096 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1097 | if (type == 0 || type == 1) { |
1098 | if (cpu_breakpoint_insert(env, addr) < 0) | |
1099 | goto breakpoint_error; | |
1100 | put_packet(s, "OK"); | |
6658ffb8 PB |
1101 | #ifndef CONFIG_USER_ONLY |
1102 | } else if (type == 2) { | |
1103 | if (cpu_watchpoint_insert(env, addr) < 0) | |
1104 | goto breakpoint_error; | |
1105 | put_packet(s, "OK"); | |
1106 | #endif | |
858693c6 FB |
1107 | } else { |
1108 | breakpoint_error: | |
905f20b1 | 1109 | put_packet(s, "E22"); |
858693c6 FB |
1110 | } |
1111 | break; | |
1112 | case 'z': | |
1113 | type = strtoul(p, (char **)&p, 16); | |
1114 | if (*p == ',') | |
1115 | p++; | |
9d9754a3 | 1116 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1117 | if (*p == ',') |
1118 | p++; | |
9d9754a3 | 1119 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
1120 | if (type == 0 || type == 1) { |
1121 | cpu_breakpoint_remove(env, addr); | |
1122 | put_packet(s, "OK"); | |
6658ffb8 PB |
1123 | #ifndef CONFIG_USER_ONLY |
1124 | } else if (type == 2) { | |
1125 | cpu_watchpoint_remove(env, addr); | |
1126 | put_packet(s, "OK"); | |
1127 | #endif | |
858693c6 FB |
1128 | } else { |
1129 | goto breakpoint_error; | |
1130 | } | |
1131 | break; | |
978efd6a | 1132 | case 'q': |
60897d36 EI |
1133 | case 'Q': |
1134 | /* parse any 'q' packets here */ | |
1135 | if (!strcmp(p,"qemu.sstepbits")) { | |
1136 | /* Query Breakpoint bit definitions */ | |
1137 | sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", | |
1138 | SSTEP_ENABLE, | |
1139 | SSTEP_NOIRQ, | |
1140 | SSTEP_NOTIMER); | |
1141 | put_packet(s, buf); | |
1142 | break; | |
1143 | } else if (strncmp(p,"qemu.sstep",10) == 0) { | |
1144 | /* Display or change the sstep_flags */ | |
1145 | p += 10; | |
1146 | if (*p != '=') { | |
1147 | /* Display current setting */ | |
1148 | sprintf(buf,"0x%x", sstep_flags); | |
1149 | put_packet(s, buf); | |
1150 | break; | |
1151 | } | |
1152 | p++; | |
1153 | type = strtoul(p, (char **)&p, 16); | |
1154 | sstep_flags = type; | |
1155 | put_packet(s, "OK"); | |
1156 | break; | |
1157 | } | |
1158 | #ifdef CONFIG_LINUX_USER | |
1159 | else if (strncmp(p, "Offsets", 7) == 0) { | |
978efd6a PB |
1160 | TaskState *ts = env->opaque; |
1161 | ||
fe834d04 | 1162 | sprintf(buf, |
cd041681 PB |
1163 | "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx |
1164 | ";Bss=" TARGET_ABI_FMT_lx, | |
fe834d04 TS |
1165 | ts->info->code_offset, |
1166 | ts->info->data_offset, | |
1167 | ts->info->data_offset); | |
978efd6a PB |
1168 | put_packet(s, buf); |
1169 | break; | |
1170 | } | |
978efd6a | 1171 | #endif |
60897d36 | 1172 | /* Fall through. */ |
858693c6 | 1173 | default: |
858693c6 FB |
1174 | /* put empty packet */ |
1175 | buf[0] = '\0'; | |
1176 | put_packet(s, buf); | |
1177 | break; | |
1178 | } | |
1179 | return RS_IDLE; | |
1180 | } | |
1181 | ||
612458f5 FB |
1182 | extern void tb_flush(CPUState *env); |
1183 | ||
1fddef4b | 1184 | #ifndef CONFIG_USER_ONLY |
858693c6 FB |
1185 | static void gdb_vm_stopped(void *opaque, int reason) |
1186 | { | |
1187 | GDBState *s = opaque; | |
1188 | char buf[256]; | |
1189 | int ret; | |
1190 | ||
a2d1ebaf PB |
1191 | if (s->state == RS_SYSCALL) |
1192 | return; | |
1193 | ||
858693c6 | 1194 | /* disable single step if it was enable */ |
6a00d601 | 1195 | cpu_single_step(s->env, 0); |
858693c6 | 1196 | |
e80cfcfc | 1197 | if (reason == EXCP_DEBUG) { |
6658ffb8 | 1198 | if (s->env->watchpoint_hit) { |
aa6290b7 PB |
1199 | snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";", |
1200 | SIGTRAP, | |
6658ffb8 PB |
1201 | s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr); |
1202 | put_packet(s, buf); | |
1203 | s->env->watchpoint_hit = 0; | |
1204 | return; | |
1205 | } | |
6a00d601 | 1206 | tb_flush(s->env); |
858693c6 | 1207 | ret = SIGTRAP; |
bbeb7b5c FB |
1208 | } else if (reason == EXCP_INTERRUPT) { |
1209 | ret = SIGINT; | |
1210 | } else { | |
858693c6 | 1211 | ret = 0; |
bbeb7b5c | 1212 | } |
858693c6 FB |
1213 | snprintf(buf, sizeof(buf), "S%02x", ret); |
1214 | put_packet(s, buf); | |
1215 | } | |
1fddef4b | 1216 | #endif |
858693c6 | 1217 | |
a2d1ebaf PB |
1218 | /* Send a gdb syscall request. |
1219 | This accepts limited printf-style format specifiers, specifically: | |
a87295e8 PB |
1220 | %x - target_ulong argument printed in hex. |
1221 | %lx - 64-bit argument printed in hex. | |
1222 | %s - string pointer (target_ulong) and length (int) pair. */ | |
a2d1ebaf PB |
1223 | void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...) |
1224 | { | |
1225 | va_list va; | |
1226 | char buf[256]; | |
1227 | char *p; | |
1228 | target_ulong addr; | |
a87295e8 | 1229 | uint64_t i64; |
a2d1ebaf PB |
1230 | GDBState *s; |
1231 | ||
1232 | s = gdb_syscall_state; | |
1233 | if (!s) | |
1234 | return; | |
1235 | gdb_current_syscall_cb = cb; | |
1236 | s->state = RS_SYSCALL; | |
1237 | #ifndef CONFIG_USER_ONLY | |
1238 | vm_stop(EXCP_DEBUG); | |
1239 | #endif | |
1240 | s->state = RS_IDLE; | |
1241 | va_start(va, fmt); | |
1242 | p = buf; | |
1243 | *(p++) = 'F'; | |
1244 | while (*fmt) { | |
1245 | if (*fmt == '%') { | |
1246 | fmt++; | |
1247 | switch (*fmt++) { | |
1248 | case 'x': | |
1249 | addr = va_arg(va, target_ulong); | |
1250 | p += sprintf(p, TARGET_FMT_lx, addr); | |
1251 | break; | |
a87295e8 PB |
1252 | case 'l': |
1253 | if (*(fmt++) != 'x') | |
1254 | goto bad_format; | |
1255 | i64 = va_arg(va, uint64_t); | |
1256 | p += sprintf(p, "%" PRIx64, i64); | |
1257 | break; | |
a2d1ebaf PB |
1258 | case 's': |
1259 | addr = va_arg(va, target_ulong); | |
1260 | p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int)); | |
1261 | break; | |
1262 | default: | |
a87295e8 | 1263 | bad_format: |
a2d1ebaf PB |
1264 | fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n", |
1265 | fmt - 1); | |
1266 | break; | |
1267 | } | |
1268 | } else { | |
1269 | *(p++) = *(fmt++); | |
1270 | } | |
1271 | } | |
8a93e02a | 1272 | *p = 0; |
a2d1ebaf PB |
1273 | va_end(va); |
1274 | put_packet(s, buf); | |
1275 | #ifdef CONFIG_USER_ONLY | |
1276 | gdb_handlesig(s->env, 0); | |
1277 | #else | |
1278 | cpu_interrupt(s->env, CPU_INTERRUPT_EXIT); | |
1279 | #endif | |
1280 | } | |
1281 | ||
6a00d601 | 1282 | static void gdb_read_byte(GDBState *s, int ch) |
858693c6 | 1283 | { |
6a00d601 | 1284 | CPUState *env = s->env; |
858693c6 | 1285 | int i, csum; |
60fe76f3 | 1286 | uint8_t reply; |
858693c6 | 1287 | |
1fddef4b | 1288 | #ifndef CONFIG_USER_ONLY |
4046d913 PB |
1289 | if (s->last_packet_len) { |
1290 | /* Waiting for a response to the last packet. If we see the start | |
1291 | of a new command then abandon the previous response. */ | |
1292 | if (ch == '-') { | |
1293 | #ifdef DEBUG_GDB | |
1294 | printf("Got NACK, retransmitting\n"); | |
1295 | #endif | |
ffe8ab83 | 1296 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
4046d913 PB |
1297 | } |
1298 | #ifdef DEBUG_GDB | |
1299 | else if (ch == '+') | |
1300 | printf("Got ACK\n"); | |
1301 | else | |
1302 | printf("Got '%c' when expecting ACK/NACK\n", ch); | |
1303 | #endif | |
1304 | if (ch == '+' || ch == '$') | |
1305 | s->last_packet_len = 0; | |
1306 | if (ch != '$') | |
1307 | return; | |
1308 | } | |
858693c6 FB |
1309 | if (vm_running) { |
1310 | /* when the CPU is running, we cannot do anything except stop | |
1311 | it when receiving a char */ | |
1312 | vm_stop(EXCP_INTERRUPT); | |
5fafdf24 | 1313 | } else |
1fddef4b | 1314 | #endif |
41625033 | 1315 | { |
858693c6 FB |
1316 | switch(s->state) { |
1317 | case RS_IDLE: | |
1318 | if (ch == '$') { | |
1319 | s->line_buf_index = 0; | |
1320 | s->state = RS_GETLINE; | |
c33a346e | 1321 | } |
b4608c04 | 1322 | break; |
858693c6 FB |
1323 | case RS_GETLINE: |
1324 | if (ch == '#') { | |
1325 | s->state = RS_CHKSUM1; | |
1326 | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { | |
1327 | s->state = RS_IDLE; | |
4c3a88a2 | 1328 | } else { |
858693c6 | 1329 | s->line_buf[s->line_buf_index++] = ch; |
4c3a88a2 FB |
1330 | } |
1331 | break; | |
858693c6 FB |
1332 | case RS_CHKSUM1: |
1333 | s->line_buf[s->line_buf_index] = '\0'; | |
1334 | s->line_csum = fromhex(ch) << 4; | |
1335 | s->state = RS_CHKSUM2; | |
1336 | break; | |
1337 | case RS_CHKSUM2: | |
1338 | s->line_csum |= fromhex(ch); | |
1339 | csum = 0; | |
1340 | for(i = 0; i < s->line_buf_index; i++) { | |
1341 | csum += s->line_buf[i]; | |
1342 | } | |
1343 | if (s->line_csum != (csum & 0xff)) { | |
60fe76f3 TS |
1344 | reply = '-'; |
1345 | put_buffer(s, &reply, 1); | |
858693c6 | 1346 | s->state = RS_IDLE; |
4c3a88a2 | 1347 | } else { |
60fe76f3 TS |
1348 | reply = '+'; |
1349 | put_buffer(s, &reply, 1); | |
1fddef4b | 1350 | s->state = gdb_handle_packet(s, env, s->line_buf); |
4c3a88a2 FB |
1351 | } |
1352 | break; | |
a2d1ebaf PB |
1353 | default: |
1354 | abort(); | |
858693c6 FB |
1355 | } |
1356 | } | |
1357 | } | |
1358 | ||
1fddef4b FB |
1359 | #ifdef CONFIG_USER_ONLY |
1360 | int | |
1361 | gdb_handlesig (CPUState *env, int sig) | |
1362 | { | |
1363 | GDBState *s; | |
1364 | char buf[256]; | |
1365 | int n; | |
1366 | ||
1367 | if (gdbserver_fd < 0) | |
1368 | return sig; | |
1369 | ||
1370 | s = &gdbserver_state; | |
1371 | ||
1372 | /* disable single step if it was enabled */ | |
1373 | cpu_single_step(env, 0); | |
1374 | tb_flush(env); | |
1375 | ||
1376 | if (sig != 0) | |
1377 | { | |
1378 | snprintf(buf, sizeof(buf), "S%02x", sig); | |
1379 | put_packet(s, buf); | |
1380 | } | |
1381 | ||
1fddef4b FB |
1382 | sig = 0; |
1383 | s->state = RS_IDLE; | |
41625033 FB |
1384 | s->running_state = 0; |
1385 | while (s->running_state == 0) { | |
1fddef4b FB |
1386 | n = read (s->fd, buf, 256); |
1387 | if (n > 0) | |
1388 | { | |
1389 | int i; | |
1390 | ||
1391 | for (i = 0; i < n; i++) | |
6a00d601 | 1392 | gdb_read_byte (s, buf[i]); |
1fddef4b FB |
1393 | } |
1394 | else if (n == 0 || errno != EAGAIN) | |
1395 | { | |
1396 | /* XXX: Connection closed. Should probably wait for annother | |
1397 | connection before continuing. */ | |
1398 | return sig; | |
1399 | } | |
41625033 | 1400 | } |
1fddef4b FB |
1401 | return sig; |
1402 | } | |
e9009676 FB |
1403 | |
1404 | /* Tell the remote gdb that the process has exited. */ | |
1405 | void gdb_exit(CPUState *env, int code) | |
1406 | { | |
1407 | GDBState *s; | |
1408 | char buf[4]; | |
1409 | ||
1410 | if (gdbserver_fd < 0) | |
1411 | return; | |
1412 | ||
1413 | s = &gdbserver_state; | |
1414 | ||
1415 | snprintf(buf, sizeof(buf), "W%02x", code); | |
1416 | put_packet(s, buf); | |
1417 | } | |
1418 | ||
1fddef4b | 1419 | |
7c9d8e07 | 1420 | static void gdb_accept(void *opaque) |
858693c6 FB |
1421 | { |
1422 | GDBState *s; | |
1423 | struct sockaddr_in sockaddr; | |
1424 | socklen_t len; | |
1425 | int val, fd; | |
1426 | ||
1427 | for(;;) { | |
1428 | len = sizeof(sockaddr); | |
1429 | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len); | |
1430 | if (fd < 0 && errno != EINTR) { | |
1431 | perror("accept"); | |
1432 | return; | |
1433 | } else if (fd >= 0) { | |
b4608c04 FB |
1434 | break; |
1435 | } | |
1436 | } | |
858693c6 FB |
1437 | |
1438 | /* set short latency */ | |
1439 | val = 1; | |
8f447cc7 | 1440 | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
3b46e624 | 1441 | |
1fddef4b FB |
1442 | s = &gdbserver_state; |
1443 | memset (s, 0, sizeof (GDBState)); | |
6a00d601 | 1444 | s->env = first_cpu; /* XXX: allow to change CPU */ |
858693c6 FB |
1445 | s->fd = fd; |
1446 | ||
a2d1ebaf PB |
1447 | gdb_syscall_state = s; |
1448 | ||
858693c6 | 1449 | fcntl(fd, F_SETFL, O_NONBLOCK); |
858693c6 FB |
1450 | } |
1451 | ||
1452 | static int gdbserver_open(int port) | |
1453 | { | |
1454 | struct sockaddr_in sockaddr; | |
1455 | int fd, val, ret; | |
1456 | ||
1457 | fd = socket(PF_INET, SOCK_STREAM, 0); | |
1458 | if (fd < 0) { | |
1459 | perror("socket"); | |
1460 | return -1; | |
1461 | } | |
1462 | ||
1463 | /* allow fast reuse */ | |
1464 | val = 1; | |
8f447cc7 | 1465 | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
858693c6 FB |
1466 | |
1467 | sockaddr.sin_family = AF_INET; | |
1468 | sockaddr.sin_port = htons(port); | |
1469 | sockaddr.sin_addr.s_addr = 0; | |
1470 | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); | |
1471 | if (ret < 0) { | |
1472 | perror("bind"); | |
1473 | return -1; | |
1474 | } | |
1475 | ret = listen(fd, 0); | |
1476 | if (ret < 0) { | |
1477 | perror("listen"); | |
1478 | return -1; | |
1479 | } | |
858693c6 FB |
1480 | return fd; |
1481 | } | |
1482 | ||
1483 | int gdbserver_start(int port) | |
1484 | { | |
1485 | gdbserver_fd = gdbserver_open(port); | |
1486 | if (gdbserver_fd < 0) | |
1487 | return -1; | |
1488 | /* accept connections */ | |
7c9d8e07 | 1489 | gdb_accept (NULL); |
4046d913 PB |
1490 | return 0; |
1491 | } | |
1fddef4b | 1492 | #else |
aa1f17c1 | 1493 | static int gdb_chr_can_receive(void *opaque) |
4046d913 PB |
1494 | { |
1495 | return 1; | |
1496 | } | |
1497 | ||
aa1f17c1 | 1498 | static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
4046d913 PB |
1499 | { |
1500 | GDBState *s = opaque; | |
1501 | int i; | |
1502 | ||
1503 | for (i = 0; i < size; i++) { | |
1504 | gdb_read_byte(s, buf[i]); | |
1505 | } | |
1506 | } | |
1507 | ||
1508 | static void gdb_chr_event(void *opaque, int event) | |
1509 | { | |
1510 | switch (event) { | |
1511 | case CHR_EVENT_RESET: | |
1512 | vm_stop(EXCP_INTERRUPT); | |
a2d1ebaf | 1513 | gdb_syscall_state = opaque; |
4046d913 PB |
1514 | break; |
1515 | default: | |
1516 | break; | |
1517 | } | |
1518 | } | |
1519 | ||
cfc3475a | 1520 | int gdbserver_start(const char *port) |
4046d913 PB |
1521 | { |
1522 | GDBState *s; | |
cfc3475a PB |
1523 | char gdbstub_port_name[128]; |
1524 | int port_num; | |
1525 | char *p; | |
1526 | CharDriverState *chr; | |
1527 | ||
1528 | if (!port || !*port) | |
1529 | return -1; | |
4046d913 | 1530 | |
cfc3475a PB |
1531 | port_num = strtol(port, &p, 10); |
1532 | if (*p == 0) { | |
1533 | /* A numeric value is interpreted as a port number. */ | |
1534 | snprintf(gdbstub_port_name, sizeof(gdbstub_port_name), | |
1535 | "tcp::%d,nowait,nodelay,server", port_num); | |
1536 | port = gdbstub_port_name; | |
1537 | } | |
1538 | ||
1539 | chr = qemu_chr_open(port); | |
4046d913 PB |
1540 | if (!chr) |
1541 | return -1; | |
1542 | ||
1543 | s = qemu_mallocz(sizeof(GDBState)); | |
1544 | if (!s) { | |
1545 | return -1; | |
1546 | } | |
1547 | s->env = first_cpu; /* XXX: allow to change CPU */ | |
1548 | s->chr = chr; | |
aa1f17c1 | 1549 | qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
4046d913 PB |
1550 | gdb_chr_event, s); |
1551 | qemu_add_vm_stop_handler(gdb_vm_stopped, s); | |
b4608c04 FB |
1552 | return 0; |
1553 | } | |
4046d913 | 1554 | #endif |