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Fix the sendkey hold time calculation (Jan Kiszka).
[qemu.git] / gdbstub.c
CommitLineData
b4608c04
FB
1/*
2 * gdb server stub
5fafdf24 3 *
3475187d 4 * Copyright (c) 2003-2005 Fabrice Bellard
b4608c04
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
978efd6a 20#include "config.h"
1fddef4b
FB
21#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
978efd6a 28#include <fcntl.h>
1fddef4b
FB
29
30#include "qemu.h"
31#else
87ecb68b
PB
32#include "qemu-common.h"
33#include "qemu-char.h"
34#include "sysemu.h"
35#include "gdbstub.h"
1fddef4b 36#endif
67b915a5 37
8f447cc7
FB
38#include "qemu_socket.h"
39#ifdef _WIN32
40/* XXX: these constants may be independent of the host ones even for Unix */
41#ifndef SIGTRAP
42#define SIGTRAP 5
43#endif
44#ifndef SIGINT
45#define SIGINT 2
46#endif
47#else
b4608c04 48#include <signal.h>
8f447cc7 49#endif
b4608c04 50
4abe615b 51//#define DEBUG_GDB
b4608c04 52
858693c6
FB
53enum RSState {
54 RS_IDLE,
55 RS_GETLINE,
56 RS_CHKSUM1,
57 RS_CHKSUM2,
a2d1ebaf 58 RS_SYSCALL,
858693c6 59};
858693c6 60typedef struct GDBState {
6a00d601 61 CPUState *env; /* current CPU */
41625033 62 enum RSState state; /* parsing state */
858693c6
FB
63 char line_buf[4096];
64 int line_buf_index;
65 int line_csum;
60fe76f3 66 uint8_t last_packet[4100];
4046d913 67 int last_packet_len;
1f487ee9 68 int signal;
41625033 69#ifdef CONFIG_USER_ONLY
4046d913 70 int fd;
41625033 71 int running_state;
4046d913
PB
72#else
73 CharDriverState *chr;
41625033 74#endif
858693c6 75} GDBState;
b4608c04 76
60897d36
EI
77/* By default use no IRQs and no timers while single stepping so as to
78 * make single stepping like an ICE HW step.
79 */
80static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
81
1fddef4b 82#ifdef CONFIG_USER_ONLY
4046d913
PB
83/* XXX: This is not thread safe. Do we care? */
84static int gdbserver_fd = -1;
85
1fddef4b
FB
86/* XXX: remove this hack. */
87static GDBState gdbserver_state;
1fddef4b 88
858693c6 89static int get_char(GDBState *s)
b4608c04
FB
90{
91 uint8_t ch;
92 int ret;
93
94 for(;;) {
8f447cc7 95 ret = recv(s->fd, &ch, 1, 0);
b4608c04 96 if (ret < 0) {
1f487ee9
EI
97 if (errno == ECONNRESET)
98 s->fd = -1;
b4608c04
FB
99 if (errno != EINTR && errno != EAGAIN)
100 return -1;
101 } else if (ret == 0) {
1f487ee9
EI
102 close(s->fd);
103 s->fd = -1;
b4608c04
FB
104 return -1;
105 } else {
106 break;
107 }
108 }
109 return ch;
110}
4046d913 111#endif
b4608c04 112
a2d1ebaf
PB
113/* GDB stub state for use by semihosting syscalls. */
114static GDBState *gdb_syscall_state;
115static gdb_syscall_complete_cb gdb_current_syscall_cb;
116
117enum {
118 GDB_SYS_UNKNOWN,
119 GDB_SYS_ENABLED,
120 GDB_SYS_DISABLED,
121} gdb_syscall_mode;
122
123/* If gdb is connected when the first semihosting syscall occurs then use
124 remote gdb syscalls. Otherwise use native file IO. */
125int use_gdb_syscalls(void)
126{
127 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
128 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
129 : GDB_SYS_DISABLED);
130 }
131 return gdb_syscall_mode == GDB_SYS_ENABLED;
132}
133
ba70a624
EI
134/* Resume execution. */
135static inline void gdb_continue(GDBState *s)
136{
137#ifdef CONFIG_USER_ONLY
138 s->running_state = 1;
139#else
140 vm_start();
141#endif
142}
143
858693c6 144static void put_buffer(GDBState *s, const uint8_t *buf, int len)
b4608c04 145{
4046d913 146#ifdef CONFIG_USER_ONLY
b4608c04
FB
147 int ret;
148
149 while (len > 0) {
8f447cc7 150 ret = send(s->fd, buf, len, 0);
b4608c04
FB
151 if (ret < 0) {
152 if (errno != EINTR && errno != EAGAIN)
153 return;
154 } else {
155 buf += ret;
156 len -= ret;
157 }
158 }
4046d913
PB
159#else
160 qemu_chr_write(s->chr, buf, len);
161#endif
b4608c04
FB
162}
163
164static inline int fromhex(int v)
165{
166 if (v >= '0' && v <= '9')
167 return v - '0';
168 else if (v >= 'A' && v <= 'F')
169 return v - 'A' + 10;
170 else if (v >= 'a' && v <= 'f')
171 return v - 'a' + 10;
172 else
173 return 0;
174}
175
176static inline int tohex(int v)
177{
178 if (v < 10)
179 return v + '0';
180 else
181 return v - 10 + 'a';
182}
183
184static void memtohex(char *buf, const uint8_t *mem, int len)
185{
186 int i, c;
187 char *q;
188 q = buf;
189 for(i = 0; i < len; i++) {
190 c = mem[i];
191 *q++ = tohex(c >> 4);
192 *q++ = tohex(c & 0xf);
193 }
194 *q = '\0';
195}
196
197static void hextomem(uint8_t *mem, const char *buf, int len)
198{
199 int i;
200
201 for(i = 0; i < len; i++) {
202 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
203 buf += 2;
204 }
205}
206
b4608c04 207/* return -1 if error, 0 if OK */
858693c6 208static int put_packet(GDBState *s, char *buf)
b4608c04 209{
4046d913 210 int len, csum, i;
60fe76f3 211 uint8_t *p;
b4608c04
FB
212
213#ifdef DEBUG_GDB
214 printf("reply='%s'\n", buf);
215#endif
216
217 for(;;) {
4046d913
PB
218 p = s->last_packet;
219 *(p++) = '$';
b4608c04 220 len = strlen(buf);
4046d913
PB
221 memcpy(p, buf, len);
222 p += len;
b4608c04
FB
223 csum = 0;
224 for(i = 0; i < len; i++) {
225 csum += buf[i];
226 }
4046d913
PB
227 *(p++) = '#';
228 *(p++) = tohex((csum >> 4) & 0xf);
229 *(p++) = tohex((csum) & 0xf);
b4608c04 230
4046d913 231 s->last_packet_len = p - s->last_packet;
ffe8ab83 232 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
b4608c04 233
4046d913
PB
234#ifdef CONFIG_USER_ONLY
235 i = get_char(s);
236 if (i < 0)
b4608c04 237 return -1;
4046d913 238 if (i == '+')
b4608c04 239 break;
4046d913
PB
240#else
241 break;
242#endif
b4608c04
FB
243 }
244 return 0;
245}
246
fde3fd61 247#if defined(TARGET_I386)
79808573
FB
248
249#ifdef TARGET_X86_64
250static const uint8_t gdb_x86_64_regs[16] = {
251 R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
252 8, 9, 10, 11, 12, 13, 14, 15,
253};
254#endif
255
6da41eaf
FB
256static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
257{
79808573
FB
258 int i, fpus, nb_regs;
259 uint8_t *p;
5ad265ee 260
79808573 261 p = mem_buf;
5ad265ee 262#ifdef TARGET_X86_64
5ad265ee 263 if (env->hflags & HF_CS64_MASK) {
79808573
FB
264 nb_regs = 16;
265 for(i = 0; i < 16; i++) {
266 *(uint64_t *)p = tswap64(env->regs[gdb_x86_64_regs[i]]);
267 p += 8;
5ad265ee 268 }
79808573
FB
269 *(uint64_t *)p = tswap64(env->eip);
270 p += 8;
271 } else
272#endif
273 {
274 nb_regs = 8;
5ad265ee 275 for(i = 0; i < 8; i++) {
79808573
FB
276 *(uint32_t *)p = tswap32(env->regs[i]);
277 p += 4;
5ad265ee 278 }
79808573
FB
279 *(uint32_t *)p = tswap32(env->eip);
280 p += 4;
5ad265ee 281 }
6da41eaf 282
79808573
FB
283 *(uint32_t *)p = tswap32(env->eflags);
284 p += 4;
285 *(uint32_t *)p = tswap32(env->segs[R_CS].selector);
286 p += 4;
287 *(uint32_t *)p = tswap32(env->segs[R_SS].selector);
288 p += 4;
289 *(uint32_t *)p = tswap32(env->segs[R_DS].selector);
290 p += 4;
291 *(uint32_t *)p = tswap32(env->segs[R_ES].selector);
292 p += 4;
293 *(uint32_t *)p = tswap32(env->segs[R_FS].selector);
294 p += 4;
295 *(uint32_t *)p = tswap32(env->segs[R_GS].selector);
296 p += 4;
6da41eaf 297 for(i = 0; i < 8; i++) {
79808573
FB
298 /* XXX: convert floats */
299#ifdef USE_X86LDOUBLE
300 memcpy(p, &env->fpregs[i], 10);
301#else
302 memset(p, 0, 10);
303#endif
304 p += 10;
6da41eaf 305 }
79808573
FB
306 *(uint32_t *)p = tswap32(env->fpuc); /* fctrl */
307 p += 4;
6da41eaf 308 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
79808573
FB
309 *(uint32_t *)p = tswap32(fpus); /* fstat */
310 p += 4;
311 *(uint32_t *)p = 0; /* ftag */
312 p += 4;
313 *(uint32_t *)p = 0; /* fiseg */
314 p += 4;
315 *(uint32_t *)p = 0; /* fioff */
316 p += 4;
317 *(uint32_t *)p = 0; /* foseg */
318 p += 4;
319 *(uint32_t *)p = 0; /* fooff */
320 p += 4;
321 *(uint32_t *)p = 0; /* fop */
322 p += 4;
323 for(i = 0; i < nb_regs; i++) {
324 *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(0));
325 p += 8;
326 *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(1));
327 p += 8;
328 }
329 *(uint32_t *)p = tswap32(env->mxcsr);
330 p += 4;
331 return p - mem_buf;
332}
333
334static inline void cpu_gdb_load_seg(CPUState *env, const uint8_t **pp,
335 int sreg)
336{
337 const uint8_t *p;
338 uint32_t sel;
339 p = *pp;
340 sel = tswap32(*(uint32_t *)p);
341 p += 4;
342 if (sel != env->segs[sreg].selector) {
343#if defined(CONFIG_USER_ONLY)
344 cpu_x86_load_seg(env, sreg, sel);
345#else
346 /* XXX: do it with a debug function which does not raise an
347 exception */
348#endif
349 }
350 *pp = p;
6da41eaf
FB
351}
352
353static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
354{
79808573
FB
355 const uint8_t *p = mem_buf;
356 int i, nb_regs;
357 uint16_t fpus;
6da41eaf 358
79808573
FB
359#ifdef TARGET_X86_64
360 if (env->hflags & HF_CS64_MASK) {
361 nb_regs = 16;
362 for(i = 0; i < 16; i++) {
363 env->regs[gdb_x86_64_regs[i]] = tswap64(*(uint64_t *)p);
364 p += 8;
365 }
366 env->eip = tswap64(*(uint64_t *)p);
367 p += 8;
368 } else
369#endif
370 {
371 nb_regs = 8;
372 for(i = 0; i < 8; i++) {
373 env->regs[i] = tswap32(*(uint32_t *)p);
374 p += 4;
375 }
376 env->eip = tswap32(*(uint32_t *)p);
377 p += 4;
6da41eaf 378 }
79808573
FB
379 env->eflags = tswap32(*(uint32_t *)p);
380 p += 4;
381 cpu_gdb_load_seg(env, &p, R_CS);
382 cpu_gdb_load_seg(env, &p, R_SS);
383 cpu_gdb_load_seg(env, &p, R_DS);
384 cpu_gdb_load_seg(env, &p, R_ES);
385 cpu_gdb_load_seg(env, &p, R_FS);
386 cpu_gdb_load_seg(env, &p, R_GS);
387
388 /* FPU state */
389 for(i = 0; i < 8; i++) {
390 /* XXX: convert floats */
391#ifdef USE_X86LDOUBLE
392 memcpy(&env->fpregs[i], p, 10);
6da41eaf 393#endif
79808573
FB
394 p += 10;
395 }
396 env->fpuc = tswap32(*(uint32_t *)p); /* fctrl */
397 p += 4;
398 fpus = tswap32(*(uint32_t *)p);
399 p += 4;
400 env->fpstt = (fpus >> 11) & 7;
401 env->fpus = fpus & ~0x3800;
402 p += 4 * 6;
403
404 if (size >= ((p - mem_buf) + 16 * nb_regs + 4)) {
405 /* SSE state */
406 for(i = 0; i < nb_regs; i++) {
407 env->xmm_regs[i].XMM_Q(0) = tswap64(*(uint64_t *)p);
408 p += 8;
409 env->xmm_regs[i].XMM_Q(1) = tswap64(*(uint64_t *)p);
410 p += 8;
411 }
412 env->mxcsr = tswap32(*(uint32_t *)p);
413 p += 4;
414 }
6da41eaf
FB
415}
416
9e62fd7f 417#elif defined (TARGET_PPC)
9e62fd7f
FB
418static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
419{
a541f297 420 uint32_t *registers = (uint32_t *)mem_buf, tmp;
9e62fd7f
FB
421 int i;
422
423 /* fill in gprs */
a541f297 424 for(i = 0; i < 32; i++) {
e95c8d51 425 registers[i] = tswapl(env->gpr[i]);
9e62fd7f
FB
426 }
427 /* fill in fprs */
428 for (i = 0; i < 32; i++) {
e95c8d51
FB
429 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
430 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
9e62fd7f
FB
431 }
432 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 433 registers[96] = tswapl(env->nip);
0411a972 434 registers[97] = tswapl(env->msr);
9e62fd7f
FB
435 tmp = 0;
436 for (i = 0; i < 8; i++)
a541f297 437 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
e95c8d51
FB
438 registers[98] = tswapl(tmp);
439 registers[99] = tswapl(env->lr);
440 registers[100] = tswapl(env->ctr);
76a66253 441 registers[101] = tswapl(ppc_load_xer(env));
e95c8d51 442 registers[102] = 0;
a541f297
FB
443
444 return 103 * 4;
9e62fd7f
FB
445}
446
447static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
448{
449 uint32_t *registers = (uint32_t *)mem_buf;
450 int i;
451
452 /* fill in gprs */
453 for (i = 0; i < 32; i++) {
e95c8d51 454 env->gpr[i] = tswapl(registers[i]);
9e62fd7f
FB
455 }
456 /* fill in fprs */
457 for (i = 0; i < 32; i++) {
e95c8d51
FB
458 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
459 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
9e62fd7f
FB
460 }
461 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 462 env->nip = tswapl(registers[96]);
0411a972 463 ppc_store_msr(env, tswapl(registers[97]));
e95c8d51 464 registers[98] = tswapl(registers[98]);
9e62fd7f 465 for (i = 0; i < 8; i++)
a541f297 466 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
e95c8d51
FB
467 env->lr = tswapl(registers[99]);
468 env->ctr = tswapl(registers[100]);
76a66253 469 ppc_store_xer(env, tswapl(registers[101]));
e95c8d51
FB
470}
471#elif defined (TARGET_SPARC)
96d19126
BS
472#ifdef TARGET_ABI32
473#define tswap_abi(val) tswap32(val &0xffffffff)
474#else
475#define tswap_abi(val) tswapl(val)
476#endif
e95c8d51
FB
477static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
478{
96d19126
BS
479#ifdef TARGET_ABI32
480 abi_ulong *registers = (abi_ulong *)mem_buf;
481#else
3475187d 482 target_ulong *registers = (target_ulong *)mem_buf;
96d19126 483#endif
e95c8d51
FB
484 int i;
485
486 /* fill in g0..g7 */
48b2c193 487 for(i = 0; i < 8; i++) {
96d19126 488 registers[i] = tswap_abi(env->gregs[i]);
e95c8d51
FB
489 }
490 /* fill in register window */
491 for(i = 0; i < 24; i++) {
96d19126 492 registers[i + 8] = tswap_abi(env->regwptr[i]);
e95c8d51 493 }
96d19126 494#if !defined(TARGET_SPARC64) || defined(TARGET_ABI32)
e95c8d51
FB
495 /* fill in fprs */
496 for (i = 0; i < 32; i++) {
96d19126 497 registers[i + 32] = tswap_abi(*((uint32_t *)&env->fpr[i]));
e95c8d51
FB
498 }
499 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
96d19126 500 registers[64] = tswap_abi(env->y);
3475187d 501 {
96d19126 502 uint32_t tmp;
3475187d 503
96d19126
BS
504 tmp = GET_PSR(env);
505 registers[65] = tswap32(tmp);
3475187d 506 }
96d19126
BS
507 registers[66] = tswap_abi(env->wim);
508 registers[67] = tswap_abi(env->tbr);
509 registers[68] = tswap_abi(env->pc);
510 registers[69] = tswap_abi(env->npc);
511 registers[70] = tswap_abi(env->fsr);
e95c8d51
FB
512 registers[71] = 0; /* csr */
513 registers[72] = 0;
96d19126 514 return 73 * sizeof(uint32_t);
3475187d 515#else
9d9754a3
FB
516 /* fill in fprs */
517 for (i = 0; i < 64; i += 2) {
518 uint64_t tmp;
519
8979596d
BS
520 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
521 tmp |= *(uint32_t *)&env->fpr[i + 1];
522 registers[i / 2 + 32] = tswap64(tmp);
3475187d 523 }
9d9754a3
FB
524 registers[64] = tswapl(env->pc);
525 registers[65] = tswapl(env->npc);
17d996e1
BS
526 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
527 ((env->asi & 0xff) << 24) |
528 ((env->pstate & 0xfff) << 8) |
529 GET_CWP64(env));
9d9754a3
FB
530 registers[67] = tswapl(env->fsr);
531 registers[68] = tswapl(env->fprs);
532 registers[69] = tswapl(env->y);
533 return 70 * sizeof(target_ulong);
3475187d 534#endif
e95c8d51
FB
535}
536
537static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
538{
96d19126
BS
539#ifdef TARGET_ABI32
540 abi_ulong *registers = (abi_ulong *)mem_buf;
541#else
3475187d 542 target_ulong *registers = (target_ulong *)mem_buf;
96d19126 543#endif
e95c8d51
FB
544 int i;
545
546 /* fill in g0..g7 */
547 for(i = 0; i < 7; i++) {
96d19126 548 env->gregs[i] = tswap_abi(registers[i]);
e95c8d51
FB
549 }
550 /* fill in register window */
551 for(i = 0; i < 24; i++) {
96d19126 552 env->regwptr[i] = tswap_abi(registers[i + 8]);
e95c8d51 553 }
96d19126 554#if !defined(TARGET_SPARC64) || defined(TARGET_ABI32)
e95c8d51
FB
555 /* fill in fprs */
556 for (i = 0; i < 32; i++) {
96d19126 557 *((uint32_t *)&env->fpr[i]) = tswap_abi(registers[i + 32]);
e95c8d51
FB
558 }
559 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
96d19126
BS
560 env->y = tswap_abi(registers[64]);
561 PUT_PSR(env, tswap_abi(registers[65]));
562 env->wim = tswap_abi(registers[66]);
563 env->tbr = tswap_abi(registers[67]);
564 env->pc = tswap_abi(registers[68]);
565 env->npc = tswap_abi(registers[69]);
566 env->fsr = tswap_abi(registers[70]);
3475187d 567#else
9d9754a3 568 for (i = 0; i < 64; i += 2) {
8979596d
BS
569 uint64_t tmp;
570
571 tmp = tswap64(registers[i / 2 + 32]);
572 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
573 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
3475187d 574 }
9d9754a3
FB
575 env->pc = tswapl(registers[64]);
576 env->npc = tswapl(registers[65]);
17d996e1
BS
577 {
578 uint64_t tmp = tswapl(registers[66]);
579
580 PUT_CCR(env, tmp >> 32);
581 env->asi = (tmp >> 24) & 0xff;
582 env->pstate = (tmp >> 8) & 0xfff;
583 PUT_CWP64(env, tmp & 0xff);
584 }
9d9754a3
FB
585 env->fsr = tswapl(registers[67]);
586 env->fprs = tswapl(registers[68]);
587 env->y = tswapl(registers[69]);
3475187d 588#endif
9e62fd7f 589}
96d19126 590#undef tswap_abi
1fddef4b
FB
591#elif defined (TARGET_ARM)
592static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
593{
594 int i;
595 uint8_t *ptr;
596
597 ptr = mem_buf;
598 /* 16 core integer registers (4 bytes each). */
599 for (i = 0; i < 16; i++)
600 {
601 *(uint32_t *)ptr = tswapl(env->regs[i]);
602 ptr += 4;
603 }
604 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
605 Not yet implemented. */
606 memset (ptr, 0, 8 * 12 + 4);
607 ptr += 8 * 12 + 4;
608 /* CPSR (4 bytes). */
b5ff1b31 609 *(uint32_t *)ptr = tswapl (cpsr_read(env));
1fddef4b
FB
610 ptr += 4;
611
612 return ptr - mem_buf;
613}
6da41eaf 614
1fddef4b
FB
615static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
616{
617 int i;
618 uint8_t *ptr;
619
620 ptr = mem_buf;
621 /* Core integer registers. */
622 for (i = 0; i < 16; i++)
623 {
624 env->regs[i] = tswapl(*(uint32_t *)ptr);
625 ptr += 4;
626 }
627 /* Ignore FPA regs and scr. */
628 ptr += 8 * 12 + 4;
b5ff1b31 629 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
1fddef4b 630}
e6e5906b
PB
631#elif defined (TARGET_M68K)
632static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
633{
634 int i;
635 uint8_t *ptr;
636 CPU_DoubleU u;
637
638 ptr = mem_buf;
639 /* D0-D7 */
640 for (i = 0; i < 8; i++) {
641 *(uint32_t *)ptr = tswapl(env->dregs[i]);
642 ptr += 4;
643 }
644 /* A0-A7 */
645 for (i = 0; i < 8; i++) {
646 *(uint32_t *)ptr = tswapl(env->aregs[i]);
647 ptr += 4;
648 }
649 *(uint32_t *)ptr = tswapl(env->sr);
650 ptr += 4;
651 *(uint32_t *)ptr = tswapl(env->pc);
652 ptr += 4;
653 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
654 ColdFire has 8-bit double precision registers. */
655 for (i = 0; i < 8; i++) {
656 u.d = env->fregs[i];
657 *(uint32_t *)ptr = tswap32(u.l.upper);
658 *(uint32_t *)ptr = tswap32(u.l.lower);
659 }
660 /* FP control regs (not implemented). */
661 memset (ptr, 0, 3 * 4);
662 ptr += 3 * 4;
663
664 return ptr - mem_buf;
665}
666
667static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
668{
669 int i;
670 uint8_t *ptr;
671 CPU_DoubleU u;
672
673 ptr = mem_buf;
674 /* D0-D7 */
675 for (i = 0; i < 8; i++) {
676 env->dregs[i] = tswapl(*(uint32_t *)ptr);
677 ptr += 4;
678 }
679 /* A0-A7 */
680 for (i = 0; i < 8; i++) {
681 env->aregs[i] = tswapl(*(uint32_t *)ptr);
682 ptr += 4;
683 }
684 env->sr = tswapl(*(uint32_t *)ptr);
685 ptr += 4;
686 env->pc = tswapl(*(uint32_t *)ptr);
687 ptr += 4;
688 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
689 ColdFire has 8-bit double precision registers. */
690 for (i = 0; i < 8; i++) {
5fafdf24 691 u.l.upper = tswap32(*(uint32_t *)ptr);
e6e5906b
PB
692 u.l.lower = tswap32(*(uint32_t *)ptr);
693 env->fregs[i] = u.d;
694 }
695 /* FP control regs (not implemented). */
696 ptr += 3 * 4;
697}
6f970bd9
FB
698#elif defined (TARGET_MIPS)
699static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
700{
701 int i;
702 uint8_t *ptr;
703
704 ptr = mem_buf;
705 for (i = 0; i < 32; i++)
706 {
d0dc7dc3 707 *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
2052caa7 708 ptr += sizeof(target_ulong);
6f970bd9
FB
709 }
710
7ac256b8 711 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
2052caa7 712 ptr += sizeof(target_ulong);
6f970bd9 713
d0dc7dc3 714 *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
2052caa7 715 ptr += sizeof(target_ulong);
6f970bd9 716
d0dc7dc3 717 *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
2052caa7 718 ptr += sizeof(target_ulong);
6f970bd9 719
2052caa7
TS
720 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
721 ptr += sizeof(target_ulong);
6f970bd9 722
7ac256b8 723 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
2052caa7 724 ptr += sizeof(target_ulong);
6f970bd9 725
ead9360e 726 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
2052caa7 727 ptr += sizeof(target_ulong);
6f970bd9 728
36d23958 729 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 730 {
36d23958
TS
731 for (i = 0; i < 32; i++)
732 {
7ac256b8
TS
733 if (env->CP0_Status & (1 << CP0St_FR))
734 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
735 else
736 *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
2052caa7 737 ptr += sizeof(target_ulong);
36d23958 738 }
8e33c08c 739
7ac256b8 740 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
2052caa7 741 ptr += sizeof(target_ulong);
8e33c08c 742
7ac256b8 743 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
2052caa7 744 ptr += sizeof(target_ulong);
36d23958 745 }
8e33c08c 746
7ac256b8
TS
747 /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
748 *(target_ulong *)ptr = 0;
749 ptr += sizeof(target_ulong);
750
751 /* Registers for embedded use, we just pad them. */
752 for (i = 0; i < 16; i++)
753 {
754 *(target_ulong *)ptr = 0;
755 ptr += sizeof(target_ulong);
756 }
757
758 /* Processor ID. */
759 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
760 ptr += sizeof(target_ulong);
6f970bd9
FB
761
762 return ptr - mem_buf;
763}
764
8e33c08c
TS
765/* convert MIPS rounding mode in FCR31 to IEEE library */
766static unsigned int ieee_rm[] =
767 {
768 float_round_nearest_even,
769 float_round_to_zero,
770 float_round_up,
771 float_round_down
772 };
773#define RESTORE_ROUNDING_MODE \
ead9360e 774 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
8e33c08c 775
6f970bd9
FB
776static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
777{
778 int i;
779 uint8_t *ptr;
780
781 ptr = mem_buf;
782 for (i = 0; i < 32; i++)
783 {
d0dc7dc3 784 env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
2052caa7 785 ptr += sizeof(target_ulong);
6f970bd9
FB
786 }
787
2052caa7
TS
788 env->CP0_Status = tswapl(*(target_ulong *)ptr);
789 ptr += sizeof(target_ulong);
6f970bd9 790
d0dc7dc3 791 env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
2052caa7 792 ptr += sizeof(target_ulong);
6f970bd9 793
d0dc7dc3 794 env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
2052caa7 795 ptr += sizeof(target_ulong);
6f970bd9 796
2052caa7
TS
797 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
798 ptr += sizeof(target_ulong);
6f970bd9 799
2052caa7
TS
800 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
801 ptr += sizeof(target_ulong);
6f970bd9 802
ead9360e 803 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
2052caa7 804 ptr += sizeof(target_ulong);
8e33c08c 805
36d23958 806 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 807 {
36d23958
TS
808 for (i = 0; i < 32; i++)
809 {
7ac256b8
TS
810 if (env->CP0_Status & (1 << CP0St_FR))
811 env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
812 else
813 env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
2052caa7 814 ptr += sizeof(target_ulong);
36d23958 815 }
8e33c08c 816
7ac256b8 817 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
2052caa7 818 ptr += sizeof(target_ulong);
8e33c08c 819
7ac256b8 820 /* The remaining registers are assumed to be read-only. */
8e33c08c 821
36d23958
TS
822 /* set rounding mode */
823 RESTORE_ROUNDING_MODE;
8e33c08c
TS
824
825#ifndef CONFIG_SOFTFLOAT
36d23958
TS
826 /* no floating point exception for native float */
827 SET_FP_ENABLE(env->fcr31, 0);
8e33c08c 828#endif
36d23958 829 }
6f970bd9 830}
fdf9b3e8 831#elif defined (TARGET_SH4)
6ef99fc5
TS
832
833/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
834
fdf9b3e8
FB
835static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
836{
837 uint32_t *ptr = (uint32_t *)mem_buf;
838 int i;
839
840#define SAVE(x) *ptr++=tswapl(x)
9c2a9ea1
PB
841 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
842 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
843 } else {
844 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
845 }
846 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
fdf9b3e8
FB
847 SAVE (env->pc);
848 SAVE (env->pr);
849 SAVE (env->gbr);
850 SAVE (env->vbr);
851 SAVE (env->mach);
852 SAVE (env->macl);
853 SAVE (env->sr);
6ef99fc5
TS
854 SAVE (env->fpul);
855 SAVE (env->fpscr);
856 for (i = 0; i < 16; i++)
857 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
858 SAVE (env->ssr);
859 SAVE (env->spc);
860 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
861 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
fdf9b3e8
FB
862 return ((uint8_t *)ptr - mem_buf);
863}
864
865static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
866{
867 uint32_t *ptr = (uint32_t *)mem_buf;
868 int i;
869
870#define LOAD(x) (x)=*ptr++;
9c2a9ea1
PB
871 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
872 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
873 } else {
874 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
875 }
876 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
fdf9b3e8
FB
877 LOAD (env->pc);
878 LOAD (env->pr);
879 LOAD (env->gbr);
880 LOAD (env->vbr);
881 LOAD (env->mach);
882 LOAD (env->macl);
883 LOAD (env->sr);
6ef99fc5
TS
884 LOAD (env->fpul);
885 LOAD (env->fpscr);
886 for (i = 0; i < 16; i++)
887 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
888 LOAD (env->ssr);
889 LOAD (env->spc);
890 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
891 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
fdf9b3e8 892}
f1ccf904
TS
893#elif defined (TARGET_CRIS)
894
895static int cris_save_32 (unsigned char *d, uint32_t value)
896{
897 *d++ = (value);
898 *d++ = (value >>= 8);
899 *d++ = (value >>= 8);
900 *d++ = (value >>= 8);
901 return 4;
902}
903static int cris_save_16 (unsigned char *d, uint32_t value)
904{
905 *d++ = (value);
906 *d++ = (value >>= 8);
907 return 2;
908}
909static int cris_save_8 (unsigned char *d, uint32_t value)
910{
911 *d++ = (value);
912 return 1;
913}
914
915/* FIXME: this will bug on archs not supporting unaligned word accesses. */
916static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
917{
918 uint8_t *ptr = mem_buf;
919 uint8_t srs;
920 int i;
921
922 for (i = 0; i < 16; i++)
923 ptr += cris_save_32 (ptr, env->regs[i]);
924
9004627f 925 srs = env->pregs[PR_SRS];
f1ccf904
TS
926
927 ptr += cris_save_8 (ptr, env->pregs[0]);
928 ptr += cris_save_8 (ptr, env->pregs[1]);
929 ptr += cris_save_32 (ptr, env->pregs[2]);
930 ptr += cris_save_8 (ptr, srs);
931 ptr += cris_save_16 (ptr, env->pregs[4]);
932
933 for (i = 5; i < 16; i++)
934 ptr += cris_save_32 (ptr, env->pregs[i]);
935
936 ptr += cris_save_32 (ptr, env->pc);
937
938 for (i = 0; i < 16; i++)
939 ptr += cris_save_32 (ptr, env->sregs[srs][i]);
940
941 return ((uint8_t *)ptr - mem_buf);
942}
943
944static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
945{
946 uint32_t *ptr = (uint32_t *)mem_buf;
947 int i;
948
949#define LOAD(x) (x)=*ptr++;
950 for (i = 0; i < 16; i++) LOAD(env->regs[i]);
951 LOAD (env->pc);
952}
1fddef4b 953#else
6da41eaf
FB
954static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
955{
956 return 0;
957}
958
959static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
960{
961}
962
963#endif
b4608c04 964
1fddef4b 965static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
b4608c04 966{
b4608c04 967 const char *p;
858693c6 968 int ch, reg_size, type;
b4608c04 969 char buf[4096];
f1ccf904 970 uint8_t mem_buf[4096];
b4608c04 971 uint32_t *registers;
9d9754a3 972 target_ulong addr, len;
3b46e624 973
858693c6
FB
974#ifdef DEBUG_GDB
975 printf("command='%s'\n", line_buf);
976#endif
977 p = line_buf;
978 ch = *p++;
979 switch(ch) {
980 case '?':
1fddef4b 981 /* TODO: Make this return the correct value for user-mode. */
858693c6
FB
982 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
983 put_packet(s, buf);
7d03f82f
EI
984 /* Remove all the breakpoints when this query is issued,
985 * because gdb is doing and initial connect and the state
986 * should be cleaned up.
987 */
988 cpu_breakpoint_remove_all(env);
989 cpu_watchpoint_remove_all(env);
858693c6
FB
990 break;
991 case 'c':
992 if (*p != '\0') {
9d9754a3 993 addr = strtoull(p, (char **)&p, 16);
4c3a88a2 994#if defined(TARGET_I386)
858693c6 995 env->eip = addr;
5be1a8e0 996#elif defined (TARGET_PPC)
858693c6 997 env->nip = addr;
8d5f07fa
FB
998#elif defined (TARGET_SPARC)
999 env->pc = addr;
1000 env->npc = addr + 4;
b5ff1b31
FB
1001#elif defined (TARGET_ARM)
1002 env->regs[15] = addr;
fdf9b3e8 1003#elif defined (TARGET_SH4)
8fac5803
TS
1004 env->pc = addr;
1005#elif defined (TARGET_MIPS)
ead9360e 1006 env->PC[env->current_tc] = addr;
f1ccf904
TS
1007#elif defined (TARGET_CRIS)
1008 env->pc = addr;
4c3a88a2 1009#endif
858693c6 1010 }
ba70a624 1011 gdb_continue(s);
41625033 1012 return RS_IDLE;
1f487ee9
EI
1013 case 'C':
1014 s->signal = strtoul(p, (char **)&p, 16);
1015 gdb_continue(s);
1016 return RS_IDLE;
7d03f82f
EI
1017 case 'k':
1018 /* Kill the target */
1019 fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1020 exit(0);
1021 case 'D':
1022 /* Detach packet */
1023 cpu_breakpoint_remove_all(env);
1024 cpu_watchpoint_remove_all(env);
1025 gdb_continue(s);
1026 put_packet(s, "OK");
1027 break;
858693c6
FB
1028 case 's':
1029 if (*p != '\0') {
8fac5803 1030 addr = strtoull(p, (char **)&p, 16);
c33a346e 1031#if defined(TARGET_I386)
858693c6 1032 env->eip = addr;
5be1a8e0 1033#elif defined (TARGET_PPC)
858693c6 1034 env->nip = addr;
8d5f07fa
FB
1035#elif defined (TARGET_SPARC)
1036 env->pc = addr;
1037 env->npc = addr + 4;
b5ff1b31
FB
1038#elif defined (TARGET_ARM)
1039 env->regs[15] = addr;
fdf9b3e8 1040#elif defined (TARGET_SH4)
8fac5803
TS
1041 env->pc = addr;
1042#elif defined (TARGET_MIPS)
ead9360e 1043 env->PC[env->current_tc] = addr;
f1ccf904
TS
1044#elif defined (TARGET_CRIS)
1045 env->pc = addr;
c33a346e 1046#endif
858693c6 1047 }
60897d36 1048 cpu_single_step(env, sstep_flags);
ba70a624 1049 gdb_continue(s);
41625033 1050 return RS_IDLE;
a2d1ebaf
PB
1051 case 'F':
1052 {
1053 target_ulong ret;
1054 target_ulong err;
1055
1056 ret = strtoull(p, (char **)&p, 16);
1057 if (*p == ',') {
1058 p++;
1059 err = strtoull(p, (char **)&p, 16);
1060 } else {
1061 err = 0;
1062 }
1063 if (*p == ',')
1064 p++;
1065 type = *p;
1066 if (gdb_current_syscall_cb)
1067 gdb_current_syscall_cb(s->env, ret, err);
1068 if (type == 'C') {
1069 put_packet(s, "T02");
1070 } else {
ba70a624 1071 gdb_continue(s);
a2d1ebaf
PB
1072 }
1073 }
1074 break;
858693c6
FB
1075 case 'g':
1076 reg_size = cpu_gdb_read_registers(env, mem_buf);
1077 memtohex(buf, mem_buf, reg_size);
1078 put_packet(s, buf);
1079 break;
1080 case 'G':
1081 registers = (void *)mem_buf;
1082 len = strlen(p) / 2;
1083 hextomem((uint8_t *)registers, p, len);
1084 cpu_gdb_write_registers(env, mem_buf, len);
1085 put_packet(s, "OK");
1086 break;
1087 case 'm':
9d9754a3 1088 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
1089 if (*p == ',')
1090 p++;
9d9754a3 1091 len = strtoull(p, NULL, 16);
6f970bd9
FB
1092 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1093 put_packet (s, "E14");
1094 } else {
1095 memtohex(buf, mem_buf, len);
1096 put_packet(s, buf);
1097 }
858693c6
FB
1098 break;
1099 case 'M':
9d9754a3 1100 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
1101 if (*p == ',')
1102 p++;
9d9754a3 1103 len = strtoull(p, (char **)&p, 16);
b328f873 1104 if (*p == ':')
858693c6
FB
1105 p++;
1106 hextomem(mem_buf, p, len);
1107 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
905f20b1 1108 put_packet(s, "E14");
858693c6
FB
1109 else
1110 put_packet(s, "OK");
1111 break;
1112 case 'Z':
1113 type = strtoul(p, (char **)&p, 16);
1114 if (*p == ',')
1115 p++;
9d9754a3 1116 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
1117 if (*p == ',')
1118 p++;
9d9754a3 1119 len = strtoull(p, (char **)&p, 16);
858693c6
FB
1120 if (type == 0 || type == 1) {
1121 if (cpu_breakpoint_insert(env, addr) < 0)
1122 goto breakpoint_error;
1123 put_packet(s, "OK");
6658ffb8
PB
1124#ifndef CONFIG_USER_ONLY
1125 } else if (type == 2) {
1126 if (cpu_watchpoint_insert(env, addr) < 0)
1127 goto breakpoint_error;
1128 put_packet(s, "OK");
1129#endif
858693c6
FB
1130 } else {
1131 breakpoint_error:
905f20b1 1132 put_packet(s, "E22");
858693c6
FB
1133 }
1134 break;
1135 case 'z':
1136 type = strtoul(p, (char **)&p, 16);
1137 if (*p == ',')
1138 p++;
9d9754a3 1139 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
1140 if (*p == ',')
1141 p++;
9d9754a3 1142 len = strtoull(p, (char **)&p, 16);
858693c6
FB
1143 if (type == 0 || type == 1) {
1144 cpu_breakpoint_remove(env, addr);
1145 put_packet(s, "OK");
6658ffb8
PB
1146#ifndef CONFIG_USER_ONLY
1147 } else if (type == 2) {
1148 cpu_watchpoint_remove(env, addr);
1149 put_packet(s, "OK");
1150#endif
858693c6
FB
1151 } else {
1152 goto breakpoint_error;
1153 }
1154 break;
978efd6a 1155 case 'q':
60897d36
EI
1156 case 'Q':
1157 /* parse any 'q' packets here */
1158 if (!strcmp(p,"qemu.sstepbits")) {
1159 /* Query Breakpoint bit definitions */
1160 sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1161 SSTEP_ENABLE,
1162 SSTEP_NOIRQ,
1163 SSTEP_NOTIMER);
1164 put_packet(s, buf);
1165 break;
1166 } else if (strncmp(p,"qemu.sstep",10) == 0) {
1167 /* Display or change the sstep_flags */
1168 p += 10;
1169 if (*p != '=') {
1170 /* Display current setting */
1171 sprintf(buf,"0x%x", sstep_flags);
1172 put_packet(s, buf);
1173 break;
1174 }
1175 p++;
1176 type = strtoul(p, (char **)&p, 16);
1177 sstep_flags = type;
1178 put_packet(s, "OK");
1179 break;
1180 }
1181#ifdef CONFIG_LINUX_USER
1182 else if (strncmp(p, "Offsets", 7) == 0) {
978efd6a
PB
1183 TaskState *ts = env->opaque;
1184
fe834d04 1185 sprintf(buf,
cd041681
PB
1186 "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1187 ";Bss=" TARGET_ABI_FMT_lx,
fe834d04
TS
1188 ts->info->code_offset,
1189 ts->info->data_offset,
1190 ts->info->data_offset);
978efd6a
PB
1191 put_packet(s, buf);
1192 break;
1193 }
978efd6a 1194#endif
60897d36 1195 /* Fall through. */
858693c6 1196 default:
858693c6
FB
1197 /* put empty packet */
1198 buf[0] = '\0';
1199 put_packet(s, buf);
1200 break;
1201 }
1202 return RS_IDLE;
1203}
1204
612458f5
FB
1205extern void tb_flush(CPUState *env);
1206
1fddef4b 1207#ifndef CONFIG_USER_ONLY
858693c6
FB
1208static void gdb_vm_stopped(void *opaque, int reason)
1209{
1210 GDBState *s = opaque;
1211 char buf[256];
1212 int ret;
1213
a2d1ebaf
PB
1214 if (s->state == RS_SYSCALL)
1215 return;
1216
858693c6 1217 /* disable single step if it was enable */
6a00d601 1218 cpu_single_step(s->env, 0);
858693c6 1219
e80cfcfc 1220 if (reason == EXCP_DEBUG) {
6658ffb8 1221 if (s->env->watchpoint_hit) {
aa6290b7
PB
1222 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1223 SIGTRAP,
6658ffb8
PB
1224 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1225 put_packet(s, buf);
1226 s->env->watchpoint_hit = 0;
1227 return;
1228 }
6a00d601 1229 tb_flush(s->env);
858693c6 1230 ret = SIGTRAP;
bbeb7b5c
FB
1231 } else if (reason == EXCP_INTERRUPT) {
1232 ret = SIGINT;
1233 } else {
858693c6 1234 ret = 0;
bbeb7b5c 1235 }
858693c6
FB
1236 snprintf(buf, sizeof(buf), "S%02x", ret);
1237 put_packet(s, buf);
1238}
1fddef4b 1239#endif
858693c6 1240
a2d1ebaf
PB
1241/* Send a gdb syscall request.
1242 This accepts limited printf-style format specifiers, specifically:
a87295e8
PB
1243 %x - target_ulong argument printed in hex.
1244 %lx - 64-bit argument printed in hex.
1245 %s - string pointer (target_ulong) and length (int) pair. */
a2d1ebaf
PB
1246void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1247{
1248 va_list va;
1249 char buf[256];
1250 char *p;
1251 target_ulong addr;
a87295e8 1252 uint64_t i64;
a2d1ebaf
PB
1253 GDBState *s;
1254
1255 s = gdb_syscall_state;
1256 if (!s)
1257 return;
1258 gdb_current_syscall_cb = cb;
1259 s->state = RS_SYSCALL;
1260#ifndef CONFIG_USER_ONLY
1261 vm_stop(EXCP_DEBUG);
1262#endif
1263 s->state = RS_IDLE;
1264 va_start(va, fmt);
1265 p = buf;
1266 *(p++) = 'F';
1267 while (*fmt) {
1268 if (*fmt == '%') {
1269 fmt++;
1270 switch (*fmt++) {
1271 case 'x':
1272 addr = va_arg(va, target_ulong);
1273 p += sprintf(p, TARGET_FMT_lx, addr);
1274 break;
a87295e8
PB
1275 case 'l':
1276 if (*(fmt++) != 'x')
1277 goto bad_format;
1278 i64 = va_arg(va, uint64_t);
1279 p += sprintf(p, "%" PRIx64, i64);
1280 break;
a2d1ebaf
PB
1281 case 's':
1282 addr = va_arg(va, target_ulong);
1283 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1284 break;
1285 default:
a87295e8 1286 bad_format:
a2d1ebaf
PB
1287 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1288 fmt - 1);
1289 break;
1290 }
1291 } else {
1292 *(p++) = *(fmt++);
1293 }
1294 }
8a93e02a 1295 *p = 0;
a2d1ebaf
PB
1296 va_end(va);
1297 put_packet(s, buf);
1298#ifdef CONFIG_USER_ONLY
1299 gdb_handlesig(s->env, 0);
1300#else
1301 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1302#endif
1303}
1304
6a00d601 1305static void gdb_read_byte(GDBState *s, int ch)
858693c6 1306{
6a00d601 1307 CPUState *env = s->env;
858693c6 1308 int i, csum;
60fe76f3 1309 uint8_t reply;
858693c6 1310
1fddef4b 1311#ifndef CONFIG_USER_ONLY
4046d913
PB
1312 if (s->last_packet_len) {
1313 /* Waiting for a response to the last packet. If we see the start
1314 of a new command then abandon the previous response. */
1315 if (ch == '-') {
1316#ifdef DEBUG_GDB
1317 printf("Got NACK, retransmitting\n");
1318#endif
ffe8ab83 1319 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
4046d913
PB
1320 }
1321#ifdef DEBUG_GDB
1322 else if (ch == '+')
1323 printf("Got ACK\n");
1324 else
1325 printf("Got '%c' when expecting ACK/NACK\n", ch);
1326#endif
1327 if (ch == '+' || ch == '$')
1328 s->last_packet_len = 0;
1329 if (ch != '$')
1330 return;
1331 }
858693c6
FB
1332 if (vm_running) {
1333 /* when the CPU is running, we cannot do anything except stop
1334 it when receiving a char */
1335 vm_stop(EXCP_INTERRUPT);
5fafdf24 1336 } else
1fddef4b 1337#endif
41625033 1338 {
858693c6
FB
1339 switch(s->state) {
1340 case RS_IDLE:
1341 if (ch == '$') {
1342 s->line_buf_index = 0;
1343 s->state = RS_GETLINE;
c33a346e 1344 }
b4608c04 1345 break;
858693c6
FB
1346 case RS_GETLINE:
1347 if (ch == '#') {
1348 s->state = RS_CHKSUM1;
1349 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1350 s->state = RS_IDLE;
4c3a88a2 1351 } else {
858693c6 1352 s->line_buf[s->line_buf_index++] = ch;
4c3a88a2
FB
1353 }
1354 break;
858693c6
FB
1355 case RS_CHKSUM1:
1356 s->line_buf[s->line_buf_index] = '\0';
1357 s->line_csum = fromhex(ch) << 4;
1358 s->state = RS_CHKSUM2;
1359 break;
1360 case RS_CHKSUM2:
1361 s->line_csum |= fromhex(ch);
1362 csum = 0;
1363 for(i = 0; i < s->line_buf_index; i++) {
1364 csum += s->line_buf[i];
1365 }
1366 if (s->line_csum != (csum & 0xff)) {
60fe76f3
TS
1367 reply = '-';
1368 put_buffer(s, &reply, 1);
858693c6 1369 s->state = RS_IDLE;
4c3a88a2 1370 } else {
60fe76f3
TS
1371 reply = '+';
1372 put_buffer(s, &reply, 1);
1fddef4b 1373 s->state = gdb_handle_packet(s, env, s->line_buf);
4c3a88a2
FB
1374 }
1375 break;
a2d1ebaf
PB
1376 default:
1377 abort();
858693c6
FB
1378 }
1379 }
1380}
1381
1fddef4b
FB
1382#ifdef CONFIG_USER_ONLY
1383int
1384gdb_handlesig (CPUState *env, int sig)
1385{
1386 GDBState *s;
1387 char buf[256];
1388 int n;
1389
1fddef4b 1390 s = &gdbserver_state;
1f487ee9
EI
1391 if (gdbserver_fd < 0 || s->fd < 0)
1392 return sig;
1fddef4b
FB
1393
1394 /* disable single step if it was enabled */
1395 cpu_single_step(env, 0);
1396 tb_flush(env);
1397
1398 if (sig != 0)
1399 {
1400 snprintf(buf, sizeof(buf), "S%02x", sig);
1401 put_packet(s, buf);
1402 }
1f487ee9
EI
1403 /* put_packet() might have detected that the peer terminated the
1404 connection. */
1405 if (s->fd < 0)
1406 return sig;
1fddef4b 1407
1fddef4b
FB
1408 sig = 0;
1409 s->state = RS_IDLE;
41625033
FB
1410 s->running_state = 0;
1411 while (s->running_state == 0) {
1fddef4b
FB
1412 n = read (s->fd, buf, 256);
1413 if (n > 0)
1414 {
1415 int i;
1416
1417 for (i = 0; i < n; i++)
6a00d601 1418 gdb_read_byte (s, buf[i]);
1fddef4b
FB
1419 }
1420 else if (n == 0 || errno != EAGAIN)
1421 {
1422 /* XXX: Connection closed. Should probably wait for annother
1423 connection before continuing. */
1424 return sig;
1425 }
41625033 1426 }
1f487ee9
EI
1427 sig = s->signal;
1428 s->signal = 0;
1fddef4b
FB
1429 return sig;
1430}
e9009676
FB
1431
1432/* Tell the remote gdb that the process has exited. */
1433void gdb_exit(CPUState *env, int code)
1434{
1435 GDBState *s;
1436 char buf[4];
1437
e9009676 1438 s = &gdbserver_state;
1f487ee9
EI
1439 if (gdbserver_fd < 0 || s->fd < 0)
1440 return;
e9009676
FB
1441
1442 snprintf(buf, sizeof(buf), "W%02x", code);
1443 put_packet(s, buf);
1444}
1445
1fddef4b 1446
7c9d8e07 1447static void gdb_accept(void *opaque)
858693c6
FB
1448{
1449 GDBState *s;
1450 struct sockaddr_in sockaddr;
1451 socklen_t len;
1452 int val, fd;
1453
1454 for(;;) {
1455 len = sizeof(sockaddr);
1456 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1457 if (fd < 0 && errno != EINTR) {
1458 perror("accept");
1459 return;
1460 } else if (fd >= 0) {
b4608c04
FB
1461 break;
1462 }
1463 }
858693c6
FB
1464
1465 /* set short latency */
1466 val = 1;
8f447cc7 1467 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
3b46e624 1468
1fddef4b
FB
1469 s = &gdbserver_state;
1470 memset (s, 0, sizeof (GDBState));
6a00d601 1471 s->env = first_cpu; /* XXX: allow to change CPU */
858693c6
FB
1472 s->fd = fd;
1473
a2d1ebaf
PB
1474 gdb_syscall_state = s;
1475
858693c6 1476 fcntl(fd, F_SETFL, O_NONBLOCK);
858693c6
FB
1477}
1478
1479static int gdbserver_open(int port)
1480{
1481 struct sockaddr_in sockaddr;
1482 int fd, val, ret;
1483
1484 fd = socket(PF_INET, SOCK_STREAM, 0);
1485 if (fd < 0) {
1486 perror("socket");
1487 return -1;
1488 }
1489
1490 /* allow fast reuse */
1491 val = 1;
8f447cc7 1492 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
858693c6
FB
1493
1494 sockaddr.sin_family = AF_INET;
1495 sockaddr.sin_port = htons(port);
1496 sockaddr.sin_addr.s_addr = 0;
1497 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1498 if (ret < 0) {
1499 perror("bind");
1500 return -1;
1501 }
1502 ret = listen(fd, 0);
1503 if (ret < 0) {
1504 perror("listen");
1505 return -1;
1506 }
858693c6
FB
1507 return fd;
1508}
1509
1510int gdbserver_start(int port)
1511{
1512 gdbserver_fd = gdbserver_open(port);
1513 if (gdbserver_fd < 0)
1514 return -1;
1515 /* accept connections */
7c9d8e07 1516 gdb_accept (NULL);
4046d913
PB
1517 return 0;
1518}
1fddef4b 1519#else
aa1f17c1 1520static int gdb_chr_can_receive(void *opaque)
4046d913
PB
1521{
1522 return 1;
1523}
1524
aa1f17c1 1525static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
4046d913
PB
1526{
1527 GDBState *s = opaque;
1528 int i;
1529
1530 for (i = 0; i < size; i++) {
1531 gdb_read_byte(s, buf[i]);
1532 }
1533}
1534
1535static void gdb_chr_event(void *opaque, int event)
1536{
1537 switch (event) {
1538 case CHR_EVENT_RESET:
1539 vm_stop(EXCP_INTERRUPT);
a2d1ebaf 1540 gdb_syscall_state = opaque;
4046d913
PB
1541 break;
1542 default:
1543 break;
1544 }
1545}
1546
cfc3475a 1547int gdbserver_start(const char *port)
4046d913
PB
1548{
1549 GDBState *s;
cfc3475a
PB
1550 char gdbstub_port_name[128];
1551 int port_num;
1552 char *p;
1553 CharDriverState *chr;
1554
1555 if (!port || !*port)
1556 return -1;
4046d913 1557
cfc3475a
PB
1558 port_num = strtol(port, &p, 10);
1559 if (*p == 0) {
1560 /* A numeric value is interpreted as a port number. */
1561 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1562 "tcp::%d,nowait,nodelay,server", port_num);
1563 port = gdbstub_port_name;
1564 }
1565
1566 chr = qemu_chr_open(port);
4046d913
PB
1567 if (!chr)
1568 return -1;
1569
1570 s = qemu_mallocz(sizeof(GDBState));
1571 if (!s) {
1572 return -1;
1573 }
1574 s->env = first_cpu; /* XXX: allow to change CPU */
1575 s->chr = chr;
aa1f17c1 1576 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
4046d913
PB
1577 gdb_chr_event, s);
1578 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
b4608c04
FB
1579 return 0;
1580}
4046d913 1581#endif