[mirror_qemu.git] / hw / arm / aspeed.c

/*
 * OpenPOWER Palmetto BMC
 *
 * Andrew Jeffery <andrew@aj.id.au>
 *
 * Copyright 2016 IBM Corp.
 *
 * This code is licensed under the GPL version 2 or later.  See
 * the COPYING file in the top-level directory.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/address-spaces.h"
#include "hw/arm/arm.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/boards.h"
#include "qemu/log.h"
#include "sysemu/block-backend.h"
#include "hw/loader.h"
#include "qemu/error-report.h"

static struct arm_boot_info aspeed_board_binfo = {
    .board_id = -1, /* device-tree-only board */
    .nb_cpus = 1,
};

typedef struct AspeedBoardState {
    AspeedSoCState soc;
    MemoryRegion ram;
} AspeedBoardState;

typedef struct AspeedBoardConfig {
    const char *soc_name;
    uint32_t hw_strap1;
    const char *fmc_model;
    const char *spi_model;
    uint32_t num_cs;
    void (*i2c_init)(AspeedBoardState *bmc);
} AspeedBoardConfig;

enum {
    PALMETTO_BMC,
    AST2500_EVB,
    ROMULUS_BMC,
    WITHERSPOON_BMC,
};

/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 (                                        \
        SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
        SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
        SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
        SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
        SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
        SCU_HW_STRAP_LPC_RESET_PIN |                                    \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
        SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
        SCU_HW_STRAP_SPI_WIDTH |                                        \
        SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
        SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))

/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 ((                                        \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_HW_STRAP_MAC1_RGMII |                                       \
        SCU_HW_STRAP_MAC0_RGMII) &                                      \
        ~SCU_HW_STRAP_2ND_BOOT_WDT)

/* Romulus hardware value: 0xF10AD206 */
#define ROMULUS_BMC_HW_STRAP1 (                                         \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))

/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc);
static void ast2500_evb_i2c_init(AspeedBoardState *bmc);
static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc);

static const AspeedBoardConfig aspeed_boards[] = {
    [PALMETTO_BMC] = {
        .soc_name  = "ast2400-a1",
        .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = palmetto_bmc_i2c_init,
    },
    [AST2500_EVB]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = AST2500_EVB_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = ast2500_evb_i2c_init,
    },
    [ROMULUS_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
    },
    [WITHERSPOON_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
        .fmc_model = "mx25l25635e",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
        .i2c_init  = witherspoon_bmc_i2c_init,
    },
};

#define FIRMWARE_ADDR 0x0

static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
                           Error **errp)
{
    BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
    uint8_t *storage;
    int64_t size;

    /* The block backend size should have already been 'validated' by
     * the creation of the m25p80 object.
     */
    size = blk_getlength(blk);
    if (size <= 0) {
        error_setg(errp, "failed to get flash size");
        return;
    }

    if (rom_size > size) {
        rom_size = size;
    }

    storage = g_new0(uint8_t, rom_size);
    if (blk_pread(blk, 0, storage, rom_size) < 0) {
        error_setg(errp, "failed to read the initial flash content");
        return;
    }

    rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
    g_free(storage);
}

static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
                                      Error **errp)
{
    int i ;

    for (i = 0; i < s->num_cs; ++i) {
        AspeedSMCFlash *fl = &s->flashes[i];
        DriveInfo *dinfo = drive_get_next(IF_MTD);
        qemu_irq cs_line;

        fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
        if (dinfo) {
            qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
                                errp);
        }
        qdev_init_nofail(fl->flash);

        cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
        sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
    }
}

static void aspeed_board_init(MachineState *machine,
                              const AspeedBoardConfig *cfg)
{
    AspeedBoardState *bmc;
    AspeedSoCClass *sc;
    DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);

    bmc = g_new0(AspeedBoardState, 1);
    object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
    object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
                              &error_abort);

    sc = ASPEED_SOC_GET_CLASS(&bmc->soc);

    object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
                             &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
                            &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
                            &error_abort);
    if (machine->kernel_filename) {
        /*
         * When booting with a -kernel command line there is no u-boot
         * that runs to unlock the SCU. In this case set the default to
         * be unlocked as the kernel expects
         */
        object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
                                "hw-prot-key", &error_abort);
    }
    object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
                             &error_abort);

    /*
     * Allocate RAM after the memory controller has checked the size
     * was valid. If not, a default value is used.
     */
    ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
                                        &error_abort);

    memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
    memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
                                &bmc->ram);
    object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
                                   &error_abort);

    aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
    aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);

    /* Install first FMC flash content as a boot rom. */
    if (drive0) {
        AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
        MemoryRegion *boot_rom = g_new(MemoryRegion, 1);

        /*
         * create a ROM region using the default mapping window size of
         * the flash module. The window size is 64MB for the AST2400
         * SoC and 128MB for the AST2500 SoC, which is twice as big as
         * needed by the flash modules of the Aspeed machines.
         */
        memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
                               fl->size, &error_abort);
        memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
                                    boot_rom);
        write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
    }

    aspeed_board_binfo.kernel_filename = machine->kernel_filename;
    aspeed_board_binfo.initrd_filename = machine->initrd_filename;
    aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
    aspeed_board_binfo.ram_size = ram_size;
    aspeed_board_binfo.loader_start = sc->info->sdram_base;

    if (cfg->i2c_init) {
        cfg->i2c_init(bmc);
    }

    arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
}

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;
    DeviceState *dev;

    /* The palmetto platform expects a ds3231 RTC but a ds1338 is
     * enough to provide basic RTC features. Alarms will be missing */
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);

    /* add a TMP423 temperature sensor */
    dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
                           "tmp423", 0x4c);
    object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
    object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
    object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
    object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
}

static void palmetto_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
}

static void palmetto_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
    mc->init = palmetto_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo palmetto_bmc_type = {
    .name = MACHINE_TYPE_NAME("palmetto-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = palmetto_bmc_class_init,
};

static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;

    /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d);
}

static void ast2500_evb_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
}

static void ast2500_evb_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "Aspeed AST2500 EVB (ARM1176)";
    mc->init = ast2500_evb_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo ast2500_evb_type = {
    .name = MACHINE_TYPE_NAME("ast2500-evb"),
    .parent = TYPE_MACHINE,
    .class_init = ast2500_evb_class_init,
};

static void romulus_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
}

static void romulus_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
    mc->init = romulus_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo romulus_bmc_type = {
    .name = MACHINE_TYPE_NAME("romulus-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = romulus_bmc_class_init,
};

static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;

    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);

    /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp105", 0x4a);
}

static void witherspoon_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[WITHERSPOON_BMC]);
}

static void witherspoon_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
    mc->init = witherspoon_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo witherspoon_bmc_type = {
    .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = witherspoon_bmc_class_init,
};

static void aspeed_machine_init(void)
{
    type_register_static(&palmetto_bmc_type);
    type_register_static(&ast2500_evb_type);
    type_register_static(&romulus_bmc_type);
    type_register_static(&witherspoon_bmc_type);
}

type_init(aspeed_machine_init)
Commit	Line	Data
327d8e4e AJ	1	/*
	2	* OpenPOWER Palmetto BMC
	3	*
	4	* Andrew Jeffery <andrew@aj.id.au>
	5	*
	6	* Copyright 2016 IBM Corp.
	7	*
	8	* This code is licensed under the GPL version 2 or later. See
	9	* the COPYING file in the top-level directory.
	10	*/
	11
	12	#include "qemu/osdep.h"
da34e65c	13	#include "qapi/error.h"
4771d756 PB	14	#include "qemu-common.h"
4771d756 PB	15	#include "cpu.h"
327d8e4e AJ	16	#include "exec/address-spaces.h"
327d8e4e AJ	17	#include "hw/arm/arm.h"
00442402	18	#include "hw/arm/aspeed_soc.h"
327d8e4e	19	#include "hw/boards.h"
03dd024f	20	#include "qemu/log.h"
e1ad9bc4	21	#include "sysemu/block-backend.h"
d769a1da CLG	22	#include "hw/loader.h"
d769a1da CLG	23	#include "qemu/error-report.h"
327d8e4e	24
74fb1f38	25	static struct arm_boot_info aspeed_board_binfo = {
b033271f	26	.board_id = -1, /* device-tree-only board */
327d8e4e AJ	27	.nb_cpus = 1,
	28	};
	29
74fb1f38	30	typedef struct AspeedBoardState {
ff90606f	31	AspeedSoCState soc;
327d8e4e	32	MemoryRegion ram;
74fb1f38	33	} AspeedBoardState;
327d8e4e	34
c3ba99f7 CLG	35	typedef struct AspeedBoardConfig {
	36	const char *soc_name;
	37	uint32_t hw_strap1;
6a0e947b CLG	38	const char *fmc_model;
6a0e947b CLG	39	const char *spi_model;
26d5df95	40	uint32_t num_cs;
2cf6cb50	41	void (i2c_init)(AspeedBoardState bmc);
c3ba99f7 CLG	42	} AspeedBoardConfig;
	43
	44	enum {
	45	PALMETTO_BMC,
9a7c1750	46	AST2500_EVB,
ef17f836	47	ROMULUS_BMC,
62c2c2eb	48	WITHERSPOON_BMC,
c3ba99f7 CLG	49	};
c3ba99f7 CLG	50
ef17f836	51	/* Palmetto hardware value: 0x120CE416 */
8da33ef7 CLG	52	#define PALMETTO_BMC_HW_STRAP1 ( \
	53	SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) \| \
	54	SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) \| \
	55	SCU_AST2400_HW_STRAP_ACPI_DIS \| \
	56	SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) \| \
	57	SCU_HW_STRAP_VGA_CLASS_CODE \| \
	58	SCU_HW_STRAP_LPC_RESET_PIN \| \
	59	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) \| \
	60	SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) \| \
	61	SCU_HW_STRAP_SPI_WIDTH \| \
	62	SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) \| \
	63	SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
	64
ef17f836	65	/* AST2500 evb hardware value: 0xF100C2E6 */
9a7c1750 CLG	66	#define AST2500_EVB_HW_STRAP1 (( \
	67	AST2500_HW_STRAP1_DEFAULTS \| \
	68	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	69	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	70	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	71	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	72	SCU_HW_STRAP_MAC1_RGMII \| \
	73	SCU_HW_STRAP_MAC0_RGMII) & \
	74	~SCU_HW_STRAP_2ND_BOOT_WDT)
	75
ef17f836 CLG	76	/* Romulus hardware value: 0xF10AD206 */
	77	#define ROMULUS_BMC_HW_STRAP1 ( \
	78	AST2500_HW_STRAP1_DEFAULTS \| \
	79	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	80	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	81	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	82	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	83	SCU_AST2500_HW_STRAP_ACPI_ENABLE \| \
	84	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
	85
62c2c2eb CLG	86	/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
	87	#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
	88
2cf6cb50 CLG	89	static void palmetto_bmc_i2c_init(AspeedBoardState *bmc);
2cf6cb50 CLG	90	static void ast2500_evb_i2c_init(AspeedBoardState *bmc);
62c2c2eb	91	static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc);
2cf6cb50	92
c3ba99f7	93	static const AspeedBoardConfig aspeed_boards[] = {
6a0e947b	94	[PALMETTO_BMC] = {
bd407a21	95	.soc_name = "ast2400-a1",
6a0e947b CLG	96	.hw_strap1 = PALMETTO_BMC_HW_STRAP1,
	97	.fmc_model = "n25q256a",
	98	.spi_model = "mx25l25635e",
26d5df95	99	.num_cs = 1,
2cf6cb50	100	.i2c_init = palmetto_bmc_i2c_init,
6a0e947b CLG	101	},
	102	[AST2500_EVB] = {
	103	.soc_name = "ast2500-a1",
	104	.hw_strap1 = AST2500_EVB_HW_STRAP1,
	105	.fmc_model = "n25q256a",
	106	.spi_model = "mx25l25635e",
26d5df95	107	.num_cs = 1,
2cf6cb50	108	.i2c_init = ast2500_evb_i2c_init,
6a0e947b	109	},
ef17f836 CLG	110	[ROMULUS_BMC] = {
	111	.soc_name = "ast2500-a1",
	112	.hw_strap1 = ROMULUS_BMC_HW_STRAP1,
	113	.fmc_model = "n25q256a",
	114	.spi_model = "mx66l1g45g",
26d5df95	115	.num_cs = 2,
ef17f836	116	},
62c2c2eb CLG	117	[WITHERSPOON_BMC] = {
	118	.soc_name = "ast2500-a1",
	119	.hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
	120	.fmc_model = "mx25l25635e",
	121	.spi_model = "mx66l1g45g",
	122	.num_cs = 2,
	123	.i2c_init = witherspoon_bmc_i2c_init,
	124	},
c3ba99f7 CLG	125	};
c3ba99f7 CLG	126
d769a1da CLG	127	#define FIRMWARE_ADDR 0x0
	128
	129	static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
	130	Error **errp)
	131	{
	132	BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
	133	uint8_t *storage;
0c7209be CLG	134	int64_t size;
	135
	136	/* The block backend size should have already been 'validated' by
	137	* the creation of the m25p80 object.
	138	*/
	139	size = blk_getlength(blk);
	140	if (size <= 0) {
	141	error_setg(errp, "failed to get flash size");
	142	return;
	143	}
d769a1da	144
0c7209be CLG	145	if (rom_size > size) {
0c7209be CLG	146	rom_size = size;
d769a1da CLG	147	}
	148
	149	storage = g_new0(uint8_t, rom_size);
	150	if (blk_pread(blk, 0, storage, rom_size) < 0) {
	151	error_setg(errp, "failed to read the initial flash content");
	152	return;
	153	}
	154
	155	rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
	156	g_free(storage);
	157	}
	158
74fb1f38	159	static void aspeed_board_init_flashes(AspeedSMCState s, const char flashtype,
e1ad9bc4 CLG	160	Error **errp)
	161	{
	162	int i ;
	163
	164	for (i = 0; i < s->num_cs; ++i) {
	165	AspeedSMCFlash *fl = &s->flashes[i];
	166	DriveInfo *dinfo = drive_get_next(IF_MTD);
	167	qemu_irq cs_line;
	168
e1ad9bc4 CLG	169	fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
	170	if (dinfo) {
	171	qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
	172	errp);
	173	}
	174	qdev_init_nofail(fl->flash);
	175
	176	cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
	177	sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
	178	}
	179	}
	180
c3ba99f7 CLG	181	static void aspeed_board_init(MachineState *machine,
c3ba99f7 CLG	182	const AspeedBoardConfig *cfg)
327d8e4e	183	{
74fb1f38	184	AspeedBoardState *bmc;
b033271f	185	AspeedSoCClass *sc;
d769a1da	186	DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
327d8e4e	187
74fb1f38	188	bmc = g_new0(AspeedBoardState, 1);
c3ba99f7	189	object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
327d8e4e AJ	190	object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
	191	&error_abort);
	192
b033271f CLG	193	sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
b033271f CLG	194
19e9cdf0 MAL	195	object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
19e9cdf0 MAL	196	&error_abort);
c3ba99f7	197	object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
87e79af0	198	&error_abort);
26d5df95 CLG	199	object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
26d5df95 CLG	200	&error_abort);
b6e70d1d JS	201	if (machine->kernel_filename) {
	202	/*
	203	* When booting with a -kernel command line there is no u-boot
	204	* that runs to unlock the SCU. In this case set the default to
	205	* be unlocked as the kernel expects
	206	*/
	207	object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
	208	"hw-prot-key", &error_abort);
	209	}
327d8e4e AJ	210	object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
	211	&error_abort);
	212
de46f5f4 CLG	213	/*
	214	* Allocate RAM after the memory controller has checked the size
	215	* was valid. If not, a default value is used.
	216	*/
19e9cdf0 MAL	217	ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
19e9cdf0 MAL	218	&error_abort);
de46f5f4 CLG	219
	220	memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
	221	memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
	222	&bmc->ram);
	223	object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
	224	&error_abort);
	225
6a0e947b CLG	226	aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
6a0e947b CLG	227	aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
74fb1f38	228
d769a1da CLG	229	/* Install first FMC flash content as a boot rom. */
	230	if (drive0) {
	231	AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
	232	MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
	233
	234	/*
	235	* create a ROM region using the default mapping window size of
93bf276d CLG	236	* the flash module. The window size is 64MB for the AST2400
	237	* SoC and 128MB for the AST2500 SoC, which is twice as big as
	238	* needed by the flash modules of the Aspeed machines.
d769a1da	239	*/
44cf837d	240	memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
d769a1da CLG	241	fl->size, &error_abort);
	242	memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
	243	boot_rom);
	244	write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
	245	}
	246
74fb1f38 CLG	247	aspeed_board_binfo.kernel_filename = machine->kernel_filename;
	248	aspeed_board_binfo.initrd_filename = machine->initrd_filename;
	249	aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
	250	aspeed_board_binfo.ram_size = ram_size;
	251	aspeed_board_binfo.loader_start = sc->info->sdram_base;
e1ad9bc4	252
2cf6cb50 CLG	253	if (cfg->i2c_init) {
	254	cfg->i2c_init(bmc);
	255	}
	256
74fb1f38 CLG	257	arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
74fb1f38 CLG	258	}
b033271f	259
2cf6cb50 CLG	260	static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
	261	{
	262	AspeedSoCState *soc = &bmc->soc;
a87e81b9	263	DeviceState *dev;
2cf6cb50 CLG	264
	265	/* The palmetto platform expects a ds3231 RTC but a ds1338 is
	266	* enough to provide basic RTC features. Alarms will be missing */
	267	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
a87e81b9 CLG	268
	269	/* add a TMP423 temperature sensor */
	270	dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
	271	"tmp423", 0x4c);
	272	object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
	273	object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
	274	object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
	275	object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
2cf6cb50 CLG	276	}
2cf6cb50 CLG	277
74fb1f38 CLG	278	static void palmetto_bmc_init(MachineState *machine)
74fb1f38 CLG	279	{
c3ba99f7	280	aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
327d8e4e AJ	281	}
327d8e4e AJ	282
74fb1f38	283	static void palmetto_bmc_class_init(ObjectClass oc, void data)
327d8e4e	284	{
74fb1f38 CLG	285	MachineClass *mc = MACHINE_CLASS(oc);
	286
	287	mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
327d8e4e AJ	288	mc->init = palmetto_bmc_init;
	289	mc->max_cpus = 1;
	290	mc->no_sdcard = 1;
	291	mc->no_floppy = 1;
	292	mc->no_cdrom = 1;
327d8e4e AJ	293	mc->no_parallel = 1;
	294	}
	295
74fb1f38 CLG	296	static const TypeInfo palmetto_bmc_type = {
	297	.name = MACHINE_TYPE_NAME("palmetto-bmc"),
	298	.parent = TYPE_MACHINE,
	299	.class_init = palmetto_bmc_class_init,
	300	};
	301
2cf6cb50 CLG	302	static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
	303	{
	304	AspeedSoCState *soc = &bmc->soc;
	305
	306	/* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
	307	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d);
	308	}
	309
9a7c1750 CLG	310	static void ast2500_evb_init(MachineState *machine)
	311	{
	312	aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
	313	}
	314
	315	static void ast2500_evb_class_init(ObjectClass oc, void data)
	316	{
	317	MachineClass *mc = MACHINE_CLASS(oc);
	318
	319	mc->desc = "Aspeed AST2500 EVB (ARM1176)";
	320	mc->init = ast2500_evb_init;
	321	mc->max_cpus = 1;
	322	mc->no_sdcard = 1;
	323	mc->no_floppy = 1;
	324	mc->no_cdrom = 1;
	325	mc->no_parallel = 1;
	326	}
	327
	328	static const TypeInfo ast2500_evb_type = {
	329	.name = MACHINE_TYPE_NAME("ast2500-evb"),
	330	.parent = TYPE_MACHINE,
	331	.class_init = ast2500_evb_class_init,
	332	};
	333
ef17f836 CLG	334	static void romulus_bmc_init(MachineState *machine)
	335	{
	336	aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
	337	}
	338
	339	static void romulus_bmc_class_init(ObjectClass oc, void data)
	340	{
	341	MachineClass *mc = MACHINE_CLASS(oc);
	342
	343	mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
	344	mc->init = romulus_bmc_init;
	345	mc->max_cpus = 1;
	346	mc->no_sdcard = 1;
	347	mc->no_floppy = 1;
	348	mc->no_cdrom = 1;
	349	mc->no_parallel = 1;
	350	}
	351
	352	static const TypeInfo romulus_bmc_type = {
	353	.name = MACHINE_TYPE_NAME("romulus-bmc"),
	354	.parent = TYPE_MACHINE,
	355	.class_init = romulus_bmc_class_init,
	356	};
	357
62c2c2eb CLG	358	static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
	359	{
	360	AspeedSoCState *soc = &bmc->soc;
	361
	362	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
	363	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
	364
	365	/* The Witherspoon expects a TMP275 but a TMP105 is compatible */
	366	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp105", 0x4a);
	367	}
	368
	369	static void witherspoon_bmc_init(MachineState *machine)
	370	{
	371	aspeed_board_init(machine, &aspeed_boards[WITHERSPOON_BMC]);
	372	}
	373
	374	static void witherspoon_bmc_class_init(ObjectClass oc, void data)
	375	{
	376	MachineClass *mc = MACHINE_CLASS(oc);
	377
	378	mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
	379	mc->init = witherspoon_bmc_init;
	380	mc->max_cpus = 1;
	381	mc->no_sdcard = 1;
	382	mc->no_floppy = 1;
	383	mc->no_cdrom = 1;
	384	mc->no_parallel = 1;
	385	}
	386
	387	static const TypeInfo witherspoon_bmc_type = {
	388	.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
	389	.parent = TYPE_MACHINE,
	390	.class_init = witherspoon_bmc_class_init,
	391	};
	392
74fb1f38 CLG	393	static void aspeed_machine_init(void)
	394	{
	395	type_register_static(&palmetto_bmc_type);
9a7c1750	396	type_register_static(&ast2500_evb_type);
ef17f836	397	type_register_static(&romulus_bmc_type);
62c2c2eb	398	type_register_static(&witherspoon_bmc_type);
74fb1f38 CLG	399	}
	400
	401	type_init(aspeed_machine_init)