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accel/tcg: Replace CPUState.env_ptr with cpu_env()
[mirror_qemu.git] / hw / i386 / pc_q35.c
CommitLineData
df2d8b3e
IY		 1/*
2 * Q35 chipset based pc system emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2009, 2010
6 * Isaku Yamahata <yamahata at valinux co jp>
7 * VA Linux Systems Japan K.K.
8 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 *
10 * This is based on pc.c, but heavily modified.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a copy
13 * of this software and associated documentation files (the "Software"), to deal
14 * in the Software without restriction, including without limitation the rights
15 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
16 * copies of the Software, and to permit persons to whom the Software is
17 * furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice shall be included in
20 * all copies or substantial portions of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 * THE SOFTWARE.
29 */
e688df6b 30
b6a0aa05 31#include "qemu/osdep.h"
d471bf3e 32#include "qemu/units.h"
9cc44d9b 33#include "hw/char/parallel-isa.h"
04920fc0 34#include "hw/loader.h"
93198b6c 35#include "hw/i2c/smbus_eeprom.h"
bcdb9064 36#include "hw/rtc/mc146818rtc.h"
e44d989a 37#include "sysemu/tcg.h"
9c17d615 38#include "sysemu/kvm.h"
a09ef8ff 39#include "hw/i386/kvm/clock.h"
0d09e41a 40#include "hw/pci-host/q35.h"
3f3cbbb2 41#include "hw/pci/pcie_port.h"
a27bd6c7 42#include "hw/qdev-properties.h"
549e984e 43#include "hw/i386/x86.h"
b094f2e0 44#include "hw/i386/pc.h"
ef18310d
EH		 45#include "hw/i386/amd_iommu.h"
46#include "hw/i386/intel_iommu.h"
94692dcd 47#include "hw/display/ramfb.h"
a2eb5c0c 48#include "hw/firmware/smbios.h"
df2d8b3e
IY		 49#include "hw/ide/pci.h"
50#include "hw/ide/ahci.h"
7f54640b 51#include "hw/intc/ioapic.h"
1a6981bb 52#include "hw/southbridge/ich9.h"
df2d8b3e 53#include "hw/usb.h"
f0712099 54#include "hw/usb/hcd-uhci.h"
e688df6b 55#include "qapi/error.h"
c87b1520 56#include "qemu/error-report.h"
3bfe5716 57#include "sysemu/numa.h"
cab78e7c 58#include "hw/hyperv/vmbus-bridge.h"
4b997690 59#include "hw/mem/nvdimm.h"
5c94b826 60#include "hw/i386/acpi-build.h"
d1aa2f50 61#include "target/i386/cpu.h"
df2d8b3e
IY		 62
63/* ICH9 AHCI has 6 ports */
64#define MAX_SATA_PORTS 6
65
efce3175
PB		 66struct ehci_companions {
67 const char *name;
68 int func;
69 int port;
70};
71
72static const struct ehci_companions ich9_1d[] = {
f0712099
BB		 73 { .name = TYPE_ICH9_USB_UHCI(1), .func = 0, .port = 0 },
74 { .name = TYPE_ICH9_USB_UHCI(2), .func = 1, .port = 2 },
75 { .name = TYPE_ICH9_USB_UHCI(3), .func = 2, .port = 4 },
efce3175
PB		 76};
77
78static const struct ehci_companions ich9_1a[] = {
f0712099
BB		 79 { .name = TYPE_ICH9_USB_UHCI(4), .func = 0, .port = 0 },
80 { .name = TYPE_ICH9_USB_UHCI(5), .func = 1, .port = 2 },
81 { .name = TYPE_ICH9_USB_UHCI(6), .func = 2, .port = 4 },
efce3175
PB		 82};
83
84static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
85{
86 const struct ehci_companions *comp;
87 PCIDevice *ehci, *uhci;
88 BusState *usbbus;
89 const char *name;
90 int i;
91
92 switch (slot) {
93 case 0x1d:
94 name = "ich9-usb-ehci1";
95 comp = ich9_1d;
96 break;
97 case 0x1a:
98 name = "ich9-usb-ehci2";
99 comp = ich9_1a;
100 break;
101 default:
102 return -1;
103 }
104
c925f40a 105 ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), name);
9307d06d 106 pci_realize_and_unref(ehci, bus, &error_fatal);
efce3175
PB		 107 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
108
109 for (i = 0; i < 3; i++) {
c925f40a 110 uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func),
9307d06d 111 comp[i].name);
efce3175
PB		 112 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
113 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
9307d06d 114 pci_realize_and_unref(uhci, bus, &error_fatal);
efce3175
PB		 115 }
116 return 0;
117}
118
df2d8b3e 119/* PC hardware initialisation */
3ef96221 120static void pc_q35_init(MachineState *machine)
df2d8b3e 121{
ec68007a 122 PCMachineState *pcms = PC_MACHINE(machine);
7102fa70 123 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
f0bb276b 124 X86MachineState *x86ms = X86_MACHINE(machine);
00f52e77 125 Object *phb;
df2d8b3e
IY		 126 PCIBus *host_bus;
127 PCIDevice *lpc;
f999c0de 128 DeviceState *lpc_dev;
df2d8b3e
IY		 129 BusState *idebus[MAX_SATA_PORTS];
130 ISADevice *rtc_state;
8631743c 131 MemoryRegion *system_memory = get_system_memory();
5fe79386 132 MemoryRegion *system_io = get_system_io();
df2d8b3e
IY		 133 MemoryRegion *pci_memory;
134 MemoryRegion *rom_memory;
df2d8b3e
IY		 135 GSIState *gsi_state;
136 ISABus *isa_bus;
df2d8b3e 137 int i;
df2d8b3e 138 PCIDevice *ahci;
c87b1520 139 ram_addr_t lowmem;
d93162e1 140 DriveInfo *hd[MAX_SATA_PORTS];
6cd2234c 141 MachineClass *mc = MACHINE_GET_CLASS(machine);
3f3cbbb2 142 bool acpi_pcihp;
c318bef7 143 bool keep_pci_slot_hpc;
c48eb7a4 144 uint64_t pci_hole64_size = 0;
f0513d2c 145
4e17997d
MT		 146 /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
147 * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
148 * also known as MMCFG).
149 * If it doesn't, we need to split it in chunks below and above 4G.
150 * In any case, try to make sure that guest addresses aligned at
151 * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
4e17997d 152 */
3ef96221 153 if (machine->ram_size >= 0xb0000000) {
533e8bbb 154 lowmem = 0x80000000;
c87b1520
DS		 155 } else {
156 lowmem = 0xb0000000;
157 }
158
a9dd38db 159 /* Handle the machine opt max-ram-below-4g. It is basically doing
c87b1520
DS		 160 * min(qemu limit, user limit).
161 */
9a45729d
GH		 162 if (!pcms->max_ram_below_4g) {
163 pcms->max_ram_below_4g = 4 * GiB;
5ec7d098 164 }
9a45729d
GH		 165 if (lowmem > pcms->max_ram_below_4g) {
166 lowmem = pcms->max_ram_below_4g;
c87b1520 167 if (machine->ram_size - lowmem > lowmem &&
d471bf3e 168 lowmem & (1 * GiB - 1)) {
9e5d2c52
AF		 169 warn_report("There is possibly poor performance as the ram size "
170 " (0x%" PRIx64 ") is more then twice the size of"
171 " max-ram-below-4g (%"PRIu64") and"
172 " max-ram-below-4g is not a multiple of 1G.",
9a45729d 173 (uint64_t)machine->ram_size, pcms->max_ram_below_4g);
c87b1520
DS		 174 }
175 }
176
177 if (machine->ram_size >= lowmem) {
f0bb276b
PB		 178 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
179 x86ms->below_4g_mem_size = lowmem;
df2d8b3e 180 } else {
f0bb276b
PB		 181 x86ms->above_4g_mem_size = 0;
182 x86ms->below_4g_mem_size = machine->ram_size;
df2d8b3e
IY		 183 }
184
97488c63 185 pc_machine_init_sgx_epc(pcms);
703a548a 186 x86_cpus_init(x86ms, pcmc->default_cpu_version);
3c2a9669 187
b797c98d
PMD		 188 if (kvm_enabled()) {
189 kvmclock_create(pcmc->kvmclock_create_always);
190 }
3c2a9669 191
df2d8b3e 192 /* pci enabled */
7102fa70 193 if (pcmc->pci_enabled) {
df2d8b3e 194 pci_memory = g_new(MemoryRegion, 1);
286690e3 195 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
df2d8b3e
IY		 196 rom_memory = pci_memory;
197 } else {
198 pci_memory = NULL;
8631743c 199 rom_memory = system_memory;
df2d8b3e
IY		 200 }
201
5db3f0de 202 pc_guest_info_init(pcms);
07fb6176 203
7102fa70 204 if (pcmc->smbios_defaults) {
b29ad07e 205 /* These values are guest ABI, do not change */
1e366da0 206 smbios_set_defaults("QEMU", mc->desc,
7102fa70
EH		 207 mc->name, pcmc->smbios_legacy_mode,
208 pcmc->smbios_uuid_encoded,
0e4edb3b 209 pcms->smbios_entry_point_type);
b29ad07e
MA		 210 }
211
df2d8b3e 212 /* create pci host bus */
00f52e77 213 phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE));
df2d8b3e 214
c48eb7a4 215 if (pcmc->pci_enabled) {
00f52e77 216 pci_hole64_size = object_property_get_uint(phb,
c48eb7a4
JM		 217 PCI_HOST_PROP_PCI_HOLE64_SIZE,
218 &error_abort);
219 }
220
48767787 221 /* allocate ram and load rom/bios */
f9fddaf7 222 pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size);
48767787 223
00f52e77 224 object_property_add_child(OBJECT(machine), "q35", phb);
3d664a9a 225 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
f9fddaf7 226 OBJECT(machine->ram), NULL);
3d664a9a 227 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
5325cc34 228 OBJECT(pci_memory), NULL);
3d664a9a 229 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
8631743c 230 OBJECT(system_memory), NULL);
3d664a9a 231 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
5325cc34 232 OBJECT(system_io), NULL);
00f52e77 233 object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
5325cc34 234 x86ms->below_4g_mem_size, NULL);
00f52e77 235 object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
5325cc34 236 x86ms->above_4g_mem_size, NULL);
e36102cb
BB		 237 object_property_set_bool(phb, PCI_HOST_BYPASS_IOMMU,
238 pcms->default_bus_bypass_iommu, NULL);
06a492bd 239 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
00f52e77 240
df2d8b3e 241 /* pci */
00f52e77 242 host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
06a492bd
BB		 243 pcms->bus = host_bus;
244
df2d8b3e 245 /* create ISA bus */
c925f40a 246 lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC),
ecf403cb 247 TYPE_ICH9_LPC_DEVICE);
20fe3af2
BB		 248 qdev_prop_set_bit(DEVICE(lpc), "smm-enabled",
249 x86_machine_is_smm_enabled(x86ms));
ecf403cb 250 pci_realize_and_unref(lpc, host_bus, &error_fatal);
781bbd6b 251
f0bc6bf7
BB		 252 rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
253
781bbd6b
IM		 254 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
255 TYPE_HOTPLUG_HANDLER,
50aef131 256 (Object **)&x86ms->acpi_dev,
781bbd6b 257 object_property_allow_set_link,
d2623129 258 OBJ_PROP_LINK_STRONG);
5325cc34
MA		 259 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
260 OBJECT(lpc), &error_abort);
781bbd6b 261
3f3cbbb2 262 acpi_pcihp = object_property_get_bool(OBJECT(lpc),
aa29466b 263 ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
3f3cbbb2
JS		 264 NULL);
265
c318bef7
JS		 266 keep_pci_slot_hpc = object_property_get_bool(OBJECT(lpc),
267 "x-keep-pci-slot-hpc",
268 NULL);
269
270 if (!keep_pci_slot_hpc && acpi_pcihp) {
1d77e157
IM		 271 object_register_sugar_prop(TYPE_PCIE_SLOT,
272 "x-do-not-expose-native-hotplug-cap",
273 "true", true);
3f3cbbb2
JS		 274 }
275
b00c6f18
PMD		 276 /* irq lines */
277 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
278
f999c0de 279 lpc_dev = DEVICE(lpc);
e3e3a8ad 280 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
f0bb276b 281 qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
f999c0de 282 }
958f8182 283 isa_bus = ISA_BUS(qdev_get_child_bus(lpc_dev, "isa.0"));
df2d8b3e 284
c300bbe8
XL		 285 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
286 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
287 }
8197e24c 288
7102fa70 289 if (pcmc->pci_enabled) {
552b48f4 290 ioapic_init_gsi(gsi_state, "q35");
df2d8b3e
IY		 291 }
292
6f529b75
PB		 293 if (tcg_enabled()) {
294 x86_register_ferr_irq(x86ms->gsi[13]);
295 }
df2d8b3e 296
7fb1cf16 297 assert(pcms->vmport != ON_OFF_AUTO__MAX);
ec68007a 298 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
b2a3b8d7 299 pcms->vmport = ON_OFF_AUTO_ON;
d1048bef
DS		 300 }
301
df2d8b3e 302 /* init basic PC hardware */
87af48a4 303 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, !mc->no_floppy,
feddd2fd 304 0xff0104);
df2d8b3e 305
f5878b03 306 if (pcms->sata_enabled) {
272f0428
CP		 307 /* ahci and SATA device, for q35 1 ahci controller is built-in */
308 ahci = pci_create_simple_multifunction(host_bus,
309 PCI_DEVFN(ICH9_SATA1_DEV,
310 ICH9_SATA1_FUNC),
e052944a 311 "ich9-ahci");
272f0428
CP		 312 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
313 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
bbe3179a
JS		 314 g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
315 ide_drive_get(hd, ahci_get_num_ports(ahci));
272f0428
CP		 316 ahci_ide_create_devs(ahci, hd);
317 } else {
318 idebus[0] = idebus[1] = NULL;
319 }
df2d8b3e 320
4bcbe0b6 321 if (machine_usb(machine)) {
df2d8b3e
IY		 322 /* Should we create 6 UHCI according to ich9 spec? */
323 ehci_create_ich9_with_companions(host_bus, 0x1d);
324 }
325
f5878b03 326 if (pcms->smbus_enabled) {
07981e8f
BB		 327 PCIDevice *smb;
328
be232eb0 329 /* TODO: Populate SPD eeprom data. */
07981e8f
BB		 330 smb = pci_create_simple_multifunction(host_bus,
331 PCI_DEVFN(ICH9_SMB_DEV,
332 ICH9_SMB_FUNC),
e052944a 333 TYPE_ICH9_SMB_DEVICE);
07981e8f
BB		 334 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(smb), "i2c"));
335
ebe15582 336 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
be232eb0 337 }
df2d8b3e 338
88076854 339 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
df2d8b3e
IY		 340
341 /* the rest devices to which pci devfn is automatically assigned */
342 pc_vga_init(isa_bus, host_bus);
4b9c264b 343 pc_nic_init(pcmc, isa_bus, host_bus);
5fe79386 344
f6a0d06b
EA		 345 if (machine->nvdimms_state->is_enabled) {
346 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
5c94b826 347 x86_nvdimm_acpi_dsmio,
f0bb276b 348 x86ms->fw_cfg, OBJECT(pcms));
5fe79386 349 }
df2d8b3e
IY		 350}
351
99fbeafe
EH		 352#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
353 static void pc_init_##suffix(MachineState *machine) \
354 { \
355 void (*compat)(MachineState *m) = (compatfn); \
356 if (compat) { \
357 compat(machine); \
358 } \
359 pc_q35_init(machine); \
360 } \
361 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
3458b2b0 362
9953f882 363
865906f7 364static void pc_q35_machine_options(MachineClass *m)
fddd179a 365{
4b9c264b 366 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
0a343a5a 367 pcmc->pci_root_uid = 0;
5719a179 368 pcmc->default_cpu_version = 1;
4b9c264b 369
fddd179a
EH		 370 m->family = "pc_q35";
371 m->desc = "Standard PC (Q35 + ICH9, 2009)";
fddd179a 372 m->units_per_default_bus = 1;
0b7783a7
EH		 373 m->default_machine_opts = "firmware=bios-256k.bin";
374 m->default_display = "std";
01ecdaa4 375 m->default_nic = "e1000e";
c87759ce 376 m->default_kernel_irqchip_split = false;
0b7783a7 377 m->no_floppy = 1;
e0001297 378 m->max_cpus = 1024;
545d8574 379 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
ef18310d
EH		 380 machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
381 machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
94692dcd 382 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
cab78e7c 383 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
fddd179a
EH		 384}
385
95f5c89e 386static void pc_q35_8_2_machine_options(MachineClass *m)
87e896ab
EH		 387{
388 pc_q35_machine_options(m);
389 m->alias = "q35";
a6fd5b0e
MA		 390}
391
95f5c89e
CH		 392DEFINE_Q35_MACHINE(v8_2, "pc-q35-8.2", NULL,
393 pc_q35_8_2_machine_options);
394
395static void pc_q35_8_1_machine_options(MachineClass *m)
396{
397 pc_q35_8_2_machine_options(m);
398 m->alias = NULL;
399 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
400 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
401}
402
f9be4771
CH		 403DEFINE_Q35_MACHINE(v8_1, "pc-q35-8.1", NULL,
404 pc_q35_8_1_machine_options);
405
406static void pc_q35_8_0_machine_options(MachineClass *m)
407{
bf376f30
SS		 408 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
409
f9be4771 410 pc_q35_8_1_machine_options(m);
f9be4771
CH		 411 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
412 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
bf376f30
SS		 413
414 /* For pc-q35-8.0 and older, use SMBIOS 2.8 by default */
415 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
e0001297 416 m->max_cpus = 288;
f9be4771
CH		 417}
418
db723c80
CH		 419DEFINE_Q35_MACHINE(v8_0, "pc-q35-8.0", NULL,
420 pc_q35_8_0_machine_options);
421
422static void pc_q35_7_2_machine_options(MachineClass *m)
423{
424 pc_q35_8_0_machine_options(m);
db723c80
CH		 425 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
426 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
427}
428
f514e147
CH		 429DEFINE_Q35_MACHINE(v7_2, "pc-q35-7.2", NULL,
430 pc_q35_7_2_machine_options);
431
432static void pc_q35_7_1_machine_options(MachineClass *m)
433{
434 pc_q35_7_2_machine_options(m);
f514e147
CH		 435 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
436 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
437}
438
0ca70366
CH		 439DEFINE_Q35_MACHINE(v7_1, "pc-q35-7.1", NULL,
440 pc_q35_7_1_machine_options);
441
442static void pc_q35_7_0_machine_options(MachineClass *m)
443{
67f7e426 444 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
0ca70366 445 pc_q35_7_1_machine_options(m);
b3e6982b 446 pcmc->enforce_amd_1tb_hole = false;
0ca70366
CH		 447 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
448 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
449}
450
01854af2
CH		 451DEFINE_Q35_MACHINE(v7_0, "pc-q35-7.0", NULL,
452 pc_q35_7_0_machine_options);
453
454static void pc_q35_6_2_machine_options(MachineClass *m)
455{
456 pc_q35_7_0_machine_options(m);
01854af2
CH		 457 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
458 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
459}
460
52e64f5b
YW		 461DEFINE_Q35_MACHINE(v6_2, "pc-q35-6.2", NULL,
462 pc_q35_6_2_machine_options);
463
464static void pc_q35_6_1_machine_options(MachineClass *m)
465{
466 pc_q35_6_2_machine_options(m);
52e64f5b
YW		 467 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
468 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
2b526199 469 m->smp_props.prefer_sockets = true;
52e64f5b
YW		 470}
471
da7e13c0
CH		 472DEFINE_Q35_MACHINE(v6_1, "pc-q35-6.1", NULL,
473 pc_q35_6_1_machine_options);
474
475static void pc_q35_6_0_machine_options(MachineClass *m)
476{
477 pc_q35_6_1_machine_options(m);
da7e13c0
CH		 478 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
479 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
480}
481
576a00bd
CH		 482DEFINE_Q35_MACHINE(v6_0, "pc-q35-6.0", NULL,
483 pc_q35_6_0_machine_options);
484
485static void pc_q35_5_2_machine_options(MachineClass *m)
486{
487 pc_q35_6_0_machine_options(m);
576a00bd
CH		 488 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
489 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
490}
491
3ff3c5d3
CH		 492DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
493 pc_q35_5_2_machine_options);
494
495static void pc_q35_5_1_machine_options(MachineClass *m)
496{
8700a984
VK		 497 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
498
3ff3c5d3 499 pc_q35_5_2_machine_options(m);
3ff3c5d3
CH		 500 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
501 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
8700a984 502 pcmc->kvmclock_create_always = false;
0a343a5a 503 pcmc->pci_root_uid = 1;
3ff3c5d3
CH		 504}
505
541aaa1d
CH		 506DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
507 pc_q35_5_1_machine_options);
508
509static void pc_q35_5_0_machine_options(MachineClass *m)
510{
511 pc_q35_5_1_machine_options(m);
32a354dc 512 m->numa_mem_supported = true;
541aaa1d
CH		 513 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
514 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
d110b6b4 515 m->auto_enable_numa_with_memdev = false;
541aaa1d
CH		 516}
517
3eb74d20
CH		 518DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL,
519 pc_q35_5_0_machine_options);
520
521static void pc_q35_4_2_machine_options(MachineClass *m)
522{
523 pc_q35_5_0_machine_options(m);
3eb74d20
CH		 524 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
525 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
526}
527
9aec2e52
CH		 528DEFINE_Q35_MACHINE(v4_2, "pc-q35-4.2", NULL,
529 pc_q35_4_2_machine_options);
530
531static void pc_q35_4_1_machine_options(MachineClass *m)
532{
533 pc_q35_4_2_machine_options(m);
9aec2e52
CH		 534 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
535 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
536}
537
9bf2650b
CH		 538DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL,
539 pc_q35_4_1_machine_options);
540
c87759ce 541static void pc_q35_4_0_1_machine_options(MachineClass *m)
9bf2650b 542{
0788a56b 543 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
9bf2650b 544 pc_q35_4_1_machine_options(m);
0788a56b 545 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
8e8cbed0
GK		 546 /*
547 * This is the default machine for the 4.0-stable branch. It is basically
548 * a 4.0 that doesn't use split irqchip by default. It MUST hence apply the
549 * 4.0 compat props.
550 */
551 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
552 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
c87759ce
AW		 553}
554
555DEFINE_Q35_MACHINE(v4_0_1, "pc-q35-4.0.1", NULL,
556 pc_q35_4_0_1_machine_options);
557
558static void pc_q35_4_0_machine_options(MachineClass *m)
559{
560 pc_q35_4_0_1_machine_options(m);
561 m->default_kernel_irqchip_split = true;
8e8cbed0 562 /* Compat props are applied by the 4.0.1 machine */
9bf2650b
CH		 563}
564
84e060bf
AW		 565DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL,
566 pc_q35_4_0_machine_options);
567
568static void pc_q35_3_1_machine_options(MachineClass *m)
569{
fda672b5
SG		 570 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
571
84e060bf 572 pc_q35_4_0_machine_options(m);
b2fc91db 573 m->default_kernel_irqchip_split = false;
7fccf2a0 574 m->smbus_no_migration_support = true;
fda672b5 575 pcmc->pvh_enabled = false;
abd93cc7
MAL		 576 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
577 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
84e060bf
AW		 578}
579
4a93722f
MAL		 580DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL,
581 pc_q35_3_1_machine_options);
582
583static void pc_q35_3_0_machine_options(MachineClass *m)
584{
585 pc_q35_3_1_machine_options(m);
ddb3235d
MAL		 586 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
587 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
4a93722f
MAL		 588}
589
aa78a16d
PM		 590DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL,
591 pc_q35_3_0_machine_options);
968ee4ad
BM		 592
593static void pc_q35_2_12_machine_options(MachineClass *m)
594{
aa78a16d 595 pc_q35_3_0_machine_options(m);
0d47310b
MAL		 596 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
597 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
968ee4ad
BM		 598}
599
df47ce8a
HZ		 600DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
601 pc_q35_2_12_machine_options);
602
603static void pc_q35_2_11_machine_options(MachineClass *m)
604{
605 pc_q35_2_12_machine_options(m);
01ecdaa4 606 m->default_nic = "e1000";
43df70a9
MAL		 607 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
608 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
df47ce8a
HZ		 609}
610
a6fd5b0e
MA		 611DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL,
612 pc_q35_2_11_machine_options);
613
614static void pc_q35_2_10_machine_options(MachineClass *m)
615{
616 pc_q35_2_11_machine_options(m);
503224f4
MAL		 617 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
618 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
7b8be49d 619 m->auto_enable_numa_with_memhp = false;
87e896ab
EH		 620}
621
465238d9
PX		 622DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL,
623 pc_q35_2_10_machine_options);
624
625static void pc_q35_2_9_machine_options(MachineClass *m)
626{
627 pc_q35_2_10_machine_options(m);
3e803152
MAL		 628 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
629 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
465238d9
PX		 630}
631
d580bd4b
EH		 632DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
633 pc_q35_2_9_machine_options);
634
635static void pc_q35_2_8_machine_options(MachineClass *m)
636{
637 pc_q35_2_9_machine_options(m);
edc24ccd
MAL		 638 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
639 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
d580bd4b
EH		 640}
641
a4d3c834
LM		 642DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
643 pc_q35_2_8_machine_options);
644
645static void pc_q35_2_7_machine_options(MachineClass *m)
646{
647 pc_q35_2_8_machine_options(m);
00d0f9fd 648 m->max_cpus = 255;
5a995064
MAL		 649 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
650 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
a4d3c834
LM		 651}
652
d86c1451
IM		 653DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
654 pc_q35_2_7_machine_options);
655
656static void pc_q35_2_6_machine_options(MachineClass *m)
657{
f014c974 658 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
679dd1a9 659 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 660
d86c1451 661 pc_q35_2_7_machine_options(m);
679dd1a9 662 pcmc->legacy_cpu_hotplug = true;
f014c974 663 x86mc->fwcfg_dma_enabled = false;
ff8f261f
MAL		 664 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
665 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
d86c1451
IM		 666}
667
240240d5
EH		 668DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
669 pc_q35_2_6_machine_options);
670
671static void pc_q35_2_5_machine_options(MachineClass *m)
672{
2f34ebf2 673 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
88cbe073 674
240240d5 675 pc_q35_2_6_machine_options(m);
2f34ebf2 676 x86mc->save_tsc_khz = false;
bab47d9a 677 m->legacy_fw_cfg_order = 1;
fe759610
MAL		 678 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
679 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
240240d5
EH		 680}
681
87e896ab
EH		 682DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
683 pc_q35_2_5_machine_options);
684
865906f7 685static void pc_q35_2_4_machine_options(MachineClass *m)
fddd179a 686{
2f8b5008 687 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 688
87e896ab 689 pc_q35_2_5_machine_options(m);
de796d93 690 m->hw_version = "2.4.0";
2f8b5008 691 pcmc->broken_reserved_end = true;
2f99b9c2
MAL		 692 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
693 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
fddd179a 694}
aeca6e8d 695
99fbeafe
EH		 696DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
697 pc_q35_2_4_machine_options);
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