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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
022c62cb
PB
16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
2c9b15ca 20#include "qom/object.h"
9c17d615 21#include "sysemu/kvm.h"
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22#include <assert.h>
23
022c62cb 24#include "exec/memory-internal.h"
67d95c15 25
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PB
26//#define DEBUG_UNASSIGNED
27
22bde714
JK
28static unsigned memory_region_transaction_depth;
29static bool memory_region_update_pending;
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30static bool global_dirty_log = false;
31
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PB
32/* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39static QemuMutex flat_view_mutex;
40
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41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
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44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
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PB
47static void memory_init(void)
48{
49 qemu_mutex_init(&flat_view_mutex);
50}
51
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52typedef struct AddrRange AddrRange;
53
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54/*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
093bc2cd 59struct AddrRange {
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60 Int128 start;
61 Int128 size;
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62};
63
08dafab4 64static AddrRange addrrange_make(Int128 start, Int128 size)
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65{
66 return (AddrRange) { start, size };
67}
68
69static bool addrrange_equal(AddrRange r1, AddrRange r2)
70{
08dafab4 71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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72}
73
08dafab4 74static Int128 addrrange_end(AddrRange r)
093bc2cd 75{
08dafab4 76 return int128_add(r.start, r.size);
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77}
78
08dafab4 79static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 80{
08dafab4 81 int128_addto(&range.start, delta);
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82 return range;
83}
84
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85static bool addrrange_contains(AddrRange range, Int128 addr)
86{
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89}
90
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91static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92{
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93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
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95}
96
97static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98{
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99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
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102}
103
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104enum ListenerDirection { Forward, Reverse };
105
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106static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108{
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111}
112
113#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
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123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
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128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
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131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
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138#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
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147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
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154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
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156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
dfde4e6e 165/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 166#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 168 .mr = (fr)->mr, \
f6790af6 169 .address_space = (as), \
0e0d36b4 170 .offset_within_region = (fr)->offset_in_region, \
052e87b0 171 .size = (fr)->addr.size, \
0e0d36b4 172 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 173 .readonly = (fr)->readonly, \
7376e582 174 }))
0e0d36b4 175
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176struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179};
180
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181struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
753d5e14 185 EventNotifier *e;
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186};
187
188static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190{
08dafab4 191 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 192 return true;
08dafab4 193 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 194 return false;
08dafab4 195 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 196 return true;
08dafab4 197 } else if (int128_gt(a.addr.size, b.addr.size)) {
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198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
753d5e14 210 if (a.e < b.e) {
3e9d69e7 211 return true;
753d5e14 212 } else if (a.e > b.e) {
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213 return false;
214 }
215 return false;
216}
217
218static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220{
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223}
224
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225typedef struct FlatRange FlatRange;
226typedef struct FlatView FlatView;
227
228/* Range of memory in the global map. Addresses are absolute. */
229struct FlatRange {
230 MemoryRegion *mr;
a8170e5e 231 hwaddr offset_in_region;
093bc2cd 232 AddrRange addr;
5a583347 233 uint8_t dirty_log_mask;
5f9a5ea1 234 bool romd_mode;
fb1cd6f9 235 bool readonly;
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236};
237
238/* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241struct FlatView {
856d7245 242 unsigned ref;
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243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246};
247
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248typedef struct AddressSpaceOps AddressSpaceOps;
249
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250#define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
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253static bool flatrange_equal(FlatRange *a, FlatRange *b)
254{
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 257 && a->offset_in_region == b->offset_in_region
5f9a5ea1 258 && a->romd_mode == b->romd_mode
fb1cd6f9 259 && a->readonly == b->readonly;
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260}
261
262static void flatview_init(FlatView *view)
263{
856d7245 264 view->ref = 1;
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265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268}
269
270/* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274{
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 277 view->ranges = g_realloc(view->ranges,
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278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
dfde4e6e 283 memory_region_ref(range->mr);
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284 ++view->nr;
285}
286
287static void flatview_destroy(FlatView *view)
288{
dfde4e6e
PB
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
7267c094 294 g_free(view->ranges);
a9a0c06d 295 g_free(view);
093bc2cd
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296}
297
856d7245
PB
298static void flatview_ref(FlatView *view)
299{
300 atomic_inc(&view->ref);
301}
302
303static void flatview_unref(FlatView *view)
304{
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308}
309
3d8e6bf9
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310static bool can_merge(FlatRange *r1, FlatRange *r2)
311{
08dafab4 312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 313 && r1->mr == r2->mr
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314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
d0a9b5bc 317 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 318 && r1->romd_mode == r2->romd_mode
fb1cd6f9 319 && r1->readonly == r2->readonly;
3d8e6bf9
AK
320}
321
8508e024 322/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
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323static void flatview_simplify(FlatView *view)
324{
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
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333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340}
341
e7342aa3
PB
342static bool memory_region_big_endian(MemoryRegion *mr)
343{
344#ifdef TARGET_WORDS_BIGENDIAN
345 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
346#else
347 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
348#endif
349}
350
e11ef3d1
PB
351static bool memory_region_wrong_endianness(MemoryRegion *mr)
352{
353#ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
355#else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357#endif
358}
359
360static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
361{
362 if (memory_region_wrong_endianness(mr)) {
363 switch (size) {
364 case 1:
365 break;
366 case 2:
367 *data = bswap16(*data);
368 break;
369 case 4:
370 *data = bswap32(*data);
371 break;
372 case 8:
373 *data = bswap64(*data);
374 break;
375 default:
376 abort();
377 }
378 }
379}
380
547e9201 381static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
382 hwaddr addr,
383 uint64_t *value,
384 unsigned size,
385 unsigned shift,
386 uint64_t mask)
387{
ce5d2f33
PB
388 uint64_t tmp;
389
390 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
391 *value |= (tmp & mask) << shift;
392}
393
547e9201 394static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 395 hwaddr addr,
164a4dcd
AK
396 uint64_t *value,
397 unsigned size,
398 unsigned shift,
399 uint64_t mask)
400{
164a4dcd
AK
401 uint64_t tmp;
402
d410515e
JK
403 if (mr->flush_coalesced_mmio) {
404 qemu_flush_coalesced_mmio_buffer();
405 }
164a4dcd
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406 tmp = mr->ops->read(mr->opaque, addr, size);
407 *value |= (tmp & mask) << shift;
408}
409
547e9201 410static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
411 hwaddr addr,
412 uint64_t *value,
413 unsigned size,
414 unsigned shift,
415 uint64_t mask)
416{
ce5d2f33
PB
417 uint64_t tmp;
418
419 tmp = (*value >> shift) & mask;
420 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
421}
422
547e9201 423static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 424 hwaddr addr,
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AK
425 uint64_t *value,
426 unsigned size,
427 unsigned shift,
428 uint64_t mask)
429{
164a4dcd
AK
430 uint64_t tmp;
431
d410515e
JK
432 if (mr->flush_coalesced_mmio) {
433 qemu_flush_coalesced_mmio_buffer();
434 }
164a4dcd
AK
435 tmp = (*value >> shift) & mask;
436 mr->ops->write(mr->opaque, addr, tmp, size);
437}
438
a8170e5e 439static void access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
440 uint64_t *value,
441 unsigned size,
442 unsigned access_size_min,
443 unsigned access_size_max,
547e9201 444 void (*access)(MemoryRegion *mr,
a8170e5e 445 hwaddr addr,
164a4dcd
AK
446 uint64_t *value,
447 unsigned size,
448 unsigned shift,
449 uint64_t mask),
547e9201 450 MemoryRegion *mr)
164a4dcd
AK
451{
452 uint64_t access_mask;
453 unsigned access_size;
454 unsigned i;
455
456 if (!access_size_min) {
457 access_size_min = 1;
458 }
459 if (!access_size_max) {
460 access_size_max = 4;
461 }
ce5d2f33
PB
462
463 /* FIXME: support unaligned access? */
164a4dcd
AK
464 access_size = MAX(MIN(size, access_size_max), access_size_min);
465 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
466 if (memory_region_big_endian(mr)) {
467 for (i = 0; i < size; i += access_size) {
468 access(mr, addr + i, value, access_size,
469 (size - access_size - i) * 8, access_mask);
470 }
471 } else {
472 for (i = 0; i < size; i += access_size) {
473 access(mr, addr + i, value, access_size, i * 8, access_mask);
474 }
164a4dcd
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475 }
476}
477
e2177955
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478static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
479{
0d673e36
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480 AddressSpace *as;
481
e2177955
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482 while (mr->parent) {
483 mr = mr->parent;
484 }
0d673e36
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485 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
486 if (mr == as->root) {
487 return as;
488 }
e2177955
AK
489 }
490 abort();
491}
492
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493/* Render a memory region into the global view. Ranges in @view obscure
494 * ranges in @mr.
495 */
496static void render_memory_region(FlatView *view,
497 MemoryRegion *mr,
08dafab4 498 Int128 base,
fb1cd6f9
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499 AddrRange clip,
500 bool readonly)
093bc2cd
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501{
502 MemoryRegion *subregion;
503 unsigned i;
a8170e5e 504 hwaddr offset_in_region;
08dafab4
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505 Int128 remain;
506 Int128 now;
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507 FlatRange fr;
508 AddrRange tmp;
509
6bba19ba
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510 if (!mr->enabled) {
511 return;
512 }
513
08dafab4 514 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 515 readonly |= mr->readonly;
093bc2cd
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516
517 tmp = addrrange_make(base, mr->size);
518
519 if (!addrrange_intersects(tmp, clip)) {
520 return;
521 }
522
523 clip = addrrange_intersection(tmp, clip);
524
525 if (mr->alias) {
08dafab4
AK
526 int128_subfrom(&base, int128_make64(mr->alias->addr));
527 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 528 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
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529 return;
530 }
531
532 /* Render subregions in priority order. */
533 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 534 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
535 }
536
14a3c10a 537 if (!mr->terminates) {
093bc2cd
AK
538 return;
539 }
540
08dafab4 541 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
542 base = clip.start;
543 remain = clip.size;
544
2eb74e1a
PC
545 fr.mr = mr;
546 fr.dirty_log_mask = mr->dirty_log_mask;
547 fr.romd_mode = mr->romd_mode;
548 fr.readonly = readonly;
549
093bc2cd 550 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
551 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
552 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
553 continue;
554 }
08dafab4
AK
555 if (int128_lt(base, view->ranges[i].addr.start)) {
556 now = int128_min(remain,
557 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
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558 fr.offset_in_region = offset_in_region;
559 fr.addr = addrrange_make(base, now);
560 flatview_insert(view, i, &fr);
561 ++i;
08dafab4
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562 int128_addto(&base, now);
563 offset_in_region += int128_get64(now);
564 int128_subfrom(&remain, now);
093bc2cd 565 }
d26a8cae
AK
566 now = int128_sub(int128_min(int128_add(base, remain),
567 addrrange_end(view->ranges[i].addr)),
568 base);
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
093bc2cd 572 }
08dafab4 573 if (int128_nz(remain)) {
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AK
574 fr.offset_in_region = offset_in_region;
575 fr.addr = addrrange_make(base, remain);
576 flatview_insert(view, i, &fr);
577 }
578}
579
580/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 581static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 582{
a9a0c06d 583 FlatView *view;
093bc2cd 584
a9a0c06d
PB
585 view = g_new(FlatView, 1);
586 flatview_init(view);
093bc2cd 587
83f3c251 588 if (mr) {
a9a0c06d 589 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
590 addrrange_make(int128_zero(), int128_2_64()), false);
591 }
a9a0c06d 592 flatview_simplify(view);
093bc2cd
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593
594 return view;
595}
596
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597static void address_space_add_del_ioeventfds(AddressSpace *as,
598 MemoryRegionIoeventfd *fds_new,
599 unsigned fds_new_nb,
600 MemoryRegionIoeventfd *fds_old,
601 unsigned fds_old_nb)
602{
603 unsigned iold, inew;
80a1ea37
AK
604 MemoryRegionIoeventfd *fd;
605 MemoryRegionSection section;
3e9d69e7
AK
606
607 /* Generate a symmetric difference of the old and new fd sets, adding
608 * and deleting as necessary.
609 */
610
611 iold = inew = 0;
612 while (iold < fds_old_nb || inew < fds_new_nb) {
613 if (iold < fds_old_nb
614 && (inew == fds_new_nb
615 || memory_region_ioeventfd_before(fds_old[iold],
616 fds_new[inew]))) {
80a1ea37
AK
617 fd = &fds_old[iold];
618 section = (MemoryRegionSection) {
f6790af6 619 .address_space = as,
80a1ea37 620 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 621 .size = fd->addr.size,
80a1ea37
AK
622 };
623 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 624 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
625 ++iold;
626 } else if (inew < fds_new_nb
627 && (iold == fds_old_nb
628 || memory_region_ioeventfd_before(fds_new[inew],
629 fds_old[iold]))) {
80a1ea37
AK
630 fd = &fds_new[inew];
631 section = (MemoryRegionSection) {
f6790af6 632 .address_space = as,
80a1ea37 633 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 634 .size = fd->addr.size,
80a1ea37
AK
635 };
636 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 637 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
638 ++inew;
639 } else {
640 ++iold;
641 ++inew;
642 }
643 }
644}
645
856d7245
PB
646static FlatView *address_space_get_flatview(AddressSpace *as)
647{
648 FlatView *view;
649
650 qemu_mutex_lock(&flat_view_mutex);
651 view = as->current_map;
652 flatview_ref(view);
653 qemu_mutex_unlock(&flat_view_mutex);
654 return view;
655}
656
3e9d69e7
AK
657static void address_space_update_ioeventfds(AddressSpace *as)
658{
99e86347 659 FlatView *view;
3e9d69e7
AK
660 FlatRange *fr;
661 unsigned ioeventfd_nb = 0;
662 MemoryRegionIoeventfd *ioeventfds = NULL;
663 AddrRange tmp;
664 unsigned i;
665
856d7245 666 view = address_space_get_flatview(as);
99e86347 667 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
668 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
669 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
670 int128_sub(fr->addr.start,
671 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
672 if (addrrange_intersects(fr->addr, tmp)) {
673 ++ioeventfd_nb;
7267c094 674 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
675 ioeventfd_nb * sizeof(*ioeventfds));
676 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
677 ioeventfds[ioeventfd_nb-1].addr = tmp;
678 }
679 }
680 }
681
682 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
683 as->ioeventfds, as->ioeventfd_nb);
684
7267c094 685 g_free(as->ioeventfds);
3e9d69e7
AK
686 as->ioeventfds = ioeventfds;
687 as->ioeventfd_nb = ioeventfd_nb;
856d7245 688 flatview_unref(view);
3e9d69e7
AK
689}
690
b8af1afb 691static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
692 const FlatView *old_view,
693 const FlatView *new_view,
b8af1afb 694 bool adding)
093bc2cd 695{
093bc2cd
AK
696 unsigned iold, inew;
697 FlatRange *frold, *frnew;
093bc2cd
AK
698
699 /* Generate a symmetric difference of the old and new memory maps.
700 * Kill ranges in the old map, and instantiate ranges in the new map.
701 */
702 iold = inew = 0;
a9a0c06d
PB
703 while (iold < old_view->nr || inew < new_view->nr) {
704 if (iold < old_view->nr) {
705 frold = &old_view->ranges[iold];
093bc2cd
AK
706 } else {
707 frold = NULL;
708 }
a9a0c06d
PB
709 if (inew < new_view->nr) {
710 frnew = &new_view->ranges[inew];
093bc2cd
AK
711 } else {
712 frnew = NULL;
713 }
714
715 if (frold
716 && (!frnew
08dafab4
AK
717 || int128_lt(frold->addr.start, frnew->addr.start)
718 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 719 && !flatrange_equal(frold, frnew)))) {
41a6e477 720 /* In old but not in new, or in both but attributes changed. */
093bc2cd 721
b8af1afb 722 if (!adding) {
72e22d2f 723 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
724 }
725
093bc2cd
AK
726 ++iold;
727 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 728 /* In both and unchanged (except logging may have changed) */
093bc2cd 729
b8af1afb 730 if (adding) {
50c1e149 731 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 732 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 734 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 736 }
5a583347
AK
737 }
738
093bc2cd
AK
739 ++iold;
740 ++inew;
093bc2cd
AK
741 } else {
742 /* In new */
743
b8af1afb 744 if (adding) {
72e22d2f 745 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
746 }
747
093bc2cd
AK
748 ++inew;
749 }
750 }
b8af1afb
AK
751}
752
753
754static void address_space_update_topology(AddressSpace *as)
755{
856d7245 756 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 757 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
758
759 address_space_update_topology_pass(as, old_view, new_view, false);
760 address_space_update_topology_pass(as, old_view, new_view, true);
761
856d7245
PB
762 qemu_mutex_lock(&flat_view_mutex);
763 flatview_unref(as->current_map);
a9a0c06d 764 as->current_map = new_view;
856d7245
PB
765 qemu_mutex_unlock(&flat_view_mutex);
766
767 /* Note that all the old MemoryRegions are still alive up to this
768 * point. This relieves most MemoryListeners from the need to
769 * ref/unref the MemoryRegions they get---unless they use them
770 * outside the iothread mutex, in which case precise reference
771 * counting is necessary.
772 */
773 flatview_unref(old_view);
774
3e9d69e7 775 address_space_update_ioeventfds(as);
093bc2cd
AK
776}
777
4ef4db86
AK
778void memory_region_transaction_begin(void)
779{
bb880ded 780 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
781 ++memory_region_transaction_depth;
782}
783
784void memory_region_transaction_commit(void)
785{
0d673e36
AK
786 AddressSpace *as;
787
4ef4db86
AK
788 assert(memory_region_transaction_depth);
789 --memory_region_transaction_depth;
22bde714
JK
790 if (!memory_region_transaction_depth && memory_region_update_pending) {
791 memory_region_update_pending = false;
02e2b95f
JK
792 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
793
0d673e36
AK
794 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
795 address_space_update_topology(as);
02e2b95f
JK
796 }
797
798 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 799 }
4ef4db86
AK
800}
801
545e92e0
AK
802static void memory_region_destructor_none(MemoryRegion *mr)
803{
804}
805
806static void memory_region_destructor_ram(MemoryRegion *mr)
807{
808 qemu_ram_free(mr->ram_addr);
809}
810
dfde4e6e
PB
811static void memory_region_destructor_alias(MemoryRegion *mr)
812{
813 memory_region_unref(mr->alias);
814}
815
545e92e0
AK
816static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
817{
818 qemu_ram_free_from_ptr(mr->ram_addr);
819}
820
d0a9b5bc
AK
821static void memory_region_destructor_rom_device(MemoryRegion *mr)
822{
823 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
824}
825
093bc2cd 826void memory_region_init(MemoryRegion *mr,
2c9b15ca 827 Object *owner,
093bc2cd
AK
828 const char *name,
829 uint64_t size)
830{
2cdfcf27
PB
831 mr->ops = &unassigned_mem_ops;
832 mr->opaque = NULL;
2c9b15ca 833 mr->owner = owner;
30951157 834 mr->iommu_ops = NULL;
093bc2cd 835 mr->parent = NULL;
08dafab4
AK
836 mr->size = int128_make64(size);
837 if (size == UINT64_MAX) {
838 mr->size = int128_2_64();
839 }
093bc2cd 840 mr->addr = 0;
b3b00c78 841 mr->subpage = false;
6bba19ba 842 mr->enabled = true;
14a3c10a 843 mr->terminates = false;
8ea9252a 844 mr->ram = false;
5f9a5ea1 845 mr->romd_mode = true;
fb1cd6f9 846 mr->readonly = false;
75c578dc 847 mr->rom_device = false;
545e92e0 848 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
849 mr->priority = 0;
850 mr->may_overlap = false;
851 mr->alias = NULL;
852 QTAILQ_INIT(&mr->subregions);
853 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
854 QTAILQ_INIT(&mr->coalesced);
7267c094 855 mr->name = g_strdup(name);
5a583347 856 mr->dirty_log_mask = 0;
3e9d69e7
AK
857 mr->ioeventfd_nb = 0;
858 mr->ioeventfds = NULL;
d410515e 859 mr->flush_coalesced_mmio = false;
093bc2cd
AK
860}
861
b018ddf6
PB
862static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
863 unsigned size)
864{
865#ifdef DEBUG_UNASSIGNED
866 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
867#endif
4917cf44
AF
868 if (current_cpu != NULL) {
869 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 870 }
9b8c6924 871 return -1ULL;
b018ddf6
PB
872}
873
874static void unassigned_mem_write(void *opaque, hwaddr addr,
875 uint64_t val, unsigned size)
876{
877#ifdef DEBUG_UNASSIGNED
878 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
879#endif
4917cf44
AF
880 if (current_cpu != NULL) {
881 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 882 }
b018ddf6
PB
883}
884
d197063f
PB
885static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
886 unsigned size, bool is_write)
887{
888 return false;
889}
890
891const MemoryRegionOps unassigned_mem_ops = {
892 .valid.accepts = unassigned_mem_accepts,
893 .endianness = DEVICE_NATIVE_ENDIAN,
894};
895
d2702032
PB
896bool memory_region_access_valid(MemoryRegion *mr,
897 hwaddr addr,
898 unsigned size,
899 bool is_write)
093bc2cd 900{
a014ed07
PB
901 int access_size_min, access_size_max;
902 int access_size, i;
897fa7cf 903
093bc2cd
AK
904 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
905 return false;
906 }
907
a014ed07 908 if (!mr->ops->valid.accepts) {
093bc2cd
AK
909 return true;
910 }
911
a014ed07
PB
912 access_size_min = mr->ops->valid.min_access_size;
913 if (!mr->ops->valid.min_access_size) {
914 access_size_min = 1;
915 }
916
917 access_size_max = mr->ops->valid.max_access_size;
918 if (!mr->ops->valid.max_access_size) {
919 access_size_max = 4;
920 }
921
922 access_size = MAX(MIN(size, access_size_max), access_size_min);
923 for (i = 0; i < size; i += access_size) {
924 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
925 is_write)) {
926 return false;
927 }
093bc2cd 928 }
a014ed07 929
093bc2cd
AK
930 return true;
931}
932
a621f38d 933static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 934 hwaddr addr,
a621f38d 935 unsigned size)
093bc2cd 936{
164a4dcd 937 uint64_t data = 0;
093bc2cd 938
ce5d2f33
PB
939 if (mr->ops->read) {
940 access_with_adjusted_size(addr, &data, size,
941 mr->ops->impl.min_access_size,
942 mr->ops->impl.max_access_size,
943 memory_region_read_accessor, mr);
944 } else {
945 access_with_adjusted_size(addr, &data, size, 1, 4,
946 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
947 }
948
093bc2cd
AK
949 return data;
950}
951
791af8c8
PB
952static bool memory_region_dispatch_read(MemoryRegion *mr,
953 hwaddr addr,
954 uint64_t *pval,
955 unsigned size)
a621f38d 956{
791af8c8
PB
957 if (!memory_region_access_valid(mr, addr, size, false)) {
958 *pval = unassigned_mem_read(mr, addr, size);
959 return true;
960 }
a621f38d 961
791af8c8
PB
962 *pval = memory_region_dispatch_read1(mr, addr, size);
963 adjust_endianness(mr, pval, size);
964 return false;
a621f38d 965}
093bc2cd 966
791af8c8 967static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 968 hwaddr addr,
a621f38d
AK
969 uint64_t data,
970 unsigned size)
971{
897fa7cf 972 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 973 unassigned_mem_write(mr, addr, data, size);
791af8c8 974 return true;
093bc2cd
AK
975 }
976
a621f38d
AK
977 adjust_endianness(mr, &data, size);
978
ce5d2f33
PB
979 if (mr->ops->write) {
980 access_with_adjusted_size(addr, &data, size,
981 mr->ops->impl.min_access_size,
982 mr->ops->impl.max_access_size,
983 memory_region_write_accessor, mr);
984 } else {
985 access_with_adjusted_size(addr, &data, size, 1, 4,
986 memory_region_oldmmio_write_accessor, mr);
74901c3b 987 }
791af8c8 988 return false;
093bc2cd
AK
989}
990
093bc2cd 991void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 992 Object *owner,
093bc2cd
AK
993 const MemoryRegionOps *ops,
994 void *opaque,
995 const char *name,
996 uint64_t size)
997{
2c9b15ca 998 memory_region_init(mr, owner, name, size);
093bc2cd
AK
999 mr->ops = ops;
1000 mr->opaque = opaque;
14a3c10a 1001 mr->terminates = true;
97161e17 1002 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1003}
1004
1005void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1006 Object *owner,
093bc2cd
AK
1007 const char *name,
1008 uint64_t size)
1009{
2c9b15ca 1010 memory_region_init(mr, owner, name, size);
8ea9252a 1011 mr->ram = true;
14a3c10a 1012 mr->terminates = true;
545e92e0 1013 mr->destructor = memory_region_destructor_ram;
c5705a77 1014 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
1015}
1016
1017void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1018 Object *owner,
093bc2cd
AK
1019 const char *name,
1020 uint64_t size,
1021 void *ptr)
1022{
2c9b15ca 1023 memory_region_init(mr, owner, name, size);
8ea9252a 1024 mr->ram = true;
14a3c10a 1025 mr->terminates = true;
545e92e0 1026 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1027 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1028}
1029
1030void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1031 Object *owner,
093bc2cd
AK
1032 const char *name,
1033 MemoryRegion *orig,
a8170e5e 1034 hwaddr offset,
093bc2cd
AK
1035 uint64_t size)
1036{
2c9b15ca 1037 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1038 memory_region_ref(orig);
1039 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1040 mr->alias = orig;
1041 mr->alias_offset = offset;
1042}
1043
d0a9b5bc 1044void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1045 Object *owner,
d0a9b5bc 1046 const MemoryRegionOps *ops,
75f5941c 1047 void *opaque,
d0a9b5bc
AK
1048 const char *name,
1049 uint64_t size)
1050{
2c9b15ca 1051 memory_region_init(mr, owner, name, size);
7bc2b9cd 1052 mr->ops = ops;
75f5941c 1053 mr->opaque = opaque;
d0a9b5bc 1054 mr->terminates = true;
75c578dc 1055 mr->rom_device = true;
d0a9b5bc 1056 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1057 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1058}
1059
30951157 1060void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1061 Object *owner,
30951157
AK
1062 const MemoryRegionIOMMUOps *ops,
1063 const char *name,
1064 uint64_t size)
1065{
2c9b15ca 1066 memory_region_init(mr, owner, name, size);
30951157
AK
1067 mr->iommu_ops = ops,
1068 mr->terminates = true; /* then re-forwards */
06866575 1069 notifier_list_init(&mr->iommu_notify);
30951157
AK
1070}
1071
1660e72d 1072void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1073 Object *owner,
1660e72d
JK
1074 const char *name,
1075 uint64_t size)
1076{
2c9b15ca 1077 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1078}
1079
093bc2cd
AK
1080void memory_region_destroy(MemoryRegion *mr)
1081{
1082 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1083 assert(memory_region_transaction_depth == 0);
545e92e0 1084 mr->destructor(mr);
093bc2cd 1085 memory_region_clear_coalescing(mr);
7267c094
AL
1086 g_free((char *)mr->name);
1087 g_free(mr->ioeventfds);
093bc2cd
AK
1088}
1089
803c0816
PB
1090Object *memory_region_owner(MemoryRegion *mr)
1091{
1092 return mr->owner;
1093}
1094
46637be2
PB
1095void memory_region_ref(MemoryRegion *mr)
1096{
1097 if (mr && mr->owner) {
1098 object_ref(mr->owner);
1099 }
1100}
1101
1102void memory_region_unref(MemoryRegion *mr)
1103{
1104 if (mr && mr->owner) {
1105 object_unref(mr->owner);
1106 }
1107}
1108
093bc2cd
AK
1109uint64_t memory_region_size(MemoryRegion *mr)
1110{
08dafab4
AK
1111 if (int128_eq(mr->size, int128_2_64())) {
1112 return UINT64_MAX;
1113 }
1114 return int128_get64(mr->size);
093bc2cd
AK
1115}
1116
8991c79b
AK
1117const char *memory_region_name(MemoryRegion *mr)
1118{
1119 return mr->name;
1120}
1121
8ea9252a
AK
1122bool memory_region_is_ram(MemoryRegion *mr)
1123{
1124 return mr->ram;
1125}
1126
55043ba3
AK
1127bool memory_region_is_logging(MemoryRegion *mr)
1128{
1129 return mr->dirty_log_mask;
1130}
1131
ce7923da
AK
1132bool memory_region_is_rom(MemoryRegion *mr)
1133{
1134 return mr->ram && mr->readonly;
1135}
1136
30951157
AK
1137bool memory_region_is_iommu(MemoryRegion *mr)
1138{
1139 return mr->iommu_ops;
1140}
1141
06866575
DG
1142void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1143{
1144 notifier_list_add(&mr->iommu_notify, n);
1145}
1146
1147void memory_region_unregister_iommu_notifier(Notifier *n)
1148{
1149 notifier_remove(n);
1150}
1151
1152void memory_region_notify_iommu(MemoryRegion *mr,
1153 IOMMUTLBEntry entry)
1154{
1155 assert(memory_region_is_iommu(mr));
1156 notifier_list_notify(&mr->iommu_notify, &entry);
1157}
1158
093bc2cd
AK
1159void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1160{
5a583347
AK
1161 uint8_t mask = 1 << client;
1162
59023ef4 1163 memory_region_transaction_begin();
5a583347 1164 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1165 memory_region_update_pending |= mr->enabled;
59023ef4 1166 memory_region_transaction_commit();
093bc2cd
AK
1167}
1168
a8170e5e
AK
1169bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1170 hwaddr size, unsigned client)
093bc2cd 1171{
14a3c10a 1172 assert(mr->terminates);
cd7a45c9
BS
1173 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1174 1 << client);
093bc2cd
AK
1175}
1176
a8170e5e
AK
1177void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1178 hwaddr size)
093bc2cd 1179{
14a3c10a 1180 assert(mr->terminates);
fd4aa979 1181 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1182}
1183
6c279db8
JQ
1184bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1185 hwaddr size, unsigned client)
1186{
1187 bool ret;
1188 assert(mr->terminates);
1189 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1190 1 << client);
1191 if (ret) {
1192 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1193 mr->ram_addr + addr + size,
1194 1 << client);
1195 }
1196 return ret;
1197}
1198
1199
093bc2cd
AK
1200void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1201{
0d673e36 1202 AddressSpace *as;
5a583347
AK
1203 FlatRange *fr;
1204
0d673e36 1205 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1206 FlatView *view = address_space_get_flatview(as);
99e86347 1207 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1208 if (fr->mr == mr) {
1209 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1210 }
5a583347 1211 }
856d7245 1212 flatview_unref(view);
5a583347 1213 }
093bc2cd
AK
1214}
1215
1216void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1217{
fb1cd6f9 1218 if (mr->readonly != readonly) {
59023ef4 1219 memory_region_transaction_begin();
fb1cd6f9 1220 mr->readonly = readonly;
22bde714 1221 memory_region_update_pending |= mr->enabled;
59023ef4 1222 memory_region_transaction_commit();
fb1cd6f9 1223 }
093bc2cd
AK
1224}
1225
5f9a5ea1 1226void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1227{
5f9a5ea1 1228 if (mr->romd_mode != romd_mode) {
59023ef4 1229 memory_region_transaction_begin();
5f9a5ea1 1230 mr->romd_mode = romd_mode;
22bde714 1231 memory_region_update_pending |= mr->enabled;
59023ef4 1232 memory_region_transaction_commit();
d0a9b5bc
AK
1233 }
1234}
1235
a8170e5e
AK
1236void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1237 hwaddr size, unsigned client)
093bc2cd 1238{
14a3c10a 1239 assert(mr->terminates);
5a583347
AK
1240 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1241 mr->ram_addr + addr + size,
1242 1 << client);
093bc2cd
AK
1243}
1244
1245void *memory_region_get_ram_ptr(MemoryRegion *mr)
1246{
1247 if (mr->alias) {
1248 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1249 }
1250
14a3c10a 1251 assert(mr->terminates);
093bc2cd 1252
021d26d1 1253 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1254}
1255
0d673e36 1256static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1257{
99e86347 1258 FlatView *view;
093bc2cd
AK
1259 FlatRange *fr;
1260 CoalescedMemoryRange *cmr;
1261 AddrRange tmp;
95d2994a 1262 MemoryRegionSection section;
093bc2cd 1263
856d7245 1264 view = address_space_get_flatview(as);
99e86347 1265 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1266 if (fr->mr == mr) {
95d2994a 1267 section = (MemoryRegionSection) {
f6790af6 1268 .address_space = as,
95d2994a 1269 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1270 .size = fr->addr.size,
95d2994a
AK
1271 };
1272
1273 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1274 int128_get64(fr->addr.start),
1275 int128_get64(fr->addr.size));
093bc2cd
AK
1276 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1277 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1278 int128_sub(fr->addr.start,
1279 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1280 if (!addrrange_intersects(tmp, fr->addr)) {
1281 continue;
1282 }
1283 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1284 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1285 int128_get64(tmp.start),
1286 int128_get64(tmp.size));
093bc2cd
AK
1287 }
1288 }
1289 }
856d7245 1290 flatview_unref(view);
093bc2cd
AK
1291}
1292
0d673e36
AK
1293static void memory_region_update_coalesced_range(MemoryRegion *mr)
1294{
1295 AddressSpace *as;
1296
1297 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1298 memory_region_update_coalesced_range_as(mr, as);
1299 }
1300}
1301
093bc2cd
AK
1302void memory_region_set_coalescing(MemoryRegion *mr)
1303{
1304 memory_region_clear_coalescing(mr);
08dafab4 1305 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1306}
1307
1308void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1309 hwaddr offset,
093bc2cd
AK
1310 uint64_t size)
1311{
7267c094 1312 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1313
08dafab4 1314 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1315 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1316 memory_region_update_coalesced_range(mr);
d410515e 1317 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1318}
1319
1320void memory_region_clear_coalescing(MemoryRegion *mr)
1321{
1322 CoalescedMemoryRange *cmr;
1323
d410515e
JK
1324 qemu_flush_coalesced_mmio_buffer();
1325 mr->flush_coalesced_mmio = false;
1326
093bc2cd
AK
1327 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1328 cmr = QTAILQ_FIRST(&mr->coalesced);
1329 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1330 g_free(cmr);
093bc2cd
AK
1331 }
1332 memory_region_update_coalesced_range(mr);
1333}
1334
d410515e
JK
1335void memory_region_set_flush_coalesced(MemoryRegion *mr)
1336{
1337 mr->flush_coalesced_mmio = true;
1338}
1339
1340void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1341{
1342 qemu_flush_coalesced_mmio_buffer();
1343 if (QTAILQ_EMPTY(&mr->coalesced)) {
1344 mr->flush_coalesced_mmio = false;
1345 }
1346}
1347
3e9d69e7 1348void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1349 hwaddr addr,
3e9d69e7
AK
1350 unsigned size,
1351 bool match_data,
1352 uint64_t data,
753d5e14 1353 EventNotifier *e)
3e9d69e7
AK
1354{
1355 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1356 .addr.start = int128_make64(addr),
1357 .addr.size = int128_make64(size),
3e9d69e7
AK
1358 .match_data = match_data,
1359 .data = data,
753d5e14 1360 .e = e,
3e9d69e7
AK
1361 };
1362 unsigned i;
1363
28f362be 1364 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1365 memory_region_transaction_begin();
3e9d69e7
AK
1366 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1367 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1368 break;
1369 }
1370 }
1371 ++mr->ioeventfd_nb;
7267c094 1372 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1373 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1374 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1375 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1376 mr->ioeventfds[i] = mrfd;
22bde714 1377 memory_region_update_pending |= mr->enabled;
59023ef4 1378 memory_region_transaction_commit();
3e9d69e7
AK
1379}
1380
1381void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1382 hwaddr addr,
3e9d69e7
AK
1383 unsigned size,
1384 bool match_data,
1385 uint64_t data,
753d5e14 1386 EventNotifier *e)
3e9d69e7
AK
1387{
1388 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1389 .addr.start = int128_make64(addr),
1390 .addr.size = int128_make64(size),
3e9d69e7
AK
1391 .match_data = match_data,
1392 .data = data,
753d5e14 1393 .e = e,
3e9d69e7
AK
1394 };
1395 unsigned i;
1396
28f362be 1397 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1398 memory_region_transaction_begin();
3e9d69e7
AK
1399 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1400 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1401 break;
1402 }
1403 }
1404 assert(i != mr->ioeventfd_nb);
1405 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1406 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1407 --mr->ioeventfd_nb;
7267c094 1408 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1409 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1410 memory_region_update_pending |= mr->enabled;
59023ef4 1411 memory_region_transaction_commit();
3e9d69e7
AK
1412}
1413
093bc2cd 1414static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1415 hwaddr offset,
093bc2cd
AK
1416 MemoryRegion *subregion)
1417{
1418 MemoryRegion *other;
1419
59023ef4
JK
1420 memory_region_transaction_begin();
1421
093bc2cd 1422 assert(!subregion->parent);
dfde4e6e 1423 memory_region_ref(subregion);
093bc2cd
AK
1424 subregion->parent = mr;
1425 subregion->addr = offset;
1426 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1427 if (subregion->may_overlap || other->may_overlap) {
1428 continue;
1429 }
2c7cfd65 1430 if (int128_ge(int128_make64(offset),
08dafab4
AK
1431 int128_add(int128_make64(other->addr), other->size))
1432 || int128_le(int128_add(int128_make64(offset), subregion->size),
1433 int128_make64(other->addr))) {
093bc2cd
AK
1434 continue;
1435 }
a5e1cbc8 1436#if 0
860329b2
MW
1437 printf("warning: subregion collision %llx/%llx (%s) "
1438 "vs %llx/%llx (%s)\n",
093bc2cd 1439 (unsigned long long)offset,
08dafab4 1440 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1441 subregion->name,
1442 (unsigned long long)other->addr,
08dafab4 1443 (unsigned long long)int128_get64(other->size),
860329b2 1444 other->name);
a5e1cbc8 1445#endif
093bc2cd
AK
1446 }
1447 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1448 if (subregion->priority >= other->priority) {
1449 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1450 goto done;
1451 }
1452 }
1453 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1454done:
22bde714 1455 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1456 memory_region_transaction_commit();
093bc2cd
AK
1457}
1458
1459
1460void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1461 hwaddr offset,
093bc2cd
AK
1462 MemoryRegion *subregion)
1463{
1464 subregion->may_overlap = false;
1465 subregion->priority = 0;
1466 memory_region_add_subregion_common(mr, offset, subregion);
1467}
1468
1469void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1470 hwaddr offset,
093bc2cd
AK
1471 MemoryRegion *subregion,
1472 unsigned priority)
1473{
1474 subregion->may_overlap = true;
1475 subregion->priority = priority;
1476 memory_region_add_subregion_common(mr, offset, subregion);
1477}
1478
1479void memory_region_del_subregion(MemoryRegion *mr,
1480 MemoryRegion *subregion)
1481{
59023ef4 1482 memory_region_transaction_begin();
093bc2cd
AK
1483 assert(subregion->parent == mr);
1484 subregion->parent = NULL;
1485 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1486 memory_region_unref(subregion);
22bde714 1487 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1488 memory_region_transaction_commit();
6bba19ba
AK
1489}
1490
1491void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1492{
1493 if (enabled == mr->enabled) {
1494 return;
1495 }
59023ef4 1496 memory_region_transaction_begin();
6bba19ba 1497 mr->enabled = enabled;
22bde714 1498 memory_region_update_pending = true;
59023ef4 1499 memory_region_transaction_commit();
093bc2cd 1500}
1c0ffa58 1501
a8170e5e 1502void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1503{
1504 MemoryRegion *parent = mr->parent;
1505 unsigned priority = mr->priority;
1506 bool may_overlap = mr->may_overlap;
1507
1508 if (addr == mr->addr || !parent) {
1509 mr->addr = addr;
1510 return;
1511 }
1512
1513 memory_region_transaction_begin();
dfde4e6e 1514 memory_region_ref(mr);
2282e1af
AK
1515 memory_region_del_subregion(parent, mr);
1516 if (may_overlap) {
1517 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1518 } else {
1519 memory_region_add_subregion(parent, addr, mr);
1520 }
dfde4e6e 1521 memory_region_unref(mr);
2282e1af
AK
1522 memory_region_transaction_commit();
1523}
1524
a8170e5e 1525void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1526{
4703359e 1527 assert(mr->alias);
4703359e 1528
59023ef4 1529 if (offset == mr->alias_offset) {
4703359e
AK
1530 return;
1531 }
1532
59023ef4
JK
1533 memory_region_transaction_begin();
1534 mr->alias_offset = offset;
22bde714 1535 memory_region_update_pending |= mr->enabled;
59023ef4 1536 memory_region_transaction_commit();
4703359e
AK
1537}
1538
e34911c4
AK
1539ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1540{
e34911c4
AK
1541 return mr->ram_addr;
1542}
1543
e2177955
AK
1544static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1545{
1546 const AddrRange *addr = addr_;
1547 const FlatRange *fr = fr_;
1548
1549 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1550 return -1;
1551 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1552 return 1;
1553 }
1554 return 0;
1555}
1556
99e86347 1557static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1558{
99e86347 1559 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1560 sizeof(FlatRange), cmp_flatrange_addr);
1561}
1562
3ce10901
PB
1563bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1564{
1565 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1566 if (!mr) {
1567 return false;
1568 }
dfde4e6e 1569 memory_region_unref(mr);
3ce10901
PB
1570 return true;
1571}
1572
73034e9e 1573MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1574 hwaddr addr, uint64_t size)
e2177955 1575{
052e87b0 1576 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1577 MemoryRegion *root;
1578 AddressSpace *as;
1579 AddrRange range;
99e86347 1580 FlatView *view;
73034e9e
PB
1581 FlatRange *fr;
1582
1583 addr += mr->addr;
1584 for (root = mr; root->parent; ) {
1585 root = root->parent;
1586 addr += root->addr;
1587 }
e2177955 1588
73034e9e
PB
1589 as = memory_region_to_address_space(root);
1590 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1591
856d7245 1592 view = address_space_get_flatview(as);
99e86347 1593 fr = flatview_lookup(view, range);
e2177955
AK
1594 if (!fr) {
1595 return ret;
1596 }
1597
99e86347 1598 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1599 --fr;
1600 }
1601
1602 ret.mr = fr->mr;
73034e9e 1603 ret.address_space = as;
e2177955
AK
1604 range = addrrange_intersection(range, fr->addr);
1605 ret.offset_within_region = fr->offset_in_region;
1606 ret.offset_within_region += int128_get64(int128_sub(range.start,
1607 fr->addr.start));
052e87b0 1608 ret.size = range.size;
e2177955 1609 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1610 ret.readonly = fr->readonly;
dfde4e6e
PB
1611 memory_region_ref(ret.mr);
1612
856d7245 1613 flatview_unref(view);
e2177955
AK
1614 return ret;
1615}
1616
1d671369 1617void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1618{
99e86347 1619 FlatView *view;
7664e80c
AK
1620 FlatRange *fr;
1621
856d7245 1622 view = address_space_get_flatview(as);
99e86347 1623 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1624 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1625 }
856d7245 1626 flatview_unref(view);
7664e80c
AK
1627}
1628
1629void memory_global_dirty_log_start(void)
1630{
7664e80c 1631 global_dirty_log = true;
7376e582 1632 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1633}
1634
1635void memory_global_dirty_log_stop(void)
1636{
7664e80c 1637 global_dirty_log = false;
7376e582 1638 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1639}
1640
1641static void listener_add_address_space(MemoryListener *listener,
1642 AddressSpace *as)
1643{
99e86347 1644 FlatView *view;
7664e80c
AK
1645 FlatRange *fr;
1646
221b3a3f 1647 if (listener->address_space_filter
f6790af6 1648 && listener->address_space_filter != as) {
221b3a3f
JG
1649 return;
1650 }
1651
7664e80c 1652 if (global_dirty_log) {
975aefe0
AK
1653 if (listener->log_global_start) {
1654 listener->log_global_start(listener);
1655 }
7664e80c 1656 }
975aefe0 1657
856d7245 1658 view = address_space_get_flatview(as);
99e86347 1659 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1660 MemoryRegionSection section = {
1661 .mr = fr->mr,
f6790af6 1662 .address_space = as,
7664e80c 1663 .offset_within_region = fr->offset_in_region,
052e87b0 1664 .size = fr->addr.size,
7664e80c 1665 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1666 .readonly = fr->readonly,
7664e80c 1667 };
975aefe0
AK
1668 if (listener->region_add) {
1669 listener->region_add(listener, &section);
1670 }
7664e80c 1671 }
856d7245 1672 flatview_unref(view);
7664e80c
AK
1673}
1674
f6790af6 1675void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1676{
72e22d2f 1677 MemoryListener *other = NULL;
0d673e36 1678 AddressSpace *as;
72e22d2f 1679
7376e582 1680 listener->address_space_filter = filter;
72e22d2f
AK
1681 if (QTAILQ_EMPTY(&memory_listeners)
1682 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1683 memory_listeners)->priority) {
1684 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1685 } else {
1686 QTAILQ_FOREACH(other, &memory_listeners, link) {
1687 if (listener->priority < other->priority) {
1688 break;
1689 }
1690 }
1691 QTAILQ_INSERT_BEFORE(other, listener, link);
1692 }
0d673e36
AK
1693
1694 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1695 listener_add_address_space(listener, as);
1696 }
7664e80c
AK
1697}
1698
1699void memory_listener_unregister(MemoryListener *listener)
1700{
72e22d2f 1701 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1702}
e2177955 1703
7dca8043 1704void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1705{
856d7245
PB
1706 if (QTAILQ_EMPTY(&address_spaces)) {
1707 memory_init();
1708 }
1709
59023ef4 1710 memory_region_transaction_begin();
8786db7c
AK
1711 as->root = root;
1712 as->current_map = g_new(FlatView, 1);
1713 flatview_init(as->current_map);
4c19eb72
AK
1714 as->ioeventfd_nb = 0;
1715 as->ioeventfds = NULL;
0d673e36 1716 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1717 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1718 address_space_init_dispatch(as);
f43793c7
PB
1719 memory_region_update_pending |= root->enabled;
1720 memory_region_transaction_commit();
1c0ffa58 1721}
658b2224 1722
83f3c251
AK
1723void address_space_destroy(AddressSpace *as)
1724{
1725 /* Flush out anything from MemoryListeners listening in on this */
1726 memory_region_transaction_begin();
1727 as->root = NULL;
1728 memory_region_transaction_commit();
1729 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1730 address_space_destroy_dispatch(as);
856d7245 1731 flatview_unref(as->current_map);
7dca8043 1732 g_free(as->name);
4c19eb72 1733 g_free(as->ioeventfds);
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1734}
1735
791af8c8 1736bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1737{
791af8c8 1738 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1739}
1740
791af8c8 1741bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1742 uint64_t val, unsigned size)
1743{
791af8c8 1744 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1745}
1746
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1747typedef struct MemoryRegionList MemoryRegionList;
1748
1749struct MemoryRegionList {
1750 const MemoryRegion *mr;
1751 bool printed;
1752 QTAILQ_ENTRY(MemoryRegionList) queue;
1753};
1754
1755typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1756
1757static void mtree_print_mr(fprintf_function mon_printf, void *f,
1758 const MemoryRegion *mr, unsigned int level,
a8170e5e 1759 hwaddr base,
9479c57a 1760 MemoryRegionListHead *alias_print_queue)
314e2987 1761{
9479c57a
JK
1762 MemoryRegionList *new_ml, *ml, *next_ml;
1763 MemoryRegionListHead submr_print_queue;
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BS
1764 const MemoryRegion *submr;
1765 unsigned int i;
1766
7ea692b2 1767 if (!mr || !mr->enabled) {
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1768 return;
1769 }
1770
1771 for (i = 0; i < level; i++) {
1772 mon_printf(f, " ");
1773 }
1774
1775 if (mr->alias) {
1776 MemoryRegionList *ml;
1777 bool found = false;
1778
1779 /* check if the alias is already in the queue */
9479c57a 1780 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
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1781 if (ml->mr == mr->alias && !ml->printed) {
1782 found = true;
1783 }
1784 }
1785
1786 if (!found) {
1787 ml = g_new(MemoryRegionList, 1);
1788 ml->mr = mr->alias;
1789 ml->printed = false;
9479c57a 1790 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1791 }
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1792 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1793 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1794 "-" TARGET_FMT_plx "\n",
314e2987 1795 base + mr->addr,
08dafab4 1796 base + mr->addr
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1797 + (int128_nz(mr->size) ?
1798 (hwaddr)int128_get64(int128_sub(mr->size,
1799 int128_one())) : 0),
4b474ba7 1800 mr->priority,
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1801 mr->romd_mode ? 'R' : '-',
1802 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1803 : '-',
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BS
1804 mr->name,
1805 mr->alias->name,
1806 mr->alias_offset,
08dafab4 1807 mr->alias_offset
a8170e5e 1808 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1809 } else {
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1810 mon_printf(f,
1811 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1812 base + mr->addr,
08dafab4 1813 base + mr->addr
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AW
1814 + (int128_nz(mr->size) ?
1815 (hwaddr)int128_get64(int128_sub(mr->size,
1816 int128_one())) : 0),
4b474ba7 1817 mr->priority,
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JK
1818 mr->romd_mode ? 'R' : '-',
1819 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1820 : '-',
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1821 mr->name);
1822 }
9479c57a
JK
1823
1824 QTAILQ_INIT(&submr_print_queue);
1825
314e2987 1826 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1827 new_ml = g_new(MemoryRegionList, 1);
1828 new_ml->mr = submr;
1829 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1830 if (new_ml->mr->addr < ml->mr->addr ||
1831 (new_ml->mr->addr == ml->mr->addr &&
1832 new_ml->mr->priority > ml->mr->priority)) {
1833 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1834 new_ml = NULL;
1835 break;
1836 }
1837 }
1838 if (new_ml) {
1839 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1840 }
1841 }
1842
1843 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1844 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1845 alias_print_queue);
1846 }
1847
88365e47 1848 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1849 g_free(ml);
314e2987
BS
1850 }
1851}
1852
1853void mtree_info(fprintf_function mon_printf, void *f)
1854{
1855 MemoryRegionListHead ml_head;
1856 MemoryRegionList *ml, *ml2;
0d673e36 1857 AddressSpace *as;
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BS
1858
1859 QTAILQ_INIT(&ml_head);
1860
0d673e36 1861 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
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AK
1862 mon_printf(f, "%s\n", as->name);
1863 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1864 }
1865
1866 mon_printf(f, "aliases\n");
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1867 /* print aliased regions */
1868 QTAILQ_FOREACH(ml, &ml_head, queue) {
1869 if (!ml->printed) {
1870 mon_printf(f, "%s\n", ml->mr->name);
1871 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1872 }
1873 }
1874
1875 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1876 g_free(ml);
314e2987 1877 }
314e2987 1878}