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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
9c17d615 | 20 | #include "sysemu/kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
022c62cb | 23 | #include "exec/memory-internal.h" |
67d95c15 | 24 | |
d197063f PB |
25 | //#define DEBUG_UNASSIGNED |
26 | ||
22bde714 JK |
27 | static unsigned memory_region_transaction_depth; |
28 | static bool memory_region_update_pending; | |
7664e80c AK |
29 | static bool global_dirty_log = false; |
30 | ||
72e22d2f AK |
31 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
32 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 33 | |
0d673e36 AK |
34 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
35 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
36 | ||
093bc2cd AK |
37 | typedef struct AddrRange AddrRange; |
38 | ||
8417cebf AK |
39 | /* |
40 | * Note using signed integers limits us to physical addresses at most | |
41 | * 63 bits wide. They are needed for negative offsetting in aliases | |
42 | * (large MemoryRegion::alias_offset). | |
43 | */ | |
093bc2cd | 44 | struct AddrRange { |
08dafab4 AK |
45 | Int128 start; |
46 | Int128 size; | |
093bc2cd AK |
47 | }; |
48 | ||
08dafab4 | 49 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
50 | { |
51 | return (AddrRange) { start, size }; | |
52 | } | |
53 | ||
54 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
55 | { | |
08dafab4 | 56 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
57 | } |
58 | ||
08dafab4 | 59 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 60 | { |
08dafab4 | 61 | return int128_add(r.start, r.size); |
093bc2cd AK |
62 | } |
63 | ||
08dafab4 | 64 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 65 | { |
08dafab4 | 66 | int128_addto(&range.start, delta); |
093bc2cd AK |
67 | return range; |
68 | } | |
69 | ||
08dafab4 AK |
70 | static bool addrrange_contains(AddrRange range, Int128 addr) |
71 | { | |
72 | return int128_ge(addr, range.start) | |
73 | && int128_lt(addr, addrrange_end(range)); | |
74 | } | |
75 | ||
093bc2cd AK |
76 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
77 | { | |
08dafab4 AK |
78 | return addrrange_contains(r1, r2.start) |
79 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
80 | } |
81 | ||
82 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
83 | { | |
08dafab4 AK |
84 | Int128 start = int128_max(r1.start, r2.start); |
85 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
86 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
87 | } |
88 | ||
0e0d36b4 AK |
89 | enum ListenerDirection { Forward, Reverse }; |
90 | ||
7376e582 AK |
91 | static bool memory_listener_match(MemoryListener *listener, |
92 | MemoryRegionSection *section) | |
93 | { | |
94 | return !listener->address_space_filter | |
95 | || listener->address_space_filter == section->address_space; | |
96 | } | |
97 | ||
98 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
99 | do { \ |
100 | MemoryListener *_listener; \ | |
101 | \ | |
102 | switch (_direction) { \ | |
103 | case Forward: \ | |
104 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
105 | if (_listener->_callback) { \ |
106 | _listener->_callback(_listener, ##_args); \ | |
107 | } \ | |
0e0d36b4 AK |
108 | } \ |
109 | break; \ | |
110 | case Reverse: \ | |
111 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
112 | memory_listeners, link) { \ | |
975aefe0 AK |
113 | if (_listener->_callback) { \ |
114 | _listener->_callback(_listener, ##_args); \ | |
115 | } \ | |
0e0d36b4 AK |
116 | } \ |
117 | break; \ | |
118 | default: \ | |
119 | abort(); \ | |
120 | } \ | |
121 | } while (0) | |
122 | ||
7376e582 AK |
123 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
124 | do { \ | |
125 | MemoryListener *_listener; \ | |
126 | \ | |
127 | switch (_direction) { \ | |
128 | case Forward: \ | |
129 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
130 | if (_listener->_callback \ |
131 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
132 | _listener->_callback(_listener, _section, ##_args); \ |
133 | } \ | |
134 | } \ | |
135 | break; \ | |
136 | case Reverse: \ | |
137 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
138 | memory_listeners, link) { \ | |
975aefe0 AK |
139 | if (_listener->_callback \ |
140 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
141 | _listener->_callback(_listener, _section, ##_args); \ |
142 | } \ | |
143 | } \ | |
144 | break; \ | |
145 | default: \ | |
146 | abort(); \ | |
147 | } \ | |
148 | } while (0) | |
149 | ||
0e0d36b4 | 150 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 151 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 152 | .mr = (fr)->mr, \ |
f6790af6 | 153 | .address_space = (as), \ |
0e0d36b4 | 154 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 155 | .size = (fr)->addr.size, \ |
0e0d36b4 | 156 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 157 | .readonly = (fr)->readonly, \ |
7376e582 | 158 | })) |
0e0d36b4 | 159 | |
093bc2cd AK |
160 | struct CoalescedMemoryRange { |
161 | AddrRange addr; | |
162 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
163 | }; | |
164 | ||
3e9d69e7 AK |
165 | struct MemoryRegionIoeventfd { |
166 | AddrRange addr; | |
167 | bool match_data; | |
168 | uint64_t data; | |
753d5e14 | 169 | EventNotifier *e; |
3e9d69e7 AK |
170 | }; |
171 | ||
172 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
173 | MemoryRegionIoeventfd b) | |
174 | { | |
08dafab4 | 175 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 176 | return true; |
08dafab4 | 177 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 178 | return false; |
08dafab4 | 179 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 180 | return true; |
08dafab4 | 181 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
182 | return false; |
183 | } else if (a.match_data < b.match_data) { | |
184 | return true; | |
185 | } else if (a.match_data > b.match_data) { | |
186 | return false; | |
187 | } else if (a.match_data) { | |
188 | if (a.data < b.data) { | |
189 | return true; | |
190 | } else if (a.data > b.data) { | |
191 | return false; | |
192 | } | |
193 | } | |
753d5e14 | 194 | if (a.e < b.e) { |
3e9d69e7 | 195 | return true; |
753d5e14 | 196 | } else if (a.e > b.e) { |
3e9d69e7 AK |
197 | return false; |
198 | } | |
199 | return false; | |
200 | } | |
201 | ||
202 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
203 | MemoryRegionIoeventfd b) | |
204 | { | |
205 | return !memory_region_ioeventfd_before(a, b) | |
206 | && !memory_region_ioeventfd_before(b, a); | |
207 | } | |
208 | ||
093bc2cd AK |
209 | typedef struct FlatRange FlatRange; |
210 | typedef struct FlatView FlatView; | |
211 | ||
212 | /* Range of memory in the global map. Addresses are absolute. */ | |
213 | struct FlatRange { | |
214 | MemoryRegion *mr; | |
a8170e5e | 215 | hwaddr offset_in_region; |
093bc2cd | 216 | AddrRange addr; |
5a583347 | 217 | uint8_t dirty_log_mask; |
5f9a5ea1 | 218 | bool romd_mode; |
fb1cd6f9 | 219 | bool readonly; |
093bc2cd AK |
220 | }; |
221 | ||
222 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
223 | * order. | |
224 | */ | |
225 | struct FlatView { | |
226 | FlatRange *ranges; | |
227 | unsigned nr; | |
228 | unsigned nr_allocated; | |
229 | }; | |
230 | ||
cc31e6e7 AK |
231 | typedef struct AddressSpaceOps AddressSpaceOps; |
232 | ||
093bc2cd AK |
233 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
234 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
235 | ||
093bc2cd AK |
236 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
237 | { | |
238 | return a->mr == b->mr | |
239 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 240 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 241 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 242 | && a->readonly == b->readonly; |
093bc2cd AK |
243 | } |
244 | ||
245 | static void flatview_init(FlatView *view) | |
246 | { | |
247 | view->ranges = NULL; | |
248 | view->nr = 0; | |
249 | view->nr_allocated = 0; | |
250 | } | |
251 | ||
252 | /* Insert a range into a given position. Caller is responsible for maintaining | |
253 | * sorting order. | |
254 | */ | |
255 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
256 | { | |
257 | if (view->nr == view->nr_allocated) { | |
258 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 259 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
260 | view->nr_allocated * sizeof(*view->ranges)); |
261 | } | |
262 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
263 | (view->nr - pos) * sizeof(FlatRange)); | |
264 | view->ranges[pos] = *range; | |
265 | ++view->nr; | |
266 | } | |
267 | ||
268 | static void flatview_destroy(FlatView *view) | |
269 | { | |
7267c094 | 270 | g_free(view->ranges); |
093bc2cd AK |
271 | } |
272 | ||
3d8e6bf9 AK |
273 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
274 | { | |
08dafab4 | 275 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 276 | && r1->mr == r2->mr |
08dafab4 AK |
277 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
278 | r1->addr.size), | |
279 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 280 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 281 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 282 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
283 | } |
284 | ||
285 | /* Attempt to simplify a view by merging ajacent ranges */ | |
286 | static void flatview_simplify(FlatView *view) | |
287 | { | |
288 | unsigned i, j; | |
289 | ||
290 | i = 0; | |
291 | while (i < view->nr) { | |
292 | j = i + 1; | |
293 | while (j < view->nr | |
294 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 295 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
296 | ++j; |
297 | } | |
298 | ++i; | |
299 | memmove(&view->ranges[i], &view->ranges[j], | |
300 | (view->nr - j) * sizeof(view->ranges[j])); | |
301 | view->nr -= j - i; | |
302 | } | |
303 | } | |
304 | ||
ce5d2f33 PB |
305 | static void memory_region_oldmmio_read_accessor(void *opaque, |
306 | hwaddr addr, | |
307 | uint64_t *value, | |
308 | unsigned size, | |
309 | unsigned shift, | |
310 | uint64_t mask) | |
311 | { | |
312 | MemoryRegion *mr = opaque; | |
313 | uint64_t tmp; | |
314 | ||
315 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
316 | *value |= (tmp & mask) << shift; | |
317 | } | |
318 | ||
164a4dcd | 319 | static void memory_region_read_accessor(void *opaque, |
a8170e5e | 320 | hwaddr addr, |
164a4dcd AK |
321 | uint64_t *value, |
322 | unsigned size, | |
323 | unsigned shift, | |
324 | uint64_t mask) | |
325 | { | |
326 | MemoryRegion *mr = opaque; | |
327 | uint64_t tmp; | |
328 | ||
d410515e JK |
329 | if (mr->flush_coalesced_mmio) { |
330 | qemu_flush_coalesced_mmio_buffer(); | |
331 | } | |
164a4dcd AK |
332 | tmp = mr->ops->read(mr->opaque, addr, size); |
333 | *value |= (tmp & mask) << shift; | |
334 | } | |
335 | ||
ce5d2f33 PB |
336 | static void memory_region_oldmmio_write_accessor(void *opaque, |
337 | hwaddr addr, | |
338 | uint64_t *value, | |
339 | unsigned size, | |
340 | unsigned shift, | |
341 | uint64_t mask) | |
342 | { | |
343 | MemoryRegion *mr = opaque; | |
344 | uint64_t tmp; | |
345 | ||
346 | tmp = (*value >> shift) & mask; | |
347 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); | |
348 | } | |
349 | ||
164a4dcd | 350 | static void memory_region_write_accessor(void *opaque, |
a8170e5e | 351 | hwaddr addr, |
164a4dcd AK |
352 | uint64_t *value, |
353 | unsigned size, | |
354 | unsigned shift, | |
355 | uint64_t mask) | |
356 | { | |
357 | MemoryRegion *mr = opaque; | |
358 | uint64_t tmp; | |
359 | ||
d410515e JK |
360 | if (mr->flush_coalesced_mmio) { |
361 | qemu_flush_coalesced_mmio_buffer(); | |
362 | } | |
164a4dcd AK |
363 | tmp = (*value >> shift) & mask; |
364 | mr->ops->write(mr->opaque, addr, tmp, size); | |
365 | } | |
366 | ||
a8170e5e | 367 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
368 | uint64_t *value, |
369 | unsigned size, | |
370 | unsigned access_size_min, | |
371 | unsigned access_size_max, | |
372 | void (*access)(void *opaque, | |
a8170e5e | 373 | hwaddr addr, |
164a4dcd AK |
374 | uint64_t *value, |
375 | unsigned size, | |
376 | unsigned shift, | |
377 | uint64_t mask), | |
378 | void *opaque) | |
379 | { | |
380 | uint64_t access_mask; | |
381 | unsigned access_size; | |
382 | unsigned i; | |
383 | ||
384 | if (!access_size_min) { | |
385 | access_size_min = 1; | |
386 | } | |
387 | if (!access_size_max) { | |
388 | access_size_max = 4; | |
389 | } | |
ce5d2f33 PB |
390 | |
391 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
392 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
393 | access_mask = -1ULL >> (64 - access_size * 8); | |
394 | for (i = 0; i < size; i += access_size) { | |
08521e28 PB |
395 | #ifdef TARGET_WORDS_BIGENDIAN |
396 | access(opaque, addr + i, value, access_size, | |
397 | (size - access_size - i) * 8, access_mask); | |
398 | #else | |
164a4dcd | 399 | access(opaque, addr + i, value, access_size, i * 8, access_mask); |
08521e28 | 400 | #endif |
164a4dcd AK |
401 | } |
402 | } | |
403 | ||
627a0e90 AK |
404 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
405 | unsigned width, bool write) | |
406 | { | |
407 | const MemoryRegionPortio *mrp; | |
408 | ||
409 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
410 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
411 | && width == mrp->size | |
412 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
413 | return mrp; | |
414 | } | |
415 | } | |
416 | return NULL; | |
417 | } | |
418 | ||
658b2224 AK |
419 | static void memory_region_iorange_read(IORange *iorange, |
420 | uint64_t offset, | |
421 | unsigned width, | |
422 | uint64_t *data) | |
423 | { | |
a2d33521 AK |
424 | MemoryRegionIORange *mrio |
425 | = container_of(iorange, MemoryRegionIORange, iorange); | |
426 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 427 | |
a2d33521 | 428 | offset += mrio->offset; |
627a0e90 | 429 | if (mr->ops->old_portio) { |
a2d33521 AK |
430 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
431 | width, false); | |
627a0e90 AK |
432 | |
433 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
434 | if (mrp) { | |
2b50aa1f | 435 | *data = mrp->read(mr->opaque, offset); |
03808f58 | 436 | } else if (width == 2) { |
a2d33521 | 437 | mrp = find_portio(mr, offset - mrio->offset, 1, false); |
03808f58 | 438 | assert(mrp); |
2b50aa1f AK |
439 | *data = mrp->read(mr->opaque, offset) | |
440 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
441 | } |
442 | return; | |
443 | } | |
3a130f4e | 444 | *data = 0; |
2b50aa1f | 445 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
446 | mr->ops->impl.min_access_size, |
447 | mr->ops->impl.max_access_size, | |
448 | memory_region_read_accessor, mr); | |
658b2224 AK |
449 | } |
450 | ||
451 | static void memory_region_iorange_write(IORange *iorange, | |
452 | uint64_t offset, | |
453 | unsigned width, | |
454 | uint64_t data) | |
455 | { | |
a2d33521 AK |
456 | MemoryRegionIORange *mrio |
457 | = container_of(iorange, MemoryRegionIORange, iorange); | |
458 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 459 | |
a2d33521 | 460 | offset += mrio->offset; |
627a0e90 | 461 | if (mr->ops->old_portio) { |
a2d33521 AK |
462 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
463 | width, true); | |
627a0e90 AK |
464 | |
465 | if (mrp) { | |
2b50aa1f | 466 | mrp->write(mr->opaque, offset, data); |
03808f58 | 467 | } else if (width == 2) { |
7e2a62d8 | 468 | mrp = find_portio(mr, offset - mrio->offset, 1, true); |
03808f58 | 469 | assert(mrp); |
2b50aa1f AK |
470 | mrp->write(mr->opaque, offset, data & 0xff); |
471 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
472 | } |
473 | return; | |
474 | } | |
2b50aa1f | 475 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
476 | mr->ops->impl.min_access_size, |
477 | mr->ops->impl.max_access_size, | |
478 | memory_region_write_accessor, mr); | |
658b2224 AK |
479 | } |
480 | ||
a2d33521 AK |
481 | static void memory_region_iorange_destructor(IORange *iorange) |
482 | { | |
483 | g_free(container_of(iorange, MemoryRegionIORange, iorange)); | |
484 | } | |
485 | ||
93632747 | 486 | const IORangeOps memory_region_iorange_ops = { |
658b2224 AK |
487 | .read = memory_region_iorange_read, |
488 | .write = memory_region_iorange_write, | |
a2d33521 | 489 | .destructor = memory_region_iorange_destructor, |
658b2224 AK |
490 | }; |
491 | ||
e2177955 AK |
492 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
493 | { | |
0d673e36 AK |
494 | AddressSpace *as; |
495 | ||
e2177955 AK |
496 | while (mr->parent) { |
497 | mr = mr->parent; | |
498 | } | |
0d673e36 AK |
499 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
500 | if (mr == as->root) { | |
501 | return as; | |
502 | } | |
e2177955 AK |
503 | } |
504 | abort(); | |
505 | } | |
506 | ||
093bc2cd AK |
507 | /* Render a memory region into the global view. Ranges in @view obscure |
508 | * ranges in @mr. | |
509 | */ | |
510 | static void render_memory_region(FlatView *view, | |
511 | MemoryRegion *mr, | |
08dafab4 | 512 | Int128 base, |
fb1cd6f9 AK |
513 | AddrRange clip, |
514 | bool readonly) | |
093bc2cd AK |
515 | { |
516 | MemoryRegion *subregion; | |
517 | unsigned i; | |
a8170e5e | 518 | hwaddr offset_in_region; |
08dafab4 AK |
519 | Int128 remain; |
520 | Int128 now; | |
093bc2cd AK |
521 | FlatRange fr; |
522 | AddrRange tmp; | |
523 | ||
6bba19ba AK |
524 | if (!mr->enabled) { |
525 | return; | |
526 | } | |
527 | ||
08dafab4 | 528 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 529 | readonly |= mr->readonly; |
093bc2cd AK |
530 | |
531 | tmp = addrrange_make(base, mr->size); | |
532 | ||
533 | if (!addrrange_intersects(tmp, clip)) { | |
534 | return; | |
535 | } | |
536 | ||
537 | clip = addrrange_intersection(tmp, clip); | |
538 | ||
539 | if (mr->alias) { | |
08dafab4 AK |
540 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
541 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 542 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
543 | return; |
544 | } | |
545 | ||
546 | /* Render subregions in priority order. */ | |
547 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 548 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
549 | } |
550 | ||
14a3c10a | 551 | if (!mr->terminates) { |
093bc2cd AK |
552 | return; |
553 | } | |
554 | ||
08dafab4 | 555 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
556 | base = clip.start; |
557 | remain = clip.size; | |
558 | ||
559 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
560 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
561 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
562 | continue; |
563 | } | |
08dafab4 AK |
564 | if (int128_lt(base, view->ranges[i].addr.start)) { |
565 | now = int128_min(remain, | |
566 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
567 | fr.mr = mr; |
568 | fr.offset_in_region = offset_in_region; | |
569 | fr.addr = addrrange_make(base, now); | |
5a583347 | 570 | fr.dirty_log_mask = mr->dirty_log_mask; |
5f9a5ea1 | 571 | fr.romd_mode = mr->romd_mode; |
fb1cd6f9 | 572 | fr.readonly = readonly; |
093bc2cd AK |
573 | flatview_insert(view, i, &fr); |
574 | ++i; | |
08dafab4 AK |
575 | int128_addto(&base, now); |
576 | offset_in_region += int128_get64(now); | |
577 | int128_subfrom(&remain, now); | |
093bc2cd | 578 | } |
d26a8cae AK |
579 | now = int128_sub(int128_min(int128_add(base, remain), |
580 | addrrange_end(view->ranges[i].addr)), | |
581 | base); | |
582 | int128_addto(&base, now); | |
583 | offset_in_region += int128_get64(now); | |
584 | int128_subfrom(&remain, now); | |
093bc2cd | 585 | } |
08dafab4 | 586 | if (int128_nz(remain)) { |
093bc2cd AK |
587 | fr.mr = mr; |
588 | fr.offset_in_region = offset_in_region; | |
589 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 590 | fr.dirty_log_mask = mr->dirty_log_mask; |
5f9a5ea1 | 591 | fr.romd_mode = mr->romd_mode; |
fb1cd6f9 | 592 | fr.readonly = readonly; |
093bc2cd AK |
593 | flatview_insert(view, i, &fr); |
594 | } | |
595 | } | |
596 | ||
597 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
598 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
599 | { | |
600 | FlatView view; | |
601 | ||
602 | flatview_init(&view); | |
603 | ||
83f3c251 AK |
604 | if (mr) { |
605 | render_memory_region(&view, mr, int128_zero(), | |
606 | addrrange_make(int128_zero(), int128_2_64()), false); | |
607 | } | |
3d8e6bf9 | 608 | flatview_simplify(&view); |
093bc2cd AK |
609 | |
610 | return view; | |
611 | } | |
612 | ||
3e9d69e7 AK |
613 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
614 | MemoryRegionIoeventfd *fds_new, | |
615 | unsigned fds_new_nb, | |
616 | MemoryRegionIoeventfd *fds_old, | |
617 | unsigned fds_old_nb) | |
618 | { | |
619 | unsigned iold, inew; | |
80a1ea37 AK |
620 | MemoryRegionIoeventfd *fd; |
621 | MemoryRegionSection section; | |
3e9d69e7 AK |
622 | |
623 | /* Generate a symmetric difference of the old and new fd sets, adding | |
624 | * and deleting as necessary. | |
625 | */ | |
626 | ||
627 | iold = inew = 0; | |
628 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
629 | if (iold < fds_old_nb | |
630 | && (inew == fds_new_nb | |
631 | || memory_region_ioeventfd_before(fds_old[iold], | |
632 | fds_new[inew]))) { | |
80a1ea37 AK |
633 | fd = &fds_old[iold]; |
634 | section = (MemoryRegionSection) { | |
f6790af6 | 635 | .address_space = as, |
80a1ea37 | 636 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 637 | .size = fd->addr.size, |
80a1ea37 AK |
638 | }; |
639 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 640 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
641 | ++iold; |
642 | } else if (inew < fds_new_nb | |
643 | && (iold == fds_old_nb | |
644 | || memory_region_ioeventfd_before(fds_new[inew], | |
645 | fds_old[iold]))) { | |
80a1ea37 AK |
646 | fd = &fds_new[inew]; |
647 | section = (MemoryRegionSection) { | |
f6790af6 | 648 | .address_space = as, |
80a1ea37 | 649 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 650 | .size = fd->addr.size, |
80a1ea37 AK |
651 | }; |
652 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 653 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
654 | ++inew; |
655 | } else { | |
656 | ++iold; | |
657 | ++inew; | |
658 | } | |
659 | } | |
660 | } | |
661 | ||
662 | static void address_space_update_ioeventfds(AddressSpace *as) | |
663 | { | |
664 | FlatRange *fr; | |
665 | unsigned ioeventfd_nb = 0; | |
666 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
667 | AddrRange tmp; | |
668 | unsigned i; | |
669 | ||
8786db7c | 670 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
3e9d69e7 AK |
671 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
672 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
673 | int128_sub(fr->addr.start, |
674 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
675 | if (addrrange_intersects(fr->addr, tmp)) { |
676 | ++ioeventfd_nb; | |
7267c094 | 677 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
678 | ioeventfd_nb * sizeof(*ioeventfds)); |
679 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
680 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
681 | } | |
682 | } | |
683 | } | |
684 | ||
685 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
686 | as->ioeventfds, as->ioeventfd_nb); | |
687 | ||
7267c094 | 688 | g_free(as->ioeventfds); |
3e9d69e7 AK |
689 | as->ioeventfds = ioeventfds; |
690 | as->ioeventfd_nb = ioeventfd_nb; | |
691 | } | |
692 | ||
b8af1afb AK |
693 | static void address_space_update_topology_pass(AddressSpace *as, |
694 | FlatView old_view, | |
695 | FlatView new_view, | |
696 | bool adding) | |
093bc2cd | 697 | { |
093bc2cd AK |
698 | unsigned iold, inew; |
699 | FlatRange *frold, *frnew; | |
093bc2cd AK |
700 | |
701 | /* Generate a symmetric difference of the old and new memory maps. | |
702 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
703 | */ | |
704 | iold = inew = 0; | |
705 | while (iold < old_view.nr || inew < new_view.nr) { | |
706 | if (iold < old_view.nr) { | |
707 | frold = &old_view.ranges[iold]; | |
708 | } else { | |
709 | frold = NULL; | |
710 | } | |
711 | if (inew < new_view.nr) { | |
712 | frnew = &new_view.ranges[inew]; | |
713 | } else { | |
714 | frnew = NULL; | |
715 | } | |
716 | ||
717 | if (frold | |
718 | && (!frnew | |
08dafab4 AK |
719 | || int128_lt(frold->addr.start, frnew->addr.start) |
720 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
721 | && !flatrange_equal(frold, frnew)))) { |
722 | /* In old, but (not in new, or in new but attributes changed). */ | |
723 | ||
b8af1afb | 724 | if (!adding) { |
72e22d2f | 725 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
726 | } |
727 | ||
093bc2cd AK |
728 | ++iold; |
729 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
730 | /* In both (logging may have changed) */ | |
731 | ||
b8af1afb | 732 | if (adding) { |
50c1e149 | 733 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 734 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 735 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 736 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 737 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 738 | } |
5a583347 AK |
739 | } |
740 | ||
093bc2cd AK |
741 | ++iold; |
742 | ++inew; | |
093bc2cd AK |
743 | } else { |
744 | /* In new */ | |
745 | ||
b8af1afb | 746 | if (adding) { |
72e22d2f | 747 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
748 | } |
749 | ||
093bc2cd AK |
750 | ++inew; |
751 | } | |
752 | } | |
b8af1afb AK |
753 | } |
754 | ||
755 | ||
756 | static void address_space_update_topology(AddressSpace *as) | |
757 | { | |
8786db7c | 758 | FlatView old_view = *as->current_map; |
b8af1afb AK |
759 | FlatView new_view = generate_memory_topology(as->root); |
760 | ||
761 | address_space_update_topology_pass(as, old_view, new_view, false); | |
762 | address_space_update_topology_pass(as, old_view, new_view, true); | |
763 | ||
8786db7c | 764 | *as->current_map = new_view; |
093bc2cd | 765 | flatview_destroy(&old_view); |
3e9d69e7 | 766 | address_space_update_ioeventfds(as); |
093bc2cd AK |
767 | } |
768 | ||
4ef4db86 AK |
769 | void memory_region_transaction_begin(void) |
770 | { | |
bb880ded | 771 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
772 | ++memory_region_transaction_depth; |
773 | } | |
774 | ||
775 | void memory_region_transaction_commit(void) | |
776 | { | |
0d673e36 AK |
777 | AddressSpace *as; |
778 | ||
4ef4db86 AK |
779 | assert(memory_region_transaction_depth); |
780 | --memory_region_transaction_depth; | |
22bde714 JK |
781 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
782 | memory_region_update_pending = false; | |
02e2b95f JK |
783 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
784 | ||
0d673e36 AK |
785 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
786 | address_space_update_topology(as); | |
02e2b95f JK |
787 | } |
788 | ||
789 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 790 | } |
4ef4db86 AK |
791 | } |
792 | ||
545e92e0 AK |
793 | static void memory_region_destructor_none(MemoryRegion *mr) |
794 | { | |
795 | } | |
796 | ||
797 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
798 | { | |
799 | qemu_ram_free(mr->ram_addr); | |
800 | } | |
801 | ||
802 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
803 | { | |
804 | qemu_ram_free_from_ptr(mr->ram_addr); | |
805 | } | |
806 | ||
d0a9b5bc AK |
807 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
808 | { | |
809 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
810 | } |
811 | ||
be675c97 AK |
812 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
813 | { | |
2c3579ab | 814 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
815 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
816 | #else | |
817 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
818 | #endif | |
819 | } | |
820 | ||
093bc2cd AK |
821 | void memory_region_init(MemoryRegion *mr, |
822 | const char *name, | |
823 | uint64_t size) | |
824 | { | |
2cdfcf27 PB |
825 | mr->ops = &unassigned_mem_ops; |
826 | mr->opaque = NULL; | |
30951157 | 827 | mr->iommu_ops = NULL; |
093bc2cd | 828 | mr->parent = NULL; |
08dafab4 AK |
829 | mr->size = int128_make64(size); |
830 | if (size == UINT64_MAX) { | |
831 | mr->size = int128_2_64(); | |
832 | } | |
093bc2cd | 833 | mr->addr = 0; |
b3b00c78 | 834 | mr->subpage = false; |
6bba19ba | 835 | mr->enabled = true; |
14a3c10a | 836 | mr->terminates = false; |
8ea9252a | 837 | mr->ram = false; |
5f9a5ea1 | 838 | mr->romd_mode = true; |
fb1cd6f9 | 839 | mr->readonly = false; |
75c578dc | 840 | mr->rom_device = false; |
545e92e0 | 841 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
842 | mr->priority = 0; |
843 | mr->may_overlap = false; | |
844 | mr->alias = NULL; | |
845 | QTAILQ_INIT(&mr->subregions); | |
846 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
847 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 848 | mr->name = g_strdup(name); |
5a583347 | 849 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
850 | mr->ioeventfd_nb = 0; |
851 | mr->ioeventfds = NULL; | |
d410515e | 852 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
853 | } |
854 | ||
b018ddf6 PB |
855 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
856 | unsigned size) | |
857 | { | |
858 | #ifdef DEBUG_UNASSIGNED | |
859 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
860 | #endif | |
861 | #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) | |
862 | cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size); | |
863 | #endif | |
864 | return 0; | |
865 | } | |
866 | ||
867 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
868 | uint64_t val, unsigned size) | |
869 | { | |
870 | #ifdef DEBUG_UNASSIGNED | |
871 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
872 | #endif | |
873 | #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) | |
874 | cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size); | |
875 | #endif | |
876 | } | |
877 | ||
d197063f PB |
878 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
879 | unsigned size, bool is_write) | |
880 | { | |
881 | return false; | |
882 | } | |
883 | ||
884 | const MemoryRegionOps unassigned_mem_ops = { | |
885 | .valid.accepts = unassigned_mem_accepts, | |
886 | .endianness = DEVICE_NATIVE_ENDIAN, | |
887 | }; | |
888 | ||
d2702032 PB |
889 | bool memory_region_access_valid(MemoryRegion *mr, |
890 | hwaddr addr, | |
891 | unsigned size, | |
892 | bool is_write) | |
093bc2cd | 893 | { |
a014ed07 PB |
894 | int access_size_min, access_size_max; |
895 | int access_size, i; | |
897fa7cf | 896 | |
093bc2cd AK |
897 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
898 | return false; | |
899 | } | |
900 | ||
a014ed07 | 901 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
902 | return true; |
903 | } | |
904 | ||
a014ed07 PB |
905 | access_size_min = mr->ops->valid.min_access_size; |
906 | if (!mr->ops->valid.min_access_size) { | |
907 | access_size_min = 1; | |
908 | } | |
909 | ||
910 | access_size_max = mr->ops->valid.max_access_size; | |
911 | if (!mr->ops->valid.max_access_size) { | |
912 | access_size_max = 4; | |
913 | } | |
914 | ||
915 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
916 | for (i = 0; i < size; i += access_size) { | |
917 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
918 | is_write)) { | |
919 | return false; | |
920 | } | |
093bc2cd | 921 | } |
a014ed07 | 922 | |
093bc2cd AK |
923 | return true; |
924 | } | |
925 | ||
a621f38d | 926 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 927 | hwaddr addr, |
a621f38d | 928 | unsigned size) |
093bc2cd | 929 | { |
164a4dcd | 930 | uint64_t data = 0; |
093bc2cd | 931 | |
ce5d2f33 PB |
932 | if (mr->ops->read) { |
933 | access_with_adjusted_size(addr, &data, size, | |
934 | mr->ops->impl.min_access_size, | |
935 | mr->ops->impl.max_access_size, | |
936 | memory_region_read_accessor, mr); | |
937 | } else { | |
938 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
939 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
940 | } |
941 | ||
093bc2cd AK |
942 | return data; |
943 | } | |
944 | ||
a621f38d | 945 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 946 | { |
a621f38d AK |
947 | if (memory_region_wrong_endianness(mr)) { |
948 | switch (size) { | |
949 | case 1: | |
950 | break; | |
951 | case 2: | |
952 | *data = bswap16(*data); | |
953 | break; | |
954 | case 4: | |
955 | *data = bswap32(*data); | |
1470a0cd | 956 | break; |
968a5627 PB |
957 | case 8: |
958 | *data = bswap64(*data); | |
959 | break; | |
a621f38d AK |
960 | default: |
961 | abort(); | |
962 | } | |
963 | } | |
964 | } | |
965 | ||
791af8c8 PB |
966 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
967 | hwaddr addr, | |
968 | uint64_t *pval, | |
969 | unsigned size) | |
a621f38d | 970 | { |
791af8c8 PB |
971 | if (!memory_region_access_valid(mr, addr, size, false)) { |
972 | *pval = unassigned_mem_read(mr, addr, size); | |
973 | return true; | |
974 | } | |
a621f38d | 975 | |
791af8c8 PB |
976 | *pval = memory_region_dispatch_read1(mr, addr, size); |
977 | adjust_endianness(mr, pval, size); | |
978 | return false; | |
a621f38d | 979 | } |
093bc2cd | 980 | |
791af8c8 | 981 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 982 | hwaddr addr, |
a621f38d AK |
983 | uint64_t data, |
984 | unsigned size) | |
985 | { | |
897fa7cf | 986 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 987 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 988 | return true; |
093bc2cd AK |
989 | } |
990 | ||
a621f38d AK |
991 | adjust_endianness(mr, &data, size); |
992 | ||
ce5d2f33 PB |
993 | if (mr->ops->write) { |
994 | access_with_adjusted_size(addr, &data, size, | |
995 | mr->ops->impl.min_access_size, | |
996 | mr->ops->impl.max_access_size, | |
997 | memory_region_write_accessor, mr); | |
998 | } else { | |
999 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
1000 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 1001 | } |
791af8c8 | 1002 | return false; |
093bc2cd AK |
1003 | } |
1004 | ||
093bc2cd AK |
1005 | void memory_region_init_io(MemoryRegion *mr, |
1006 | const MemoryRegionOps *ops, | |
1007 | void *opaque, | |
1008 | const char *name, | |
1009 | uint64_t size) | |
1010 | { | |
1011 | memory_region_init(mr, name, size); | |
1012 | mr->ops = ops; | |
1013 | mr->opaque = opaque; | |
14a3c10a | 1014 | mr->terminates = true; |
97161e17 | 1015 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
1016 | } |
1017 | ||
1018 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
1019 | const char *name, |
1020 | uint64_t size) | |
1021 | { | |
1022 | memory_region_init(mr, name, size); | |
8ea9252a | 1023 | mr->ram = true; |
14a3c10a | 1024 | mr->terminates = true; |
545e92e0 | 1025 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 1026 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
1027 | } |
1028 | ||
1029 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
1030 | const char *name, |
1031 | uint64_t size, | |
1032 | void *ptr) | |
1033 | { | |
1034 | memory_region_init(mr, name, size); | |
8ea9252a | 1035 | mr->ram = true; |
14a3c10a | 1036 | mr->terminates = true; |
545e92e0 | 1037 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 1038 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
1039 | } |
1040 | ||
1041 | void memory_region_init_alias(MemoryRegion *mr, | |
1042 | const char *name, | |
1043 | MemoryRegion *orig, | |
a8170e5e | 1044 | hwaddr offset, |
093bc2cd AK |
1045 | uint64_t size) |
1046 | { | |
1047 | memory_region_init(mr, name, size); | |
1048 | mr->alias = orig; | |
1049 | mr->alias_offset = offset; | |
1050 | } | |
1051 | ||
d0a9b5bc AK |
1052 | void memory_region_init_rom_device(MemoryRegion *mr, |
1053 | const MemoryRegionOps *ops, | |
75f5941c | 1054 | void *opaque, |
d0a9b5bc AK |
1055 | const char *name, |
1056 | uint64_t size) | |
1057 | { | |
1058 | memory_region_init(mr, name, size); | |
7bc2b9cd | 1059 | mr->ops = ops; |
75f5941c | 1060 | mr->opaque = opaque; |
d0a9b5bc | 1061 | mr->terminates = true; |
75c578dc | 1062 | mr->rom_device = true; |
d0a9b5bc | 1063 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1064 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
1065 | } |
1066 | ||
30951157 AK |
1067 | void memory_region_init_iommu(MemoryRegion *mr, |
1068 | const MemoryRegionIOMMUOps *ops, | |
1069 | const char *name, | |
1070 | uint64_t size) | |
1071 | { | |
1072 | memory_region_init(mr, name, size); | |
1073 | mr->iommu_ops = ops, | |
1074 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1075 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1076 | } |
1077 | ||
1660e72d JK |
1078 | void memory_region_init_reservation(MemoryRegion *mr, |
1079 | const char *name, | |
1080 | uint64_t size) | |
1081 | { | |
d197063f | 1082 | memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1083 | } |
1084 | ||
093bc2cd AK |
1085 | void memory_region_destroy(MemoryRegion *mr) |
1086 | { | |
1087 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
2be0e25f | 1088 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1089 | mr->destructor(mr); |
093bc2cd | 1090 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1091 | g_free((char *)mr->name); |
1092 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1093 | } |
1094 | ||
1095 | uint64_t memory_region_size(MemoryRegion *mr) | |
1096 | { | |
08dafab4 AK |
1097 | if (int128_eq(mr->size, int128_2_64())) { |
1098 | return UINT64_MAX; | |
1099 | } | |
1100 | return int128_get64(mr->size); | |
093bc2cd AK |
1101 | } |
1102 | ||
8991c79b AK |
1103 | const char *memory_region_name(MemoryRegion *mr) |
1104 | { | |
1105 | return mr->name; | |
1106 | } | |
1107 | ||
8ea9252a AK |
1108 | bool memory_region_is_ram(MemoryRegion *mr) |
1109 | { | |
1110 | return mr->ram; | |
1111 | } | |
1112 | ||
55043ba3 AK |
1113 | bool memory_region_is_logging(MemoryRegion *mr) |
1114 | { | |
1115 | return mr->dirty_log_mask; | |
1116 | } | |
1117 | ||
ce7923da AK |
1118 | bool memory_region_is_rom(MemoryRegion *mr) |
1119 | { | |
1120 | return mr->ram && mr->readonly; | |
1121 | } | |
1122 | ||
30951157 AK |
1123 | bool memory_region_is_iommu(MemoryRegion *mr) |
1124 | { | |
1125 | return mr->iommu_ops; | |
1126 | } | |
1127 | ||
06866575 DG |
1128 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1129 | { | |
1130 | notifier_list_add(&mr->iommu_notify, n); | |
1131 | } | |
1132 | ||
1133 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1134 | { | |
1135 | notifier_remove(n); | |
1136 | } | |
1137 | ||
1138 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1139 | IOMMUTLBEntry entry) | |
1140 | { | |
1141 | assert(memory_region_is_iommu(mr)); | |
1142 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1143 | } | |
1144 | ||
093bc2cd AK |
1145 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1146 | { | |
5a583347 AK |
1147 | uint8_t mask = 1 << client; |
1148 | ||
59023ef4 | 1149 | memory_region_transaction_begin(); |
5a583347 | 1150 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1151 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1152 | memory_region_transaction_commit(); |
093bc2cd AK |
1153 | } |
1154 | ||
a8170e5e AK |
1155 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1156 | hwaddr size, unsigned client) | |
093bc2cd | 1157 | { |
14a3c10a | 1158 | assert(mr->terminates); |
cd7a45c9 BS |
1159 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1160 | 1 << client); | |
093bc2cd AK |
1161 | } |
1162 | ||
a8170e5e AK |
1163 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1164 | hwaddr size) | |
093bc2cd | 1165 | { |
14a3c10a | 1166 | assert(mr->terminates); |
fd4aa979 | 1167 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1168 | } |
1169 | ||
6c279db8 JQ |
1170 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1171 | hwaddr size, unsigned client) | |
1172 | { | |
1173 | bool ret; | |
1174 | assert(mr->terminates); | |
1175 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, | |
1176 | 1 << client); | |
1177 | if (ret) { | |
1178 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, | |
1179 | mr->ram_addr + addr + size, | |
1180 | 1 << client); | |
1181 | } | |
1182 | return ret; | |
1183 | } | |
1184 | ||
1185 | ||
093bc2cd AK |
1186 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1187 | { | |
0d673e36 | 1188 | AddressSpace *as; |
5a583347 AK |
1189 | FlatRange *fr; |
1190 | ||
0d673e36 AK |
1191 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1192 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { | |
1193 | if (fr->mr == mr) { | |
1194 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1195 | } | |
5a583347 AK |
1196 | } |
1197 | } | |
093bc2cd AK |
1198 | } |
1199 | ||
1200 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1201 | { | |
fb1cd6f9 | 1202 | if (mr->readonly != readonly) { |
59023ef4 | 1203 | memory_region_transaction_begin(); |
fb1cd6f9 | 1204 | mr->readonly = readonly; |
22bde714 | 1205 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1206 | memory_region_transaction_commit(); |
fb1cd6f9 | 1207 | } |
093bc2cd AK |
1208 | } |
1209 | ||
5f9a5ea1 | 1210 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1211 | { |
5f9a5ea1 | 1212 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1213 | memory_region_transaction_begin(); |
5f9a5ea1 | 1214 | mr->romd_mode = romd_mode; |
22bde714 | 1215 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1216 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1217 | } |
1218 | } | |
1219 | ||
a8170e5e AK |
1220 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1221 | hwaddr size, unsigned client) | |
093bc2cd | 1222 | { |
14a3c10a | 1223 | assert(mr->terminates); |
5a583347 AK |
1224 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1225 | mr->ram_addr + addr + size, | |
1226 | 1 << client); | |
093bc2cd AK |
1227 | } |
1228 | ||
1229 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1230 | { | |
1231 | if (mr->alias) { | |
1232 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1233 | } | |
1234 | ||
14a3c10a | 1235 | assert(mr->terminates); |
093bc2cd | 1236 | |
021d26d1 | 1237 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1238 | } |
1239 | ||
0d673e36 | 1240 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd AK |
1241 | { |
1242 | FlatRange *fr; | |
1243 | CoalescedMemoryRange *cmr; | |
1244 | AddrRange tmp; | |
95d2994a | 1245 | MemoryRegionSection section; |
093bc2cd | 1246 | |
0d673e36 | 1247 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
093bc2cd | 1248 | if (fr->mr == mr) { |
95d2994a | 1249 | section = (MemoryRegionSection) { |
f6790af6 | 1250 | .address_space = as, |
95d2994a | 1251 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1252 | .size = fr->addr.size, |
95d2994a AK |
1253 | }; |
1254 | ||
1255 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1256 | int128_get64(fr->addr.start), | |
1257 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1258 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1259 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1260 | int128_sub(fr->addr.start, |
1261 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1262 | if (!addrrange_intersects(tmp, fr->addr)) { |
1263 | continue; | |
1264 | } | |
1265 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1266 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1267 | int128_get64(tmp.start), | |
1268 | int128_get64(tmp.size)); | |
093bc2cd AK |
1269 | } |
1270 | } | |
1271 | } | |
1272 | } | |
1273 | ||
0d673e36 AK |
1274 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1275 | { | |
1276 | AddressSpace *as; | |
1277 | ||
1278 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1279 | memory_region_update_coalesced_range_as(mr, as); | |
1280 | } | |
1281 | } | |
1282 | ||
093bc2cd AK |
1283 | void memory_region_set_coalescing(MemoryRegion *mr) |
1284 | { | |
1285 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1286 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1287 | } |
1288 | ||
1289 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1290 | hwaddr offset, |
093bc2cd AK |
1291 | uint64_t size) |
1292 | { | |
7267c094 | 1293 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1294 | |
08dafab4 | 1295 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1296 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1297 | memory_region_update_coalesced_range(mr); | |
d410515e | 1298 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1299 | } |
1300 | ||
1301 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1302 | { | |
1303 | CoalescedMemoryRange *cmr; | |
1304 | ||
d410515e JK |
1305 | qemu_flush_coalesced_mmio_buffer(); |
1306 | mr->flush_coalesced_mmio = false; | |
1307 | ||
093bc2cd AK |
1308 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1309 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1310 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1311 | g_free(cmr); |
093bc2cd AK |
1312 | } |
1313 | memory_region_update_coalesced_range(mr); | |
1314 | } | |
1315 | ||
d410515e JK |
1316 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1317 | { | |
1318 | mr->flush_coalesced_mmio = true; | |
1319 | } | |
1320 | ||
1321 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1322 | { | |
1323 | qemu_flush_coalesced_mmio_buffer(); | |
1324 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1325 | mr->flush_coalesced_mmio = false; | |
1326 | } | |
1327 | } | |
1328 | ||
3e9d69e7 | 1329 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1330 | hwaddr addr, |
3e9d69e7 AK |
1331 | unsigned size, |
1332 | bool match_data, | |
1333 | uint64_t data, | |
753d5e14 | 1334 | EventNotifier *e) |
3e9d69e7 AK |
1335 | { |
1336 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1337 | .addr.start = int128_make64(addr), |
1338 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1339 | .match_data = match_data, |
1340 | .data = data, | |
753d5e14 | 1341 | .e = e, |
3e9d69e7 AK |
1342 | }; |
1343 | unsigned i; | |
1344 | ||
28f362be | 1345 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1346 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1347 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1348 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1349 | break; | |
1350 | } | |
1351 | } | |
1352 | ++mr->ioeventfd_nb; | |
7267c094 | 1353 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1354 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1355 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1356 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1357 | mr->ioeventfds[i] = mrfd; | |
22bde714 | 1358 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1359 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1360 | } |
1361 | ||
1362 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1363 | hwaddr addr, |
3e9d69e7 AK |
1364 | unsigned size, |
1365 | bool match_data, | |
1366 | uint64_t data, | |
753d5e14 | 1367 | EventNotifier *e) |
3e9d69e7 AK |
1368 | { |
1369 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1370 | .addr.start = int128_make64(addr), |
1371 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1372 | .match_data = match_data, |
1373 | .data = data, | |
753d5e14 | 1374 | .e = e, |
3e9d69e7 AK |
1375 | }; |
1376 | unsigned i; | |
1377 | ||
28f362be | 1378 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1379 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1380 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1381 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1382 | break; | |
1383 | } | |
1384 | } | |
1385 | assert(i != mr->ioeventfd_nb); | |
1386 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1387 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1388 | --mr->ioeventfd_nb; | |
7267c094 | 1389 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1390 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
22bde714 | 1391 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1392 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1393 | } |
1394 | ||
093bc2cd | 1395 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
a8170e5e | 1396 | hwaddr offset, |
093bc2cd AK |
1397 | MemoryRegion *subregion) |
1398 | { | |
1399 | MemoryRegion *other; | |
1400 | ||
59023ef4 JK |
1401 | memory_region_transaction_begin(); |
1402 | ||
093bc2cd AK |
1403 | assert(!subregion->parent); |
1404 | subregion->parent = mr; | |
1405 | subregion->addr = offset; | |
1406 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1407 | if (subregion->may_overlap || other->may_overlap) { | |
1408 | continue; | |
1409 | } | |
2c7cfd65 | 1410 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1411 | int128_add(int128_make64(other->addr), other->size)) |
1412 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1413 | int128_make64(other->addr))) { | |
093bc2cd AK |
1414 | continue; |
1415 | } | |
a5e1cbc8 | 1416 | #if 0 |
860329b2 MW |
1417 | printf("warning: subregion collision %llx/%llx (%s) " |
1418 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1419 | (unsigned long long)offset, |
08dafab4 | 1420 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1421 | subregion->name, |
1422 | (unsigned long long)other->addr, | |
08dafab4 | 1423 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1424 | other->name); |
a5e1cbc8 | 1425 | #endif |
093bc2cd AK |
1426 | } |
1427 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1428 | if (subregion->priority >= other->priority) { | |
1429 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1430 | goto done; | |
1431 | } | |
1432 | } | |
1433 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1434 | done: | |
22bde714 | 1435 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1436 | memory_region_transaction_commit(); |
093bc2cd AK |
1437 | } |
1438 | ||
1439 | ||
1440 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1441 | hwaddr offset, |
093bc2cd AK |
1442 | MemoryRegion *subregion) |
1443 | { | |
1444 | subregion->may_overlap = false; | |
1445 | subregion->priority = 0; | |
1446 | memory_region_add_subregion_common(mr, offset, subregion); | |
1447 | } | |
1448 | ||
1449 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1450 | hwaddr offset, |
093bc2cd AK |
1451 | MemoryRegion *subregion, |
1452 | unsigned priority) | |
1453 | { | |
1454 | subregion->may_overlap = true; | |
1455 | subregion->priority = priority; | |
1456 | memory_region_add_subregion_common(mr, offset, subregion); | |
1457 | } | |
1458 | ||
1459 | void memory_region_del_subregion(MemoryRegion *mr, | |
1460 | MemoryRegion *subregion) | |
1461 | { | |
59023ef4 | 1462 | memory_region_transaction_begin(); |
093bc2cd AK |
1463 | assert(subregion->parent == mr); |
1464 | subregion->parent = NULL; | |
1465 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
22bde714 | 1466 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1467 | memory_region_transaction_commit(); |
6bba19ba AK |
1468 | } |
1469 | ||
1470 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1471 | { | |
1472 | if (enabled == mr->enabled) { | |
1473 | return; | |
1474 | } | |
59023ef4 | 1475 | memory_region_transaction_begin(); |
6bba19ba | 1476 | mr->enabled = enabled; |
22bde714 | 1477 | memory_region_update_pending = true; |
59023ef4 | 1478 | memory_region_transaction_commit(); |
093bc2cd | 1479 | } |
1c0ffa58 | 1480 | |
a8170e5e | 1481 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2282e1af AK |
1482 | { |
1483 | MemoryRegion *parent = mr->parent; | |
1484 | unsigned priority = mr->priority; | |
1485 | bool may_overlap = mr->may_overlap; | |
1486 | ||
1487 | if (addr == mr->addr || !parent) { | |
1488 | mr->addr = addr; | |
1489 | return; | |
1490 | } | |
1491 | ||
1492 | memory_region_transaction_begin(); | |
1493 | memory_region_del_subregion(parent, mr); | |
1494 | if (may_overlap) { | |
1495 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1496 | } else { | |
1497 | memory_region_add_subregion(parent, addr, mr); | |
1498 | } | |
1499 | memory_region_transaction_commit(); | |
1500 | } | |
1501 | ||
a8170e5e | 1502 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1503 | { |
4703359e | 1504 | assert(mr->alias); |
4703359e | 1505 | |
59023ef4 | 1506 | if (offset == mr->alias_offset) { |
4703359e AK |
1507 | return; |
1508 | } | |
1509 | ||
59023ef4 JK |
1510 | memory_region_transaction_begin(); |
1511 | mr->alias_offset = offset; | |
22bde714 | 1512 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1513 | memory_region_transaction_commit(); |
4703359e AK |
1514 | } |
1515 | ||
e34911c4 AK |
1516 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1517 | { | |
e34911c4 AK |
1518 | return mr->ram_addr; |
1519 | } | |
1520 | ||
e2177955 AK |
1521 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1522 | { | |
1523 | const AddrRange *addr = addr_; | |
1524 | const FlatRange *fr = fr_; | |
1525 | ||
1526 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1527 | return -1; | |
1528 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1529 | return 1; | |
1530 | } | |
1531 | return 0; | |
1532 | } | |
1533 | ||
1534 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1535 | { | |
8786db7c | 1536 | return bsearch(&addr, as->current_map->ranges, as->current_map->nr, |
e2177955 AK |
1537 | sizeof(FlatRange), cmp_flatrange_addr); |
1538 | } | |
1539 | ||
73034e9e | 1540 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1541 | hwaddr addr, uint64_t size) |
e2177955 | 1542 | { |
052e87b0 | 1543 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1544 | MemoryRegion *root; |
1545 | AddressSpace *as; | |
1546 | AddrRange range; | |
1547 | FlatRange *fr; | |
1548 | ||
1549 | addr += mr->addr; | |
1550 | for (root = mr; root->parent; ) { | |
1551 | root = root->parent; | |
1552 | addr += root->addr; | |
1553 | } | |
e2177955 | 1554 | |
73034e9e PB |
1555 | as = memory_region_to_address_space(root); |
1556 | range = addrrange_make(int128_make64(addr), int128_make64(size)); | |
1557 | fr = address_space_lookup(as, range); | |
e2177955 AK |
1558 | if (!fr) { |
1559 | return ret; | |
1560 | } | |
1561 | ||
8786db7c | 1562 | while (fr > as->current_map->ranges |
e2177955 AK |
1563 | && addrrange_intersects(fr[-1].addr, range)) { |
1564 | --fr; | |
1565 | } | |
1566 | ||
1567 | ret.mr = fr->mr; | |
73034e9e | 1568 | ret.address_space = as; |
e2177955 AK |
1569 | range = addrrange_intersection(range, fr->addr); |
1570 | ret.offset_within_region = fr->offset_in_region; | |
1571 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1572 | fr->addr.start)); | |
052e87b0 | 1573 | ret.size = range.size; |
e2177955 | 1574 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1575 | ret.readonly = fr->readonly; |
e2177955 AK |
1576 | return ret; |
1577 | } | |
1578 | ||
1d671369 | 1579 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1580 | { |
7664e80c AK |
1581 | FlatRange *fr; |
1582 | ||
8786db7c | 1583 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
72e22d2f | 1584 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1585 | } |
1586 | } | |
1587 | ||
1588 | void memory_global_dirty_log_start(void) | |
1589 | { | |
7664e80c | 1590 | global_dirty_log = true; |
7376e582 | 1591 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1592 | } |
1593 | ||
1594 | void memory_global_dirty_log_stop(void) | |
1595 | { | |
7664e80c | 1596 | global_dirty_log = false; |
7376e582 | 1597 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1598 | } |
1599 | ||
1600 | static void listener_add_address_space(MemoryListener *listener, | |
1601 | AddressSpace *as) | |
1602 | { | |
1603 | FlatRange *fr; | |
1604 | ||
221b3a3f | 1605 | if (listener->address_space_filter |
f6790af6 | 1606 | && listener->address_space_filter != as) { |
221b3a3f JG |
1607 | return; |
1608 | } | |
1609 | ||
7664e80c | 1610 | if (global_dirty_log) { |
975aefe0 AK |
1611 | if (listener->log_global_start) { |
1612 | listener->log_global_start(listener); | |
1613 | } | |
7664e80c | 1614 | } |
975aefe0 | 1615 | |
8786db7c | 1616 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
7664e80c AK |
1617 | MemoryRegionSection section = { |
1618 | .mr = fr->mr, | |
f6790af6 | 1619 | .address_space = as, |
7664e80c | 1620 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1621 | .size = fr->addr.size, |
7664e80c | 1622 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1623 | .readonly = fr->readonly, |
7664e80c | 1624 | }; |
975aefe0 AK |
1625 | if (listener->region_add) { |
1626 | listener->region_add(listener, §ion); | |
1627 | } | |
7664e80c AK |
1628 | } |
1629 | } | |
1630 | ||
f6790af6 | 1631 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1632 | { |
72e22d2f | 1633 | MemoryListener *other = NULL; |
0d673e36 | 1634 | AddressSpace *as; |
72e22d2f | 1635 | |
7376e582 | 1636 | listener->address_space_filter = filter; |
72e22d2f AK |
1637 | if (QTAILQ_EMPTY(&memory_listeners) |
1638 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1639 | memory_listeners)->priority) { | |
1640 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1641 | } else { | |
1642 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1643 | if (listener->priority < other->priority) { | |
1644 | break; | |
1645 | } | |
1646 | } | |
1647 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1648 | } | |
0d673e36 AK |
1649 | |
1650 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1651 | listener_add_address_space(listener, as); | |
1652 | } | |
7664e80c AK |
1653 | } |
1654 | ||
1655 | void memory_listener_unregister(MemoryListener *listener) | |
1656 | { | |
72e22d2f | 1657 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1658 | } |
e2177955 | 1659 | |
9ad2bbc1 | 1660 | void address_space_init(AddressSpace *as, MemoryRegion *root) |
1c0ffa58 | 1661 | { |
59023ef4 | 1662 | memory_region_transaction_begin(); |
8786db7c AK |
1663 | as->root = root; |
1664 | as->current_map = g_new(FlatView, 1); | |
1665 | flatview_init(as->current_map); | |
4c19eb72 AK |
1666 | as->ioeventfd_nb = 0; |
1667 | as->ioeventfds = NULL; | |
0d673e36 AK |
1668 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
1669 | as->name = NULL; | |
ac1970fb | 1670 | address_space_init_dispatch(as); |
f43793c7 PB |
1671 | memory_region_update_pending |= root->enabled; |
1672 | memory_region_transaction_commit(); | |
1c0ffa58 | 1673 | } |
658b2224 | 1674 | |
83f3c251 AK |
1675 | void address_space_destroy(AddressSpace *as) |
1676 | { | |
1677 | /* Flush out anything from MemoryListeners listening in on this */ | |
1678 | memory_region_transaction_begin(); | |
1679 | as->root = NULL; | |
1680 | memory_region_transaction_commit(); | |
1681 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1682 | address_space_destroy_dispatch(as); | |
1683 | flatview_destroy(as->current_map); | |
1684 | g_free(as->current_map); | |
4c19eb72 | 1685 | g_free(as->ioeventfds); |
83f3c251 AK |
1686 | } |
1687 | ||
791af8c8 | 1688 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1689 | { |
791af8c8 | 1690 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1691 | } |
1692 | ||
791af8c8 | 1693 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1694 | uint64_t val, unsigned size) |
1695 | { | |
791af8c8 | 1696 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1697 | } |
1698 | ||
314e2987 BS |
1699 | typedef struct MemoryRegionList MemoryRegionList; |
1700 | ||
1701 | struct MemoryRegionList { | |
1702 | const MemoryRegion *mr; | |
1703 | bool printed; | |
1704 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1705 | }; | |
1706 | ||
1707 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1708 | ||
1709 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1710 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1711 | hwaddr base, |
9479c57a | 1712 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1713 | { |
9479c57a JK |
1714 | MemoryRegionList *new_ml, *ml, *next_ml; |
1715 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1716 | const MemoryRegion *submr; |
1717 | unsigned int i; | |
1718 | ||
7ea692b2 | 1719 | if (!mr || !mr->enabled) { |
314e2987 BS |
1720 | return; |
1721 | } | |
1722 | ||
1723 | for (i = 0; i < level; i++) { | |
1724 | mon_printf(f, " "); | |
1725 | } | |
1726 | ||
1727 | if (mr->alias) { | |
1728 | MemoryRegionList *ml; | |
1729 | bool found = false; | |
1730 | ||
1731 | /* check if the alias is already in the queue */ | |
9479c57a | 1732 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1733 | if (ml->mr == mr->alias && !ml->printed) { |
1734 | found = true; | |
1735 | } | |
1736 | } | |
1737 | ||
1738 | if (!found) { | |
1739 | ml = g_new(MemoryRegionList, 1); | |
1740 | ml->mr = mr->alias; | |
1741 | ml->printed = false; | |
9479c57a | 1742 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1743 | } |
4896d74b JK |
1744 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1745 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1746 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1747 | base + mr->addr, |
08dafab4 | 1748 | base + mr->addr |
052e87b0 | 1749 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1750 | mr->priority, |
5f9a5ea1 JK |
1751 | mr->romd_mode ? 'R' : '-', |
1752 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1753 | : '-', | |
314e2987 BS |
1754 | mr->name, |
1755 | mr->alias->name, | |
1756 | mr->alias_offset, | |
08dafab4 | 1757 | mr->alias_offset |
a8170e5e | 1758 | + (hwaddr)int128_get64(mr->size) - 1); |
314e2987 | 1759 | } else { |
4896d74b JK |
1760 | mon_printf(f, |
1761 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1762 | base + mr->addr, |
08dafab4 | 1763 | base + mr->addr |
052e87b0 | 1764 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1765 | mr->priority, |
5f9a5ea1 JK |
1766 | mr->romd_mode ? 'R' : '-', |
1767 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1768 | : '-', | |
314e2987 BS |
1769 | mr->name); |
1770 | } | |
9479c57a JK |
1771 | |
1772 | QTAILQ_INIT(&submr_print_queue); | |
1773 | ||
314e2987 | 1774 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1775 | new_ml = g_new(MemoryRegionList, 1); |
1776 | new_ml->mr = submr; | |
1777 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1778 | if (new_ml->mr->addr < ml->mr->addr || | |
1779 | (new_ml->mr->addr == ml->mr->addr && | |
1780 | new_ml->mr->priority > ml->mr->priority)) { | |
1781 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1782 | new_ml = NULL; | |
1783 | break; | |
1784 | } | |
1785 | } | |
1786 | if (new_ml) { | |
1787 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1788 | } | |
1789 | } | |
1790 | ||
1791 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1792 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1793 | alias_print_queue); | |
1794 | } | |
1795 | ||
88365e47 | 1796 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1797 | g_free(ml); |
314e2987 BS |
1798 | } |
1799 | } | |
1800 | ||
1801 | void mtree_info(fprintf_function mon_printf, void *f) | |
1802 | { | |
1803 | MemoryRegionListHead ml_head; | |
1804 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1805 | AddressSpace *as; |
314e2987 BS |
1806 | |
1807 | QTAILQ_INIT(&ml_head); | |
1808 | ||
0d673e36 AK |
1809 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1810 | if (!as->name) { | |
1811 | continue; | |
1812 | } | |
1813 | mon_printf(f, "%s\n", as->name); | |
1814 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1815 | } |
1816 | ||
1817 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1818 | /* print aliased regions */ |
1819 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1820 | if (!ml->printed) { | |
1821 | mon_printf(f, "%s\n", ml->mr->name); | |
1822 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1823 | } | |
1824 | } | |
1825 | ||
1826 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1827 | g_free(ml); |
314e2987 | 1828 | } |
314e2987 | 1829 | } |