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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
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14 */
15
022c62cb
PB
16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
409ddd01 19#include "qapi/visitor.h"
1de7afc9 20#include "qemu/bitops.h"
2c9b15ca 21#include "qom/object.h"
55d5d048 22#include "trace.h"
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23#include <assert.h>
24
022c62cb 25#include "exec/memory-internal.h"
220c3ebd 26#include "exec/ram_addr.h"
e1c57ab8 27#include "sysemu/sysemu.h"
67d95c15 28
d197063f
PB
29//#define DEBUG_UNASSIGNED
30
22bde714
JK
31static unsigned memory_region_transaction_depth;
32static bool memory_region_update_pending;
4dc56152 33static bool ioeventfd_update_pending;
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34static bool global_dirty_log = false;
35
856d7245
PB
36/* flat_view_mutex is taken around reading as->current_map; the critical
37 * section is extremely short, so I'm using a single mutex for every AS.
38 * We could also RCU for the read-side.
39 *
40 * The BQL is taken around transaction commits, hence both locks are taken
41 * while writing to as->current_map (with the BQL taken outside).
42 */
43static QemuMutex flat_view_mutex;
44
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45static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 47
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48static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
856d7245
PB
51static void memory_init(void)
52{
53 qemu_mutex_init(&flat_view_mutex);
54}
55
093bc2cd
AK
56typedef struct AddrRange AddrRange;
57
8417cebf 58/*
c9cdaa3a 59 * Note that signed integers are needed for negative offsetting in aliases
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60 * (large MemoryRegion::alias_offset).
61 */
093bc2cd 62struct AddrRange {
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63 Int128 start;
64 Int128 size;
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65};
66
08dafab4 67static AddrRange addrrange_make(Int128 start, Int128 size)
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68{
69 return (AddrRange) { start, size };
70}
71
72static bool addrrange_equal(AddrRange r1, AddrRange r2)
73{
08dafab4 74 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
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75}
76
08dafab4 77static Int128 addrrange_end(AddrRange r)
093bc2cd 78{
08dafab4 79 return int128_add(r.start, r.size);
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80}
81
08dafab4 82static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 83{
08dafab4 84 int128_addto(&range.start, delta);
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85 return range;
86}
87
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88static bool addrrange_contains(AddrRange range, Int128 addr)
89{
90 return int128_ge(addr, range.start)
91 && int128_lt(addr, addrrange_end(range));
92}
93
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94static bool addrrange_intersects(AddrRange r1, AddrRange r2)
95{
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96 return addrrange_contains(r1, r2.start)
97 || addrrange_contains(r2, r1.start);
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98}
99
100static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
101{
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102 Int128 start = int128_max(r1.start, r2.start);
103 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
104 return addrrange_make(start, int128_sub(end, start));
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105}
106
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107enum ListenerDirection { Forward, Reverse };
108
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109static bool memory_listener_match(MemoryListener *listener,
110 MemoryRegionSection *section)
111{
112 return !listener->address_space_filter
113 || listener->address_space_filter == section->address_space;
114}
115
116#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
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117 do { \
118 MemoryListener *_listener; \
119 \
120 switch (_direction) { \
121 case Forward: \
122 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
0e0d36b4
AK
126 } \
127 break; \
128 case Reverse: \
129 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
130 memory_listeners, link) { \
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131 if (_listener->_callback) { \
132 _listener->_callback(_listener, ##_args); \
133 } \
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134 } \
135 break; \
136 default: \
137 abort(); \
138 } \
139 } while (0)
140
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141#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
142 do { \
143 MemoryListener *_listener; \
144 \
145 switch (_direction) { \
146 case Forward: \
147 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
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150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 case Reverse: \
155 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
156 memory_listeners, link) { \
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157 if (_listener->_callback \
158 && memory_listener_match(_listener, _section)) { \
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159 _listener->_callback(_listener, _section, ##_args); \
160 } \
161 } \
162 break; \
163 default: \
164 abort(); \
165 } \
166 } while (0)
167
dfde4e6e 168/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 169#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 170 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 171 .mr = (fr)->mr, \
f6790af6 172 .address_space = (as), \
0e0d36b4 173 .offset_within_region = (fr)->offset_in_region, \
052e87b0 174 .size = (fr)->addr.size, \
0e0d36b4 175 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 176 .readonly = (fr)->readonly, \
7376e582 177 }))
0e0d36b4 178
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179struct CoalescedMemoryRange {
180 AddrRange addr;
181 QTAILQ_ENTRY(CoalescedMemoryRange) link;
182};
183
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184struct MemoryRegionIoeventfd {
185 AddrRange addr;
186 bool match_data;
187 uint64_t data;
753d5e14 188 EventNotifier *e;
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189};
190
191static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
192 MemoryRegionIoeventfd b)
193{
08dafab4 194 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 195 return true;
08dafab4 196 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 197 return false;
08dafab4 198 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 199 return true;
08dafab4 200 } else if (int128_gt(a.addr.size, b.addr.size)) {
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201 return false;
202 } else if (a.match_data < b.match_data) {
203 return true;
204 } else if (a.match_data > b.match_data) {
205 return false;
206 } else if (a.match_data) {
207 if (a.data < b.data) {
208 return true;
209 } else if (a.data > b.data) {
210 return false;
211 }
212 }
753d5e14 213 if (a.e < b.e) {
3e9d69e7 214 return true;
753d5e14 215 } else if (a.e > b.e) {
3e9d69e7
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216 return false;
217 }
218 return false;
219}
220
221static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
222 MemoryRegionIoeventfd b)
223{
224 return !memory_region_ioeventfd_before(a, b)
225 && !memory_region_ioeventfd_before(b, a);
226}
227
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228typedef struct FlatRange FlatRange;
229typedef struct FlatView FlatView;
230
231/* Range of memory in the global map. Addresses are absolute. */
232struct FlatRange {
233 MemoryRegion *mr;
a8170e5e 234 hwaddr offset_in_region;
093bc2cd 235 AddrRange addr;
5a583347 236 uint8_t dirty_log_mask;
5f9a5ea1 237 bool romd_mode;
fb1cd6f9 238 bool readonly;
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239};
240
241/* Flattened global view of current active memory hierarchy. Kept in sorted
242 * order.
243 */
244struct FlatView {
856d7245 245 unsigned ref;
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246 FlatRange *ranges;
247 unsigned nr;
248 unsigned nr_allocated;
249};
250
cc31e6e7
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251typedef struct AddressSpaceOps AddressSpaceOps;
252
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253#define FOR_EACH_FLAT_RANGE(var, view) \
254 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
255
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256static bool flatrange_equal(FlatRange *a, FlatRange *b)
257{
258 return a->mr == b->mr
259 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 260 && a->offset_in_region == b->offset_in_region
5f9a5ea1 261 && a->romd_mode == b->romd_mode
fb1cd6f9 262 && a->readonly == b->readonly;
093bc2cd
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263}
264
265static void flatview_init(FlatView *view)
266{
856d7245 267 view->ref = 1;
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268 view->ranges = NULL;
269 view->nr = 0;
270 view->nr_allocated = 0;
271}
272
273/* Insert a range into a given position. Caller is responsible for maintaining
274 * sorting order.
275 */
276static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
277{
278 if (view->nr == view->nr_allocated) {
279 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 280 view->ranges = g_realloc(view->ranges,
093bc2cd
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281 view->nr_allocated * sizeof(*view->ranges));
282 }
283 memmove(view->ranges + pos + 1, view->ranges + pos,
284 (view->nr - pos) * sizeof(FlatRange));
285 view->ranges[pos] = *range;
dfde4e6e 286 memory_region_ref(range->mr);
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287 ++view->nr;
288}
289
290static void flatview_destroy(FlatView *view)
291{
dfde4e6e
PB
292 int i;
293
294 for (i = 0; i < view->nr; i++) {
295 memory_region_unref(view->ranges[i].mr);
296 }
7267c094 297 g_free(view->ranges);
a9a0c06d 298 g_free(view);
093bc2cd
AK
299}
300
856d7245
PB
301static void flatview_ref(FlatView *view)
302{
303 atomic_inc(&view->ref);
304}
305
306static void flatview_unref(FlatView *view)
307{
308 if (atomic_fetch_dec(&view->ref) == 1) {
309 flatview_destroy(view);
310 }
311}
312
3d8e6bf9
AK
313static bool can_merge(FlatRange *r1, FlatRange *r2)
314{
08dafab4 315 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 316 && r1->mr == r2->mr
08dafab4
AK
317 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
318 r1->addr.size),
319 int128_make64(r2->offset_in_region))
d0a9b5bc 320 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 321 && r1->romd_mode == r2->romd_mode
fb1cd6f9 322 && r1->readonly == r2->readonly;
3d8e6bf9
AK
323}
324
8508e024 325/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK
326static void flatview_simplify(FlatView *view)
327{
328 unsigned i, j;
329
330 i = 0;
331 while (i < view->nr) {
332 j = i + 1;
333 while (j < view->nr
334 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 335 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK
336 ++j;
337 }
338 ++i;
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343}
344
e7342aa3
PB
345static bool memory_region_big_endian(MemoryRegion *mr)
346{
347#ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349#else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351#endif
352}
353
e11ef3d1
PB
354static bool memory_region_wrong_endianness(MemoryRegion *mr)
355{
356#ifdef TARGET_WORDS_BIGENDIAN
357 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
358#else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360#endif
361}
362
363static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
364{
365 if (memory_region_wrong_endianness(mr)) {
366 switch (size) {
367 case 1:
368 break;
369 case 2:
370 *data = bswap16(*data);
371 break;
372 case 4:
373 *data = bswap32(*data);
374 break;
375 case 8:
376 *data = bswap64(*data);
377 break;
378 default:
379 abort();
380 }
381 }
382}
383
547e9201 384static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
385 hwaddr addr,
386 uint64_t *value,
387 unsigned size,
388 unsigned shift,
389 uint64_t mask)
390{
ce5d2f33
PB
391 uint64_t tmp;
392
393 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
55d5d048 394 trace_memory_region_ops_read(mr, addr, tmp, size);
ce5d2f33
PB
395 *value |= (tmp & mask) << shift;
396}
397
547e9201 398static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 399 hwaddr addr,
164a4dcd
AK
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask)
404{
164a4dcd
AK
405 uint64_t tmp;
406
d410515e
JK
407 if (mr->flush_coalesced_mmio) {
408 qemu_flush_coalesced_mmio_buffer();
409 }
164a4dcd 410 tmp = mr->ops->read(mr->opaque, addr, size);
55d5d048 411 trace_memory_region_ops_read(mr, addr, tmp, size);
164a4dcd
AK
412 *value |= (tmp & mask) << shift;
413}
414
547e9201 415static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
416 hwaddr addr,
417 uint64_t *value,
418 unsigned size,
419 unsigned shift,
420 uint64_t mask)
421{
ce5d2f33
PB
422 uint64_t tmp;
423
424 tmp = (*value >> shift) & mask;
55d5d048 425 trace_memory_region_ops_write(mr, addr, tmp, size);
ce5d2f33
PB
426 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
427}
428
547e9201 429static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 430 hwaddr addr,
164a4dcd
AK
431 uint64_t *value,
432 unsigned size,
433 unsigned shift,
434 uint64_t mask)
435{
164a4dcd
AK
436 uint64_t tmp;
437
d410515e
JK
438 if (mr->flush_coalesced_mmio) {
439 qemu_flush_coalesced_mmio_buffer();
440 }
164a4dcd 441 tmp = (*value >> shift) & mask;
55d5d048 442 trace_memory_region_ops_write(mr, addr, tmp, size);
164a4dcd
AK
443 mr->ops->write(mr->opaque, addr, tmp, size);
444}
445
a8170e5e 446static void access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
447 uint64_t *value,
448 unsigned size,
449 unsigned access_size_min,
450 unsigned access_size_max,
547e9201 451 void (*access)(MemoryRegion *mr,
a8170e5e 452 hwaddr addr,
164a4dcd
AK
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask),
547e9201 457 MemoryRegion *mr)
164a4dcd
AK
458{
459 uint64_t access_mask;
460 unsigned access_size;
461 unsigned i;
462
463 if (!access_size_min) {
464 access_size_min = 1;
465 }
466 if (!access_size_max) {
467 access_size_max = 4;
468 }
ce5d2f33
PB
469
470 /* FIXME: support unaligned access? */
164a4dcd
AK
471 access_size = MAX(MIN(size, access_size_max), access_size_min);
472 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
473 if (memory_region_big_endian(mr)) {
474 for (i = 0; i < size; i += access_size) {
475 access(mr, addr + i, value, access_size,
476 (size - access_size - i) * 8, access_mask);
477 }
478 } else {
479 for (i = 0; i < size; i += access_size) {
480 access(mr, addr + i, value, access_size, i * 8, access_mask);
481 }
164a4dcd
AK
482 }
483}
484
e2177955
AK
485static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
486{
0d673e36
AK
487 AddressSpace *as;
488
feca4ac1
PB
489 while (mr->container) {
490 mr = mr->container;
e2177955 491 }
0d673e36
AK
492 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
493 if (mr == as->root) {
494 return as;
495 }
e2177955 496 }
eed2bacf 497 return NULL;
e2177955
AK
498}
499
093bc2cd
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500/* Render a memory region into the global view. Ranges in @view obscure
501 * ranges in @mr.
502 */
503static void render_memory_region(FlatView *view,
504 MemoryRegion *mr,
08dafab4 505 Int128 base,
fb1cd6f9
AK
506 AddrRange clip,
507 bool readonly)
093bc2cd
AK
508{
509 MemoryRegion *subregion;
510 unsigned i;
a8170e5e 511 hwaddr offset_in_region;
08dafab4
AK
512 Int128 remain;
513 Int128 now;
093bc2cd
AK
514 FlatRange fr;
515 AddrRange tmp;
516
6bba19ba
AK
517 if (!mr->enabled) {
518 return;
519 }
520
08dafab4 521 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 522 readonly |= mr->readonly;
093bc2cd
AK
523
524 tmp = addrrange_make(base, mr->size);
525
526 if (!addrrange_intersects(tmp, clip)) {
527 return;
528 }
529
530 clip = addrrange_intersection(tmp, clip);
531
532 if (mr->alias) {
08dafab4
AK
533 int128_subfrom(&base, int128_make64(mr->alias->addr));
534 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 535 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
536 return;
537 }
538
539 /* Render subregions in priority order. */
540 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 541 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
542 }
543
14a3c10a 544 if (!mr->terminates) {
093bc2cd
AK
545 return;
546 }
547
08dafab4 548 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
549 base = clip.start;
550 remain = clip.size;
551
2eb74e1a
PC
552 fr.mr = mr;
553 fr.dirty_log_mask = mr->dirty_log_mask;
554 fr.romd_mode = mr->romd_mode;
555 fr.readonly = readonly;
556
093bc2cd 557 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
558 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
559 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
560 continue;
561 }
08dafab4
AK
562 if (int128_lt(base, view->ranges[i].addr.start)) {
563 now = int128_min(remain,
564 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
565 fr.offset_in_region = offset_in_region;
566 fr.addr = addrrange_make(base, now);
567 flatview_insert(view, i, &fr);
568 ++i;
08dafab4
AK
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
093bc2cd 572 }
d26a8cae
AK
573 now = int128_sub(int128_min(int128_add(base, remain),
574 addrrange_end(view->ranges[i].addr)),
575 base);
576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
093bc2cd 579 }
08dafab4 580 if (int128_nz(remain)) {
093bc2cd
AK
581 fr.offset_in_region = offset_in_region;
582 fr.addr = addrrange_make(base, remain);
583 flatview_insert(view, i, &fr);
584 }
585}
586
587/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 588static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 589{
a9a0c06d 590 FlatView *view;
093bc2cd 591
a9a0c06d
PB
592 view = g_new(FlatView, 1);
593 flatview_init(view);
093bc2cd 594
83f3c251 595 if (mr) {
a9a0c06d 596 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
597 addrrange_make(int128_zero(), int128_2_64()), false);
598 }
a9a0c06d 599 flatview_simplify(view);
093bc2cd
AK
600
601 return view;
602}
603
3e9d69e7
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604static void address_space_add_del_ioeventfds(AddressSpace *as,
605 MemoryRegionIoeventfd *fds_new,
606 unsigned fds_new_nb,
607 MemoryRegionIoeventfd *fds_old,
608 unsigned fds_old_nb)
609{
610 unsigned iold, inew;
80a1ea37
AK
611 MemoryRegionIoeventfd *fd;
612 MemoryRegionSection section;
3e9d69e7
AK
613
614 /* Generate a symmetric difference of the old and new fd sets, adding
615 * and deleting as necessary.
616 */
617
618 iold = inew = 0;
619 while (iold < fds_old_nb || inew < fds_new_nb) {
620 if (iold < fds_old_nb
621 && (inew == fds_new_nb
622 || memory_region_ioeventfd_before(fds_old[iold],
623 fds_new[inew]))) {
80a1ea37
AK
624 fd = &fds_old[iold];
625 section = (MemoryRegionSection) {
f6790af6 626 .address_space = as,
80a1ea37 627 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 628 .size = fd->addr.size,
80a1ea37
AK
629 };
630 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 631 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
632 ++iold;
633 } else if (inew < fds_new_nb
634 && (iold == fds_old_nb
635 || memory_region_ioeventfd_before(fds_new[inew],
636 fds_old[iold]))) {
80a1ea37
AK
637 fd = &fds_new[inew];
638 section = (MemoryRegionSection) {
f6790af6 639 .address_space = as,
80a1ea37 640 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 641 .size = fd->addr.size,
80a1ea37
AK
642 };
643 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 644 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
645 ++inew;
646 } else {
647 ++iold;
648 ++inew;
649 }
650 }
651}
652
856d7245
PB
653static FlatView *address_space_get_flatview(AddressSpace *as)
654{
655 FlatView *view;
656
657 qemu_mutex_lock(&flat_view_mutex);
658 view = as->current_map;
659 flatview_ref(view);
660 qemu_mutex_unlock(&flat_view_mutex);
661 return view;
662}
663
3e9d69e7
AK
664static void address_space_update_ioeventfds(AddressSpace *as)
665{
99e86347 666 FlatView *view;
3e9d69e7
AK
667 FlatRange *fr;
668 unsigned ioeventfd_nb = 0;
669 MemoryRegionIoeventfd *ioeventfds = NULL;
670 AddrRange tmp;
671 unsigned i;
672
856d7245 673 view = address_space_get_flatview(as);
99e86347 674 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
675 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
676 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
677 int128_sub(fr->addr.start,
678 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
679 if (addrrange_intersects(fr->addr, tmp)) {
680 ++ioeventfd_nb;
7267c094 681 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
682 ioeventfd_nb * sizeof(*ioeventfds));
683 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
684 ioeventfds[ioeventfd_nb-1].addr = tmp;
685 }
686 }
687 }
688
689 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
690 as->ioeventfds, as->ioeventfd_nb);
691
7267c094 692 g_free(as->ioeventfds);
3e9d69e7
AK
693 as->ioeventfds = ioeventfds;
694 as->ioeventfd_nb = ioeventfd_nb;
856d7245 695 flatview_unref(view);
3e9d69e7
AK
696}
697
b8af1afb 698static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
699 const FlatView *old_view,
700 const FlatView *new_view,
b8af1afb 701 bool adding)
093bc2cd 702{
093bc2cd
AK
703 unsigned iold, inew;
704 FlatRange *frold, *frnew;
093bc2cd
AK
705
706 /* Generate a symmetric difference of the old and new memory maps.
707 * Kill ranges in the old map, and instantiate ranges in the new map.
708 */
709 iold = inew = 0;
a9a0c06d
PB
710 while (iold < old_view->nr || inew < new_view->nr) {
711 if (iold < old_view->nr) {
712 frold = &old_view->ranges[iold];
093bc2cd
AK
713 } else {
714 frold = NULL;
715 }
a9a0c06d
PB
716 if (inew < new_view->nr) {
717 frnew = &new_view->ranges[inew];
093bc2cd
AK
718 } else {
719 frnew = NULL;
720 }
721
722 if (frold
723 && (!frnew
08dafab4
AK
724 || int128_lt(frold->addr.start, frnew->addr.start)
725 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 726 && !flatrange_equal(frold, frnew)))) {
41a6e477 727 /* In old but not in new, or in both but attributes changed. */
093bc2cd 728
b8af1afb 729 if (!adding) {
72e22d2f 730 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
731 }
732
093bc2cd
AK
733 ++iold;
734 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 735 /* In both and unchanged (except logging may have changed) */
093bc2cd 736
b8af1afb 737 if (adding) {
50c1e149 738 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 739 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 740 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 741 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 742 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 743 }
5a583347
AK
744 }
745
093bc2cd
AK
746 ++iold;
747 ++inew;
093bc2cd
AK
748 } else {
749 /* In new */
750
b8af1afb 751 if (adding) {
72e22d2f 752 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
753 }
754
093bc2cd
AK
755 ++inew;
756 }
757 }
b8af1afb
AK
758}
759
760
761static void address_space_update_topology(AddressSpace *as)
762{
856d7245 763 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 764 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
765
766 address_space_update_topology_pass(as, old_view, new_view, false);
767 address_space_update_topology_pass(as, old_view, new_view, true);
768
856d7245
PB
769 qemu_mutex_lock(&flat_view_mutex);
770 flatview_unref(as->current_map);
a9a0c06d 771 as->current_map = new_view;
856d7245
PB
772 qemu_mutex_unlock(&flat_view_mutex);
773
774 /* Note that all the old MemoryRegions are still alive up to this
775 * point. This relieves most MemoryListeners from the need to
776 * ref/unref the MemoryRegions they get---unless they use them
777 * outside the iothread mutex, in which case precise reference
778 * counting is necessary.
779 */
780 flatview_unref(old_view);
781
3e9d69e7 782 address_space_update_ioeventfds(as);
093bc2cd
AK
783}
784
4ef4db86
AK
785void memory_region_transaction_begin(void)
786{
bb880ded 787 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
788 ++memory_region_transaction_depth;
789}
790
4dc56152
GA
791static void memory_region_clear_pending(void)
792{
793 memory_region_update_pending = false;
794 ioeventfd_update_pending = false;
795}
796
4ef4db86
AK
797void memory_region_transaction_commit(void)
798{
0d673e36
AK
799 AddressSpace *as;
800
4ef4db86
AK
801 assert(memory_region_transaction_depth);
802 --memory_region_transaction_depth;
4dc56152
GA
803 if (!memory_region_transaction_depth) {
804 if (memory_region_update_pending) {
805 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 806
4dc56152
GA
807 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
808 address_space_update_topology(as);
809 }
02e2b95f 810
4dc56152
GA
811 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
812 } else if (ioeventfd_update_pending) {
813 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
814 address_space_update_ioeventfds(as);
815 }
816 }
817 memory_region_clear_pending();
818 }
4ef4db86
AK
819}
820
545e92e0
AK
821static void memory_region_destructor_none(MemoryRegion *mr)
822{
823}
824
825static void memory_region_destructor_ram(MemoryRegion *mr)
826{
827 qemu_ram_free(mr->ram_addr);
828}
829
dfde4e6e
PB
830static void memory_region_destructor_alias(MemoryRegion *mr)
831{
832 memory_region_unref(mr->alias);
833}
834
545e92e0
AK
835static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
836{
837 qemu_ram_free_from_ptr(mr->ram_addr);
838}
839
d0a9b5bc
AK
840static void memory_region_destructor_rom_device(MemoryRegion *mr)
841{
842 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
843}
844
b4fefef9
PC
845static bool memory_region_need_escape(char c)
846{
847 return c == '/' || c == '[' || c == '\\' || c == ']';
848}
849
850static char *memory_region_escape_name(const char *name)
851{
852 const char *p;
853 char *escaped, *q;
854 uint8_t c;
855 size_t bytes = 0;
856
857 for (p = name; *p; p++) {
858 bytes += memory_region_need_escape(*p) ? 4 : 1;
859 }
860 if (bytes == p - name) {
861 return g_memdup(name, bytes + 1);
862 }
863
864 escaped = g_malloc(bytes + 1);
865 for (p = name, q = escaped; *p; p++) {
866 c = *p;
867 if (unlikely(memory_region_need_escape(c))) {
868 *q++ = '\\';
869 *q++ = 'x';
870 *q++ = "0123456789abcdef"[c >> 4];
871 c = "0123456789abcdef"[c & 15];
872 }
873 *q++ = c;
874 }
875 *q = 0;
876 return escaped;
877}
878
879static void object_property_add_child_array(Object *owner,
880 const char *name,
881 Object *child)
882{
883 int i;
884 char *base_name = memory_region_escape_name(name);
885
886 for (i = 0; ; i++) {
887 char *full_name = g_strdup_printf("%s[%d]", base_name, i);
888 Error *local_err = NULL;
889
890 object_property_add_child(owner, full_name, child, &local_err);
891 g_free(full_name);
892 if (!local_err) {
893 break;
894 }
895
896 error_free(local_err);
897 }
898
899 g_free(base_name);
900}
901
902
093bc2cd 903void memory_region_init(MemoryRegion *mr,
2c9b15ca 904 Object *owner,
093bc2cd
AK
905 const char *name,
906 uint64_t size)
907{
22a893e4
PB
908 if (!owner) {
909 owner = qdev_get_machine();
910 }
b4fefef9 911
22a893e4 912 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
913 mr->size = int128_make64(size);
914 if (size == UINT64_MAX) {
915 mr->size = int128_2_64();
916 }
b4fefef9
PC
917
918 if (name) {
22a893e4 919 object_property_add_child_array(owner, name, OBJECT(mr));
b4fefef9
PC
920 object_unref(OBJECT(mr));
921 }
922}
923
409ddd01
PC
924static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
925 const char *name, Error **errp)
926{
927 MemoryRegion *mr = MEMORY_REGION(obj);
928 uint64_t value = mr->addr;
929
930 visit_type_uint64(v, &value, name, errp);
931}
932
933static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
934 const char *name, Error **errp)
935{
936 MemoryRegion *mr = MEMORY_REGION(obj);
937 gchar *path = (gchar *)"";
938
939 if (mr->container) {
940 path = object_get_canonical_path(OBJECT(mr->container));
941 }
942 visit_type_str(v, &path, name, errp);
943 if (mr->container) {
944 g_free(path);
945 }
946}
947
948static Object *memory_region_resolve_container(Object *obj, void *opaque,
949 const char *part)
950{
951 MemoryRegion *mr = MEMORY_REGION(obj);
952
953 return OBJECT(mr->container);
954}
955
d33382da
PC
956static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
957 const char *name, Error **errp)
958{
959 MemoryRegion *mr = MEMORY_REGION(obj);
960 int32_t value = mr->priority;
961
962 visit_type_int32(v, &value, name, errp);
963}
964
965static bool memory_region_get_may_overlap(Object *obj, Error **errp)
966{
967 MemoryRegion *mr = MEMORY_REGION(obj);
968
969 return mr->may_overlap;
970}
971
52aef7bb
PC
972static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
973 const char *name, Error **errp)
974{
975 MemoryRegion *mr = MEMORY_REGION(obj);
976 uint64_t value = memory_region_size(mr);
977
978 visit_type_uint64(v, &value, name, errp);
979}
980
b4fefef9
PC
981static void memory_region_initfn(Object *obj)
982{
983 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 984 ObjectProperty *op;
b4fefef9
PC
985
986 mr->ops = &unassigned_mem_ops;
6bba19ba 987 mr->enabled = true;
5f9a5ea1 988 mr->romd_mode = true;
545e92e0 989 mr->destructor = memory_region_destructor_none;
093bc2cd 990 QTAILQ_INIT(&mr->subregions);
093bc2cd 991 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
992
993 op = object_property_add(OBJECT(mr), "container",
994 "link<" TYPE_MEMORY_REGION ">",
995 memory_region_get_container,
996 NULL, /* memory_region_set_container */
997 NULL, NULL, &error_abort);
998 op->resolve = memory_region_resolve_container;
999
1000 object_property_add(OBJECT(mr), "addr", "uint64",
1001 memory_region_get_addr,
1002 NULL, /* memory_region_set_addr */
1003 NULL, NULL, &error_abort);
d33382da
PC
1004 object_property_add(OBJECT(mr), "priority", "uint32",
1005 memory_region_get_priority,
1006 NULL, /* memory_region_set_priority */
1007 NULL, NULL, &error_abort);
1008 object_property_add_bool(OBJECT(mr), "may-overlap",
1009 memory_region_get_may_overlap,
1010 NULL, /* memory_region_set_may_overlap */
1011 &error_abort);
52aef7bb
PC
1012 object_property_add(OBJECT(mr), "size", "uint64",
1013 memory_region_get_size,
1014 NULL, /* memory_region_set_size, */
1015 NULL, NULL, &error_abort);
093bc2cd
AK
1016}
1017
b018ddf6
PB
1018static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1019 unsigned size)
1020{
1021#ifdef DEBUG_UNASSIGNED
1022 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1023#endif
4917cf44
AF
1024 if (current_cpu != NULL) {
1025 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1026 }
68a7439a 1027 return 0;
b018ddf6
PB
1028}
1029
1030static void unassigned_mem_write(void *opaque, hwaddr addr,
1031 uint64_t val, unsigned size)
1032{
1033#ifdef DEBUG_UNASSIGNED
1034 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1035#endif
4917cf44
AF
1036 if (current_cpu != NULL) {
1037 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1038 }
b018ddf6
PB
1039}
1040
d197063f
PB
1041static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1042 unsigned size, bool is_write)
1043{
1044 return false;
1045}
1046
1047const MemoryRegionOps unassigned_mem_ops = {
1048 .valid.accepts = unassigned_mem_accepts,
1049 .endianness = DEVICE_NATIVE_ENDIAN,
1050};
1051
d2702032
PB
1052bool memory_region_access_valid(MemoryRegion *mr,
1053 hwaddr addr,
1054 unsigned size,
1055 bool is_write)
093bc2cd 1056{
a014ed07
PB
1057 int access_size_min, access_size_max;
1058 int access_size, i;
897fa7cf 1059
093bc2cd
AK
1060 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1061 return false;
1062 }
1063
a014ed07 1064 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1065 return true;
1066 }
1067
a014ed07
PB
1068 access_size_min = mr->ops->valid.min_access_size;
1069 if (!mr->ops->valid.min_access_size) {
1070 access_size_min = 1;
1071 }
1072
1073 access_size_max = mr->ops->valid.max_access_size;
1074 if (!mr->ops->valid.max_access_size) {
1075 access_size_max = 4;
1076 }
1077
1078 access_size = MAX(MIN(size, access_size_max), access_size_min);
1079 for (i = 0; i < size; i += access_size) {
1080 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1081 is_write)) {
1082 return false;
1083 }
093bc2cd 1084 }
a014ed07 1085
093bc2cd
AK
1086 return true;
1087}
1088
a621f38d 1089static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 1090 hwaddr addr,
a621f38d 1091 unsigned size)
093bc2cd 1092{
164a4dcd 1093 uint64_t data = 0;
093bc2cd 1094
ce5d2f33
PB
1095 if (mr->ops->read) {
1096 access_with_adjusted_size(addr, &data, size,
1097 mr->ops->impl.min_access_size,
1098 mr->ops->impl.max_access_size,
1099 memory_region_read_accessor, mr);
1100 } else {
1101 access_with_adjusted_size(addr, &data, size, 1, 4,
1102 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
1103 }
1104
093bc2cd
AK
1105 return data;
1106}
1107
791af8c8
PB
1108static bool memory_region_dispatch_read(MemoryRegion *mr,
1109 hwaddr addr,
1110 uint64_t *pval,
1111 unsigned size)
a621f38d 1112{
791af8c8
PB
1113 if (!memory_region_access_valid(mr, addr, size, false)) {
1114 *pval = unassigned_mem_read(mr, addr, size);
1115 return true;
1116 }
a621f38d 1117
791af8c8
PB
1118 *pval = memory_region_dispatch_read1(mr, addr, size);
1119 adjust_endianness(mr, pval, size);
1120 return false;
a621f38d 1121}
093bc2cd 1122
791af8c8 1123static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 1124 hwaddr addr,
a621f38d
AK
1125 uint64_t data,
1126 unsigned size)
1127{
897fa7cf 1128 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1129 unassigned_mem_write(mr, addr, data, size);
791af8c8 1130 return true;
093bc2cd
AK
1131 }
1132
a621f38d
AK
1133 adjust_endianness(mr, &data, size);
1134
ce5d2f33
PB
1135 if (mr->ops->write) {
1136 access_with_adjusted_size(addr, &data, size,
1137 mr->ops->impl.min_access_size,
1138 mr->ops->impl.max_access_size,
1139 memory_region_write_accessor, mr);
1140 } else {
1141 access_with_adjusted_size(addr, &data, size, 1, 4,
1142 memory_region_oldmmio_write_accessor, mr);
74901c3b 1143 }
791af8c8 1144 return false;
093bc2cd
AK
1145}
1146
093bc2cd 1147void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1148 Object *owner,
093bc2cd
AK
1149 const MemoryRegionOps *ops,
1150 void *opaque,
1151 const char *name,
1152 uint64_t size)
1153{
2c9b15ca 1154 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1155 mr->ops = ops;
1156 mr->opaque = opaque;
14a3c10a 1157 mr->terminates = true;
97161e17 1158 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1159}
1160
1161void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1162 Object *owner,
093bc2cd
AK
1163 const char *name,
1164 uint64_t size)
1165{
2c9b15ca 1166 memory_region_init(mr, owner, name, size);
8ea9252a 1167 mr->ram = true;
14a3c10a 1168 mr->terminates = true;
545e92e0 1169 mr->destructor = memory_region_destructor_ram;
0b183fc8
PB
1170 mr->ram_addr = qemu_ram_alloc(size, mr);
1171}
1172
1173#ifdef __linux__
1174void memory_region_init_ram_from_file(MemoryRegion *mr,
1175 struct Object *owner,
1176 const char *name,
1177 uint64_t size,
dbcb8981 1178 bool share,
7f56e740
PB
1179 const char *path,
1180 Error **errp)
0b183fc8
PB
1181{
1182 memory_region_init(mr, owner, name, size);
1183 mr->ram = true;
1184 mr->terminates = true;
1185 mr->destructor = memory_region_destructor_ram;
dbcb8981 1186 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
093bc2cd 1187}
0b183fc8 1188#endif
093bc2cd
AK
1189
1190void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1191 Object *owner,
093bc2cd
AK
1192 const char *name,
1193 uint64_t size,
1194 void *ptr)
1195{
2c9b15ca 1196 memory_region_init(mr, owner, name, size);
8ea9252a 1197 mr->ram = true;
14a3c10a 1198 mr->terminates = true;
545e92e0 1199 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1200 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1201}
1202
1203void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1204 Object *owner,
093bc2cd
AK
1205 const char *name,
1206 MemoryRegion *orig,
a8170e5e 1207 hwaddr offset,
093bc2cd
AK
1208 uint64_t size)
1209{
2c9b15ca 1210 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1211 memory_region_ref(orig);
1212 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1213 mr->alias = orig;
1214 mr->alias_offset = offset;
1215}
1216
d0a9b5bc 1217void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1218 Object *owner,
d0a9b5bc 1219 const MemoryRegionOps *ops,
75f5941c 1220 void *opaque,
d0a9b5bc
AK
1221 const char *name,
1222 uint64_t size)
1223{
2c9b15ca 1224 memory_region_init(mr, owner, name, size);
7bc2b9cd 1225 mr->ops = ops;
75f5941c 1226 mr->opaque = opaque;
d0a9b5bc 1227 mr->terminates = true;
75c578dc 1228 mr->rom_device = true;
d0a9b5bc 1229 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1230 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1231}
1232
30951157 1233void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1234 Object *owner,
30951157
AK
1235 const MemoryRegionIOMMUOps *ops,
1236 const char *name,
1237 uint64_t size)
1238{
2c9b15ca 1239 memory_region_init(mr, owner, name, size);
30951157
AK
1240 mr->iommu_ops = ops,
1241 mr->terminates = true; /* then re-forwards */
06866575 1242 notifier_list_init(&mr->iommu_notify);
30951157
AK
1243}
1244
1660e72d 1245void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1246 Object *owner,
1660e72d
JK
1247 const char *name,
1248 uint64_t size)
1249{
2c9b15ca 1250 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1251}
1252
b4fefef9 1253static void memory_region_finalize(Object *obj)
093bc2cd 1254{
b4fefef9
PC
1255 MemoryRegion *mr = MEMORY_REGION(obj);
1256
093bc2cd 1257 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1258 assert(memory_region_transaction_depth == 0);
545e92e0 1259 mr->destructor(mr);
093bc2cd 1260 memory_region_clear_coalescing(mr);
7267c094 1261 g_free(mr->ioeventfds);
093bc2cd
AK
1262}
1263
803c0816
PB
1264Object *memory_region_owner(MemoryRegion *mr)
1265{
22a893e4
PB
1266 Object *obj = OBJECT(mr);
1267 return obj->parent;
803c0816
PB
1268}
1269
46637be2
PB
1270void memory_region_ref(MemoryRegion *mr)
1271{
22a893e4
PB
1272 /* MMIO callbacks most likely will access data that belongs
1273 * to the owner, hence the need to ref/unref the owner whenever
1274 * the memory region is in use.
1275 *
1276 * The memory region is a child of its owner. As long as the
1277 * owner doesn't call unparent itself on the memory region,
1278 * ref-ing the owner will also keep the memory region alive.
1279 * Memory regions without an owner are supposed to never go away,
1280 * but we still ref/unref them for debugging purposes.
1281 */
1282 Object *obj = OBJECT(mr);
1283 if (obj && obj->parent) {
1284 object_ref(obj->parent);
b4fefef9 1285 } else {
22a893e4 1286 object_ref(obj);
46637be2
PB
1287 }
1288}
1289
1290void memory_region_unref(MemoryRegion *mr)
1291{
22a893e4
PB
1292 Object *obj = OBJECT(mr);
1293 if (obj && obj->parent) {
1294 object_unref(obj->parent);
b4fefef9 1295 } else {
22a893e4 1296 object_unref(obj);
46637be2
PB
1297 }
1298}
1299
093bc2cd
AK
1300uint64_t memory_region_size(MemoryRegion *mr)
1301{
08dafab4
AK
1302 if (int128_eq(mr->size, int128_2_64())) {
1303 return UINT64_MAX;
1304 }
1305 return int128_get64(mr->size);
093bc2cd
AK
1306}
1307
5d546d4b 1308const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1309{
b0225c2c 1310 return object_get_canonical_path_component(OBJECT(mr));
8991c79b
AK
1311}
1312
8ea9252a
AK
1313bool memory_region_is_ram(MemoryRegion *mr)
1314{
1315 return mr->ram;
1316}
1317
55043ba3
AK
1318bool memory_region_is_logging(MemoryRegion *mr)
1319{
1320 return mr->dirty_log_mask;
1321}
1322
ce7923da
AK
1323bool memory_region_is_rom(MemoryRegion *mr)
1324{
1325 return mr->ram && mr->readonly;
1326}
1327
30951157
AK
1328bool memory_region_is_iommu(MemoryRegion *mr)
1329{
1330 return mr->iommu_ops;
1331}
1332
06866575
DG
1333void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1334{
1335 notifier_list_add(&mr->iommu_notify, n);
1336}
1337
1338void memory_region_unregister_iommu_notifier(Notifier *n)
1339{
1340 notifier_remove(n);
1341}
1342
1343void memory_region_notify_iommu(MemoryRegion *mr,
1344 IOMMUTLBEntry entry)
1345{
1346 assert(memory_region_is_iommu(mr));
1347 notifier_list_notify(&mr->iommu_notify, &entry);
1348}
1349
093bc2cd
AK
1350void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1351{
5a583347
AK
1352 uint8_t mask = 1 << client;
1353
59023ef4 1354 memory_region_transaction_begin();
5a583347 1355 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1356 memory_region_update_pending |= mr->enabled;
59023ef4 1357 memory_region_transaction_commit();
093bc2cd
AK
1358}
1359
a8170e5e
AK
1360bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1361 hwaddr size, unsigned client)
093bc2cd 1362{
14a3c10a 1363 assert(mr->terminates);
52159192 1364 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1365}
1366
a8170e5e
AK
1367void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1368 hwaddr size)
093bc2cd 1369{
14a3c10a 1370 assert(mr->terminates);
75218e7f 1371 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
093bc2cd
AK
1372}
1373
6c279db8
JQ
1374bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1375 hwaddr size, unsigned client)
1376{
1377 bool ret;
1378 assert(mr->terminates);
52159192 1379 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
6c279db8 1380 if (ret) {
a2f4d5be 1381 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
6c279db8
JQ
1382 }
1383 return ret;
1384}
1385
1386
093bc2cd
AK
1387void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1388{
0d673e36 1389 AddressSpace *as;
5a583347
AK
1390 FlatRange *fr;
1391
0d673e36 1392 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1393 FlatView *view = address_space_get_flatview(as);
99e86347 1394 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1395 if (fr->mr == mr) {
1396 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1397 }
5a583347 1398 }
856d7245 1399 flatview_unref(view);
5a583347 1400 }
093bc2cd
AK
1401}
1402
1403void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1404{
fb1cd6f9 1405 if (mr->readonly != readonly) {
59023ef4 1406 memory_region_transaction_begin();
fb1cd6f9 1407 mr->readonly = readonly;
22bde714 1408 memory_region_update_pending |= mr->enabled;
59023ef4 1409 memory_region_transaction_commit();
fb1cd6f9 1410 }
093bc2cd
AK
1411}
1412
5f9a5ea1 1413void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1414{
5f9a5ea1 1415 if (mr->romd_mode != romd_mode) {
59023ef4 1416 memory_region_transaction_begin();
5f9a5ea1 1417 mr->romd_mode = romd_mode;
22bde714 1418 memory_region_update_pending |= mr->enabled;
59023ef4 1419 memory_region_transaction_commit();
d0a9b5bc
AK
1420 }
1421}
1422
a8170e5e
AK
1423void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1424 hwaddr size, unsigned client)
093bc2cd 1425{
14a3c10a 1426 assert(mr->terminates);
a2f4d5be 1427 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1428}
1429
a35ba7be
PB
1430int memory_region_get_fd(MemoryRegion *mr)
1431{
1432 if (mr->alias) {
1433 return memory_region_get_fd(mr->alias);
1434 }
1435
1436 assert(mr->terminates);
1437
1438 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1439}
1440
093bc2cd
AK
1441void *memory_region_get_ram_ptr(MemoryRegion *mr)
1442{
1443 if (mr->alias) {
1444 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1445 }
1446
14a3c10a 1447 assert(mr->terminates);
093bc2cd 1448
021d26d1 1449 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1450}
1451
0d673e36 1452static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1453{
99e86347 1454 FlatView *view;
093bc2cd
AK
1455 FlatRange *fr;
1456 CoalescedMemoryRange *cmr;
1457 AddrRange tmp;
95d2994a 1458 MemoryRegionSection section;
093bc2cd 1459
856d7245 1460 view = address_space_get_flatview(as);
99e86347 1461 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1462 if (fr->mr == mr) {
95d2994a 1463 section = (MemoryRegionSection) {
f6790af6 1464 .address_space = as,
95d2994a 1465 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1466 .size = fr->addr.size,
95d2994a
AK
1467 };
1468
1469 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1470 int128_get64(fr->addr.start),
1471 int128_get64(fr->addr.size));
093bc2cd
AK
1472 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1473 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1474 int128_sub(fr->addr.start,
1475 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1476 if (!addrrange_intersects(tmp, fr->addr)) {
1477 continue;
1478 }
1479 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1480 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1481 int128_get64(tmp.start),
1482 int128_get64(tmp.size));
093bc2cd
AK
1483 }
1484 }
1485 }
856d7245 1486 flatview_unref(view);
093bc2cd
AK
1487}
1488
0d673e36
AK
1489static void memory_region_update_coalesced_range(MemoryRegion *mr)
1490{
1491 AddressSpace *as;
1492
1493 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1494 memory_region_update_coalesced_range_as(mr, as);
1495 }
1496}
1497
093bc2cd
AK
1498void memory_region_set_coalescing(MemoryRegion *mr)
1499{
1500 memory_region_clear_coalescing(mr);
08dafab4 1501 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1502}
1503
1504void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1505 hwaddr offset,
093bc2cd
AK
1506 uint64_t size)
1507{
7267c094 1508 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1509
08dafab4 1510 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1511 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1512 memory_region_update_coalesced_range(mr);
d410515e 1513 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1514}
1515
1516void memory_region_clear_coalescing(MemoryRegion *mr)
1517{
1518 CoalescedMemoryRange *cmr;
ab5b3db5 1519 bool updated = false;
093bc2cd 1520
d410515e
JK
1521 qemu_flush_coalesced_mmio_buffer();
1522 mr->flush_coalesced_mmio = false;
1523
093bc2cd
AK
1524 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1525 cmr = QTAILQ_FIRST(&mr->coalesced);
1526 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1527 g_free(cmr);
ab5b3db5
FZ
1528 updated = true;
1529 }
1530
1531 if (updated) {
1532 memory_region_update_coalesced_range(mr);
093bc2cd 1533 }
093bc2cd
AK
1534}
1535
d410515e
JK
1536void memory_region_set_flush_coalesced(MemoryRegion *mr)
1537{
1538 mr->flush_coalesced_mmio = true;
1539}
1540
1541void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1542{
1543 qemu_flush_coalesced_mmio_buffer();
1544 if (QTAILQ_EMPTY(&mr->coalesced)) {
1545 mr->flush_coalesced_mmio = false;
1546 }
1547}
1548
3e9d69e7 1549void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1550 hwaddr addr,
3e9d69e7
AK
1551 unsigned size,
1552 bool match_data,
1553 uint64_t data,
753d5e14 1554 EventNotifier *e)
3e9d69e7
AK
1555{
1556 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1557 .addr.start = int128_make64(addr),
1558 .addr.size = int128_make64(size),
3e9d69e7
AK
1559 .match_data = match_data,
1560 .data = data,
753d5e14 1561 .e = e,
3e9d69e7
AK
1562 };
1563 unsigned i;
1564
28f362be 1565 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1566 memory_region_transaction_begin();
3e9d69e7
AK
1567 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1568 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1569 break;
1570 }
1571 }
1572 ++mr->ioeventfd_nb;
7267c094 1573 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1574 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1575 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1576 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1577 mr->ioeventfds[i] = mrfd;
4dc56152 1578 ioeventfd_update_pending |= mr->enabled;
59023ef4 1579 memory_region_transaction_commit();
3e9d69e7
AK
1580}
1581
1582void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1583 hwaddr addr,
3e9d69e7
AK
1584 unsigned size,
1585 bool match_data,
1586 uint64_t data,
753d5e14 1587 EventNotifier *e)
3e9d69e7
AK
1588{
1589 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1590 .addr.start = int128_make64(addr),
1591 .addr.size = int128_make64(size),
3e9d69e7
AK
1592 .match_data = match_data,
1593 .data = data,
753d5e14 1594 .e = e,
3e9d69e7
AK
1595 };
1596 unsigned i;
1597
28f362be 1598 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1599 memory_region_transaction_begin();
3e9d69e7
AK
1600 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1601 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1602 break;
1603 }
1604 }
1605 assert(i != mr->ioeventfd_nb);
1606 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1607 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1608 --mr->ioeventfd_nb;
7267c094 1609 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1610 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1611 ioeventfd_update_pending |= mr->enabled;
59023ef4 1612 memory_region_transaction_commit();
3e9d69e7
AK
1613}
1614
feca4ac1 1615static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1616{
0598701a 1617 hwaddr offset = subregion->addr;
feca4ac1 1618 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1619 MemoryRegion *other;
1620
59023ef4
JK
1621 memory_region_transaction_begin();
1622
dfde4e6e 1623 memory_region_ref(subregion);
093bc2cd
AK
1624 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1625 if (subregion->may_overlap || other->may_overlap) {
1626 continue;
1627 }
2c7cfd65 1628 if (int128_ge(int128_make64(offset),
08dafab4
AK
1629 int128_add(int128_make64(other->addr), other->size))
1630 || int128_le(int128_add(int128_make64(offset), subregion->size),
1631 int128_make64(other->addr))) {
093bc2cd
AK
1632 continue;
1633 }
a5e1cbc8 1634#if 0
860329b2
MW
1635 printf("warning: subregion collision %llx/%llx (%s) "
1636 "vs %llx/%llx (%s)\n",
093bc2cd 1637 (unsigned long long)offset,
08dafab4 1638 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1639 subregion->name,
1640 (unsigned long long)other->addr,
08dafab4 1641 (unsigned long long)int128_get64(other->size),
860329b2 1642 other->name);
a5e1cbc8 1643#endif
093bc2cd
AK
1644 }
1645 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1646 if (subregion->priority >= other->priority) {
1647 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1648 goto done;
1649 }
1650 }
1651 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1652done:
22bde714 1653 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1654 memory_region_transaction_commit();
093bc2cd
AK
1655}
1656
0598701a
PC
1657static void memory_region_add_subregion_common(MemoryRegion *mr,
1658 hwaddr offset,
1659 MemoryRegion *subregion)
1660{
feca4ac1
PB
1661 assert(!subregion->container);
1662 subregion->container = mr;
0598701a 1663 subregion->addr = offset;
feca4ac1 1664 memory_region_update_container_subregions(subregion);
0598701a 1665}
093bc2cd
AK
1666
1667void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1668 hwaddr offset,
093bc2cd
AK
1669 MemoryRegion *subregion)
1670{
1671 subregion->may_overlap = false;
1672 subregion->priority = 0;
1673 memory_region_add_subregion_common(mr, offset, subregion);
1674}
1675
1676void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1677 hwaddr offset,
093bc2cd 1678 MemoryRegion *subregion,
a1ff8ae0 1679 int priority)
093bc2cd
AK
1680{
1681 subregion->may_overlap = true;
1682 subregion->priority = priority;
1683 memory_region_add_subregion_common(mr, offset, subregion);
1684}
1685
1686void memory_region_del_subregion(MemoryRegion *mr,
1687 MemoryRegion *subregion)
1688{
59023ef4 1689 memory_region_transaction_begin();
feca4ac1
PB
1690 assert(subregion->container == mr);
1691 subregion->container = NULL;
093bc2cd 1692 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1693 memory_region_unref(subregion);
22bde714 1694 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1695 memory_region_transaction_commit();
6bba19ba
AK
1696}
1697
1698void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1699{
1700 if (enabled == mr->enabled) {
1701 return;
1702 }
59023ef4 1703 memory_region_transaction_begin();
6bba19ba 1704 mr->enabled = enabled;
22bde714 1705 memory_region_update_pending = true;
59023ef4 1706 memory_region_transaction_commit();
093bc2cd 1707}
1c0ffa58 1708
67891b8a 1709static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1710{
feca4ac1 1711 MemoryRegion *container = mr->container;
2282e1af 1712
feca4ac1 1713 if (container) {
67891b8a
PC
1714 memory_region_transaction_begin();
1715 memory_region_ref(mr);
feca4ac1
PB
1716 memory_region_del_subregion(container, mr);
1717 mr->container = container;
1718 memory_region_update_container_subregions(mr);
67891b8a
PC
1719 memory_region_unref(mr);
1720 memory_region_transaction_commit();
2282e1af 1721 }
67891b8a 1722}
2282e1af 1723
67891b8a
PC
1724void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1725{
1726 if (addr != mr->addr) {
1727 mr->addr = addr;
1728 memory_region_readd_subregion(mr);
1729 }
2282e1af
AK
1730}
1731
a8170e5e 1732void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1733{
4703359e 1734 assert(mr->alias);
4703359e 1735
59023ef4 1736 if (offset == mr->alias_offset) {
4703359e
AK
1737 return;
1738 }
1739
59023ef4
JK
1740 memory_region_transaction_begin();
1741 mr->alias_offset = offset;
22bde714 1742 memory_region_update_pending |= mr->enabled;
59023ef4 1743 memory_region_transaction_commit();
4703359e
AK
1744}
1745
e34911c4
AK
1746ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1747{
e34911c4
AK
1748 return mr->ram_addr;
1749}
1750
e2177955
AK
1751static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1752{
1753 const AddrRange *addr = addr_;
1754 const FlatRange *fr = fr_;
1755
1756 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1757 return -1;
1758 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1759 return 1;
1760 }
1761 return 0;
1762}
1763
99e86347 1764static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1765{
99e86347 1766 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1767 sizeof(FlatRange), cmp_flatrange_addr);
1768}
1769
feca4ac1 1770bool memory_region_present(MemoryRegion *container, hwaddr addr)
3ce10901 1771{
feca4ac1
PB
1772 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1773 if (!mr || (mr == container)) {
3ce10901
PB
1774 return false;
1775 }
dfde4e6e 1776 memory_region_unref(mr);
3ce10901
PB
1777 return true;
1778}
1779
eed2bacf
IM
1780bool memory_region_is_mapped(MemoryRegion *mr)
1781{
1782 return mr->container ? true : false;
1783}
1784
73034e9e 1785MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1786 hwaddr addr, uint64_t size)
e2177955 1787{
052e87b0 1788 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1789 MemoryRegion *root;
1790 AddressSpace *as;
1791 AddrRange range;
99e86347 1792 FlatView *view;
73034e9e
PB
1793 FlatRange *fr;
1794
1795 addr += mr->addr;
feca4ac1
PB
1796 for (root = mr; root->container; ) {
1797 root = root->container;
73034e9e
PB
1798 addr += root->addr;
1799 }
e2177955 1800
73034e9e 1801 as = memory_region_to_address_space(root);
eed2bacf
IM
1802 if (!as) {
1803 return ret;
1804 }
73034e9e 1805 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1806
856d7245 1807 view = address_space_get_flatview(as);
99e86347 1808 fr = flatview_lookup(view, range);
e2177955 1809 if (!fr) {
6307d974 1810 flatview_unref(view);
e2177955
AK
1811 return ret;
1812 }
1813
99e86347 1814 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1815 --fr;
1816 }
1817
1818 ret.mr = fr->mr;
73034e9e 1819 ret.address_space = as;
e2177955
AK
1820 range = addrrange_intersection(range, fr->addr);
1821 ret.offset_within_region = fr->offset_in_region;
1822 ret.offset_within_region += int128_get64(int128_sub(range.start,
1823 fr->addr.start));
052e87b0 1824 ret.size = range.size;
e2177955 1825 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1826 ret.readonly = fr->readonly;
dfde4e6e
PB
1827 memory_region_ref(ret.mr);
1828
856d7245 1829 flatview_unref(view);
e2177955
AK
1830 return ret;
1831}
1832
1d671369 1833void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1834{
99e86347 1835 FlatView *view;
7664e80c
AK
1836 FlatRange *fr;
1837
856d7245 1838 view = address_space_get_flatview(as);
99e86347 1839 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1840 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1841 }
856d7245 1842 flatview_unref(view);
7664e80c
AK
1843}
1844
1845void memory_global_dirty_log_start(void)
1846{
7664e80c 1847 global_dirty_log = true;
7376e582 1848 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1849}
1850
1851void memory_global_dirty_log_stop(void)
1852{
7664e80c 1853 global_dirty_log = false;
7376e582 1854 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1855}
1856
1857static void listener_add_address_space(MemoryListener *listener,
1858 AddressSpace *as)
1859{
99e86347 1860 FlatView *view;
7664e80c
AK
1861 FlatRange *fr;
1862
221b3a3f 1863 if (listener->address_space_filter
f6790af6 1864 && listener->address_space_filter != as) {
221b3a3f
JG
1865 return;
1866 }
1867
7664e80c 1868 if (global_dirty_log) {
975aefe0
AK
1869 if (listener->log_global_start) {
1870 listener->log_global_start(listener);
1871 }
7664e80c 1872 }
975aefe0 1873
856d7245 1874 view = address_space_get_flatview(as);
99e86347 1875 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1876 MemoryRegionSection section = {
1877 .mr = fr->mr,
f6790af6 1878 .address_space = as,
7664e80c 1879 .offset_within_region = fr->offset_in_region,
052e87b0 1880 .size = fr->addr.size,
7664e80c 1881 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1882 .readonly = fr->readonly,
7664e80c 1883 };
975aefe0
AK
1884 if (listener->region_add) {
1885 listener->region_add(listener, &section);
1886 }
7664e80c 1887 }
856d7245 1888 flatview_unref(view);
7664e80c
AK
1889}
1890
f6790af6 1891void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1892{
72e22d2f 1893 MemoryListener *other = NULL;
0d673e36 1894 AddressSpace *as;
72e22d2f 1895
7376e582 1896 listener->address_space_filter = filter;
72e22d2f
AK
1897 if (QTAILQ_EMPTY(&memory_listeners)
1898 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1899 memory_listeners)->priority) {
1900 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1901 } else {
1902 QTAILQ_FOREACH(other, &memory_listeners, link) {
1903 if (listener->priority < other->priority) {
1904 break;
1905 }
1906 }
1907 QTAILQ_INSERT_BEFORE(other, listener, link);
1908 }
0d673e36
AK
1909
1910 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1911 listener_add_address_space(listener, as);
1912 }
7664e80c
AK
1913}
1914
1915void memory_listener_unregister(MemoryListener *listener)
1916{
72e22d2f 1917 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1918}
e2177955 1919
7dca8043 1920void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1921{
856d7245
PB
1922 if (QTAILQ_EMPTY(&address_spaces)) {
1923 memory_init();
1924 }
1925
59023ef4 1926 memory_region_transaction_begin();
8786db7c
AK
1927 as->root = root;
1928 as->current_map = g_new(FlatView, 1);
1929 flatview_init(as->current_map);
4c19eb72
AK
1930 as->ioeventfd_nb = 0;
1931 as->ioeventfds = NULL;
0d673e36 1932 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1933 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1934 address_space_init_dispatch(as);
f43793c7
PB
1935 memory_region_update_pending |= root->enabled;
1936 memory_region_transaction_commit();
1c0ffa58 1937}
658b2224 1938
83f3c251
AK
1939void address_space_destroy(AddressSpace *as)
1940{
078c44f4
DG
1941 MemoryListener *listener;
1942
83f3c251
AK
1943 /* Flush out anything from MemoryListeners listening in on this */
1944 memory_region_transaction_begin();
1945 as->root = NULL;
1946 memory_region_transaction_commit();
1947 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1948 address_space_destroy_dispatch(as);
078c44f4
DG
1949
1950 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1951 assert(listener->address_space_filter != as);
1952 }
1953
856d7245 1954 flatview_unref(as->current_map);
7dca8043 1955 g_free(as->name);
4c19eb72 1956 g_free(as->ioeventfds);
83f3c251
AK
1957}
1958
791af8c8 1959bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1960{
791af8c8 1961 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1962}
1963
791af8c8 1964bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1965 uint64_t val, unsigned size)
1966{
791af8c8 1967 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1968}
1969
314e2987
BS
1970typedef struct MemoryRegionList MemoryRegionList;
1971
1972struct MemoryRegionList {
1973 const MemoryRegion *mr;
314e2987
BS
1974 QTAILQ_ENTRY(MemoryRegionList) queue;
1975};
1976
1977typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1978
1979static void mtree_print_mr(fprintf_function mon_printf, void *f,
1980 const MemoryRegion *mr, unsigned int level,
a8170e5e 1981 hwaddr base,
9479c57a 1982 MemoryRegionListHead *alias_print_queue)
314e2987 1983{
9479c57a
JK
1984 MemoryRegionList *new_ml, *ml, *next_ml;
1985 MemoryRegionListHead submr_print_queue;
314e2987
BS
1986 const MemoryRegion *submr;
1987 unsigned int i;
1988
7ea692b2 1989 if (!mr || !mr->enabled) {
314e2987
BS
1990 return;
1991 }
1992
1993 for (i = 0; i < level; i++) {
1994 mon_printf(f, " ");
1995 }
1996
1997 if (mr->alias) {
1998 MemoryRegionList *ml;
1999 bool found = false;
2000
2001 /* check if the alias is already in the queue */
9479c57a 2002 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2003 if (ml->mr == mr->alias) {
314e2987
BS
2004 found = true;
2005 }
2006 }
2007
2008 if (!found) {
2009 ml = g_new(MemoryRegionList, 1);
2010 ml->mr = mr->alias;
9479c57a 2011 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2012 }
4896d74b
JK
2013 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2014 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2015 "-" TARGET_FMT_plx "\n",
314e2987 2016 base + mr->addr,
08dafab4 2017 base + mr->addr
fd1d9926
AW
2018 + (int128_nz(mr->size) ?
2019 (hwaddr)int128_get64(int128_sub(mr->size,
2020 int128_one())) : 0),
4b474ba7 2021 mr->priority,
5f9a5ea1
JK
2022 mr->romd_mode ? 'R' : '-',
2023 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2024 : '-',
3fb18b4d
PC
2025 memory_region_name(mr),
2026 memory_region_name(mr->alias),
314e2987 2027 mr->alias_offset,
08dafab4 2028 mr->alias_offset
a66670c7
AK
2029 + (int128_nz(mr->size) ?
2030 (hwaddr)int128_get64(int128_sub(mr->size,
2031 int128_one())) : 0));
314e2987 2032 } else {
4896d74b
JK
2033 mon_printf(f,
2034 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 2035 base + mr->addr,
08dafab4 2036 base + mr->addr
fd1d9926
AW
2037 + (int128_nz(mr->size) ?
2038 (hwaddr)int128_get64(int128_sub(mr->size,
2039 int128_one())) : 0),
4b474ba7 2040 mr->priority,
5f9a5ea1
JK
2041 mr->romd_mode ? 'R' : '-',
2042 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2043 : '-',
3fb18b4d 2044 memory_region_name(mr));
314e2987 2045 }
9479c57a
JK
2046
2047 QTAILQ_INIT(&submr_print_queue);
2048
314e2987 2049 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2050 new_ml = g_new(MemoryRegionList, 1);
2051 new_ml->mr = submr;
2052 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2053 if (new_ml->mr->addr < ml->mr->addr ||
2054 (new_ml->mr->addr == ml->mr->addr &&
2055 new_ml->mr->priority > ml->mr->priority)) {
2056 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2057 new_ml = NULL;
2058 break;
2059 }
2060 }
2061 if (new_ml) {
2062 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2063 }
2064 }
2065
2066 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2067 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2068 alias_print_queue);
2069 }
2070
88365e47 2071 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2072 g_free(ml);
314e2987
BS
2073 }
2074}
2075
2076void mtree_info(fprintf_function mon_printf, void *f)
2077{
2078 MemoryRegionListHead ml_head;
2079 MemoryRegionList *ml, *ml2;
0d673e36 2080 AddressSpace *as;
314e2987
BS
2081
2082 QTAILQ_INIT(&ml_head);
2083
0d673e36 2084 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
2085 mon_printf(f, "%s\n", as->name);
2086 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
2087 }
2088
2089 mon_printf(f, "aliases\n");
314e2987
BS
2090 /* print aliased regions */
2091 QTAILQ_FOREACH(ml, &ml_head, queue) {
f54bb15f
PB
2092 mon_printf(f, "%s\n", memory_region_name(ml->mr));
2093 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
314e2987
BS
2094 }
2095
2096 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2097 g_free(ml);
314e2987 2098 }
314e2987 2099}
b4fefef9
PC
2100
2101static const TypeInfo memory_region_info = {
2102 .parent = TYPE_OBJECT,
2103 .name = TYPE_MEMORY_REGION,
2104 .instance_size = sizeof(MemoryRegion),
2105 .instance_init = memory_region_initfn,
2106 .instance_finalize = memory_region_finalize,
2107};
2108
2109static void memory_register_types(void)
2110{
2111 type_register_static(&memory_region_info);
2112}
2113
2114type_init(memory_register_types)