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memory: pass MemoryRegion to access_with_adjusted_size
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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
2c9b15ca 20#include "qom/object.h"
9c17d615 21#include "sysemu/kvm.h"
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22#include <assert.h>
23
022c62cb 24#include "exec/memory-internal.h"
67d95c15 25
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26//#define DEBUG_UNASSIGNED
27
22bde714
JK
28static unsigned memory_region_transaction_depth;
29static bool memory_region_update_pending;
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30static bool global_dirty_log = false;
31
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PB
32/* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39static QemuMutex flat_view_mutex;
40
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41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
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44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
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47static void memory_init(void)
48{
49 qemu_mutex_init(&flat_view_mutex);
50}
51
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52typedef struct AddrRange AddrRange;
53
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54/*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
093bc2cd 59struct AddrRange {
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60 Int128 start;
61 Int128 size;
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62};
63
08dafab4 64static AddrRange addrrange_make(Int128 start, Int128 size)
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65{
66 return (AddrRange) { start, size };
67}
68
69static bool addrrange_equal(AddrRange r1, AddrRange r2)
70{
08dafab4 71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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72}
73
08dafab4 74static Int128 addrrange_end(AddrRange r)
093bc2cd 75{
08dafab4 76 return int128_add(r.start, r.size);
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77}
78
08dafab4 79static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 80{
08dafab4 81 int128_addto(&range.start, delta);
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82 return range;
83}
84
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85static bool addrrange_contains(AddrRange range, Int128 addr)
86{
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89}
90
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91static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92{
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93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
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95}
96
97static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98{
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99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
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102}
103
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104enum ListenerDirection { Forward, Reverse };
105
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106static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108{
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111}
112
113#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
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123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
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128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
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131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
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138#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
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147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
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154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
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156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
dfde4e6e 165/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 166#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 168 .mr = (fr)->mr, \
f6790af6 169 .address_space = (as), \
0e0d36b4 170 .offset_within_region = (fr)->offset_in_region, \
052e87b0 171 .size = (fr)->addr.size, \
0e0d36b4 172 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 173 .readonly = (fr)->readonly, \
7376e582 174 }))
0e0d36b4 175
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176struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179};
180
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181struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
753d5e14 185 EventNotifier *e;
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186};
187
188static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190{
08dafab4 191 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 192 return true;
08dafab4 193 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 194 return false;
08dafab4 195 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 196 return true;
08dafab4 197 } else if (int128_gt(a.addr.size, b.addr.size)) {
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198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
753d5e14 210 if (a.e < b.e) {
3e9d69e7 211 return true;
753d5e14 212 } else if (a.e > b.e) {
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213 return false;
214 }
215 return false;
216}
217
218static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220{
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223}
224
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225typedef struct FlatRange FlatRange;
226typedef struct FlatView FlatView;
227
228/* Range of memory in the global map. Addresses are absolute. */
229struct FlatRange {
230 MemoryRegion *mr;
a8170e5e 231 hwaddr offset_in_region;
093bc2cd 232 AddrRange addr;
5a583347 233 uint8_t dirty_log_mask;
5f9a5ea1 234 bool romd_mode;
fb1cd6f9 235 bool readonly;
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236};
237
238/* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241struct FlatView {
856d7245 242 unsigned ref;
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243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246};
247
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248typedef struct AddressSpaceOps AddressSpaceOps;
249
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250#define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
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253static bool flatrange_equal(FlatRange *a, FlatRange *b)
254{
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 257 && a->offset_in_region == b->offset_in_region
5f9a5ea1 258 && a->romd_mode == b->romd_mode
fb1cd6f9 259 && a->readonly == b->readonly;
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260}
261
262static void flatview_init(FlatView *view)
263{
856d7245 264 view->ref = 1;
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265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268}
269
270/* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274{
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 277 view->ranges = g_realloc(view->ranges,
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278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
dfde4e6e 283 memory_region_ref(range->mr);
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284 ++view->nr;
285}
286
287static void flatview_destroy(FlatView *view)
288{
dfde4e6e
PB
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
7267c094 294 g_free(view->ranges);
a9a0c06d 295 g_free(view);
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296}
297
856d7245
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298static void flatview_ref(FlatView *view)
299{
300 atomic_inc(&view->ref);
301}
302
303static void flatview_unref(FlatView *view)
304{
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308}
309
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310static bool can_merge(FlatRange *r1, FlatRange *r2)
311{
08dafab4 312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 313 && r1->mr == r2->mr
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314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
d0a9b5bc 317 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 318 && r1->romd_mode == r2->romd_mode
fb1cd6f9 319 && r1->readonly == r2->readonly;
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320}
321
8508e024 322/* Attempt to simplify a view by merging adjacent ranges */
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323static void flatview_simplify(FlatView *view)
324{
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340}
341
e11ef3d1
PB
342static bool memory_region_wrong_endianness(MemoryRegion *mr)
343{
344#ifdef TARGET_WORDS_BIGENDIAN
345 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
346#else
347 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
348#endif
349}
350
351static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
352{
353 if (memory_region_wrong_endianness(mr)) {
354 switch (size) {
355 case 1:
356 break;
357 case 2:
358 *data = bswap16(*data);
359 break;
360 case 4:
361 *data = bswap32(*data);
362 break;
363 case 8:
364 *data = bswap64(*data);
365 break;
366 default:
367 abort();
368 }
369 }
370}
371
547e9201 372static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
373 hwaddr addr,
374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask)
378{
ce5d2f33
PB
379 uint64_t tmp;
380
381 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
382 *value |= (tmp & mask) << shift;
383}
384
547e9201 385static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 386 hwaddr addr,
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387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask)
391{
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AK
392 uint64_t tmp;
393
d410515e
JK
394 if (mr->flush_coalesced_mmio) {
395 qemu_flush_coalesced_mmio_buffer();
396 }
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397 tmp = mr->ops->read(mr->opaque, addr, size);
398 *value |= (tmp & mask) << shift;
399}
400
547e9201 401static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
402 hwaddr addr,
403 uint64_t *value,
404 unsigned size,
405 unsigned shift,
406 uint64_t mask)
407{
ce5d2f33
PB
408 uint64_t tmp;
409
410 tmp = (*value >> shift) & mask;
411 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
412}
413
547e9201 414static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 415 hwaddr addr,
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416 uint64_t *value,
417 unsigned size,
418 unsigned shift,
419 uint64_t mask)
420{
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421 uint64_t tmp;
422
d410515e
JK
423 if (mr->flush_coalesced_mmio) {
424 qemu_flush_coalesced_mmio_buffer();
425 }
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426 tmp = (*value >> shift) & mask;
427 mr->ops->write(mr->opaque, addr, tmp, size);
428}
429
a8170e5e 430static void access_with_adjusted_size(hwaddr addr,
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431 uint64_t *value,
432 unsigned size,
433 unsigned access_size_min,
434 unsigned access_size_max,
547e9201 435 void (*access)(MemoryRegion *mr,
a8170e5e 436 hwaddr addr,
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437 uint64_t *value,
438 unsigned size,
439 unsigned shift,
440 uint64_t mask),
547e9201 441 MemoryRegion *mr)
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442{
443 uint64_t access_mask;
444 unsigned access_size;
445 unsigned i;
446
447 if (!access_size_min) {
448 access_size_min = 1;
449 }
450 if (!access_size_max) {
451 access_size_max = 4;
452 }
ce5d2f33
PB
453
454 /* FIXME: support unaligned access? */
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455 access_size = MAX(MIN(size, access_size_max), access_size_min);
456 access_mask = -1ULL >> (64 - access_size * 8);
457 for (i = 0; i < size; i += access_size) {
08521e28 458#ifdef TARGET_WORDS_BIGENDIAN
547e9201 459 access(mr, addr + i, value, access_size,
08521e28
PB
460 (size - access_size - i) * 8, access_mask);
461#else
547e9201 462 access(mr, addr + i, value, access_size, i * 8, access_mask);
08521e28 463#endif
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464 }
465}
466
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467static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
468{
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469 AddressSpace *as;
470
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471 while (mr->parent) {
472 mr = mr->parent;
473 }
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474 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
475 if (mr == as->root) {
476 return as;
477 }
e2177955
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478 }
479 abort();
480}
481
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482/* Render a memory region into the global view. Ranges in @view obscure
483 * ranges in @mr.
484 */
485static void render_memory_region(FlatView *view,
486 MemoryRegion *mr,
08dafab4 487 Int128 base,
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488 AddrRange clip,
489 bool readonly)
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490{
491 MemoryRegion *subregion;
492 unsigned i;
a8170e5e 493 hwaddr offset_in_region;
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494 Int128 remain;
495 Int128 now;
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496 FlatRange fr;
497 AddrRange tmp;
498
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499 if (!mr->enabled) {
500 return;
501 }
502
08dafab4 503 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 504 readonly |= mr->readonly;
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505
506 tmp = addrrange_make(base, mr->size);
507
508 if (!addrrange_intersects(tmp, clip)) {
509 return;
510 }
511
512 clip = addrrange_intersection(tmp, clip);
513
514 if (mr->alias) {
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AK
515 int128_subfrom(&base, int128_make64(mr->alias->addr));
516 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 517 render_memory_region(view, mr->alias, base, clip, readonly);
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518 return;
519 }
520
521 /* Render subregions in priority order. */
522 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 523 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
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524 }
525
14a3c10a 526 if (!mr->terminates) {
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527 return;
528 }
529
08dafab4 530 offset_in_region = int128_get64(int128_sub(clip.start, base));
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531 base = clip.start;
532 remain = clip.size;
533
2eb74e1a
PC
534 fr.mr = mr;
535 fr.dirty_log_mask = mr->dirty_log_mask;
536 fr.romd_mode = mr->romd_mode;
537 fr.readonly = readonly;
538
093bc2cd 539 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
540 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
541 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
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542 continue;
543 }
08dafab4
AK
544 if (int128_lt(base, view->ranges[i].addr.start)) {
545 now = int128_min(remain,
546 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
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547 fr.offset_in_region = offset_in_region;
548 fr.addr = addrrange_make(base, now);
549 flatview_insert(view, i, &fr);
550 ++i;
08dafab4
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551 int128_addto(&base, now);
552 offset_in_region += int128_get64(now);
553 int128_subfrom(&remain, now);
093bc2cd 554 }
d26a8cae
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555 now = int128_sub(int128_min(int128_add(base, remain),
556 addrrange_end(view->ranges[i].addr)),
557 base);
558 int128_addto(&base, now);
559 offset_in_region += int128_get64(now);
560 int128_subfrom(&remain, now);
093bc2cd 561 }
08dafab4 562 if (int128_nz(remain)) {
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563 fr.offset_in_region = offset_in_region;
564 fr.addr = addrrange_make(base, remain);
565 flatview_insert(view, i, &fr);
566 }
567}
568
569/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 570static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 571{
a9a0c06d 572 FlatView *view;
093bc2cd 573
a9a0c06d
PB
574 view = g_new(FlatView, 1);
575 flatview_init(view);
093bc2cd 576
83f3c251 577 if (mr) {
a9a0c06d 578 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
579 addrrange_make(int128_zero(), int128_2_64()), false);
580 }
a9a0c06d 581 flatview_simplify(view);
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582
583 return view;
584}
585
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586static void address_space_add_del_ioeventfds(AddressSpace *as,
587 MemoryRegionIoeventfd *fds_new,
588 unsigned fds_new_nb,
589 MemoryRegionIoeventfd *fds_old,
590 unsigned fds_old_nb)
591{
592 unsigned iold, inew;
80a1ea37
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593 MemoryRegionIoeventfd *fd;
594 MemoryRegionSection section;
3e9d69e7
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595
596 /* Generate a symmetric difference of the old and new fd sets, adding
597 * and deleting as necessary.
598 */
599
600 iold = inew = 0;
601 while (iold < fds_old_nb || inew < fds_new_nb) {
602 if (iold < fds_old_nb
603 && (inew == fds_new_nb
604 || memory_region_ioeventfd_before(fds_old[iold],
605 fds_new[inew]))) {
80a1ea37
AK
606 fd = &fds_old[iold];
607 section = (MemoryRegionSection) {
f6790af6 608 .address_space = as,
80a1ea37 609 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 610 .size = fd->addr.size,
80a1ea37
AK
611 };
612 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 613 fd->match_data, fd->data, fd->e);
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614 ++iold;
615 } else if (inew < fds_new_nb
616 && (iold == fds_old_nb
617 || memory_region_ioeventfd_before(fds_new[inew],
618 fds_old[iold]))) {
80a1ea37
AK
619 fd = &fds_new[inew];
620 section = (MemoryRegionSection) {
f6790af6 621 .address_space = as,
80a1ea37 622 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 623 .size = fd->addr.size,
80a1ea37
AK
624 };
625 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 626 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
627 ++inew;
628 } else {
629 ++iold;
630 ++inew;
631 }
632 }
633}
634
856d7245
PB
635static FlatView *address_space_get_flatview(AddressSpace *as)
636{
637 FlatView *view;
638
639 qemu_mutex_lock(&flat_view_mutex);
640 view = as->current_map;
641 flatview_ref(view);
642 qemu_mutex_unlock(&flat_view_mutex);
643 return view;
644}
645
3e9d69e7
AK
646static void address_space_update_ioeventfds(AddressSpace *as)
647{
99e86347 648 FlatView *view;
3e9d69e7
AK
649 FlatRange *fr;
650 unsigned ioeventfd_nb = 0;
651 MemoryRegionIoeventfd *ioeventfds = NULL;
652 AddrRange tmp;
653 unsigned i;
654
856d7245 655 view = address_space_get_flatview(as);
99e86347 656 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
657 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
658 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
659 int128_sub(fr->addr.start,
660 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
661 if (addrrange_intersects(fr->addr, tmp)) {
662 ++ioeventfd_nb;
7267c094 663 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
664 ioeventfd_nb * sizeof(*ioeventfds));
665 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
666 ioeventfds[ioeventfd_nb-1].addr = tmp;
667 }
668 }
669 }
670
671 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
672 as->ioeventfds, as->ioeventfd_nb);
673
7267c094 674 g_free(as->ioeventfds);
3e9d69e7
AK
675 as->ioeventfds = ioeventfds;
676 as->ioeventfd_nb = ioeventfd_nb;
856d7245 677 flatview_unref(view);
3e9d69e7
AK
678}
679
b8af1afb 680static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
681 const FlatView *old_view,
682 const FlatView *new_view,
b8af1afb 683 bool adding)
093bc2cd 684{
093bc2cd
AK
685 unsigned iold, inew;
686 FlatRange *frold, *frnew;
093bc2cd
AK
687
688 /* Generate a symmetric difference of the old and new memory maps.
689 * Kill ranges in the old map, and instantiate ranges in the new map.
690 */
691 iold = inew = 0;
a9a0c06d
PB
692 while (iold < old_view->nr || inew < new_view->nr) {
693 if (iold < old_view->nr) {
694 frold = &old_view->ranges[iold];
093bc2cd
AK
695 } else {
696 frold = NULL;
697 }
a9a0c06d
PB
698 if (inew < new_view->nr) {
699 frnew = &new_view->ranges[inew];
093bc2cd
AK
700 } else {
701 frnew = NULL;
702 }
703
704 if (frold
705 && (!frnew
08dafab4
AK
706 || int128_lt(frold->addr.start, frnew->addr.start)
707 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 708 && !flatrange_equal(frold, frnew)))) {
41a6e477 709 /* In old but not in new, or in both but attributes changed. */
093bc2cd 710
b8af1afb 711 if (!adding) {
72e22d2f 712 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
713 }
714
093bc2cd
AK
715 ++iold;
716 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 717 /* In both and unchanged (except logging may have changed) */
093bc2cd 718
b8af1afb 719 if (adding) {
50c1e149 720 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 721 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 722 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 723 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 724 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 725 }
5a583347
AK
726 }
727
093bc2cd
AK
728 ++iold;
729 ++inew;
093bc2cd
AK
730 } else {
731 /* In new */
732
b8af1afb 733 if (adding) {
72e22d2f 734 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
735 }
736
093bc2cd
AK
737 ++inew;
738 }
739 }
b8af1afb
AK
740}
741
742
743static void address_space_update_topology(AddressSpace *as)
744{
856d7245 745 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 746 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
747
748 address_space_update_topology_pass(as, old_view, new_view, false);
749 address_space_update_topology_pass(as, old_view, new_view, true);
750
856d7245
PB
751 qemu_mutex_lock(&flat_view_mutex);
752 flatview_unref(as->current_map);
a9a0c06d 753 as->current_map = new_view;
856d7245
PB
754 qemu_mutex_unlock(&flat_view_mutex);
755
756 /* Note that all the old MemoryRegions are still alive up to this
757 * point. This relieves most MemoryListeners from the need to
758 * ref/unref the MemoryRegions they get---unless they use them
759 * outside the iothread mutex, in which case precise reference
760 * counting is necessary.
761 */
762 flatview_unref(old_view);
763
3e9d69e7 764 address_space_update_ioeventfds(as);
093bc2cd
AK
765}
766
4ef4db86
AK
767void memory_region_transaction_begin(void)
768{
bb880ded 769 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
770 ++memory_region_transaction_depth;
771}
772
773void memory_region_transaction_commit(void)
774{
0d673e36
AK
775 AddressSpace *as;
776
4ef4db86
AK
777 assert(memory_region_transaction_depth);
778 --memory_region_transaction_depth;
22bde714
JK
779 if (!memory_region_transaction_depth && memory_region_update_pending) {
780 memory_region_update_pending = false;
02e2b95f
JK
781 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
782
0d673e36
AK
783 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
784 address_space_update_topology(as);
02e2b95f
JK
785 }
786
787 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 788 }
4ef4db86
AK
789}
790
545e92e0
AK
791static void memory_region_destructor_none(MemoryRegion *mr)
792{
793}
794
795static void memory_region_destructor_ram(MemoryRegion *mr)
796{
797 qemu_ram_free(mr->ram_addr);
798}
799
dfde4e6e
PB
800static void memory_region_destructor_alias(MemoryRegion *mr)
801{
802 memory_region_unref(mr->alias);
803}
804
545e92e0
AK
805static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
806{
807 qemu_ram_free_from_ptr(mr->ram_addr);
808}
809
d0a9b5bc
AK
810static void memory_region_destructor_rom_device(MemoryRegion *mr)
811{
812 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
813}
814
093bc2cd 815void memory_region_init(MemoryRegion *mr,
2c9b15ca 816 Object *owner,
093bc2cd
AK
817 const char *name,
818 uint64_t size)
819{
2cdfcf27
PB
820 mr->ops = &unassigned_mem_ops;
821 mr->opaque = NULL;
2c9b15ca 822 mr->owner = owner;
30951157 823 mr->iommu_ops = NULL;
093bc2cd 824 mr->parent = NULL;
08dafab4
AK
825 mr->size = int128_make64(size);
826 if (size == UINT64_MAX) {
827 mr->size = int128_2_64();
828 }
093bc2cd 829 mr->addr = 0;
b3b00c78 830 mr->subpage = false;
6bba19ba 831 mr->enabled = true;
14a3c10a 832 mr->terminates = false;
8ea9252a 833 mr->ram = false;
5f9a5ea1 834 mr->romd_mode = true;
fb1cd6f9 835 mr->readonly = false;
75c578dc 836 mr->rom_device = false;
545e92e0 837 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
838 mr->priority = 0;
839 mr->may_overlap = false;
840 mr->alias = NULL;
841 QTAILQ_INIT(&mr->subregions);
842 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
843 QTAILQ_INIT(&mr->coalesced);
7267c094 844 mr->name = g_strdup(name);
5a583347 845 mr->dirty_log_mask = 0;
3e9d69e7
AK
846 mr->ioeventfd_nb = 0;
847 mr->ioeventfds = NULL;
d410515e 848 mr->flush_coalesced_mmio = false;
093bc2cd
AK
849}
850
b018ddf6
PB
851static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
852 unsigned size)
853{
854#ifdef DEBUG_UNASSIGNED
855 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
856#endif
4917cf44
AF
857 if (current_cpu != NULL) {
858 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 859 }
9b8c6924 860 return -1ULL;
b018ddf6
PB
861}
862
863static void unassigned_mem_write(void *opaque, hwaddr addr,
864 uint64_t val, unsigned size)
865{
866#ifdef DEBUG_UNASSIGNED
867 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
868#endif
4917cf44
AF
869 if (current_cpu != NULL) {
870 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 871 }
b018ddf6
PB
872}
873
d197063f
PB
874static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
875 unsigned size, bool is_write)
876{
877 return false;
878}
879
880const MemoryRegionOps unassigned_mem_ops = {
881 .valid.accepts = unassigned_mem_accepts,
882 .endianness = DEVICE_NATIVE_ENDIAN,
883};
884
d2702032
PB
885bool memory_region_access_valid(MemoryRegion *mr,
886 hwaddr addr,
887 unsigned size,
888 bool is_write)
093bc2cd 889{
a014ed07
PB
890 int access_size_min, access_size_max;
891 int access_size, i;
897fa7cf 892
093bc2cd
AK
893 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
894 return false;
895 }
896
a014ed07 897 if (!mr->ops->valid.accepts) {
093bc2cd
AK
898 return true;
899 }
900
a014ed07
PB
901 access_size_min = mr->ops->valid.min_access_size;
902 if (!mr->ops->valid.min_access_size) {
903 access_size_min = 1;
904 }
905
906 access_size_max = mr->ops->valid.max_access_size;
907 if (!mr->ops->valid.max_access_size) {
908 access_size_max = 4;
909 }
910
911 access_size = MAX(MIN(size, access_size_max), access_size_min);
912 for (i = 0; i < size; i += access_size) {
913 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
914 is_write)) {
915 return false;
916 }
093bc2cd 917 }
a014ed07 918
093bc2cd
AK
919 return true;
920}
921
a621f38d 922static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 923 hwaddr addr,
a621f38d 924 unsigned size)
093bc2cd 925{
164a4dcd 926 uint64_t data = 0;
093bc2cd 927
ce5d2f33
PB
928 if (mr->ops->read) {
929 access_with_adjusted_size(addr, &data, size,
930 mr->ops->impl.min_access_size,
931 mr->ops->impl.max_access_size,
932 memory_region_read_accessor, mr);
933 } else {
934 access_with_adjusted_size(addr, &data, size, 1, 4,
935 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
936 }
937
093bc2cd
AK
938 return data;
939}
940
791af8c8
PB
941static bool memory_region_dispatch_read(MemoryRegion *mr,
942 hwaddr addr,
943 uint64_t *pval,
944 unsigned size)
a621f38d 945{
791af8c8
PB
946 if (!memory_region_access_valid(mr, addr, size, false)) {
947 *pval = unassigned_mem_read(mr, addr, size);
948 return true;
949 }
a621f38d 950
791af8c8
PB
951 *pval = memory_region_dispatch_read1(mr, addr, size);
952 adjust_endianness(mr, pval, size);
953 return false;
a621f38d 954}
093bc2cd 955
791af8c8 956static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 957 hwaddr addr,
a621f38d
AK
958 uint64_t data,
959 unsigned size)
960{
897fa7cf 961 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 962 unassigned_mem_write(mr, addr, data, size);
791af8c8 963 return true;
093bc2cd
AK
964 }
965
a621f38d
AK
966 adjust_endianness(mr, &data, size);
967
ce5d2f33
PB
968 if (mr->ops->write) {
969 access_with_adjusted_size(addr, &data, size,
970 mr->ops->impl.min_access_size,
971 mr->ops->impl.max_access_size,
972 memory_region_write_accessor, mr);
973 } else {
974 access_with_adjusted_size(addr, &data, size, 1, 4,
975 memory_region_oldmmio_write_accessor, mr);
74901c3b 976 }
791af8c8 977 return false;
093bc2cd
AK
978}
979
093bc2cd 980void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 981 Object *owner,
093bc2cd
AK
982 const MemoryRegionOps *ops,
983 void *opaque,
984 const char *name,
985 uint64_t size)
986{
2c9b15ca 987 memory_region_init(mr, owner, name, size);
093bc2cd
AK
988 mr->ops = ops;
989 mr->opaque = opaque;
14a3c10a 990 mr->terminates = true;
97161e17 991 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
992}
993
994void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 995 Object *owner,
093bc2cd
AK
996 const char *name,
997 uint64_t size)
998{
2c9b15ca 999 memory_region_init(mr, owner, name, size);
8ea9252a 1000 mr->ram = true;
14a3c10a 1001 mr->terminates = true;
545e92e0 1002 mr->destructor = memory_region_destructor_ram;
c5705a77 1003 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
1004}
1005
1006void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1007 Object *owner,
093bc2cd
AK
1008 const char *name,
1009 uint64_t size,
1010 void *ptr)
1011{
2c9b15ca 1012 memory_region_init(mr, owner, name, size);
8ea9252a 1013 mr->ram = true;
14a3c10a 1014 mr->terminates = true;
545e92e0 1015 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1016 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1017}
1018
1019void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1020 Object *owner,
093bc2cd
AK
1021 const char *name,
1022 MemoryRegion *orig,
a8170e5e 1023 hwaddr offset,
093bc2cd
AK
1024 uint64_t size)
1025{
2c9b15ca 1026 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1027 memory_region_ref(orig);
1028 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1029 mr->alias = orig;
1030 mr->alias_offset = offset;
1031}
1032
d0a9b5bc 1033void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1034 Object *owner,
d0a9b5bc 1035 const MemoryRegionOps *ops,
75f5941c 1036 void *opaque,
d0a9b5bc
AK
1037 const char *name,
1038 uint64_t size)
1039{
2c9b15ca 1040 memory_region_init(mr, owner, name, size);
7bc2b9cd 1041 mr->ops = ops;
75f5941c 1042 mr->opaque = opaque;
d0a9b5bc 1043 mr->terminates = true;
75c578dc 1044 mr->rom_device = true;
d0a9b5bc 1045 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1046 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1047}
1048
30951157 1049void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1050 Object *owner,
30951157
AK
1051 const MemoryRegionIOMMUOps *ops,
1052 const char *name,
1053 uint64_t size)
1054{
2c9b15ca 1055 memory_region_init(mr, owner, name, size);
30951157
AK
1056 mr->iommu_ops = ops,
1057 mr->terminates = true; /* then re-forwards */
06866575 1058 notifier_list_init(&mr->iommu_notify);
30951157
AK
1059}
1060
1660e72d 1061void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1062 Object *owner,
1660e72d
JK
1063 const char *name,
1064 uint64_t size)
1065{
2c9b15ca 1066 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1067}
1068
093bc2cd
AK
1069void memory_region_destroy(MemoryRegion *mr)
1070{
1071 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1072 assert(memory_region_transaction_depth == 0);
545e92e0 1073 mr->destructor(mr);
093bc2cd 1074 memory_region_clear_coalescing(mr);
7267c094
AL
1075 g_free((char *)mr->name);
1076 g_free(mr->ioeventfds);
093bc2cd
AK
1077}
1078
803c0816
PB
1079Object *memory_region_owner(MemoryRegion *mr)
1080{
1081 return mr->owner;
1082}
1083
46637be2
PB
1084void memory_region_ref(MemoryRegion *mr)
1085{
1086 if (mr && mr->owner) {
1087 object_ref(mr->owner);
1088 }
1089}
1090
1091void memory_region_unref(MemoryRegion *mr)
1092{
1093 if (mr && mr->owner) {
1094 object_unref(mr->owner);
1095 }
1096}
1097
093bc2cd
AK
1098uint64_t memory_region_size(MemoryRegion *mr)
1099{
08dafab4
AK
1100 if (int128_eq(mr->size, int128_2_64())) {
1101 return UINT64_MAX;
1102 }
1103 return int128_get64(mr->size);
093bc2cd
AK
1104}
1105
8991c79b
AK
1106const char *memory_region_name(MemoryRegion *mr)
1107{
1108 return mr->name;
1109}
1110
8ea9252a
AK
1111bool memory_region_is_ram(MemoryRegion *mr)
1112{
1113 return mr->ram;
1114}
1115
55043ba3
AK
1116bool memory_region_is_logging(MemoryRegion *mr)
1117{
1118 return mr->dirty_log_mask;
1119}
1120
ce7923da
AK
1121bool memory_region_is_rom(MemoryRegion *mr)
1122{
1123 return mr->ram && mr->readonly;
1124}
1125
30951157
AK
1126bool memory_region_is_iommu(MemoryRegion *mr)
1127{
1128 return mr->iommu_ops;
1129}
1130
06866575
DG
1131void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1132{
1133 notifier_list_add(&mr->iommu_notify, n);
1134}
1135
1136void memory_region_unregister_iommu_notifier(Notifier *n)
1137{
1138 notifier_remove(n);
1139}
1140
1141void memory_region_notify_iommu(MemoryRegion *mr,
1142 IOMMUTLBEntry entry)
1143{
1144 assert(memory_region_is_iommu(mr));
1145 notifier_list_notify(&mr->iommu_notify, &entry);
1146}
1147
093bc2cd
AK
1148void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1149{
5a583347
AK
1150 uint8_t mask = 1 << client;
1151
59023ef4 1152 memory_region_transaction_begin();
5a583347 1153 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1154 memory_region_update_pending |= mr->enabled;
59023ef4 1155 memory_region_transaction_commit();
093bc2cd
AK
1156}
1157
a8170e5e
AK
1158bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1159 hwaddr size, unsigned client)
093bc2cd 1160{
14a3c10a 1161 assert(mr->terminates);
cd7a45c9
BS
1162 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1163 1 << client);
093bc2cd
AK
1164}
1165
a8170e5e
AK
1166void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1167 hwaddr size)
093bc2cd 1168{
14a3c10a 1169 assert(mr->terminates);
fd4aa979 1170 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1171}
1172
6c279db8
JQ
1173bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1174 hwaddr size, unsigned client)
1175{
1176 bool ret;
1177 assert(mr->terminates);
1178 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1179 1 << client);
1180 if (ret) {
1181 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1182 mr->ram_addr + addr + size,
1183 1 << client);
1184 }
1185 return ret;
1186}
1187
1188
093bc2cd
AK
1189void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1190{
0d673e36 1191 AddressSpace *as;
5a583347
AK
1192 FlatRange *fr;
1193
0d673e36 1194 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1195 FlatView *view = address_space_get_flatview(as);
99e86347 1196 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1197 if (fr->mr == mr) {
1198 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1199 }
5a583347 1200 }
856d7245 1201 flatview_unref(view);
5a583347 1202 }
093bc2cd
AK
1203}
1204
1205void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1206{
fb1cd6f9 1207 if (mr->readonly != readonly) {
59023ef4 1208 memory_region_transaction_begin();
fb1cd6f9 1209 mr->readonly = readonly;
22bde714 1210 memory_region_update_pending |= mr->enabled;
59023ef4 1211 memory_region_transaction_commit();
fb1cd6f9 1212 }
093bc2cd
AK
1213}
1214
5f9a5ea1 1215void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1216{
5f9a5ea1 1217 if (mr->romd_mode != romd_mode) {
59023ef4 1218 memory_region_transaction_begin();
5f9a5ea1 1219 mr->romd_mode = romd_mode;
22bde714 1220 memory_region_update_pending |= mr->enabled;
59023ef4 1221 memory_region_transaction_commit();
d0a9b5bc
AK
1222 }
1223}
1224
a8170e5e
AK
1225void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1226 hwaddr size, unsigned client)
093bc2cd 1227{
14a3c10a 1228 assert(mr->terminates);
5a583347
AK
1229 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1230 mr->ram_addr + addr + size,
1231 1 << client);
093bc2cd
AK
1232}
1233
1234void *memory_region_get_ram_ptr(MemoryRegion *mr)
1235{
1236 if (mr->alias) {
1237 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1238 }
1239
14a3c10a 1240 assert(mr->terminates);
093bc2cd 1241
021d26d1 1242 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1243}
1244
0d673e36 1245static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1246{
99e86347 1247 FlatView *view;
093bc2cd
AK
1248 FlatRange *fr;
1249 CoalescedMemoryRange *cmr;
1250 AddrRange tmp;
95d2994a 1251 MemoryRegionSection section;
093bc2cd 1252
856d7245 1253 view = address_space_get_flatview(as);
99e86347 1254 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1255 if (fr->mr == mr) {
95d2994a 1256 section = (MemoryRegionSection) {
f6790af6 1257 .address_space = as,
95d2994a 1258 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1259 .size = fr->addr.size,
95d2994a
AK
1260 };
1261
1262 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1263 int128_get64(fr->addr.start),
1264 int128_get64(fr->addr.size));
093bc2cd
AK
1265 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1266 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1267 int128_sub(fr->addr.start,
1268 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1269 if (!addrrange_intersects(tmp, fr->addr)) {
1270 continue;
1271 }
1272 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1273 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1274 int128_get64(tmp.start),
1275 int128_get64(tmp.size));
093bc2cd
AK
1276 }
1277 }
1278 }
856d7245 1279 flatview_unref(view);
093bc2cd
AK
1280}
1281
0d673e36
AK
1282static void memory_region_update_coalesced_range(MemoryRegion *mr)
1283{
1284 AddressSpace *as;
1285
1286 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1287 memory_region_update_coalesced_range_as(mr, as);
1288 }
1289}
1290
093bc2cd
AK
1291void memory_region_set_coalescing(MemoryRegion *mr)
1292{
1293 memory_region_clear_coalescing(mr);
08dafab4 1294 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1295}
1296
1297void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1298 hwaddr offset,
093bc2cd
AK
1299 uint64_t size)
1300{
7267c094 1301 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1302
08dafab4 1303 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1304 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1305 memory_region_update_coalesced_range(mr);
d410515e 1306 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1307}
1308
1309void memory_region_clear_coalescing(MemoryRegion *mr)
1310{
1311 CoalescedMemoryRange *cmr;
1312
d410515e
JK
1313 qemu_flush_coalesced_mmio_buffer();
1314 mr->flush_coalesced_mmio = false;
1315
093bc2cd
AK
1316 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1317 cmr = QTAILQ_FIRST(&mr->coalesced);
1318 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1319 g_free(cmr);
093bc2cd
AK
1320 }
1321 memory_region_update_coalesced_range(mr);
1322}
1323
d410515e
JK
1324void memory_region_set_flush_coalesced(MemoryRegion *mr)
1325{
1326 mr->flush_coalesced_mmio = true;
1327}
1328
1329void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1330{
1331 qemu_flush_coalesced_mmio_buffer();
1332 if (QTAILQ_EMPTY(&mr->coalesced)) {
1333 mr->flush_coalesced_mmio = false;
1334 }
1335}
1336
3e9d69e7 1337void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1338 hwaddr addr,
3e9d69e7
AK
1339 unsigned size,
1340 bool match_data,
1341 uint64_t data,
753d5e14 1342 EventNotifier *e)
3e9d69e7
AK
1343{
1344 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1345 .addr.start = int128_make64(addr),
1346 .addr.size = int128_make64(size),
3e9d69e7
AK
1347 .match_data = match_data,
1348 .data = data,
753d5e14 1349 .e = e,
3e9d69e7
AK
1350 };
1351 unsigned i;
1352
28f362be 1353 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1354 memory_region_transaction_begin();
3e9d69e7
AK
1355 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1356 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1357 break;
1358 }
1359 }
1360 ++mr->ioeventfd_nb;
7267c094 1361 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1362 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1363 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1364 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1365 mr->ioeventfds[i] = mrfd;
22bde714 1366 memory_region_update_pending |= mr->enabled;
59023ef4 1367 memory_region_transaction_commit();
3e9d69e7
AK
1368}
1369
1370void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1371 hwaddr addr,
3e9d69e7
AK
1372 unsigned size,
1373 bool match_data,
1374 uint64_t data,
753d5e14 1375 EventNotifier *e)
3e9d69e7
AK
1376{
1377 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1378 .addr.start = int128_make64(addr),
1379 .addr.size = int128_make64(size),
3e9d69e7
AK
1380 .match_data = match_data,
1381 .data = data,
753d5e14 1382 .e = e,
3e9d69e7
AK
1383 };
1384 unsigned i;
1385
28f362be 1386 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1387 memory_region_transaction_begin();
3e9d69e7
AK
1388 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1389 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1390 break;
1391 }
1392 }
1393 assert(i != mr->ioeventfd_nb);
1394 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1395 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1396 --mr->ioeventfd_nb;
7267c094 1397 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1398 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1399 memory_region_update_pending |= mr->enabled;
59023ef4 1400 memory_region_transaction_commit();
3e9d69e7
AK
1401}
1402
093bc2cd 1403static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1404 hwaddr offset,
093bc2cd
AK
1405 MemoryRegion *subregion)
1406{
1407 MemoryRegion *other;
1408
59023ef4
JK
1409 memory_region_transaction_begin();
1410
093bc2cd 1411 assert(!subregion->parent);
dfde4e6e 1412 memory_region_ref(subregion);
093bc2cd
AK
1413 subregion->parent = mr;
1414 subregion->addr = offset;
1415 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1416 if (subregion->may_overlap || other->may_overlap) {
1417 continue;
1418 }
2c7cfd65 1419 if (int128_ge(int128_make64(offset),
08dafab4
AK
1420 int128_add(int128_make64(other->addr), other->size))
1421 || int128_le(int128_add(int128_make64(offset), subregion->size),
1422 int128_make64(other->addr))) {
093bc2cd
AK
1423 continue;
1424 }
a5e1cbc8 1425#if 0
860329b2
MW
1426 printf("warning: subregion collision %llx/%llx (%s) "
1427 "vs %llx/%llx (%s)\n",
093bc2cd 1428 (unsigned long long)offset,
08dafab4 1429 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1430 subregion->name,
1431 (unsigned long long)other->addr,
08dafab4 1432 (unsigned long long)int128_get64(other->size),
860329b2 1433 other->name);
a5e1cbc8 1434#endif
093bc2cd
AK
1435 }
1436 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1437 if (subregion->priority >= other->priority) {
1438 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1439 goto done;
1440 }
1441 }
1442 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1443done:
22bde714 1444 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1445 memory_region_transaction_commit();
093bc2cd
AK
1446}
1447
1448
1449void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1450 hwaddr offset,
093bc2cd
AK
1451 MemoryRegion *subregion)
1452{
1453 subregion->may_overlap = false;
1454 subregion->priority = 0;
1455 memory_region_add_subregion_common(mr, offset, subregion);
1456}
1457
1458void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1459 hwaddr offset,
093bc2cd
AK
1460 MemoryRegion *subregion,
1461 unsigned priority)
1462{
1463 subregion->may_overlap = true;
1464 subregion->priority = priority;
1465 memory_region_add_subregion_common(mr, offset, subregion);
1466}
1467
1468void memory_region_del_subregion(MemoryRegion *mr,
1469 MemoryRegion *subregion)
1470{
59023ef4 1471 memory_region_transaction_begin();
093bc2cd
AK
1472 assert(subregion->parent == mr);
1473 subregion->parent = NULL;
1474 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1475 memory_region_unref(subregion);
22bde714 1476 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1477 memory_region_transaction_commit();
6bba19ba
AK
1478}
1479
1480void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1481{
1482 if (enabled == mr->enabled) {
1483 return;
1484 }
59023ef4 1485 memory_region_transaction_begin();
6bba19ba 1486 mr->enabled = enabled;
22bde714 1487 memory_region_update_pending = true;
59023ef4 1488 memory_region_transaction_commit();
093bc2cd 1489}
1c0ffa58 1490
a8170e5e 1491void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1492{
1493 MemoryRegion *parent = mr->parent;
1494 unsigned priority = mr->priority;
1495 bool may_overlap = mr->may_overlap;
1496
1497 if (addr == mr->addr || !parent) {
1498 mr->addr = addr;
1499 return;
1500 }
1501
1502 memory_region_transaction_begin();
dfde4e6e 1503 memory_region_ref(mr);
2282e1af
AK
1504 memory_region_del_subregion(parent, mr);
1505 if (may_overlap) {
1506 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1507 } else {
1508 memory_region_add_subregion(parent, addr, mr);
1509 }
dfde4e6e 1510 memory_region_unref(mr);
2282e1af
AK
1511 memory_region_transaction_commit();
1512}
1513
a8170e5e 1514void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1515{
4703359e 1516 assert(mr->alias);
4703359e 1517
59023ef4 1518 if (offset == mr->alias_offset) {
4703359e
AK
1519 return;
1520 }
1521
59023ef4
JK
1522 memory_region_transaction_begin();
1523 mr->alias_offset = offset;
22bde714 1524 memory_region_update_pending |= mr->enabled;
59023ef4 1525 memory_region_transaction_commit();
4703359e
AK
1526}
1527
e34911c4
AK
1528ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1529{
e34911c4
AK
1530 return mr->ram_addr;
1531}
1532
e2177955
AK
1533static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1534{
1535 const AddrRange *addr = addr_;
1536 const FlatRange *fr = fr_;
1537
1538 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1539 return -1;
1540 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1541 return 1;
1542 }
1543 return 0;
1544}
1545
99e86347 1546static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1547{
99e86347 1548 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1549 sizeof(FlatRange), cmp_flatrange_addr);
1550}
1551
3ce10901
PB
1552bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1553{
1554 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1555 if (!mr) {
1556 return false;
1557 }
dfde4e6e 1558 memory_region_unref(mr);
3ce10901
PB
1559 return true;
1560}
1561
73034e9e 1562MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1563 hwaddr addr, uint64_t size)
e2177955 1564{
052e87b0 1565 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1566 MemoryRegion *root;
1567 AddressSpace *as;
1568 AddrRange range;
99e86347 1569 FlatView *view;
73034e9e
PB
1570 FlatRange *fr;
1571
1572 addr += mr->addr;
1573 for (root = mr; root->parent; ) {
1574 root = root->parent;
1575 addr += root->addr;
1576 }
e2177955 1577
73034e9e
PB
1578 as = memory_region_to_address_space(root);
1579 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1580
856d7245 1581 view = address_space_get_flatview(as);
99e86347 1582 fr = flatview_lookup(view, range);
e2177955
AK
1583 if (!fr) {
1584 return ret;
1585 }
1586
99e86347 1587 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1588 --fr;
1589 }
1590
1591 ret.mr = fr->mr;
73034e9e 1592 ret.address_space = as;
e2177955
AK
1593 range = addrrange_intersection(range, fr->addr);
1594 ret.offset_within_region = fr->offset_in_region;
1595 ret.offset_within_region += int128_get64(int128_sub(range.start,
1596 fr->addr.start));
052e87b0 1597 ret.size = range.size;
e2177955 1598 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1599 ret.readonly = fr->readonly;
dfde4e6e
PB
1600 memory_region_ref(ret.mr);
1601
856d7245 1602 flatview_unref(view);
e2177955
AK
1603 return ret;
1604}
1605
1d671369 1606void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1607{
99e86347 1608 FlatView *view;
7664e80c
AK
1609 FlatRange *fr;
1610
856d7245 1611 view = address_space_get_flatview(as);
99e86347 1612 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1613 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1614 }
856d7245 1615 flatview_unref(view);
7664e80c
AK
1616}
1617
1618void memory_global_dirty_log_start(void)
1619{
7664e80c 1620 global_dirty_log = true;
7376e582 1621 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1622}
1623
1624void memory_global_dirty_log_stop(void)
1625{
7664e80c 1626 global_dirty_log = false;
7376e582 1627 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1628}
1629
1630static void listener_add_address_space(MemoryListener *listener,
1631 AddressSpace *as)
1632{
99e86347 1633 FlatView *view;
7664e80c
AK
1634 FlatRange *fr;
1635
221b3a3f 1636 if (listener->address_space_filter
f6790af6 1637 && listener->address_space_filter != as) {
221b3a3f
JG
1638 return;
1639 }
1640
7664e80c 1641 if (global_dirty_log) {
975aefe0
AK
1642 if (listener->log_global_start) {
1643 listener->log_global_start(listener);
1644 }
7664e80c 1645 }
975aefe0 1646
856d7245 1647 view = address_space_get_flatview(as);
99e86347 1648 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1649 MemoryRegionSection section = {
1650 .mr = fr->mr,
f6790af6 1651 .address_space = as,
7664e80c 1652 .offset_within_region = fr->offset_in_region,
052e87b0 1653 .size = fr->addr.size,
7664e80c 1654 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1655 .readonly = fr->readonly,
7664e80c 1656 };
975aefe0
AK
1657 if (listener->region_add) {
1658 listener->region_add(listener, &section);
1659 }
7664e80c 1660 }
856d7245 1661 flatview_unref(view);
7664e80c
AK
1662}
1663
f6790af6 1664void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1665{
72e22d2f 1666 MemoryListener *other = NULL;
0d673e36 1667 AddressSpace *as;
72e22d2f 1668
7376e582 1669 listener->address_space_filter = filter;
72e22d2f
AK
1670 if (QTAILQ_EMPTY(&memory_listeners)
1671 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1672 memory_listeners)->priority) {
1673 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1674 } else {
1675 QTAILQ_FOREACH(other, &memory_listeners, link) {
1676 if (listener->priority < other->priority) {
1677 break;
1678 }
1679 }
1680 QTAILQ_INSERT_BEFORE(other, listener, link);
1681 }
0d673e36
AK
1682
1683 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1684 listener_add_address_space(listener, as);
1685 }
7664e80c
AK
1686}
1687
1688void memory_listener_unregister(MemoryListener *listener)
1689{
72e22d2f 1690 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1691}
e2177955 1692
7dca8043 1693void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1694{
856d7245
PB
1695 if (QTAILQ_EMPTY(&address_spaces)) {
1696 memory_init();
1697 }
1698
59023ef4 1699 memory_region_transaction_begin();
8786db7c
AK
1700 as->root = root;
1701 as->current_map = g_new(FlatView, 1);
1702 flatview_init(as->current_map);
4c19eb72
AK
1703 as->ioeventfd_nb = 0;
1704 as->ioeventfds = NULL;
0d673e36 1705 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1706 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1707 address_space_init_dispatch(as);
f43793c7
PB
1708 memory_region_update_pending |= root->enabled;
1709 memory_region_transaction_commit();
1c0ffa58 1710}
658b2224 1711
83f3c251
AK
1712void address_space_destroy(AddressSpace *as)
1713{
1714 /* Flush out anything from MemoryListeners listening in on this */
1715 memory_region_transaction_begin();
1716 as->root = NULL;
1717 memory_region_transaction_commit();
1718 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1719 address_space_destroy_dispatch(as);
856d7245 1720 flatview_unref(as->current_map);
7dca8043 1721 g_free(as->name);
4c19eb72 1722 g_free(as->ioeventfds);
83f3c251
AK
1723}
1724
791af8c8 1725bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1726{
791af8c8 1727 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1728}
1729
791af8c8 1730bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1731 uint64_t val, unsigned size)
1732{
791af8c8 1733 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1734}
1735
314e2987
BS
1736typedef struct MemoryRegionList MemoryRegionList;
1737
1738struct MemoryRegionList {
1739 const MemoryRegion *mr;
1740 bool printed;
1741 QTAILQ_ENTRY(MemoryRegionList) queue;
1742};
1743
1744typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1745
1746static void mtree_print_mr(fprintf_function mon_printf, void *f,
1747 const MemoryRegion *mr, unsigned int level,
a8170e5e 1748 hwaddr base,
9479c57a 1749 MemoryRegionListHead *alias_print_queue)
314e2987 1750{
9479c57a
JK
1751 MemoryRegionList *new_ml, *ml, *next_ml;
1752 MemoryRegionListHead submr_print_queue;
314e2987
BS
1753 const MemoryRegion *submr;
1754 unsigned int i;
1755
7ea692b2 1756 if (!mr || !mr->enabled) {
314e2987
BS
1757 return;
1758 }
1759
1760 for (i = 0; i < level; i++) {
1761 mon_printf(f, " ");
1762 }
1763
1764 if (mr->alias) {
1765 MemoryRegionList *ml;
1766 bool found = false;
1767
1768 /* check if the alias is already in the queue */
9479c57a 1769 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1770 if (ml->mr == mr->alias && !ml->printed) {
1771 found = true;
1772 }
1773 }
1774
1775 if (!found) {
1776 ml = g_new(MemoryRegionList, 1);
1777 ml->mr = mr->alias;
1778 ml->printed = false;
9479c57a 1779 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1780 }
4896d74b
JK
1781 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1782 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1783 "-" TARGET_FMT_plx "\n",
314e2987 1784 base + mr->addr,
08dafab4 1785 base + mr->addr
fd1d9926
AW
1786 + (int128_nz(mr->size) ?
1787 (hwaddr)int128_get64(int128_sub(mr->size,
1788 int128_one())) : 0),
4b474ba7 1789 mr->priority,
5f9a5ea1
JK
1790 mr->romd_mode ? 'R' : '-',
1791 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1792 : '-',
314e2987
BS
1793 mr->name,
1794 mr->alias->name,
1795 mr->alias_offset,
08dafab4 1796 mr->alias_offset
a8170e5e 1797 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1798 } else {
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JK
1799 mon_printf(f,
1800 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1801 base + mr->addr,
08dafab4 1802 base + mr->addr
fd1d9926
AW
1803 + (int128_nz(mr->size) ?
1804 (hwaddr)int128_get64(int128_sub(mr->size,
1805 int128_one())) : 0),
4b474ba7 1806 mr->priority,
5f9a5ea1
JK
1807 mr->romd_mode ? 'R' : '-',
1808 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1809 : '-',
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BS
1810 mr->name);
1811 }
9479c57a
JK
1812
1813 QTAILQ_INIT(&submr_print_queue);
1814
314e2987 1815 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1816 new_ml = g_new(MemoryRegionList, 1);
1817 new_ml->mr = submr;
1818 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1819 if (new_ml->mr->addr < ml->mr->addr ||
1820 (new_ml->mr->addr == ml->mr->addr &&
1821 new_ml->mr->priority > ml->mr->priority)) {
1822 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1823 new_ml = NULL;
1824 break;
1825 }
1826 }
1827 if (new_ml) {
1828 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1829 }
1830 }
1831
1832 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1833 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1834 alias_print_queue);
1835 }
1836
88365e47 1837 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1838 g_free(ml);
314e2987
BS
1839 }
1840}
1841
1842void mtree_info(fprintf_function mon_printf, void *f)
1843{
1844 MemoryRegionListHead ml_head;
1845 MemoryRegionList *ml, *ml2;
0d673e36 1846 AddressSpace *as;
314e2987
BS
1847
1848 QTAILQ_INIT(&ml_head);
1849
0d673e36 1850 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
1851 mon_printf(f, "%s\n", as->name);
1852 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1853 }
1854
1855 mon_printf(f, "aliases\n");
314e2987
BS
1856 /* print aliased regions */
1857 QTAILQ_FOREACH(ml, &ml_head, queue) {
1858 if (!ml->printed) {
1859 mon_printf(f, "%s\n", ml->mr->name);
1860 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1861 }
1862 }
1863
1864 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1865 g_free(ml);
314e2987 1866 }
314e2987 1867}