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exec: just use io_mem_read/io_mem_write for 8-byte I/O accesses
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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
9c17d615 20#include "sysemu/kvm.h"
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21#include <assert.h>
22
022c62cb 23#include "exec/memory-internal.h"
67d95c15 24
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25//#define DEBUG_UNASSIGNED
26
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27static unsigned memory_region_transaction_depth;
28static bool memory_region_update_pending;
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29static bool global_dirty_log = false;
30
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31static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 33
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34static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
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37typedef struct AddrRange AddrRange;
38
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39/*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
093bc2cd 44struct AddrRange {
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45 Int128 start;
46 Int128 size;
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47};
48
08dafab4 49static AddrRange addrrange_make(Int128 start, Int128 size)
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50{
51 return (AddrRange) { start, size };
52}
53
54static bool addrrange_equal(AddrRange r1, AddrRange r2)
55{
08dafab4 56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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57}
58
08dafab4 59static Int128 addrrange_end(AddrRange r)
093bc2cd 60{
08dafab4 61 return int128_add(r.start, r.size);
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62}
63
08dafab4 64static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 65{
08dafab4 66 int128_addto(&range.start, delta);
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67 return range;
68}
69
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70static bool addrrange_contains(AddrRange range, Int128 addr)
71{
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74}
75
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76static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77{
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78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
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80}
81
82static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83{
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84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
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87}
88
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89enum ListenerDirection { Forward, Reverse };
90
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91static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93{
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96}
97
98#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
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108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
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113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
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116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
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123#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
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132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
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139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
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141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
0e0d36b4 150#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 152 .mr = (fr)->mr, \
f6790af6 153 .address_space = (as), \
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154 .offset_within_region = (fr)->offset_in_region, \
155 .size = int128_get64((fr)->addr.size), \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 157 .readonly = (fr)->readonly, \
7376e582 158 }))
0e0d36b4 159
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160struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163};
164
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165struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
753d5e14 169 EventNotifier *e;
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170};
171
172static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174{
08dafab4 175 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 176 return true;
08dafab4 177 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 178 return false;
08dafab4 179 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 180 return true;
08dafab4 181 } else if (int128_gt(a.addr.size, b.addr.size)) {
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182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
753d5e14 194 if (a.e < b.e) {
3e9d69e7 195 return true;
753d5e14 196 } else if (a.e > b.e) {
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197 return false;
198 }
199 return false;
200}
201
202static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204{
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207}
208
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209typedef struct FlatRange FlatRange;
210typedef struct FlatView FlatView;
211
212/* Range of memory in the global map. Addresses are absolute. */
213struct FlatRange {
214 MemoryRegion *mr;
a8170e5e 215 hwaddr offset_in_region;
093bc2cd 216 AddrRange addr;
5a583347 217 uint8_t dirty_log_mask;
5f9a5ea1 218 bool romd_mode;
fb1cd6f9 219 bool readonly;
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220};
221
222/* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229};
230
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231typedef struct AddressSpaceOps AddressSpaceOps;
232
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233#define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
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236static bool flatrange_equal(FlatRange *a, FlatRange *b)
237{
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 240 && a->offset_in_region == b->offset_in_region
5f9a5ea1 241 && a->romd_mode == b->romd_mode
fb1cd6f9 242 && a->readonly == b->readonly;
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243}
244
245static void flatview_init(FlatView *view)
246{
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250}
251
252/* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256{
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 259 view->ranges = g_realloc(view->ranges,
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260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266}
267
268static void flatview_destroy(FlatView *view)
269{
7267c094 270 g_free(view->ranges);
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271}
272
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273static bool can_merge(FlatRange *r1, FlatRange *r2)
274{
08dafab4 275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 276 && r1->mr == r2->mr
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277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
d0a9b5bc 280 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 281 && r1->romd_mode == r2->romd_mode
fb1cd6f9 282 && r1->readonly == r2->readonly;
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283}
284
285/* Attempt to simplify a view by merging ajacent ranges */
286static void flatview_simplify(FlatView *view)
287{
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303}
304
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305static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311{
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317}
318
164a4dcd 319static void memory_region_read_accessor(void *opaque,
a8170e5e 320 hwaddr addr,
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321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325{
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
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329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
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332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334}
335
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336static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342{
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348}
349
164a4dcd 350static void memory_region_write_accessor(void *opaque,
a8170e5e 351 hwaddr addr,
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352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356{
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
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360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
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363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365}
366
a8170e5e 367static void access_with_adjusted_size(hwaddr addr,
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368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
a8170e5e 373 hwaddr addr,
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374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379{
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
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390
391 /* FIXME: support unaligned access? */
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392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
08521e28
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395#ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398#else
164a4dcd 399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
08521e28 400#endif
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401 }
402}
403
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404static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
405 unsigned width, bool write)
406{
407 const MemoryRegionPortio *mrp;
408
409 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
410 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
411 && width == mrp->size
412 && (write ? (bool)mrp->write : (bool)mrp->read)) {
413 return mrp;
414 }
415 }
416 return NULL;
417}
418
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419static void memory_region_iorange_read(IORange *iorange,
420 uint64_t offset,
421 unsigned width,
422 uint64_t *data)
423{
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424 MemoryRegionIORange *mrio
425 = container_of(iorange, MemoryRegionIORange, iorange);
426 MemoryRegion *mr = mrio->mr;
658b2224 427
a2d33521 428 offset += mrio->offset;
627a0e90 429 if (mr->ops->old_portio) {
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430 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
431 width, false);
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432
433 *data = ((uint64_t)1 << (width * 8)) - 1;
434 if (mrp) {
2b50aa1f 435 *data = mrp->read(mr->opaque, offset);
03808f58 436 } else if (width == 2) {
a2d33521 437 mrp = find_portio(mr, offset - mrio->offset, 1, false);
03808f58 438 assert(mrp);
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439 *data = mrp->read(mr->opaque, offset) |
440 (mrp->read(mr->opaque, offset + 1) << 8);
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441 }
442 return;
443 }
3a130f4e 444 *data = 0;
2b50aa1f 445 access_with_adjusted_size(offset, data, width,
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446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_read_accessor, mr);
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449}
450
451static void memory_region_iorange_write(IORange *iorange,
452 uint64_t offset,
453 unsigned width,
454 uint64_t data)
455{
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456 MemoryRegionIORange *mrio
457 = container_of(iorange, MemoryRegionIORange, iorange);
458 MemoryRegion *mr = mrio->mr;
658b2224 459
a2d33521 460 offset += mrio->offset;
627a0e90 461 if (mr->ops->old_portio) {
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462 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
463 width, true);
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464
465 if (mrp) {
2b50aa1f 466 mrp->write(mr->opaque, offset, data);
03808f58 467 } else if (width == 2) {
7e2a62d8 468 mrp = find_portio(mr, offset - mrio->offset, 1, true);
03808f58 469 assert(mrp);
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470 mrp->write(mr->opaque, offset, data & 0xff);
471 mrp->write(mr->opaque, offset + 1, data >> 8);
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472 }
473 return;
474 }
2b50aa1f 475 access_with_adjusted_size(offset, &data, width,
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476 mr->ops->impl.min_access_size,
477 mr->ops->impl.max_access_size,
478 memory_region_write_accessor, mr);
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479}
480
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481static void memory_region_iorange_destructor(IORange *iorange)
482{
483 g_free(container_of(iorange, MemoryRegionIORange, iorange));
484}
485
93632747 486const IORangeOps memory_region_iorange_ops = {
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487 .read = memory_region_iorange_read,
488 .write = memory_region_iorange_write,
a2d33521 489 .destructor = memory_region_iorange_destructor,
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490};
491
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492static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
493{
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494 AddressSpace *as;
495
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496 while (mr->parent) {
497 mr = mr->parent;
498 }
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499 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
500 if (mr == as->root) {
501 return as;
502 }
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503 }
504 abort();
505}
506
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507/* Render a memory region into the global view. Ranges in @view obscure
508 * ranges in @mr.
509 */
510static void render_memory_region(FlatView *view,
511 MemoryRegion *mr,
08dafab4 512 Int128 base,
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513 AddrRange clip,
514 bool readonly)
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515{
516 MemoryRegion *subregion;
517 unsigned i;
a8170e5e 518 hwaddr offset_in_region;
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519 Int128 remain;
520 Int128 now;
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521 FlatRange fr;
522 AddrRange tmp;
523
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524 if (!mr->enabled) {
525 return;
526 }
527
08dafab4 528 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 529 readonly |= mr->readonly;
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530
531 tmp = addrrange_make(base, mr->size);
532
533 if (!addrrange_intersects(tmp, clip)) {
534 return;
535 }
536
537 clip = addrrange_intersection(tmp, clip);
538
539 if (mr->alias) {
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540 int128_subfrom(&base, int128_make64(mr->alias->addr));
541 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 542 render_memory_region(view, mr->alias, base, clip, readonly);
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543 return;
544 }
545
546 /* Render subregions in priority order. */
547 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 548 render_memory_region(view, subregion, base, clip, readonly);
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549 }
550
14a3c10a 551 if (!mr->terminates) {
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552 return;
553 }
554
08dafab4 555 offset_in_region = int128_get64(int128_sub(clip.start, base));
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556 base = clip.start;
557 remain = clip.size;
558
559 /* Render the region itself into any gaps left by the current view. */
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560 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
561 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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562 continue;
563 }
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564 if (int128_lt(base, view->ranges[i].addr.start)) {
565 now = int128_min(remain,
566 int128_sub(view->ranges[i].addr.start, base));
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567 fr.mr = mr;
568 fr.offset_in_region = offset_in_region;
569 fr.addr = addrrange_make(base, now);
5a583347 570 fr.dirty_log_mask = mr->dirty_log_mask;
5f9a5ea1 571 fr.romd_mode = mr->romd_mode;
fb1cd6f9 572 fr.readonly = readonly;
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573 flatview_insert(view, i, &fr);
574 ++i;
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575 int128_addto(&base, now);
576 offset_in_region += int128_get64(now);
577 int128_subfrom(&remain, now);
093bc2cd 578 }
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579 now = int128_sub(int128_min(int128_add(base, remain),
580 addrrange_end(view->ranges[i].addr)),
581 base);
582 int128_addto(&base, now);
583 offset_in_region += int128_get64(now);
584 int128_subfrom(&remain, now);
093bc2cd 585 }
08dafab4 586 if (int128_nz(remain)) {
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587 fr.mr = mr;
588 fr.offset_in_region = offset_in_region;
589 fr.addr = addrrange_make(base, remain);
5a583347 590 fr.dirty_log_mask = mr->dirty_log_mask;
5f9a5ea1 591 fr.romd_mode = mr->romd_mode;
fb1cd6f9 592 fr.readonly = readonly;
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593 flatview_insert(view, i, &fr);
594 }
595}
596
597/* Render a memory topology into a list of disjoint absolute ranges. */
598static FlatView generate_memory_topology(MemoryRegion *mr)
599{
600 FlatView view;
601
602 flatview_init(&view);
603
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604 if (mr) {
605 render_memory_region(&view, mr, int128_zero(),
606 addrrange_make(int128_zero(), int128_2_64()), false);
607 }
3d8e6bf9 608 flatview_simplify(&view);
093bc2cd
AK
609
610 return view;
611}
612
3e9d69e7
AK
613static void address_space_add_del_ioeventfds(AddressSpace *as,
614 MemoryRegionIoeventfd *fds_new,
615 unsigned fds_new_nb,
616 MemoryRegionIoeventfd *fds_old,
617 unsigned fds_old_nb)
618{
619 unsigned iold, inew;
80a1ea37
AK
620 MemoryRegionIoeventfd *fd;
621 MemoryRegionSection section;
3e9d69e7
AK
622
623 /* Generate a symmetric difference of the old and new fd sets, adding
624 * and deleting as necessary.
625 */
626
627 iold = inew = 0;
628 while (iold < fds_old_nb || inew < fds_new_nb) {
629 if (iold < fds_old_nb
630 && (inew == fds_new_nb
631 || memory_region_ioeventfd_before(fds_old[iold],
632 fds_new[inew]))) {
80a1ea37
AK
633 fd = &fds_old[iold];
634 section = (MemoryRegionSection) {
f6790af6 635 .address_space = as,
80a1ea37
AK
636 .offset_within_address_space = int128_get64(fd->addr.start),
637 .size = int128_get64(fd->addr.size),
638 };
639 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 640 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
641 ++iold;
642 } else if (inew < fds_new_nb
643 && (iold == fds_old_nb
644 || memory_region_ioeventfd_before(fds_new[inew],
645 fds_old[iold]))) {
80a1ea37
AK
646 fd = &fds_new[inew];
647 section = (MemoryRegionSection) {
f6790af6 648 .address_space = as,
80a1ea37
AK
649 .offset_within_address_space = int128_get64(fd->addr.start),
650 .size = int128_get64(fd->addr.size),
651 };
652 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 653 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
654 ++inew;
655 } else {
656 ++iold;
657 ++inew;
658 }
659 }
660}
661
662static void address_space_update_ioeventfds(AddressSpace *as)
663{
664 FlatRange *fr;
665 unsigned ioeventfd_nb = 0;
666 MemoryRegionIoeventfd *ioeventfds = NULL;
667 AddrRange tmp;
668 unsigned i;
669
8786db7c 670 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
3e9d69e7
AK
671 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
672 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
673 int128_sub(fr->addr.start,
674 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
675 if (addrrange_intersects(fr->addr, tmp)) {
676 ++ioeventfd_nb;
7267c094 677 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
678 ioeventfd_nb * sizeof(*ioeventfds));
679 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
680 ioeventfds[ioeventfd_nb-1].addr = tmp;
681 }
682 }
683 }
684
685 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
686 as->ioeventfds, as->ioeventfd_nb);
687
7267c094 688 g_free(as->ioeventfds);
3e9d69e7
AK
689 as->ioeventfds = ioeventfds;
690 as->ioeventfd_nb = ioeventfd_nb;
691}
692
b8af1afb
AK
693static void address_space_update_topology_pass(AddressSpace *as,
694 FlatView old_view,
695 FlatView new_view,
696 bool adding)
093bc2cd 697{
093bc2cd
AK
698 unsigned iold, inew;
699 FlatRange *frold, *frnew;
093bc2cd
AK
700
701 /* Generate a symmetric difference of the old and new memory maps.
702 * Kill ranges in the old map, and instantiate ranges in the new map.
703 */
704 iold = inew = 0;
705 while (iold < old_view.nr || inew < new_view.nr) {
706 if (iold < old_view.nr) {
707 frold = &old_view.ranges[iold];
708 } else {
709 frold = NULL;
710 }
711 if (inew < new_view.nr) {
712 frnew = &new_view.ranges[inew];
713 } else {
714 frnew = NULL;
715 }
716
717 if (frold
718 && (!frnew
08dafab4
AK
719 || int128_lt(frold->addr.start, frnew->addr.start)
720 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd
AK
721 && !flatrange_equal(frold, frnew)))) {
722 /* In old, but (not in new, or in new but attributes changed). */
723
b8af1afb 724 if (!adding) {
72e22d2f 725 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
726 }
727
093bc2cd
AK
728 ++iold;
729 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
730 /* In both (logging may have changed) */
731
b8af1afb 732 if (adding) {
50c1e149 733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 734 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 736 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 737 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 738 }
5a583347
AK
739 }
740
093bc2cd
AK
741 ++iold;
742 ++inew;
093bc2cd
AK
743 } else {
744 /* In new */
745
b8af1afb 746 if (adding) {
72e22d2f 747 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
748 }
749
093bc2cd
AK
750 ++inew;
751 }
752 }
b8af1afb
AK
753}
754
755
756static void address_space_update_topology(AddressSpace *as)
757{
8786db7c 758 FlatView old_view = *as->current_map;
b8af1afb
AK
759 FlatView new_view = generate_memory_topology(as->root);
760
761 address_space_update_topology_pass(as, old_view, new_view, false);
762 address_space_update_topology_pass(as, old_view, new_view, true);
763
8786db7c 764 *as->current_map = new_view;
093bc2cd 765 flatview_destroy(&old_view);
3e9d69e7 766 address_space_update_ioeventfds(as);
093bc2cd
AK
767}
768
4ef4db86
AK
769void memory_region_transaction_begin(void)
770{
bb880ded 771 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
772 ++memory_region_transaction_depth;
773}
774
775void memory_region_transaction_commit(void)
776{
0d673e36
AK
777 AddressSpace *as;
778
4ef4db86
AK
779 assert(memory_region_transaction_depth);
780 --memory_region_transaction_depth;
22bde714
JK
781 if (!memory_region_transaction_depth && memory_region_update_pending) {
782 memory_region_update_pending = false;
02e2b95f
JK
783 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
784
0d673e36
AK
785 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
786 address_space_update_topology(as);
02e2b95f
JK
787 }
788
789 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 790 }
4ef4db86
AK
791}
792
545e92e0
AK
793static void memory_region_destructor_none(MemoryRegion *mr)
794{
795}
796
797static void memory_region_destructor_ram(MemoryRegion *mr)
798{
799 qemu_ram_free(mr->ram_addr);
800}
801
802static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
803{
804 qemu_ram_free_from_ptr(mr->ram_addr);
805}
806
d0a9b5bc
AK
807static void memory_region_destructor_rom_device(MemoryRegion *mr)
808{
809 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
810}
811
be675c97
AK
812static bool memory_region_wrong_endianness(MemoryRegion *mr)
813{
2c3579ab 814#ifdef TARGET_WORDS_BIGENDIAN
be675c97
AK
815 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
816#else
817 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
818#endif
819}
820
093bc2cd
AK
821void memory_region_init(MemoryRegion *mr,
822 const char *name,
823 uint64_t size)
824{
2cdfcf27
PB
825 mr->ops = &unassigned_mem_ops;
826 mr->opaque = NULL;
093bc2cd 827 mr->parent = NULL;
08dafab4
AK
828 mr->size = int128_make64(size);
829 if (size == UINT64_MAX) {
830 mr->size = int128_2_64();
831 }
093bc2cd 832 mr->addr = 0;
b3b00c78 833 mr->subpage = false;
6bba19ba 834 mr->enabled = true;
14a3c10a 835 mr->terminates = false;
8ea9252a 836 mr->ram = false;
5f9a5ea1 837 mr->romd_mode = true;
fb1cd6f9 838 mr->readonly = false;
75c578dc 839 mr->rom_device = false;
545e92e0 840 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
841 mr->priority = 0;
842 mr->may_overlap = false;
843 mr->alias = NULL;
844 QTAILQ_INIT(&mr->subregions);
845 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
846 QTAILQ_INIT(&mr->coalesced);
7267c094 847 mr->name = g_strdup(name);
5a583347 848 mr->dirty_log_mask = 0;
3e9d69e7
AK
849 mr->ioeventfd_nb = 0;
850 mr->ioeventfds = NULL;
d410515e 851 mr->flush_coalesced_mmio = false;
093bc2cd
AK
852}
853
b018ddf6
PB
854static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
855 unsigned size)
856{
857#ifdef DEBUG_UNASSIGNED
858 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
859#endif
860#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
861 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
862#endif
863 return 0;
864}
865
866static void unassigned_mem_write(void *opaque, hwaddr addr,
867 uint64_t val, unsigned size)
868{
869#ifdef DEBUG_UNASSIGNED
870 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
871#endif
872#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
873 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
874#endif
875}
876
d197063f
PB
877static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
878 unsigned size, bool is_write)
879{
880 return false;
881}
882
883const MemoryRegionOps unassigned_mem_ops = {
884 .valid.accepts = unassigned_mem_accepts,
885 .endianness = DEVICE_NATIVE_ENDIAN,
886};
887
d2702032
PB
888bool memory_region_access_valid(MemoryRegion *mr,
889 hwaddr addr,
890 unsigned size,
891 bool is_write)
093bc2cd 892{
a014ed07
PB
893 int access_size_min, access_size_max;
894 int access_size, i;
897fa7cf 895
093bc2cd
AK
896 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
897 return false;
898 }
899
a014ed07 900 if (!mr->ops->valid.accepts) {
093bc2cd
AK
901 return true;
902 }
903
a014ed07
PB
904 access_size_min = mr->ops->valid.min_access_size;
905 if (!mr->ops->valid.min_access_size) {
906 access_size_min = 1;
907 }
908
909 access_size_max = mr->ops->valid.max_access_size;
910 if (!mr->ops->valid.max_access_size) {
911 access_size_max = 4;
912 }
913
914 access_size = MAX(MIN(size, access_size_max), access_size_min);
915 for (i = 0; i < size; i += access_size) {
916 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
917 is_write)) {
918 return false;
919 }
093bc2cd 920 }
a014ed07 921
093bc2cd
AK
922 return true;
923}
924
a621f38d 925static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 926 hwaddr addr,
a621f38d 927 unsigned size)
093bc2cd 928{
164a4dcd 929 uint64_t data = 0;
093bc2cd 930
897fa7cf 931 if (!memory_region_access_valid(mr, addr, size, false)) {
b018ddf6 932 return unassigned_mem_read(mr, addr, size);
093bc2cd
AK
933 }
934
ce5d2f33
PB
935 if (mr->ops->read) {
936 access_with_adjusted_size(addr, &data, size,
937 mr->ops->impl.min_access_size,
938 mr->ops->impl.max_access_size,
939 memory_region_read_accessor, mr);
940 } else {
941 access_with_adjusted_size(addr, &data, size, 1, 4,
942 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
943 }
944
093bc2cd
AK
945 return data;
946}
947
a621f38d 948static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 949{
a621f38d
AK
950 if (memory_region_wrong_endianness(mr)) {
951 switch (size) {
952 case 1:
953 break;
954 case 2:
955 *data = bswap16(*data);
956 break;
957 case 4:
958 *data = bswap32(*data);
1470a0cd 959 break;
968a5627
PB
960 case 8:
961 *data = bswap64(*data);
962 break;
a621f38d
AK
963 default:
964 abort();
965 }
966 }
967}
968
969static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
a8170e5e 970 hwaddr addr,
a621f38d
AK
971 unsigned size)
972{
973 uint64_t ret;
974
975 ret = memory_region_dispatch_read1(mr, addr, size);
976 adjust_endianness(mr, &ret, size);
977 return ret;
978}
093bc2cd 979
a621f38d 980static void memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 981 hwaddr addr,
a621f38d
AK
982 uint64_t data,
983 unsigned size)
984{
897fa7cf 985 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6
PB
986 unassigned_mem_write(mr, addr, data, size);
987 return;
093bc2cd
AK
988 }
989
a621f38d
AK
990 adjust_endianness(mr, &data, size);
991
ce5d2f33
PB
992 if (mr->ops->write) {
993 access_with_adjusted_size(addr, &data, size,
994 mr->ops->impl.min_access_size,
995 mr->ops->impl.max_access_size,
996 memory_region_write_accessor, mr);
997 } else {
998 access_with_adjusted_size(addr, &data, size, 1, 4,
999 memory_region_oldmmio_write_accessor, mr);
74901c3b 1000 }
093bc2cd
AK
1001}
1002
093bc2cd
AK
1003void memory_region_init_io(MemoryRegion *mr,
1004 const MemoryRegionOps *ops,
1005 void *opaque,
1006 const char *name,
1007 uint64_t size)
1008{
1009 memory_region_init(mr, name, size);
1010 mr->ops = ops;
1011 mr->opaque = opaque;
14a3c10a 1012 mr->terminates = true;
97161e17 1013 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1014}
1015
1016void memory_region_init_ram(MemoryRegion *mr,
093bc2cd
AK
1017 const char *name,
1018 uint64_t size)
1019{
1020 memory_region_init(mr, name, size);
8ea9252a 1021 mr->ram = true;
14a3c10a 1022 mr->terminates = true;
545e92e0 1023 mr->destructor = memory_region_destructor_ram;
c5705a77 1024 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
1025}
1026
1027void memory_region_init_ram_ptr(MemoryRegion *mr,
093bc2cd
AK
1028 const char *name,
1029 uint64_t size,
1030 void *ptr)
1031{
1032 memory_region_init(mr, name, size);
8ea9252a 1033 mr->ram = true;
14a3c10a 1034 mr->terminates = true;
545e92e0 1035 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1036 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1037}
1038
1039void memory_region_init_alias(MemoryRegion *mr,
1040 const char *name,
1041 MemoryRegion *orig,
a8170e5e 1042 hwaddr offset,
093bc2cd
AK
1043 uint64_t size)
1044{
1045 memory_region_init(mr, name, size);
1046 mr->alias = orig;
1047 mr->alias_offset = offset;
1048}
1049
d0a9b5bc
AK
1050void memory_region_init_rom_device(MemoryRegion *mr,
1051 const MemoryRegionOps *ops,
75f5941c 1052 void *opaque,
d0a9b5bc
AK
1053 const char *name,
1054 uint64_t size)
1055{
1056 memory_region_init(mr, name, size);
7bc2b9cd 1057 mr->ops = ops;
75f5941c 1058 mr->opaque = opaque;
d0a9b5bc 1059 mr->terminates = true;
75c578dc 1060 mr->rom_device = true;
d0a9b5bc 1061 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1062 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1063}
1064
1660e72d
JK
1065void memory_region_init_reservation(MemoryRegion *mr,
1066 const char *name,
1067 uint64_t size)
1068{
d197063f 1069 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1070}
1071
093bc2cd
AK
1072void memory_region_destroy(MemoryRegion *mr)
1073{
1074 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1075 assert(memory_region_transaction_depth == 0);
545e92e0 1076 mr->destructor(mr);
093bc2cd 1077 memory_region_clear_coalescing(mr);
7267c094
AL
1078 g_free((char *)mr->name);
1079 g_free(mr->ioeventfds);
093bc2cd
AK
1080}
1081
1082uint64_t memory_region_size(MemoryRegion *mr)
1083{
08dafab4
AK
1084 if (int128_eq(mr->size, int128_2_64())) {
1085 return UINT64_MAX;
1086 }
1087 return int128_get64(mr->size);
093bc2cd
AK
1088}
1089
8991c79b
AK
1090const char *memory_region_name(MemoryRegion *mr)
1091{
1092 return mr->name;
1093}
1094
8ea9252a
AK
1095bool memory_region_is_ram(MemoryRegion *mr)
1096{
1097 return mr->ram;
1098}
1099
55043ba3
AK
1100bool memory_region_is_logging(MemoryRegion *mr)
1101{
1102 return mr->dirty_log_mask;
1103}
1104
ce7923da
AK
1105bool memory_region_is_rom(MemoryRegion *mr)
1106{
1107 return mr->ram && mr->readonly;
1108}
1109
093bc2cd
AK
1110void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1111{
5a583347
AK
1112 uint8_t mask = 1 << client;
1113
59023ef4 1114 memory_region_transaction_begin();
5a583347 1115 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1116 memory_region_update_pending |= mr->enabled;
59023ef4 1117 memory_region_transaction_commit();
093bc2cd
AK
1118}
1119
a8170e5e
AK
1120bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1121 hwaddr size, unsigned client)
093bc2cd 1122{
14a3c10a 1123 assert(mr->terminates);
cd7a45c9
BS
1124 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1125 1 << client);
093bc2cd
AK
1126}
1127
a8170e5e
AK
1128void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1129 hwaddr size)
093bc2cd 1130{
14a3c10a 1131 assert(mr->terminates);
fd4aa979 1132 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1133}
1134
6c279db8
JQ
1135bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1136 hwaddr size, unsigned client)
1137{
1138 bool ret;
1139 assert(mr->terminates);
1140 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1141 1 << client);
1142 if (ret) {
1143 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1144 mr->ram_addr + addr + size,
1145 1 << client);
1146 }
1147 return ret;
1148}
1149
1150
093bc2cd
AK
1151void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1152{
0d673e36 1153 AddressSpace *as;
5a583347
AK
1154 FlatRange *fr;
1155
0d673e36
AK
1156 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1157 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1158 if (fr->mr == mr) {
1159 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1160 }
5a583347
AK
1161 }
1162 }
093bc2cd
AK
1163}
1164
1165void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1166{
fb1cd6f9 1167 if (mr->readonly != readonly) {
59023ef4 1168 memory_region_transaction_begin();
fb1cd6f9 1169 mr->readonly = readonly;
22bde714 1170 memory_region_update_pending |= mr->enabled;
59023ef4 1171 memory_region_transaction_commit();
fb1cd6f9 1172 }
093bc2cd
AK
1173}
1174
5f9a5ea1 1175void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1176{
5f9a5ea1 1177 if (mr->romd_mode != romd_mode) {
59023ef4 1178 memory_region_transaction_begin();
5f9a5ea1 1179 mr->romd_mode = romd_mode;
22bde714 1180 memory_region_update_pending |= mr->enabled;
59023ef4 1181 memory_region_transaction_commit();
d0a9b5bc
AK
1182 }
1183}
1184
a8170e5e
AK
1185void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1186 hwaddr size, unsigned client)
093bc2cd 1187{
14a3c10a 1188 assert(mr->terminates);
5a583347
AK
1189 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1190 mr->ram_addr + addr + size,
1191 1 << client);
093bc2cd
AK
1192}
1193
1194void *memory_region_get_ram_ptr(MemoryRegion *mr)
1195{
1196 if (mr->alias) {
1197 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1198 }
1199
14a3c10a 1200 assert(mr->terminates);
093bc2cd 1201
021d26d1 1202 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1203}
1204
0d673e36 1205static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd
AK
1206{
1207 FlatRange *fr;
1208 CoalescedMemoryRange *cmr;
1209 AddrRange tmp;
95d2994a 1210 MemoryRegionSection section;
093bc2cd 1211
0d673e36 1212 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
093bc2cd 1213 if (fr->mr == mr) {
95d2994a 1214 section = (MemoryRegionSection) {
f6790af6 1215 .address_space = as,
95d2994a
AK
1216 .offset_within_address_space = int128_get64(fr->addr.start),
1217 .size = int128_get64(fr->addr.size),
1218 };
1219
1220 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1221 int128_get64(fr->addr.start),
1222 int128_get64(fr->addr.size));
093bc2cd
AK
1223 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1224 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1225 int128_sub(fr->addr.start,
1226 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1227 if (!addrrange_intersects(tmp, fr->addr)) {
1228 continue;
1229 }
1230 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1231 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1232 int128_get64(tmp.start),
1233 int128_get64(tmp.size));
093bc2cd
AK
1234 }
1235 }
1236 }
1237}
1238
0d673e36
AK
1239static void memory_region_update_coalesced_range(MemoryRegion *mr)
1240{
1241 AddressSpace *as;
1242
1243 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1244 memory_region_update_coalesced_range_as(mr, as);
1245 }
1246}
1247
093bc2cd
AK
1248void memory_region_set_coalescing(MemoryRegion *mr)
1249{
1250 memory_region_clear_coalescing(mr);
08dafab4 1251 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1252}
1253
1254void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1255 hwaddr offset,
093bc2cd
AK
1256 uint64_t size)
1257{
7267c094 1258 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1259
08dafab4 1260 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1261 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1262 memory_region_update_coalesced_range(mr);
d410515e 1263 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1264}
1265
1266void memory_region_clear_coalescing(MemoryRegion *mr)
1267{
1268 CoalescedMemoryRange *cmr;
1269
d410515e
JK
1270 qemu_flush_coalesced_mmio_buffer();
1271 mr->flush_coalesced_mmio = false;
1272
093bc2cd
AK
1273 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1274 cmr = QTAILQ_FIRST(&mr->coalesced);
1275 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1276 g_free(cmr);
093bc2cd
AK
1277 }
1278 memory_region_update_coalesced_range(mr);
1279}
1280
d410515e
JK
1281void memory_region_set_flush_coalesced(MemoryRegion *mr)
1282{
1283 mr->flush_coalesced_mmio = true;
1284}
1285
1286void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1287{
1288 qemu_flush_coalesced_mmio_buffer();
1289 if (QTAILQ_EMPTY(&mr->coalesced)) {
1290 mr->flush_coalesced_mmio = false;
1291 }
1292}
1293
3e9d69e7 1294void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1295 hwaddr addr,
3e9d69e7
AK
1296 unsigned size,
1297 bool match_data,
1298 uint64_t data,
753d5e14 1299 EventNotifier *e)
3e9d69e7
AK
1300{
1301 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1302 .addr.start = int128_make64(addr),
1303 .addr.size = int128_make64(size),
3e9d69e7
AK
1304 .match_data = match_data,
1305 .data = data,
753d5e14 1306 .e = e,
3e9d69e7
AK
1307 };
1308 unsigned i;
1309
28f362be 1310 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1311 memory_region_transaction_begin();
3e9d69e7
AK
1312 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1313 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1314 break;
1315 }
1316 }
1317 ++mr->ioeventfd_nb;
7267c094 1318 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1319 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1320 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1321 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1322 mr->ioeventfds[i] = mrfd;
22bde714 1323 memory_region_update_pending |= mr->enabled;
59023ef4 1324 memory_region_transaction_commit();
3e9d69e7
AK
1325}
1326
1327void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1328 hwaddr addr,
3e9d69e7
AK
1329 unsigned size,
1330 bool match_data,
1331 uint64_t data,
753d5e14 1332 EventNotifier *e)
3e9d69e7
AK
1333{
1334 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1335 .addr.start = int128_make64(addr),
1336 .addr.size = int128_make64(size),
3e9d69e7
AK
1337 .match_data = match_data,
1338 .data = data,
753d5e14 1339 .e = e,
3e9d69e7
AK
1340 };
1341 unsigned i;
1342
28f362be 1343 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1344 memory_region_transaction_begin();
3e9d69e7
AK
1345 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1346 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1347 break;
1348 }
1349 }
1350 assert(i != mr->ioeventfd_nb);
1351 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1352 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1353 --mr->ioeventfd_nb;
7267c094 1354 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1355 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1356 memory_region_update_pending |= mr->enabled;
59023ef4 1357 memory_region_transaction_commit();
3e9d69e7
AK
1358}
1359
093bc2cd 1360static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1361 hwaddr offset,
093bc2cd
AK
1362 MemoryRegion *subregion)
1363{
1364 MemoryRegion *other;
1365
59023ef4
JK
1366 memory_region_transaction_begin();
1367
093bc2cd
AK
1368 assert(!subregion->parent);
1369 subregion->parent = mr;
1370 subregion->addr = offset;
1371 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1372 if (subregion->may_overlap || other->may_overlap) {
1373 continue;
1374 }
2c7cfd65 1375 if (int128_ge(int128_make64(offset),
08dafab4
AK
1376 int128_add(int128_make64(other->addr), other->size))
1377 || int128_le(int128_add(int128_make64(offset), subregion->size),
1378 int128_make64(other->addr))) {
093bc2cd
AK
1379 continue;
1380 }
a5e1cbc8 1381#if 0
860329b2
MW
1382 printf("warning: subregion collision %llx/%llx (%s) "
1383 "vs %llx/%llx (%s)\n",
093bc2cd 1384 (unsigned long long)offset,
08dafab4 1385 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1386 subregion->name,
1387 (unsigned long long)other->addr,
08dafab4 1388 (unsigned long long)int128_get64(other->size),
860329b2 1389 other->name);
a5e1cbc8 1390#endif
093bc2cd
AK
1391 }
1392 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1393 if (subregion->priority >= other->priority) {
1394 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1395 goto done;
1396 }
1397 }
1398 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1399done:
22bde714 1400 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1401 memory_region_transaction_commit();
093bc2cd
AK
1402}
1403
1404
1405void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1406 hwaddr offset,
093bc2cd
AK
1407 MemoryRegion *subregion)
1408{
1409 subregion->may_overlap = false;
1410 subregion->priority = 0;
1411 memory_region_add_subregion_common(mr, offset, subregion);
1412}
1413
1414void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1415 hwaddr offset,
093bc2cd
AK
1416 MemoryRegion *subregion,
1417 unsigned priority)
1418{
1419 subregion->may_overlap = true;
1420 subregion->priority = priority;
1421 memory_region_add_subregion_common(mr, offset, subregion);
1422}
1423
1424void memory_region_del_subregion(MemoryRegion *mr,
1425 MemoryRegion *subregion)
1426{
59023ef4 1427 memory_region_transaction_begin();
093bc2cd
AK
1428 assert(subregion->parent == mr);
1429 subregion->parent = NULL;
1430 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
22bde714 1431 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1432 memory_region_transaction_commit();
6bba19ba
AK
1433}
1434
1435void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1436{
1437 if (enabled == mr->enabled) {
1438 return;
1439 }
59023ef4 1440 memory_region_transaction_begin();
6bba19ba 1441 mr->enabled = enabled;
22bde714 1442 memory_region_update_pending = true;
59023ef4 1443 memory_region_transaction_commit();
093bc2cd 1444}
1c0ffa58 1445
a8170e5e 1446void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1447{
1448 MemoryRegion *parent = mr->parent;
1449 unsigned priority = mr->priority;
1450 bool may_overlap = mr->may_overlap;
1451
1452 if (addr == mr->addr || !parent) {
1453 mr->addr = addr;
1454 return;
1455 }
1456
1457 memory_region_transaction_begin();
1458 memory_region_del_subregion(parent, mr);
1459 if (may_overlap) {
1460 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1461 } else {
1462 memory_region_add_subregion(parent, addr, mr);
1463 }
1464 memory_region_transaction_commit();
1465}
1466
a8170e5e 1467void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1468{
4703359e 1469 assert(mr->alias);
4703359e 1470
59023ef4 1471 if (offset == mr->alias_offset) {
4703359e
AK
1472 return;
1473 }
1474
59023ef4
JK
1475 memory_region_transaction_begin();
1476 mr->alias_offset = offset;
22bde714 1477 memory_region_update_pending |= mr->enabled;
59023ef4 1478 memory_region_transaction_commit();
4703359e
AK
1479}
1480
e34911c4
AK
1481ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1482{
e34911c4
AK
1483 return mr->ram_addr;
1484}
1485
e2177955
AK
1486static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1487{
1488 const AddrRange *addr = addr_;
1489 const FlatRange *fr = fr_;
1490
1491 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1492 return -1;
1493 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1494 return 1;
1495 }
1496 return 0;
1497}
1498
1499static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1500{
8786db7c 1501 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
e2177955
AK
1502 sizeof(FlatRange), cmp_flatrange_addr);
1503}
1504
73034e9e 1505MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1506 hwaddr addr, uint64_t size)
e2177955 1507{
e2177955 1508 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
73034e9e
PB
1509 MemoryRegion *root;
1510 AddressSpace *as;
1511 AddrRange range;
1512 FlatRange *fr;
1513
1514 addr += mr->addr;
1515 for (root = mr; root->parent; ) {
1516 root = root->parent;
1517 addr += root->addr;
1518 }
e2177955 1519
73034e9e
PB
1520 as = memory_region_to_address_space(root);
1521 range = addrrange_make(int128_make64(addr), int128_make64(size));
1522 fr = address_space_lookup(as, range);
e2177955
AK
1523 if (!fr) {
1524 return ret;
1525 }
1526
8786db7c 1527 while (fr > as->current_map->ranges
e2177955
AK
1528 && addrrange_intersects(fr[-1].addr, range)) {
1529 --fr;
1530 }
1531
1532 ret.mr = fr->mr;
73034e9e 1533 ret.address_space = as;
e2177955
AK
1534 range = addrrange_intersection(range, fr->addr);
1535 ret.offset_within_region = fr->offset_in_region;
1536 ret.offset_within_region += int128_get64(int128_sub(range.start,
1537 fr->addr.start));
1538 ret.size = int128_get64(range.size);
1539 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1540 ret.readonly = fr->readonly;
e2177955
AK
1541 return ret;
1542}
1543
1d671369 1544void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1545{
7664e80c
AK
1546 FlatRange *fr;
1547
8786db7c 1548 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
72e22d2f 1549 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c
AK
1550 }
1551}
1552
1553void memory_global_dirty_log_start(void)
1554{
7664e80c 1555 global_dirty_log = true;
7376e582 1556 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1557}
1558
1559void memory_global_dirty_log_stop(void)
1560{
7664e80c 1561 global_dirty_log = false;
7376e582 1562 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1563}
1564
1565static void listener_add_address_space(MemoryListener *listener,
1566 AddressSpace *as)
1567{
1568 FlatRange *fr;
1569
221b3a3f 1570 if (listener->address_space_filter
f6790af6 1571 && listener->address_space_filter != as) {
221b3a3f
JG
1572 return;
1573 }
1574
7664e80c 1575 if (global_dirty_log) {
975aefe0
AK
1576 if (listener->log_global_start) {
1577 listener->log_global_start(listener);
1578 }
7664e80c 1579 }
975aefe0 1580
8786db7c 1581 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
7664e80c
AK
1582 MemoryRegionSection section = {
1583 .mr = fr->mr,
f6790af6 1584 .address_space = as,
7664e80c
AK
1585 .offset_within_region = fr->offset_in_region,
1586 .size = int128_get64(fr->addr.size),
1587 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1588 .readonly = fr->readonly,
7664e80c 1589 };
975aefe0
AK
1590 if (listener->region_add) {
1591 listener->region_add(listener, &section);
1592 }
7664e80c
AK
1593 }
1594}
1595
f6790af6 1596void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1597{
72e22d2f 1598 MemoryListener *other = NULL;
0d673e36 1599 AddressSpace *as;
72e22d2f 1600
7376e582 1601 listener->address_space_filter = filter;
72e22d2f
AK
1602 if (QTAILQ_EMPTY(&memory_listeners)
1603 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1604 memory_listeners)->priority) {
1605 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1606 } else {
1607 QTAILQ_FOREACH(other, &memory_listeners, link) {
1608 if (listener->priority < other->priority) {
1609 break;
1610 }
1611 }
1612 QTAILQ_INSERT_BEFORE(other, listener, link);
1613 }
0d673e36
AK
1614
1615 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1616 listener_add_address_space(listener, as);
1617 }
7664e80c
AK
1618}
1619
1620void memory_listener_unregister(MemoryListener *listener)
1621{
72e22d2f 1622 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1623}
e2177955 1624
9ad2bbc1 1625void address_space_init(AddressSpace *as, MemoryRegion *root)
1c0ffa58 1626{
59023ef4 1627 memory_region_transaction_begin();
8786db7c
AK
1628 as->root = root;
1629 as->current_map = g_new(FlatView, 1);
1630 flatview_init(as->current_map);
4c19eb72
AK
1631 as->ioeventfd_nb = 0;
1632 as->ioeventfds = NULL;
0d673e36
AK
1633 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1634 as->name = NULL;
ac1970fb 1635 address_space_init_dispatch(as);
f43793c7
PB
1636 memory_region_update_pending |= root->enabled;
1637 memory_region_transaction_commit();
1c0ffa58 1638}
658b2224 1639
83f3c251
AK
1640void address_space_destroy(AddressSpace *as)
1641{
1642 /* Flush out anything from MemoryListeners listening in on this */
1643 memory_region_transaction_begin();
1644 as->root = NULL;
1645 memory_region_transaction_commit();
1646 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1647 address_space_destroy_dispatch(as);
1648 flatview_destroy(as->current_map);
1649 g_free(as->current_map);
4c19eb72 1650 g_free(as->ioeventfds);
83f3c251
AK
1651}
1652
a8170e5e 1653uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
acbbec5d 1654{
37ec01d4 1655 return memory_region_dispatch_read(mr, addr, size);
acbbec5d
AK
1656}
1657
a8170e5e 1658void io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1659 uint64_t val, unsigned size)
1660{
37ec01d4 1661 memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1662}
1663
314e2987
BS
1664typedef struct MemoryRegionList MemoryRegionList;
1665
1666struct MemoryRegionList {
1667 const MemoryRegion *mr;
1668 bool printed;
1669 QTAILQ_ENTRY(MemoryRegionList) queue;
1670};
1671
1672typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1673
1674static void mtree_print_mr(fprintf_function mon_printf, void *f,
1675 const MemoryRegion *mr, unsigned int level,
a8170e5e 1676 hwaddr base,
9479c57a 1677 MemoryRegionListHead *alias_print_queue)
314e2987 1678{
9479c57a
JK
1679 MemoryRegionList *new_ml, *ml, *next_ml;
1680 MemoryRegionListHead submr_print_queue;
314e2987
BS
1681 const MemoryRegion *submr;
1682 unsigned int i;
1683
7ea692b2 1684 if (!mr || !mr->enabled) {
314e2987
BS
1685 return;
1686 }
1687
1688 for (i = 0; i < level; i++) {
1689 mon_printf(f, " ");
1690 }
1691
1692 if (mr->alias) {
1693 MemoryRegionList *ml;
1694 bool found = false;
1695
1696 /* check if the alias is already in the queue */
9479c57a 1697 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1698 if (ml->mr == mr->alias && !ml->printed) {
1699 found = true;
1700 }
1701 }
1702
1703 if (!found) {
1704 ml = g_new(MemoryRegionList, 1);
1705 ml->mr = mr->alias;
1706 ml->printed = false;
9479c57a 1707 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1708 }
4896d74b
JK
1709 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1710 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1711 "-" TARGET_FMT_plx "\n",
314e2987 1712 base + mr->addr,
08dafab4 1713 base + mr->addr
a8170e5e 1714 + (hwaddr)int128_get64(mr->size) - 1,
4b474ba7 1715 mr->priority,
5f9a5ea1
JK
1716 mr->romd_mode ? 'R' : '-',
1717 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1718 : '-',
314e2987
BS
1719 mr->name,
1720 mr->alias->name,
1721 mr->alias_offset,
08dafab4 1722 mr->alias_offset
a8170e5e 1723 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1724 } else {
4896d74b
JK
1725 mon_printf(f,
1726 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1727 base + mr->addr,
08dafab4 1728 base + mr->addr
a8170e5e 1729 + (hwaddr)int128_get64(mr->size) - 1,
4b474ba7 1730 mr->priority,
5f9a5ea1
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1731 mr->romd_mode ? 'R' : '-',
1732 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1733 : '-',
314e2987
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1734 mr->name);
1735 }
9479c57a
JK
1736
1737 QTAILQ_INIT(&submr_print_queue);
1738
314e2987 1739 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1740 new_ml = g_new(MemoryRegionList, 1);
1741 new_ml->mr = submr;
1742 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1743 if (new_ml->mr->addr < ml->mr->addr ||
1744 (new_ml->mr->addr == ml->mr->addr &&
1745 new_ml->mr->priority > ml->mr->priority)) {
1746 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1747 new_ml = NULL;
1748 break;
1749 }
1750 }
1751 if (new_ml) {
1752 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1753 }
1754 }
1755
1756 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1757 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1758 alias_print_queue);
1759 }
1760
88365e47 1761 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1762 g_free(ml);
314e2987
BS
1763 }
1764}
1765
1766void mtree_info(fprintf_function mon_printf, void *f)
1767{
1768 MemoryRegionListHead ml_head;
1769 MemoryRegionList *ml, *ml2;
0d673e36 1770 AddressSpace *as;
314e2987
BS
1771
1772 QTAILQ_INIT(&ml_head);
1773
0d673e36
AK
1774 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1775 if (!as->name) {
1776 continue;
1777 }
1778 mon_printf(f, "%s\n", as->name);
1779 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1780 }
1781
1782 mon_printf(f, "aliases\n");
314e2987
BS
1783 /* print aliased regions */
1784 QTAILQ_FOREACH(ml, &ml_head, queue) {
1785 if (!ml->printed) {
1786 mon_printf(f, "%s\n", ml->mr->name);
1787 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1788 }
1789 }
1790
1791 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1792 g_free(ml);
314e2987 1793 }
314e2987 1794}