[qemu.git] / target-i386 / exec.h

/*
 *  i386 execution defines 
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include "dyngen-exec.h"

/* at least 4 register variables are defines */
register struct CPUX86State *env asm(AREG0);
register uint32_t T0 asm(AREG1);
register uint32_t T1 asm(AREG2);
register uint32_t T2 asm(AREG3);

#define A0 T2

/* if more registers are available, we define some registers too */
#ifdef AREG4
register uint32_t EAX asm(AREG4);
#define reg_EAX
#endif

#ifdef AREG5
register uint32_t ESP asm(AREG5);
#define reg_ESP
#endif

#ifdef AREG6
register uint32_t EBP asm(AREG6);
#define reg_EBP
#endif

#ifdef AREG7
register uint32_t ECX asm(AREG7);
#define reg_ECX
#endif

#ifdef AREG8
register uint32_t EDX asm(AREG8);
#define reg_EDX
#endif

#ifdef AREG9
register uint32_t EBX asm(AREG9);
#define reg_EBX
#endif

#ifdef AREG10
register uint32_t ESI asm(AREG10);
#define reg_ESI
#endif

#ifdef AREG11
register uint32_t EDI asm(AREG11);
#define reg_EDI
#endif

extern FILE *logfile;
extern int loglevel;

#ifndef reg_EAX
#define EAX (env->regs[R_EAX])
#endif
#ifndef reg_ECX
#define ECX (env->regs[R_ECX])
#endif
#ifndef reg_EDX
#define EDX (env->regs[R_EDX])
#endif
#ifndef reg_EBX
#define EBX (env->regs[R_EBX])
#endif
#ifndef reg_ESP
#define ESP (env->regs[R_ESP])
#endif
#ifndef reg_EBP
#define EBP (env->regs[R_EBP])
#endif
#ifndef reg_ESI
#define ESI (env->regs[R_ESI])
#endif
#ifndef reg_EDI
#define EDI (env->regs[R_EDI])
#endif
#define EIP  (env->eip)
#define DF  (env->df)

#define CC_SRC (env->cc_src)
#define CC_DST (env->cc_dst)
#define CC_OP  (env->cc_op)

/* float macros */
#define FT0    (env->ft0)
#define ST0    (env->fpregs[env->fpstt])
#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7])
#define ST1    ST(1)

#ifdef USE_FP_CONVERT
#define FP_CONVERT  (env->fp_convert)
#endif

#include "cpu.h"
#include "exec-all.h"

typedef struct CCTable {
    int (*compute_all)(void); /* return all the flags */
    int (*compute_c)(void);  /* return the C flag */
} CCTable;

extern CCTable cc_table[];

void load_seg(int seg_reg, int selector, unsigned cur_eip);
void helper_ljmp_protected_T0_T1(void);
void helper_lcall_real_T0_T1(int shift, int next_eip);
void helper_lcall_protected_T0_T1(int shift, int next_eip);
void helper_iret_real(int shift);
void helper_iret_protected(int shift);
void helper_lret_protected(int shift, int addend);
void helper_lldt_T0(void);
void helper_ltr_T0(void);
void helper_movl_crN_T0(int reg);
void helper_movl_drN_T0(int reg);
void helper_invlpg(unsigned int addr);
void cpu_x86_update_cr0(CPUX86State *env);
void cpu_x86_update_cr3(CPUX86State *env);
void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr, 
                             int is_write, int is_user, int is_softmmu);
void tlb_fill(unsigned long addr, int is_write, int is_user, 
              void *retaddr);
void __hidden cpu_lock(void);
void __hidden cpu_unlock(void);
void do_interrupt(int intno, int is_int, int error_code, 
                  unsigned int next_eip, int is_hw);
void do_interrupt_user(int intno, int is_int, int error_code, 
                       unsigned int next_eip);
void raise_interrupt(int intno, int is_int, int error_code, 
                     unsigned int next_eip);
void raise_exception_err(int exception_index, int error_code);
void raise_exception(int exception_index);
void __hidden cpu_loop_exit(void);
void helper_fsave(uint8_t *ptr, int data32);
void helper_frstor(uint8_t *ptr, int data32);

void OPPROTO op_movl_eflags_T0(void);
void OPPROTO op_movl_T0_eflags(void);
void raise_interrupt(int intno, int is_int, int error_code, 
                     unsigned int next_eip);
void raise_exception_err(int exception_index, int error_code);
void raise_exception(int exception_index);
void helper_divl_EAX_T0(uint32_t eip);
void helper_idivl_EAX_T0(uint32_t eip);
void helper_cmpxchg8b(void);
void helper_cpuid(void);
void helper_rdtsc(void);
void helper_rdmsr(void);
void helper_wrmsr(void);
void helper_lsl(void);
void helper_lar(void);

void check_iob_T0(void);
void check_iow_T0(void);
void check_iol_T0(void);
void check_iob_DX(void);
void check_iow_DX(void);
void check_iol_DX(void);

/* XXX: move that to a generic header */
#if !defined(CONFIG_USER_ONLY)

#define ldul_user ldl_user
#define ldul_kernel ldl_kernel

#define ACCESS_TYPE 0
#define MEMSUFFIX _kernel
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

#define ACCESS_TYPE 1
#define MEMSUFFIX _user
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

/* these access are slower, they must be as rare as possible */
#define ACCESS_TYPE 2
#define MEMSUFFIX _data
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

#define ldub(p) ldub_data(p)
#define ldsb(p) ldsb_data(p)
#define lduw(p) lduw_data(p)
#define ldsw(p) ldsw_data(p)
#define ldl(p) ldl_data(p)
#define ldq(p) ldq_data(p)

#define stb(p, v) stb_data(p, v)
#define stw(p, v) stw_data(p, v)
#define stl(p, v) stl_data(p, v)
#define stq(p, v) stq_data(p, v)

static inline double ldfq(void *ptr)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.i = ldq(ptr);
    return u.d;
}

static inline void stfq(void *ptr, double v)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.d = v;
    stq(ptr, u.i);
}

static inline float ldfl(void *ptr)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.i = ldl(ptr);
    return u.f;
}

static inline void stfl(void *ptr, float v)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.f = v;
    stl(ptr, u.i);
}

#endif /* !defined(CONFIG_USER_ONLY) */

#ifdef USE_X86LDOUBLE
/* use long double functions */
#define lrint lrintl
#define llrint llrintl
#define fabs fabsl
#define sin sinl
#define cos cosl
#define sqrt sqrtl
#define pow powl
#define log logl
#define tan tanl
#define atan2 atan2l
#define floor floorl
#define ceil ceill
#define rint rintl
#endif

extern int lrint(CPU86_LDouble x);
extern int64_t llrint(CPU86_LDouble x);
extern CPU86_LDouble fabs(CPU86_LDouble x);
extern CPU86_LDouble sin(CPU86_LDouble x);
extern CPU86_LDouble cos(CPU86_LDouble x);
extern CPU86_LDouble sqrt(CPU86_LDouble x);
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
extern CPU86_LDouble log(CPU86_LDouble x);
extern CPU86_LDouble tan(CPU86_LDouble x);
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
extern CPU86_LDouble floor(CPU86_LDouble x);
extern CPU86_LDouble ceil(CPU86_LDouble x);
extern CPU86_LDouble rint(CPU86_LDouble x);

#define RC_MASK         0xc00
#define RC_NEAR		0x000
#define RC_DOWN		0x400
#define RC_UP		0x800
#define RC_CHOP		0xc00

#define MAXTAN 9223372036854775808.0

#ifdef __arm__
/* we have no way to do correct rounding - a FPU emulator is needed */
#define FE_DOWNWARD   FE_TONEAREST
#define FE_UPWARD     FE_TONEAREST
#define FE_TOWARDZERO FE_TONEAREST
#endif

#ifdef USE_X86LDOUBLE

/* only for x86 */
typedef union {
    long double d;
    struct {
        unsigned long long lower;
        unsigned short upper;
    } l;
} CPU86_LDoubleU;

/* the following deal with x86 long double-precision numbers */
#define MAXEXPD 0x7fff
#define EXPBIAS 16383
#define EXPD(fp)	(fp.l.upper & 0x7fff)
#define SIGND(fp)	((fp.l.upper) & 0x8000)
#define MANTD(fp)       (fp.l.lower)
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS

#else

/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
typedef union {
    double d;
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
    struct {
        uint32_t lower;
        int32_t upper;
    } l;
#else
    struct {
        int32_t upper;
        uint32_t lower;
    } l;
#endif
#ifndef __arm__
    int64_t ll;
#endif
} CPU86_LDoubleU;

/* the following deal with IEEE double-precision numbers */
#define MAXEXPD 0x7ff
#define EXPBIAS 1023
#define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)
#define SIGND(fp)	((fp.l.upper) & 0x80000000)
#ifdef __arm__
#define MANTD(fp)	(fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
#else
#define MANTD(fp)	(fp.ll & ((1LL << 52) - 1))
#endif
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
#endif

static inline void fpush(void)
{
    env->fpstt = (env->fpstt - 1) & 7;
    env->fptags[env->fpstt] = 0; /* validate stack entry */
}

static inline void fpop(void)
{
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
    env->fpstt = (env->fpstt + 1) & 7;
}

#ifndef USE_X86LDOUBLE
static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
{
    CPU86_LDoubleU temp;
    int upper, e;
    uint64_t ll;

    /* mantissa */
    upper = lduw(ptr + 8);
    /* XXX: handle overflow ? */
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
    e |= (upper >> 4) & 0x800; /* sign */
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
#ifdef __arm__
    temp.l.upper = (e << 20) | (ll >> 32);
    temp.l.lower = ll;
#else
    temp.ll = ll | ((uint64_t)e << 52);
#endif
    return temp.d;
}

static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
{
    CPU86_LDoubleU temp;
    int e;

    temp.d = f;
    /* mantissa */
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
    /* exponent + sign */
    e = EXPD(temp) - EXPBIAS + 16383;
    e |= SIGND(temp) >> 16;
    stw(ptr + 8, e);
}
#else

/* XXX: same endianness assumed */

#ifdef CONFIG_USER_ONLY

static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
{
    return *(CPU86_LDouble *)ptr;
}

static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
{
    *(CPU86_LDouble *)ptr = f;
}

#else

/* we use memory access macros */

static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
{
    CPU86_LDoubleU temp;

    temp.l.lower = ldq(ptr);
    temp.l.upper = lduw(ptr + 8);
    return temp.d;
}

static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
{
    CPU86_LDoubleU temp;
    
    temp.d = f;
    stq(ptr, temp.l.lower);
    stw(ptr + 8, temp.l.upper);
}

#endif /* !CONFIG_USER_ONLY */

#endif /* USE_X86LDOUBLE */

const CPU86_LDouble f15rk[7];

void helper_fldt_ST0_A0(void);
void helper_fstt_ST0_A0(void);
void helper_fbld_ST0_A0(void);
void helper_fbst_ST0_A0(void);
void helper_f2xm1(void);
void helper_fyl2x(void);
void helper_fptan(void);
void helper_fpatan(void);
void helper_fxtract(void);
void helper_fprem1(void);
void helper_fprem(void);
void helper_fyl2xp1(void);
void helper_fsqrt(void);
void helper_fsincos(void);
void helper_frndint(void);
void helper_fscale(void);
void helper_fsin(void);
void helper_fcos(void);
void helper_fxam_ST0(void);
void helper_fstenv(uint8_t *ptr, int data32);
void helper_fldenv(uint8_t *ptr, int data32);
void helper_fsave(uint8_t *ptr, int data32);
void helper_frstor(uint8_t *ptr, int data32);

const uint8_t parity_table[256];
const uint8_t rclw_table[32];
const uint8_t rclb_table[32];

static inline uint32_t compute_eflags(void)
{
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
}

#define FL_UPDATE_MASK32 (TF_MASK | AC_MASK | ID_MASK)

#define FL_UPDATE_CPL0_MASK (TF_MASK | IF_MASK | IOPL_MASK | NT_MASK | \
                             RF_MASK | AC_MASK | ID_MASK)

/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
static inline void load_eflags(int eflags, int update_mask)
{
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
    DF = 1 - (2 * ((eflags >> 10) & 1));
    env->eflags = (env->eflags & ~update_mask) | 
        (eflags & update_mask);
}
Commit	Line	Data
2c0262af FB	1	/*
	2	* i386 execution defines
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#include "dyngen-exec.h"
	21
	22	/* at least 4 register variables are defines */
	23	register struct CPUX86State *env asm(AREG0);
	24	register uint32_t T0 asm(AREG1);
	25	register uint32_t T1 asm(AREG2);
	26	register uint32_t T2 asm(AREG3);
	27
	28	#define A0 T2
	29
	30	/* if more registers are available, we define some registers too */
	31	#ifdef AREG4
	32	register uint32_t EAX asm(AREG4);
	33	#define reg_EAX
	34	#endif
	35
	36	#ifdef AREG5
	37	register uint32_t ESP asm(AREG5);
	38	#define reg_ESP
	39	#endif
	40
	41	#ifdef AREG6
	42	register uint32_t EBP asm(AREG6);
	43	#define reg_EBP
	44	#endif
	45
	46	#ifdef AREG7
	47	register uint32_t ECX asm(AREG7);
	48	#define reg_ECX
	49	#endif
	50
	51	#ifdef AREG8
	52	register uint32_t EDX asm(AREG8);
	53	#define reg_EDX
	54	#endif
	55
	56	#ifdef AREG9
	57	register uint32_t EBX asm(AREG9);
	58	#define reg_EBX
	59	#endif
	60
	61	#ifdef AREG10
	62	register uint32_t ESI asm(AREG10);
	63	#define reg_ESI
	64	#endif
65
66	#ifdef AREG11
67	register uint32_t EDI asm(AREG11);
68	#define reg_EDI
69	#endif
70
71	extern FILE *logfile;
72	extern int loglevel;
73
74	#ifndef reg_EAX
75	#define EAX (env->regs[R_EAX])
76	#endif
77	#ifndef reg_ECX
78	#define ECX (env->regs[R_ECX])
79	#endif
80	#ifndef reg_EDX
81	#define EDX (env->regs[R_EDX])
82	#endif
83	#ifndef reg_EBX
84	#define EBX (env->regs[R_EBX])
85	#endif
86	#ifndef reg_ESP
87	#define ESP (env->regs[R_ESP])
88	#endif
89	#ifndef reg_EBP
90	#define EBP (env->regs[R_EBP])
91	#endif
92	#ifndef reg_ESI
93	#define ESI (env->regs[R_ESI])
94	#endif
95	#ifndef reg_EDI
96	#define EDI (env->regs[R_EDI])
97	#endif
98	#define EIP (env->eip)
99	#define DF (env->df)
100
101	#define CC_SRC (env->cc_src)
102	#define CC_DST (env->cc_dst)
103	#define CC_OP (env->cc_op)
104
105	/* float macros */
106	#define FT0 (env->ft0)
107	#define ST0 (env->fpregs[env->fpstt])
108	#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7])
109	#define ST1 ST(1)
110
111	#ifdef USE_FP_CONVERT
112	#define FP_CONVERT (env->fp_convert)
113	#endif
114
115	#include "cpu.h"
116	#include "exec-all.h"
117
118	typedef struct CCTable {
119	int (compute_all)(void); / return all the flags */
120	int (compute_c)(void); / return the C flag */
121	} CCTable;
122
123	extern CCTable cc_table[];
124
125	void load_seg(int seg_reg, int selector, unsigned cur_eip);
126	void helper_ljmp_protected_T0_T1(void);
127	void helper_lcall_real_T0_T1(int shift, int next_eip);
128	void helper_lcall_protected_T0_T1(int shift, int next_eip);
129	void helper_iret_real(int shift);
130	void helper_iret_protected(int shift);
131	void helper_lret_protected(int shift, int addend);
132	void helper_lldt_T0(void);
133	void helper_ltr_T0(void);
134	void helper_movl_crN_T0(int reg);
135	void helper_movl_drN_T0(int reg);
136	void helper_invlpg(unsigned int addr);
137	void cpu_x86_update_cr0(CPUX86State *env);
138	void cpu_x86_update_cr3(CPUX86State *env);
139	void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
61382a50 FB	140	int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr,
	141	int is_write, int is_user, int is_softmmu);
	142	void tlb_fill(unsigned long addr, int is_write, int is_user,
	143	void *retaddr);
2c0262af FB	144	void __hidden cpu_lock(void);
	145	void __hidden cpu_unlock(void);
	146	void do_interrupt(int intno, int is_int, int error_code,
	147	unsigned int next_eip, int is_hw);
	148	void do_interrupt_user(int intno, int is_int, int error_code,
	149	unsigned int next_eip);
	150	void raise_interrupt(int intno, int is_int, int error_code,
	151	unsigned int next_eip);
	152	void raise_exception_err(int exception_index, int error_code);
	153	void raise_exception(int exception_index);
	154	void __hidden cpu_loop_exit(void);
	155	void helper_fsave(uint8_t *ptr, int data32);
	156	void helper_frstor(uint8_t *ptr, int data32);
	157
	158	void OPPROTO op_movl_eflags_T0(void);
	159	void OPPROTO op_movl_T0_eflags(void);
	160	void raise_interrupt(int intno, int is_int, int error_code,
	161	unsigned int next_eip);
	162	void raise_exception_err(int exception_index, int error_code);
	163	void raise_exception(int exception_index);
	164	void helper_divl_EAX_T0(uint32_t eip);
	165	void helper_idivl_EAX_T0(uint32_t eip);
	166	void helper_cmpxchg8b(void);
	167	void helper_cpuid(void);
	168	void helper_rdtsc(void);
	169	void helper_rdmsr(void);
	170	void helper_wrmsr(void);
	171	void helper_lsl(void);
	172	void helper_lar(void);
	173
3e25f951 FB	174	void check_iob_T0(void);
	175	void check_iow_T0(void);
	176	void check_iol_T0(void);
	177	void check_iob_DX(void);
	178	void check_iow_DX(void);
	179	void check_iol_DX(void);
	180
9951bf39 FB	181	/* XXX: move that to a generic header */
	182	#if !defined(CONFIG_USER_ONLY)
	183
	184	#define ldul_user ldl_user
	185	#define ldul_kernel ldl_kernel
	186
	187	#define ACCESS_TYPE 0
	188	#define MEMSUFFIX _kernel
	189	#define DATA_SIZE 1
	190	#include "softmmu_header.h"
	191
	192	#define DATA_SIZE 2
	193	#include "softmmu_header.h"
	194
	195	#define DATA_SIZE 4
	196	#include "softmmu_header.h"
	197
	198	#define DATA_SIZE 8
	199	#include "softmmu_header.h"
	200	#undef ACCESS_TYPE
	201	#undef MEMSUFFIX
	202
	203	#define ACCESS_TYPE 1
	204	#define MEMSUFFIX _user
	205	#define DATA_SIZE 1
	206	#include "softmmu_header.h"
	207
	208	#define DATA_SIZE 2
	209	#include "softmmu_header.h"
	210
	211	#define DATA_SIZE 4
	212	#include "softmmu_header.h"
	213
	214	#define DATA_SIZE 8
	215	#include "softmmu_header.h"
	216	#undef ACCESS_TYPE
	217	#undef MEMSUFFIX
	218
	219	/* these access are slower, they must be as rare as possible */
	220	#define ACCESS_TYPE 2
	221	#define MEMSUFFIX _data
	222	#define DATA_SIZE 1
	223	#include "softmmu_header.h"
	224
	225	#define DATA_SIZE 2
	226	#include "softmmu_header.h"
	227
	228	#define DATA_SIZE 4
	229	#include "softmmu_header.h"
	230
	231	#define DATA_SIZE 8
	232	#include "softmmu_header.h"
	233	#undef ACCESS_TYPE
	234	#undef MEMSUFFIX
	235
	236	#define ldub(p) ldub_data(p)
	237	#define ldsb(p) ldsb_data(p)
	238	#define lduw(p) lduw_data(p)
	239	#define ldsw(p) ldsw_data(p)
	240	#define ldl(p) ldl_data(p)
	241	#define ldq(p) ldq_data(p)
	242
	243	#define stb(p, v) stb_data(p, v)
	244	#define stw(p, v) stw_data(p, v)
245	#define stl(p, v) stl_data(p, v)
246	#define stq(p, v) stq_data(p, v)
247
248	static inline double ldfq(void *ptr)
249	{
250	union {
251	double d;
252	uint64_t i;
253	} u;
254	u.i = ldq(ptr);
255	return u.d;
256	}
257
258	static inline void stfq(void *ptr, double v)
259	{
260	union {
261	double d;
262	uint64_t i;
263	} u;
264	u.d = v;
265	stq(ptr, u.i);
266	}
267
268	static inline float ldfl(void *ptr)
269	{
270	union {
271	float f;
272	uint32_t i;
273	} u;
274	u.i = ldl(ptr);
275	return u.f;
276	}
277
278	static inline void stfl(void *ptr, float v)
279	{
280	union {
281	float f;
282	uint32_t i;
283	} u;
284	u.f = v;
285	stl(ptr, u.i);
286	}
287
288	#endif /* !defined(CONFIG_USER_ONLY) */
289
2c0262af FB	290	#ifdef USE_X86LDOUBLE
	291	/* use long double functions */
	292	#define lrint lrintl
	293	#define llrint llrintl
	294	#define fabs fabsl
	295	#define sin sinl
	296	#define cos cosl
	297	#define sqrt sqrtl
	298	#define pow powl
	299	#define log logl
	300	#define tan tanl
	301	#define atan2 atan2l
	302	#define floor floorl
	303	#define ceil ceill
	304	#define rint rintl
	305	#endif
	306
	307	extern int lrint(CPU86_LDouble x);
	308	extern int64_t llrint(CPU86_LDouble x);
	309	extern CPU86_LDouble fabs(CPU86_LDouble x);
	310	extern CPU86_LDouble sin(CPU86_LDouble x);
	311	extern CPU86_LDouble cos(CPU86_LDouble x);
	312	extern CPU86_LDouble sqrt(CPU86_LDouble x);
	313	extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
	314	extern CPU86_LDouble log(CPU86_LDouble x);
	315	extern CPU86_LDouble tan(CPU86_LDouble x);
	316	extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
	317	extern CPU86_LDouble floor(CPU86_LDouble x);
	318	extern CPU86_LDouble ceil(CPU86_LDouble x);
	319	extern CPU86_LDouble rint(CPU86_LDouble x);
	320
	321	#define RC_MASK 0xc00
	322	#define RC_NEAR 0x000
	323	#define RC_DOWN 0x400
	324	#define RC_UP 0x800
	325	#define RC_CHOP 0xc00
	326
	327	#define MAXTAN 9223372036854775808.0
	328
	329	#ifdef __arm__
	330	/* we have no way to do correct rounding - a FPU emulator is needed */
	331	#define FE_DOWNWARD FE_TONEAREST
	332	#define FE_UPWARD FE_TONEAREST
	333	#define FE_TOWARDZERO FE_TONEAREST
	334	#endif
	335
	336	#ifdef USE_X86LDOUBLE
	337
	338	/* only for x86 */
	339	typedef union {
	340	long double d;
	341	struct {
	342	unsigned long long lower;
	343	unsigned short upper;
	344	} l;
	345	} CPU86_LDoubleU;
	346
	347	/* the following deal with x86 long double-precision numbers */
	348	#define MAXEXPD 0x7fff
	349	#define EXPBIAS 16383
	350	#define EXPD(fp) (fp.l.upper & 0x7fff)
	351	#define SIGND(fp) ((fp.l.upper) & 0x8000)
	352	#define MANTD(fp) (fp.l.lower)
	353	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) \| EXPBIAS
354
355	#else
356
357	/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
358	typedef union {
359	double d;
360	#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
361	struct {
362	uint32_t lower;
363	int32_t upper;
364	} l;
365	#else
366	struct {
367	int32_t upper;
368	uint32_t lower;
369	} l;
370	#endif
371	#ifndef __arm__
372	int64_t ll;
373	#endif
374	} CPU86_LDoubleU;
375
376	/* the following deal with IEEE double-precision numbers */
377	#define MAXEXPD 0x7ff
378	#define EXPBIAS 1023
379	#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
380	#define SIGND(fp) ((fp.l.upper) & 0x80000000)
381	#ifdef __arm__
382	#define MANTD(fp) (fp.l.lower \| ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
383	#else
384	#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
385	#endif
386	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) \| (EXPBIAS << 20)
387	#endif
388
389	static inline void fpush(void)
390	{
391	env->fpstt = (env->fpstt - 1) & 7;
392	env->fptags[env->fpstt] = 0; /* validate stack entry */
393	}
394
395	static inline void fpop(void)
396	{
397	env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
398	env->fpstt = (env->fpstt + 1) & 7;
399	}
400
401	#ifndef USE_X86LDOUBLE
402	static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
403	{
404	CPU86_LDoubleU temp;
405	int upper, e;
406	uint64_t ll;
407
408	/* mantissa */
409	upper = lduw(ptr + 8);
410	/* XXX: handle overflow ? */
411	e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
412	e \|= (upper >> 4) & 0x800; /* sign */
413	ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
414	#ifdef __arm__
415	temp.l.upper = (e << 20) \| (ll >> 32);
416	temp.l.lower = ll;
417	#else
418	temp.ll = ll \| ((uint64_t)e << 52);
419	#endif
420	return temp.d;
421	}
422
423	static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
424	{
425	CPU86_LDoubleU temp;
426	int e;
427
428	temp.d = f;
429	/* mantissa */
430	stq(ptr, (MANTD(temp) << 11) \| (1LL << 63));
431	/* exponent + sign */
432	e = EXPD(temp) - EXPBIAS + 16383;
433	e \|= SIGND(temp) >> 16;
434	stw(ptr + 8, e);
435	}
9951bf39 FB	436	#else
	437
	438	/* XXX: same endianness assumed */
	439
	440	#ifdef CONFIG_USER_ONLY
	441
	442	static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
	443	{
	444	return (CPU86_LDouble )ptr;
	445	}
	446
	447	static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
	448	{
	449	(CPU86_LDouble )ptr = f;
	450	}
	451
	452	#else
	453
	454	/* we use memory access macros */
	455
	456	static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
	457	{
	458	CPU86_LDoubleU temp;
	459
	460	temp.l.lower = ldq(ptr);
	461	temp.l.upper = lduw(ptr + 8);
	462	return temp.d;
	463	}
	464
	465	static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
	466	{
	467	CPU86_LDoubleU temp;
	468
	469	temp.d = f;
	470	stq(ptr, temp.l.lower);
	471	stw(ptr + 8, temp.l.upper);
	472	}
	473
	474	#endif /* !CONFIG_USER_ONLY */
	475
	476	#endif /* USE_X86LDOUBLE */
2c0262af FB	477
	478	const CPU86_LDouble f15rk[7];
	479
	480	void helper_fldt_ST0_A0(void);
	481	void helper_fstt_ST0_A0(void);
	482	void helper_fbld_ST0_A0(void);
	483	void helper_fbst_ST0_A0(void);
	484	void helper_f2xm1(void);
	485	void helper_fyl2x(void);
	486	void helper_fptan(void);
	487	void helper_fpatan(void);
	488	void helper_fxtract(void);
	489	void helper_fprem1(void);
	490	void helper_fprem(void);
	491	void helper_fyl2xp1(void);
	492	void helper_fsqrt(void);
	493	void helper_fsincos(void);
	494	void helper_frndint(void);
	495	void helper_fscale(void);
	496	void helper_fsin(void);
	497	void helper_fcos(void);
	498	void helper_fxam_ST0(void);
	499	void helper_fstenv(uint8_t *ptr, int data32);
	500	void helper_fldenv(uint8_t *ptr, int data32);
	501	void helper_fsave(uint8_t *ptr, int data32);
	502	void helper_frstor(uint8_t *ptr, int data32);
	503
	504	const uint8_t parity_table[256];
	505	const uint8_t rclw_table[32];
	506	const uint8_t rclb_table[32];
	507
	508	static inline uint32_t compute_eflags(void)
	509	{
	510	return env->eflags \| cc_table[CC_OP].compute_all() \| (DF & DF_MASK);
	511	}
	512
	513	#define FL_UPDATE_MASK32 (TF_MASK \| AC_MASK \| ID_MASK)
	514
	515	#define FL_UPDATE_CPL0_MASK (TF_MASK \| IF_MASK \| IOPL_MASK \| NT_MASK \| \
	516	RF_MASK \| AC_MASK \| ID_MASK)
	517
	518	/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
	519	static inline void load_eflags(int eflags, int update_mask)
	520	{
	521	CC_SRC = eflags & (CC_O \| CC_S \| CC_Z \| CC_A \| CC_P \| CC_C);
	522	DF = 1 - (2 * ((eflags >> 10) & 1));
	523	env->eflags = (env->eflags & ~update_mask) \|
	524	(eflags & update_mask);
	525	}
	526