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Commit | Line | Data |
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94a420b1 SH |
1 | # Trace events for debugging and performance instrumentation |
2 | # | |
3 | # This file is processed by the tracetool script during the build. | |
4 | # | |
5 | # To add a new trace event: | |
6 | # | |
7 | # 1. Choose a name for the trace event. Declare its arguments and format | |
8 | # string. | |
9 | # | |
10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> | |
11 | # trace_multiwrite_cb(). The source file must #include "trace.h". | |
12 | # | |
13 | # Format of a trace event: | |
14 | # | |
1e2cf2bc | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
94a420b1 | 16 | # |
a74cd8cc | 17 | # Example: g_malloc(size_t size) "size %zu" |
94a420b1 | 18 | # |
1e2cf2bc | 19 | # The "disable" keyword will build without the trace event. |
1e2cf2bc | 20 | # |
94a420b1 SH |
21 | # The <name> must be a valid as a C function name. |
22 | # | |
23 | # Types should be standard C types. Use void * for pointers because the trace | |
24 | # system may not have the necessary headers included. | |
25 | # | |
26 | # The <format-string> should be a sprintf()-compatible format string. | |
cd245a19 SH |
27 | |
28 | # qemu-malloc.c | |
a74cd8cc FZ |
29 | g_malloc(size_t size, void *ptr) "size %zu ptr %p" |
30 | g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" | |
31 | g_free(void *ptr) "ptr %p" | |
cd245a19 SH |
32 | |
33 | # osdep.c | |
47f08d7a L |
34 | qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" |
35 | qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" | |
36 | qemu_vfree(void *ptr) "ptr %p" | |
6d519a5f | 37 | |
64979a4d | 38 | # hw/virtio.c |
47f08d7a L |
39 | virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" |
40 | virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" | |
41 | virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" | |
42 | virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" | |
43 | virtio_irq(void *vq) "vq %p" | |
44 | virtio_notify(void *vdev, void *vq) "vdev %p vq %p" | |
4e1837f8 | 45 | virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" |
64979a4d | 46 | |
49e3fdd7 | 47 | # hw/virtio-serial-bus.c |
47f08d7a L |
48 | virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" |
49 | virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" | |
50 | virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" | |
51 | virtio_serial_handle_control_message_port(unsigned int port) "port %u" | |
49e3fdd7 | 52 | |
d02e4fa4 | 53 | # hw/virtio-console.c |
47f08d7a L |
54 | virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" |
55 | virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" | |
56 | virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" | |
d02e4fa4 | 57 | |
6d519a5f | 58 | # block.c |
28dcee10 | 59 | bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\"" |
47f08d7a L |
60 | multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" |
61 | bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" | |
4265d620 | 62 | bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
47f08d7a L |
63 | bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" |
64 | bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" | |
65 | bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" | |
025e849a | 66 | bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" |
47f08d7a | 67 | bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
470c0504 | 68 | bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
47f08d7a | 69 | bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
f08f2dda | 70 | bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
59370aaa | 71 | bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p" |
470c0504 | 72 | bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d" |
6d519a5f | 73 | |
4f1043b4 SH |
74 | # block/stream.c |
75 | stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" | |
76 | stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p" | |
747ff602 JC |
77 | commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" |
78 | commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p" | |
4f1043b4 | 79 | |
893f7eba PB |
80 | # block/mirror.c |
81 | mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p" | |
82 | mirror_before_flush(void *s) "s %p" | |
83 | mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64 | |
84 | mirror_before_sleep(void *s, int64_t cnt, int synced) "s %p dirty count %"PRId64" synced %d" | |
85 | mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d" | |
86 | ||
12bd451f | 87 | # blockdev.c |
370521a1 | 88 | qmp_block_job_cancel(void *job) "job %p" |
6e37fb81 PB |
89 | qmp_block_job_pause(void *job) "job %p" |
90 | qmp_block_job_resume(void *job) "job %p" | |
aeae883b | 91 | qmp_block_job_complete(void *job) "job %p" |
9abf2dba | 92 | block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d" |
12bd451f SH |
93 | qmp_block_stream(void *bs, void *job) "bs %p job %p" |
94 | ||
6d519a5f | 95 | # hw/virtio-blk.c |
47f08d7a L |
96 | virtio_blk_req_complete(void *req, int status) "req %p status %d" |
97 | virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" | |
98 | virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" | |
81b6b9fa | 99 | virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
6d519a5f | 100 | |
d354c7ec PB |
101 | # thread-pool.c |
102 | thread_pool_submit(void *req, void *opaque) "req %p opaque %p" | |
103 | thread_pool_complete(void *req, void *opaque, int ret) "req %p opaque %p ret %d" | |
104 | thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" | |
105 | ||
6d519a5f | 106 | # posix-aio-compat.c |
47f08d7a L |
107 | paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
108 | paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" | |
109 | paio_cancel(void *acb, void *opaque) "acb %p opaque %p" | |
bd3c9aa5 PS |
110 | |
111 | # ioport.c | |
47f08d7a L |
112 | cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" |
113 | cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" | |
62dd89de PS |
114 | |
115 | # balloon.c | |
116 | # Since requests are raised via monitor, not many tracepoints are needed. | |
47f08d7a | 117 | balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
d8023f31 BS |
118 | |
119 | # hw/apic.c | |
47f08d7a L |
120 | apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" |
121 | apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" | |
689d7e2f SH |
122 | cpu_set_apic_base(uint64_t val) "%016"PRIx64 |
123 | cpu_get_apic_base(uint64_t val) "%016"PRIx64 | |
47f08d7a L |
124 | apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
125 | apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" | |
d8023f31 | 126 | # coalescing |
343270ea | 127 | apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" |
47f08d7a L |
128 | apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
129 | apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" | |
97bf4851 BS |
130 | |
131 | # hw/cs4231.c | |
47f08d7a L |
132 | cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
133 | cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" | |
134 | cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" | |
135 | cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" | |
97bf4851 | 136 | |
d43ed9ec | 137 | # hw/ds1225y.c |
47f08d7a L |
138 | nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" |
139 | nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" | |
d43ed9ec | 140 | |
97bf4851 | 141 | # hw/eccmemctl.c |
47f08d7a L |
142 | ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
143 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" | |
144 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" | |
145 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" | |
146 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" | |
147 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" | |
148 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" | |
149 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" | |
150 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" | |
151 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" | |
152 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" | |
153 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" | |
154 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" | |
155 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" | |
156 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" | |
157 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" | |
158 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" | |
159 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" | |
97bf4851 | 160 | |
31f7eedf MA |
161 | # hw/hd-geometry.c |
162 | hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d" | |
1f24d7b4 | 163 | hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d" |
31f7eedf | 164 | |
63b9932d HP |
165 | # hw/jazz-led.c |
166 | jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" | |
167 | jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" | |
168 | ||
97bf4851 | 169 | # hw/lance.c |
47f08d7a L |
170 | lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
171 | lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" | |
97bf4851 BS |
172 | |
173 | # hw/slavio_intctl.c | |
47f08d7a L |
174 | slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
175 | slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" | |
176 | slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" | |
177 | slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" | |
178 | slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" | |
179 | slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" | |
180 | slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" | |
181 | slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" | |
182 | slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" | |
183 | slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" | |
184 | slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" | |
185 | slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" | |
97bf4851 BS |
186 | |
187 | # hw/slavio_misc.c | |
47f08d7a L |
188 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
189 | slavio_misc_update_irq_lower(void) "Lower IRQ" | |
190 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
191 | slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" | |
192 | slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" | |
193 | slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" | |
194 | slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" | |
195 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" | |
196 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" | |
197 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" | |
198 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" | |
199 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" | |
200 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" | |
201 | apc_mem_writeb(uint32_t val) "Write power management %02x" | |
202 | apc_mem_readb(uint32_t ret) "Read power management %02x" | |
203 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" | |
204 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" | |
205 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" | |
206 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" | |
97bf4851 BS |
207 | |
208 | # hw/slavio_timer.c | |
47f08d7a L |
209 | slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
210 | slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" | |
689d7e2f | 211 | slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 |
47f08d7a L |
212 | slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
213 | slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" | |
689d7e2f | 214 | slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 |
47f08d7a L |
215 | slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
216 | slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" | |
217 | slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" | |
218 | slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" | |
219 | slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" | |
220 | slavio_timer_mem_writel_mode_invalid(void) "not system timer" | |
689d7e2f | 221 | slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 |
97bf4851 BS |
222 | |
223 | # hw/sparc32_dma.c | |
689d7e2f SH |
224 | ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 |
225 | ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 | |
47f08d7a L |
226 | sparc32_dma_set_irq_raise(void) "Raise IRQ" |
227 | sparc32_dma_set_irq_lower(void) "Lower IRQ" | |
228 | espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" | |
229 | espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" | |
230 | sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" | |
231 | sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" | |
232 | sparc32_dma_enable_raise(void) "Raise DMA enable" | |
233 | sparc32_dma_enable_lower(void) "Lower DMA enable" | |
97bf4851 BS |
234 | |
235 | # hw/sun4m.c | |
47f08d7a L |
236 | sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
237 | sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" | |
238 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" | |
239 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" | |
97bf4851 BS |
240 | |
241 | # hw/sun4m_iommu.c | |
47f08d7a L |
242 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
243 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" | |
689d7e2f | 244 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 |
47f08d7a L |
245 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
246 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" | |
247 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" | |
248 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" | |
689d7e2f | 249 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 |
94b0b5ff | 250 | |
f1ae32a1 | 251 | # hw/usb/core.c |
808aeb98 | 252 | usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" |
5ac2731c | 253 | usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" |
808aeb98 | 254 | |
f1ae32a1 | 255 | # hw/usb/bus.c |
891fb2cd GH |
256 | usb_port_claim(int bus, const char *port) "bus %d, port %s" |
257 | usb_port_attach(int bus, const char *port) "bus %d, port %s" | |
258 | usb_port_detach(int bus, const char *port) "bus %d, port %s" | |
259 | usb_port_release(int bus, const char *port) "bus %d, port %s" | |
260 | ||
f1ae32a1 | 261 | # hw/usb/hcd-ehci.c |
47f08d7a | 262 | usb_ehci_reset(void) "=== RESET ===" |
3e4f910c GH |
263 | usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" |
264 | usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" | |
265 | usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" | |
266 | usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x" | |
267 | usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x" | |
268 | usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)" | |
47f08d7a L |
269 | usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" |
270 | usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" | |
271 | usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" | |
272 | usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" | |
273 | usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" | |
274 | usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" | |
275 | usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" | |
276 | usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" | |
277 | usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" | |
2fe80192 | 278 | usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" |
30e9d412 GH |
279 | usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s" |
280 | usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s" | |
47f08d7a L |
281 | usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" |
282 | usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" | |
283 | usb_ehci_queue_action(void *q, const char *action) "q %p: %s" | |
eb36a88e | 284 | usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s" |
7efc17af | 285 | usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x" |
5c514681 | 286 | usb_ehci_guest_bug(const char *reason) "%s" |
1defcbd1 GH |
287 | usb_ehci_doorbell_ring(void) "" |
288 | usb_ehci_doorbell_ack(void) "" | |
55903f1d | 289 | usb_ehci_dma_error(void) "" |
439a97cc | 290 | |
50dcc0f8 GH |
291 | # hw/usb/hcd-uhci.c |
292 | usb_uhci_reset(void) "=== RESET ===" | |
293 | usb_uhci_schedule_start(void) "" | |
294 | usb_uhci_schedule_stop(void) "" | |
295 | usb_uhci_frame_start(uint32_t num) "nr %d" | |
4aed20e2 | 296 | usb_uhci_frame_stop_bandwidth(void) "" |
50dcc0f8 | 297 | usb_uhci_frame_loop_stop_idle(void) "" |
50dcc0f8 | 298 | usb_uhci_frame_loop_continue(void) "" |
7dd0dfd7 GH |
299 | usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x" |
300 | usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x" | |
301 | usb_uhci_mmio_readl(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%08x" | |
302 | usb_uhci_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%08x" | |
50dcc0f8 | 303 | usb_uhci_queue_add(uint32_t token) "token 0x%x" |
66a08cbe | 304 | usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s" |
50dcc0f8 GH |
305 | usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" |
306 | usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
307 | usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
308 | usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d" | |
309 | usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
310 | usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
311 | usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
312 | usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
313 | usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
314 | usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
315 | usb_uhci_qh_load(uint32_t qh) "qh 0x%x" | |
316 | usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x" | |
317 | usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x" | |
318 | usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
319 | usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
320 | usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
321 | ||
2d754a10 GH |
322 | # hw/usb/hcd-xhci.c |
323 | usb_xhci_reset(void) "=== RESET ===" | |
fc0ddaca GH |
324 | usb_xhci_run(void) "" |
325 | usb_xhci_stop(void) "" | |
2d754a10 GH |
326 | usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" |
327 | usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
328 | usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x" | |
329 | usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
330 | usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
331 | usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
332 | usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x" | |
333 | usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
334 | usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
7acd279f GH |
335 | usb_xhci_irq_intx(uint32_t level) "level %d" |
336 | usb_xhci_irq_msi(uint32_t nr) "nr %d" | |
4c47f800 GH |
337 | usb_xhci_irq_msix(uint32_t nr) "nr %d" |
338 | usb_xhci_irq_msix_use(uint32_t nr) "nr %d" | |
339 | usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d" | |
962d11e1 | 340 | usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x" |
0703a4a7 | 341 | usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x" |
4f47f0f8 GH |
342 | usb_xhci_port_reset(uint32_t port) "port %d" |
343 | usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d" | |
348f1037 GH |
344 | usb_xhci_slot_enable(uint32_t slotid) "slotid %d" |
345 | usb_xhci_slot_disable(uint32_t slotid) "slotid %d" | |
346 | usb_xhci_slot_address(uint32_t slotid) "slotid %d" | |
347 | usb_xhci_slot_configure(uint32_t slotid) "slotid %d" | |
348 | usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d" | |
349 | usb_xhci_slot_reset(uint32_t slotid) "slotid %d" | |
c1f6b493 GH |
350 | usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" |
351 | usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" | |
d829fde9 | 352 | usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint64_t param) "slotid %d, epid %d, ptr %016" PRIx64 |
c1f6b493 GH |
353 | usb_xhci_ep_kick(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" |
354 | usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" | |
355 | usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" | |
d5a15814 | 356 | usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid) "%p: slotid %d, epid %d" |
97df650b GH |
357 | usb_xhci_xfer_async(void *xfer) "%p" |
358 | usb_xhci_xfer_nak(void *xfer) "%p" | |
359 | usb_xhci_xfer_retry(void *xfer) "%p" | |
360 | usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d" | |
361 | usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" | |
2d754a10 | 362 | |
529f8f9f | 363 | # hw/usb/desc.c |
47f08d7a L |
364 | usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" |
365 | usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" | |
366 | usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" | |
367 | usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" | |
368 | usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" | |
2077469b | 369 | usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d" |
47f08d7a L |
370 | usb_set_addr(int addr) "dev %d" |
371 | usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" | |
1de14d43 | 372 | usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d" |
47f08d7a L |
373 | usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
374 | usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" | |
37fb59d3 | 375 | |
529f8f9f GH |
376 | # hw/usb/dev-hub.c |
377 | usb_hub_reset(int addr) "dev %d" | |
378 | usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d" | |
379 | usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" | |
380 | usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" | |
381 | usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" | |
382 | usb_hub_attach(int addr, int nr) "dev %d, port %d" | |
383 | usb_hub_detach(int addr, int nr) "dev %d, port %d" | |
384 | ||
0f58f68b GH |
385 | # hw/usb/dev-uas.c |
386 | usb_uas_reset(int addr) "dev %d" | |
387 | usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x" | |
388 | usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" | |
389 | usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x" | |
390 | usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" | |
391 | usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" | |
392 | usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d" | |
393 | usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d" | |
394 | usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d" | |
395 | usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x" | |
396 | usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" | |
397 | usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" | |
398 | ||
f1ae32a1 | 399 | # hw/usb/host-linux.c |
e6a2f500 GH |
400 | usb_host_open_started(int bus, int addr) "dev %d:%d" |
401 | usb_host_open_success(int bus, int addr) "dev %d:%d" | |
402 | usb_host_open_failure(int bus, int addr) "dev %d:%d" | |
403 | usb_host_disconnect(int bus, int addr) "dev %d:%d" | |
404 | usb_host_close(int bus, int addr) "dev %d:%d" | |
405 | usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" | |
406 | usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" | |
407 | usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" | |
408 | usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" | |
409 | usb_host_release_interfaces(int bus, int addr) "dev %d:%d" | |
19b89252 GH |
410 | usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d" |
411 | usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d" | |
8c908fca | 412 | usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d" |
19b89252 GH |
413 | usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d" |
414 | usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p" | |
e6a2f500 GH |
415 | usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" |
416 | usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" | |
6aebe407 | 417 | usb_host_urb_canceled(int bus, int addr, void *aurb) "dev %d:%d, aurb %p" |
e6a2f500 GH |
418 | usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" |
419 | usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" | |
c32da151 GH |
420 | usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d" |
421 | usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d" | |
422 | usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d" | |
423 | usb_host_iso_many_urbs(int bus, int addr, int count) "dev %d:%d, count %d" | |
e6a2f500 GH |
424 | usb_host_reset(int bus, int addr) "dev %d:%d" |
425 | usb_host_auto_scan_enabled(void) | |
426 | usb_host_auto_scan_disabled(void) | |
9516bb47 | 427 | usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" |
96dd9aac GH |
428 | usb_host_parse_device(int bus, int addr, int vendor, int product) "dev %d:%d, id %04x:%04x" |
429 | usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d" | |
430 | usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d" | |
431 | usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d" | |
432 | usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d" | |
433 | usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s" | |
e6a2f500 | 434 | |
5138efec | 435 | # hw/scsi-bus.c |
47f08d7a | 436 | scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" |
814589c4 | 437 | scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" |
47f08d7a | 438 | scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
e88c591d | 439 | scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
47f08d7a L |
440 | scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" |
441 | scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" | |
442 | scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" | |
689d7e2f | 443 | scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 |
47f08d7a L |
444 | scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" |
445 | scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" | |
e48e84ea | 446 | scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x" |
47f08d7a L |
447 | scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" |
448 | scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" | |
449 | scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" | |
450 | scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" | |
5138efec | 451 | |
94b0b5ff | 452 | # vl.c |
47f08d7a | 453 | vm_state_notify(int running, int reason) "running %d reason %d" |
298800ca | 454 | |
3cce16f4 KW |
455 | # block/qcow2.c |
456 | qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d" | |
457 | qcow2_writev_done_req(void *co, int ret) "co %p ret %d" | |
458 | qcow2_writev_start_part(void *co) "co %p" | |
459 | qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d" | |
460 | qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64 | |
461 | ||
462 | qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d" | |
250196f1 | 463 | qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d" |
3cce16f4 KW |
464 | qcow2_cluster_alloc_phys(void *co) "co %p" |
465 | qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d" | |
466 | ||
467 | qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d" | |
468 | qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d" | |
469 | qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" | |
470 | qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" | |
471 | qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" | |
472 | ||
473 | qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d" | |
474 | qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
475 | qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
476 | qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
477 | qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" | |
478 | qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
479 | ||
298800ca | 480 | # block/qed-l2-cache.c |
47f08d7a L |
481 | qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" |
482 | qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" | |
483 | qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" | |
298800ca SH |
484 | |
485 | # block/qed-table.c | |
47f08d7a L |
486 | qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" |
487 | qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" | |
488 | qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" | |
489 | qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" | |
eabba580 SH |
490 | |
491 | # block/qed.c | |
47f08d7a L |
492 | qed_need_check_timer_cb(void *s) "s %p" |
493 | qed_start_need_check_timer(void *s) "s %p" | |
494 | qed_cancel_need_check_timer(void *s) "s %p" | |
495 | qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" | |
6e4f59bd | 496 | qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x" |
689d7e2f | 497 | qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 |
47f08d7a L |
498 | qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
499 | qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |
689d7e2f SH |
500 | qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 |
501 | qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 | |
47f08d7a | 502 | qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
0f3a4a01 | 503 | |
b213b370 | 504 | # hw/g364fb.c |
47f08d7a L |
505 | g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" |
506 | g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" | |
b213b370 | 507 | |
0f3a4a01 | 508 | # hw/grlib_gptimer.c |
47f08d7a L |
509 | grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" |
510 | grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" | |
511 | grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" | |
512 | grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" | |
513 | grlib_gptimer_hit(int id) "timer:%d HIT" | |
514 | grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |
515 | grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |
3f10bcbb FC |
516 | |
517 | # hw/grlib_irqmp.c | |
2f4a725b | 518 | grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" |
47f08d7a L |
519 | grlib_irqmp_ack(int intno) "interrupt:%d" |
520 | grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" | |
689d7e2f | 521 | grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 |
47f08d7a | 522 | grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
8b1e1320 FC |
523 | |
524 | # hw/grlib_apbuart.c | |
47f08d7a L |
525 | grlib_apbuart_event(int event) "event:%d" |
526 | grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" | |
0c685d28 | 527 | grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" |
b04d9890 FC |
528 | |
529 | # hw/leon3.c | |
47f08d7a L |
530 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
531 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" | |
9363ee31 | 532 | |
cbcc6336 | 533 | # spice-qemu-char.c |
47f08d7a L |
534 | spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
535 | spice_vmc_read(int bytes, int len) "spice read %d of requested %d" | |
536 | spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" | |
537 | spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" | |
4ef66fa7 MW |
538 | |
539 | # hw/lm32_pic.c | |
47f08d7a L |
540 | lm32_pic_raise_irq(void) "Raise CPU interrupt" |
541 | lm32_pic_lower_irq(void) "Lower CPU interrupt" | |
542 | lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" | |
543 | lm32_pic_set_im(uint32_t im) "im 0x%08x" | |
544 | lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" | |
545 | lm32_pic_get_im(uint32_t im) "im 0x%08x" | |
546 | lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" | |
15d7dc4f MW |
547 | |
548 | # hw/lm32_juart.c | |
47f08d7a L |
549 | lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" |
550 | lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" | |
551 | lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" | |
552 | lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" | |
ea7924dc MW |
553 | |
554 | # hw/lm32_timer.c | |
47f08d7a L |
555 | lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
556 | lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
557 | lm32_timer_hit(void) "timer hit" | |
558 | lm32_timer_irq_state(int level) "irq state %d" | |
770ae571 MW |
559 | |
560 | # hw/lm32_uart.c | |
47f08d7a L |
561 | lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
562 | lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
563 | lm32_uart_irq_state(int level) "irq state %d" | |
f19410ca MW |
564 | |
565 | # hw/lm32_sys.c | |
47f08d7a | 566 | lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
25a8bb96 | 567 | |
e8f943c3 HR |
568 | # hw/megasas.c |
569 | megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " " | |
570 | megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x" | |
571 | megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" | |
572 | megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d" | |
573 | megasas_qf_found(unsigned int index, uint64_t pa) "found mapped frame %x pa %" PRIx64 "" | |
574 | megasas_qf_new(unsigned int index, void *cmd) "return new frame %x cmd %p" | |
575 | megasas_qf_failed(unsigned long pa) "all frames busy for frame %lx" | |
576 | megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int tail, int busy) "enqueue frame %x count %d context %" PRIx64 " tail %x busy %d" | |
577 | megasas_qf_update(unsigned int head, unsigned int busy) "update reply queue head %x busy %d" | |
578 | megasas_qf_dequeue(unsigned int index) "dequeue frame %x" | |
579 | megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu" | |
580 | megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " " | |
581 | megasas_qf_complete(uint64_t context, unsigned int tail, unsigned int offset, int busy, unsigned int doorbell) "context %" PRIx64 " tail %x offset %d busy %d doorbell %x" | |
582 | megasas_handle_frame(const char *cmd, uint64_t addr, uint64_t context, uint32_t count) "MFI cmd %s addr %" PRIx64 " context %" PRIx64 " count %d" | |
583 | megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy" | |
584 | megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: Unhandled MFI cmd %x" | |
585 | megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu" | |
586 | megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x target not present" | |
587 | megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d" | |
588 | megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
589 | megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
590 | megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
591 | megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
592 | megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x req allocation failed" | |
593 | megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data" | |
594 | megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data" | |
595 | megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred" | |
596 | megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: finished with status %x, len %u/%u" | |
597 | megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: command completed, status %x, residual %d" | |
598 | megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu" | |
599 | megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present" | |
600 | megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" | |
601 | megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" | |
602 | megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes completed" | |
603 | megasas_io_read(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" | |
604 | megasas_io_write(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" | |
605 | megasas_io_continue(int cmd, int bytes) "scmd %d: %d bytes left" | |
606 | megasas_iovec_map_failed(int cmd, int index, unsigned long iov_size) "scmd %d: iovec %d size %lu" | |
607 | megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d" | |
608 | megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d" | |
609 | megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u" | |
610 | megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" | |
611 | megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" | |
612 | megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x" | |
613 | megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes" | |
614 | megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s alloc failed" | |
615 | megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d" | |
616 | megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: DCMD finish internal cmd %x lun %d" | |
617 | megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: Invalid internal DCMD %x" | |
618 | megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d" | |
619 | megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count" | |
620 | megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: invalid DCMD sge count %d" | |
621 | megasas_dcmd_map_failed(int cmd) "scmd %d: Failed to map DCMD buffer" | |
622 | megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: invalid xfer len %ld, max %ld" | |
623 | megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d" | |
624 | megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: DCMD dummy xfer len %ld" | |
625 | megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx" | |
626 | megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d" | |
627 | megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs" | |
628 | megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: DCMD LD get info for dev %d" | |
629 | megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: DCMD PD get info for dev %d" | |
630 | megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: DCMD PD list query flags %x" | |
10d6530c | 631 | megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld" |
e8f943c3 HR |
632 | megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: aborting frame %x" |
633 | megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64 "" | |
634 | megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x" | |
635 | megasas_reset(void) "Reset" | |
636 | megasas_init(int sges, int cmds, const char *intr, const char *mode) "Using %d sges, %d cmds, %s, %s mode" | |
637 | megasas_msix_raise(int vector) "vector %d" | |
638 | megasas_irq_lower(void) "INTx" | |
639 | megasas_irq_raise(void) "INTx" | |
640 | megasas_intr_enabled(void) "Interrupts enabled" | |
641 | megasas_intr_disabled(void) "Interrupts disabled" | |
642 | megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x" | |
643 | megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" | |
644 | megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" | |
645 | megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" | |
646 | ||
25a8bb96 | 647 | # hw/milkymist-ac97.c |
47f08d7a L |
648 | milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
649 | milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
650 | milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" | |
651 | milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" | |
652 | milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" | |
653 | milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" | |
654 | milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" | |
655 | milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" | |
656 | milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" | |
657 | milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" | |
e4dc6d2c MW |
658 | |
659 | # hw/milkymist-hpdmc.c | |
47f08d7a L |
660 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
661 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" | |
b4e37d98 MW |
662 | |
663 | # hw/milkymist-memcard.c | |
47f08d7a L |
664 | milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
665 | milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
07424544 | 666 | |
57aa265d | 667 | # hw/milkymist-minimac2.c |
47f08d7a L |
668 | milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
669 | milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
670 | milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" | |
671 | milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" | |
672 | milkymist_minimac2_tx_frame(uint32_t length) "length %u" | |
673 | milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" | |
674 | milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" | |
675 | milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" | |
676 | milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" | |
677 | milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" | |
678 | milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" | |
5ee18b9c MW |
679 | |
680 | # hw/milkymist-pfpu.c | |
47f08d7a L |
681 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
682 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
683 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" | |
684 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" | |
87a381ec MW |
685 | |
686 | # hw/milkymist-softusb.c | |
47f08d7a L |
687 | milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
688 | milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
689 | milkymist_softusb_mevt(uint8_t m) "m %d" | |
690 | milkymist_softusb_kevt(uint8_t m) "m %d" | |
691 | milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" | |
692 | milkymist_softusb_pulse_irq(void) "Pulse IRQ" | |
96832424 MW |
693 | |
694 | # hw/milkymist-sysctl.c | |
47f08d7a L |
695 | milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
696 | milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
697 | milkymist_sysctl_icap_write(uint32_t value) "value %08x" | |
698 | milkymist_sysctl_start_timer0(void) "Start timer0" | |
699 | milkymist_sysctl_stop_timer0(void) "Stop timer0" | |
700 | milkymist_sysctl_start_timer1(void) "Start timer1" | |
701 | milkymist_sysctl_stop_timer1(void) "Stop timer1" | |
702 | milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" | |
703 | milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" | |
0670dadd MW |
704 | |
705 | # hw/milkymist-tmu2.c | |
47f08d7a L |
706 | milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
707 | milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
708 | milkymist_tmu2_start(void) "Start TMU" | |
709 | milkymist_tmu2_pulse_irq(void) "Pulse IRQ" | |
883de16b MW |
710 | |
711 | # hw/milkymist-uart.c | |
47f08d7a L |
712 | milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
713 | milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
fcfa3397 MW |
714 | milkymist_uart_raise_irq(void) "Raise IRQ" |
715 | milkymist_uart_lower_irq(void) "Lower IRQ" | |
d23948b1 MW |
716 | |
717 | # hw/milkymist-vgafb.c | |
47f08d7a L |
718 | milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
719 | milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
432d268c | 720 | |
83818f7c HP |
721 | # hw/mipsnet.c |
722 | mipsnet_send(uint32_t size) "sending len=%u" | |
723 | mipsnet_receive(uint32_t size) "receiving len=%u" | |
724 | mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" | |
903ec8ea | 725 | mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" |
83818f7c HP |
726 | mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" |
727 | ||
432d268c | 728 | # xen-all.c |
47f08d7a | 729 | xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
20581d20 | 730 | xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i" |
432d268c JN |
731 | |
732 | # xen-mapcache.c | |
689d7e2f SH |
733 | xen_map_cache(uint64_t phys_addr) "want %#"PRIx64 |
734 | xen_remap_bucket(uint64_t index) "index %#"PRIx64 | |
47f08d7a | 735 | xen_map_cache_return(void* ptr) "%p" |
689d7e2f | 736 | xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64 |
47f08d7a | 737 | xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" |
050a0ddf AP |
738 | |
739 | # exec.c | |
47f08d7a | 740 | qemu_put_ram_ptr(void* addr) "%p" |
01195b73 SS |
741 | |
742 | # hw/xen_platform.c | |
47f08d7a | 743 | xen_platform_log(char *s) "xen platform: %s" |
00dccaf1 KW |
744 | |
745 | # qemu-coroutine.c | |
47f08d7a L |
746 | qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
747 | qemu_coroutine_yield(void *from, void *to) "from %p to %p" | |
748 | qemu_coroutine_terminate(void *co) "self %p" | |
b96e9247 KW |
749 | |
750 | # qemu-coroutine-lock.c | |
47f08d7a | 751 | qemu_co_queue_next_bh(void) "" |
bfe24e1a | 752 | qemu_co_queue_next(void *nxt) "next %p" |
47f08d7a L |
753 | qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
754 | qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" | |
755 | qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" | |
756 | qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" | |
30c2f238 BS |
757 | |
758 | # hw/escc.c | |
47f08d7a L |
759 | escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
760 | escc_get_queue(char channel, int val) "channel %c get 0x%02x" | |
761 | escc_update_irq(int irq) "IRQ = %d" | |
762 | escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" | |
763 | escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" | |
764 | escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" | |
765 | escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" | |
766 | escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" | |
767 | escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" | |
768 | escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" | |
769 | escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" | |
770 | escc_kbd_command(int val) "Command %d" | |
771 | escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" | |
bf4b9889 | 772 | |
c589b249 | 773 | # block/iscsi.c |
f4dfa67f | 774 | iscsi_aio_write16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
c589b249 | 775 | iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
f4dfa67f | 776 | iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
c589b249 RS |
777 | iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
778 | ||
bf4b9889 | 779 | # hw/esp.c |
3af4e9aa HP |
780 | esp_error_fifo_overrun(void) "FIFO overrun" |
781 | esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)" | |
782 | esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" | |
bf4b9889 BS |
783 | esp_raise_irq(void) "Raise IRQ" |
784 | esp_lower_irq(void) "Lower IRQ" | |
785 | esp_dma_enable(void) "Raise enable" | |
786 | esp_dma_disable(void) "Lower enable" | |
787 | esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" | |
788 | esp_do_busid_cmd(uint8_t busid) "busid 0x%x" | |
789 | esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" | |
790 | esp_write_response(uint32_t status) "Transfer status (status=%d)" | |
791 | esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" | |
792 | esp_command_complete(void) "SCSI Command complete" | |
793 | esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" | |
794 | esp_command_complete_fail(void) "Command failed" | |
795 | esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" | |
796 | esp_handle_ti(uint32_t minlen) "Transfer Information len %d" | |
797 | esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" | |
798 | esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" | |
799 | esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" | |
800 | esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" | |
801 | esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" | |
802 | esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" | |
803 | esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" | |
804 | esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" | |
805 | esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" | |
806 | esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" | |
807 | esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" | |
6915bff1 | 808 | esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)" |
bf4b9889 BS |
809 | esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" |
810 | esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" | |
811 | esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" | |
812 | esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" | |
6fe84c18 | 813 | esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)" |
fabaaf1d HP |
814 | esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" |
815 | esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" | |
816 | esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" | |
817 | esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" | |
818 | esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x" | |
819 | esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x" | |
820 | esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)" | |
821 | esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)" | |
822 | esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)" | |
823 | esp_pci_dma_start(uint32_t val) "START (%.8x)" | |
824 | esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" | |
825 | esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" | |
89bd820a SH |
826 | |
827 | # monitor.c | |
828 | handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" | |
829 | monitor_protocol_emitter(void *mon) "mon %p" | |
afeecec2 DB |
830 | monitor_protocol_event(uint32_t event, const char *evname, void *data) "event=%d name \"%s\" data %p" |
831 | monitor_protocol_event_handler(uint32_t event, void *data, uint64_t last, uint64_t now) "event=%d data=%p last=%" PRId64 " now=%" PRId64 | |
832 | monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p" | |
833 | monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64 | |
834 | monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64 | |
342407fd MF |
835 | |
836 | # hw/opencores_eth.c | |
837 | open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x" | |
838 | open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x" | |
839 | open_eth_update_irq(uint32_t v) "IRQ <- %x" | |
840 | open_eth_receive(unsigned len) "RX: len: %u" | |
841 | open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" | |
842 | open_eth_receive_reject(void) "RX: rejected" | |
843 | open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x" | |
844 | open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u" | |
845 | open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x" | |
846 | open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x" | |
847 | open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x" | |
848 | open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x" | |
1f99b949 | 849 | |
c572f23a | 850 | # hw/9pfs/virtio-9p.c |
7999f7e1 | 851 | v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" |
c572f23a HPB |
852 | v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
853 | v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" | |
c76eaf13 | 854 | v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" |
c572f23a HPB |
855 | v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64"" |
856 | v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
857 | v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" | |
858 | v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64"" | |
859 | v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" | |
860 | v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" | |
861 | v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" | |
862 | v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" | |
863 | v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
864 | v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" | |
865 | v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
866 | v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" | |
867 | v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
2f008a8c | 868 | v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" |
c572f23a | 869 | v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" |
2f008a8c AK |
870 | v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" |
871 | v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" | |
872 | v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" | |
c572f23a HPB |
873 | v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" |
874 | v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" | |
875 | v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
876 | v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" | |
877 | v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
878 | v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" | |
879 | v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" | |
880 | v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
c76eaf13 | 881 | v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" |
c572f23a HPB |
882 | v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" |
883 | v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
884 | v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" | |
885 | v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" | |
886 | v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" | |
887 | v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" | |
c76eaf13 SW |
888 | v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" |
889 | v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" | |
c572f23a HPB |
890 | v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" |
891 | v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64"" | |
892 | v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" | |
893 | v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
894 | v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" | |
ec0ceb17 BS |
895 | |
896 | # target-sparc/mmu_helper.c | |
897 | mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
898 | mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
899 | mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64"" | |
900 | mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64"" | |
901 | mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64"" | |
902 | mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" | |
903 | mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" | |
904 | mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64"" | |
11e66bca BS |
905 | |
906 | # target-sparc/int_helper.c | |
907 | int_helper_set_softint(uint32_t softint) "new %08x" | |
908 | int_helper_clear_softint(uint32_t softint) "new %08x" | |
909 | int_helper_write_softint(uint32_t softint) "new %08x" | |
910 | int_helper_icache_freeze(void) "Instruction cache: freeze" | |
911 | int_helper_dcache_freeze(void) "Data cache: freeze" | |
870be6ad BS |
912 | |
913 | # target-sparc/win_helper.c | |
914 | win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" | |
915 | win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" | |
916 | win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" | |
917 | win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" | |
918 | win_helper_done(uint32_t tl) "tl=%d" | |
919 | win_helper_retry(uint32_t tl) "tl=%d" | |
c57c4658 KW |
920 | |
921 | # dma-helpers.c | |
922 | dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d" | |
923 | dma_aio_cancel(void *dbs) "dbs=%p" | |
924 | dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" | |
925 | dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d" | |
926 | dma_map_wait(void *dbs) "dbs=%p" | |
cdbc19dd AL |
927 | |
928 | # console.h | |
929 | displaysurface_free(void *display_state, void *display_surface) "state=%p surface=%p" | |
930 | displaysurface_resize(void *display_state, void *display_surface, int width, int height) "state=%p surface=%p %dx%d" | |
72750018 AL |
931 | |
932 | # vga.c | |
933 | ppm_save(const char *filename, void *display_surface) "%s surface=%p" | |
c480bb7d | 934 | |
517a13c9 JQ |
935 | # savevm.c |
936 | ||
937 | savevm_section_start(void) "" | |
938 | savevm_section_end(unsigned int section_id) "section_id %u" | |
939 | ||
3c12193d JQ |
940 | # arch_init.c |
941 | migration_bitmap_sync_start(void) "" | |
942 | migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64"" | |
943 | ||
c480bb7d AL |
944 | # hw/qxl.c |
945 | disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d" | |
946 | disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" | |
95b752bc | 947 | qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u" |
c480bb7d AL |
948 | qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d" |
949 | qxl_destroy_primary(int qid) "%d" | |
950 | qxl_enter_vga_mode(int qid) "%d" | |
951 | qxl_exit_vga_mode(int qid) "%d" | |
952 | qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64"" | |
953 | qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p" | |
954 | qxl_interface_attach_worker(int qid) "%d" | |
955 | qxl_interface_get_init_info(int qid) "%d" | |
956 | qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64 | |
957 | qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]" | |
958 | qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d" | |
959 | qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d" | |
960 | qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d" | |
961 | qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s" | |
a639ab04 | 962 | qxl_io_log(int qid, const uint8_t *log_buf) "%d %s" |
c480bb7d | 963 | qxl_io_read_unexpected(int qid) "%d" |
917ae08c | 964 | qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)" |
c480bb7d AL |
965 | qxl_io_write(int qid, const char *mode, uint64_t addr, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " val=%"PRIu64" size=%u async=%d" |
966 | qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64 | |
967 | qxl_post_load(int qid, const char *mode) "%d %s" | |
968 | qxl_pre_load(int qid) "%d" | |
969 | qxl_pre_save(int qid) "%d" | |
970 | qxl_reset_surfaces(int qid) "%d" | |
971 | qxl_ring_command_check(int qid, const char *mode) "%d %s" | |
972 | qxl_ring_command_get(int qid, const char *mode) "%d %s" | |
973 | qxl_ring_command_req_notification(int qid) "%d" | |
974 | qxl_ring_cursor_check(int qid, const char *mode) "%d %s" | |
975 | qxl_ring_cursor_get(int qid, const char *mode) "%d %s" | |
976 | qxl_ring_cursor_req_notification(int qid) "%d" | |
977 | qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s" | |
978 | qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]" | |
979 | qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d" | |
980 | qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]" | |
981 | qxl_soft_reset(int qid) "%d" | |
982 | qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" | |
983 | qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" | |
984 | qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" | |
985 | qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d" | |
986 | qemu_spice_wakeup(uint32_t qid) "%d" | |
987 | qemu_spice_start(uint32_t qid) "%d" | |
988 | qemu_spice_stop(uint32_t qid) "%d" | |
989 | qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" | |
990 | qxl_spice_destroy_surfaces_complete(int qid) "%d" | |
991 | qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d" | |
992 | qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d" | |
993 | qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d" | |
994 | qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d" | |
917ae08c | 995 | qxl_spice_monitors_config(int qid) "%d" |
c480bb7d AL |
996 | qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d" |
997 | qxl_spice_oom(int qid) "%d" | |
998 | qxl_spice_reset_cursor(int qid) "%d" | |
999 | qxl_spice_reset_image_cache(int qid) "%d" | |
1000 | qxl_spice_reset_memslots(int qid) "%d" | |
1001 | qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" | |
1002 | qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" | |
1003 | qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d" | |
917ae08c | 1004 | qxl_send_events(int qid, uint32_t events) "%d %d" |
511aefb0 | 1005 | qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" |
917ae08c | 1006 | qxl_set_guest_bug(int qid) "%d" |
a639ab04 AL |
1007 | qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p" |
1008 | qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p" | |
1009 | qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" | |
1010 | qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" | |
d53291cf AL |
1011 | |
1012 | # hw/qxl-render.c | |
1013 | qxl_render_blit_guest_primary_initialized(void) "" | |
1014 | qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" | |
1015 | qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" | |
1016 | qxl_render_update_area_done(void *cookie) "%p" | |
a2950fb6 AK |
1017 | |
1018 | # hw/spapr_pci.c | |
0ee2c058 AK |
1019 | spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)" |
1020 | spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64 | |
1021 | spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u" | |
1022 | spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u" | |
1023 | spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u" | |
a2950fb6 | 1024 | spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" |
500efa23 DG |
1025 | |
1026 | # hw/xics.c | |
1027 | xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x" | |
1028 | xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32 | |
1029 | xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32 | |
1030 | xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x" | |
1031 | xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x" | |
1032 | xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]" | |
1033 | xics_masked_pending(void) "set_irq_msi: masked pending" | |
1034 | xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]" | |
1035 | xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x" | |
1036 | xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]" | |
1037 | xics_ics_eoi(int nr) "ics_eoi: irq %#x" |