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trace-events: Drop unused events
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CommitLineData
94a420b1
SH
1# Trace events for debugging and performance instrumentation
2#
3# This file is processed by the tracetool script during the build.
4#
5# To add a new trace event:
6#
7# 1. Choose a name for the trace event. Declare its arguments and format
8# string.
9#
10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11# trace_multiwrite_cb(). The source file must #include "trace.h".
12#
13# Format of a trace event:
14#
1e2cf2bc 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
94a420b1 16#
a74cd8cc 17# Example: g_malloc(size_t size) "size %zu"
94a420b1 18#
1e2cf2bc 19# The "disable" keyword will build without the trace event.
1e2cf2bc 20#
94a420b1
SH
21# The <name> must be a valid as a C function name.
22#
23# Types should be standard C types. Use void * for pointers because the trace
24# system may not have the necessary headers included.
25#
26# The <format-string> should be a sprintf()-compatible format string.
cd245a19
SH
27
28# qemu-malloc.c
a74cd8cc
FZ
29g_malloc(size_t size, void *ptr) "size %zu ptr %p"
30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
31g_free(void *ptr) "ptr %p"
cd245a19
SH
32
33# osdep.c
47f08d7a 34qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
6eebf958 35qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p"
47f08d7a 36qemu_vfree(void *ptr) "ptr %p"
da4c1a7a 37qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu"
6d519a5f 38
64979a4d 39# hw/virtio.c
47f08d7a
L
40virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
41virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
42virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
43virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
44virtio_irq(void *vq) "vq %p"
45virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
4e1837f8 46virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
64979a4d 47
49e3fdd7 48# hw/virtio-serial-bus.c
47f08d7a
L
49virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
50virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
51virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
52virtio_serial_handle_control_message_port(unsigned int port) "port %u"
49e3fdd7 53
d02e4fa4 54# hw/virtio-console.c
47f08d7a
L
55virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
56virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
57virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
d02e4fa4 58
6d519a5f 59# block.c
28dcee10 60bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
47f08d7a
L
61multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
62bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
4265d620 63bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
47f08d7a
L
64bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
65bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
66bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
025e849a 67bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
47f08d7a 68bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
470c0504 69bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
47f08d7a 70bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
f08f2dda 71bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
59370aaa 72bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p"
470c0504 73bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d"
6d519a5f 74
4f1043b4
SH
75# block/stream.c
76stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
77stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
747ff602
JC
78commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
79commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
4f1043b4 80
893f7eba
PB
81# block/mirror.c
82mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p"
8f0720ec 83mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64
893f7eba
PB
84mirror_before_flush(void *s) "s %p"
85mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64
86mirror_before_sleep(void *s, int64_t cnt, int synced) "s %p dirty count %"PRId64" synced %d"
87mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d"
bd48bde8 88mirror_iteration_done(void *s, int64_t sector_num, int nb_sectors, int ret) "s %p sector_num %"PRId64" nb_sectors %d ret %d"
402a4741
PB
89mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d"
90mirror_yield_in_flight(void *s, int64_t sector_num, int in_flight) "s %p sector_num %"PRId64" in_flight %d"
91mirror_yield_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
884fea4e 92mirror_break_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d"
4f1043b4 93
98d2c6f2
DM
94# block/backup.c
95backup_do_cow_enter(void *job, int64_t start, int64_t sector_num, int nb_sectors) "job %p start %"PRId64" sector_num %"PRId64" nb_sectors %d"
96backup_do_cow_return(void *job, int64_t sector_num, int nb_sectors, int ret) "job %p sector_num %"PRId64" nb_sectors %d ret %d"
97backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64
98backup_do_cow_process(void *job, int64_t start) "job %p start %"PRId64
99backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
100backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d"
101
12bd451f 102# blockdev.c
370521a1 103qmp_block_job_cancel(void *job) "job %p"
6e37fb81
PB
104qmp_block_job_pause(void *job) "job %p"
105qmp_block_job_resume(void *job) "job %p"
aeae883b 106qmp_block_job_complete(void *job) "job %p"
9abf2dba 107block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
12bd451f
SH
108qmp_block_stream(void *bs, void *job) "bs %p job %p"
109
6d519a5f 110# hw/virtio-blk.c
47f08d7a
L
111virtio_blk_req_complete(void *req, int status) "req %p status %d"
112virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
113virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
81b6b9fa 114virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
6d519a5f 115
e72f66a0
SH
116# hw/dataplane/virtio-blk.c
117virtio_blk_data_plane_start(void *s) "dataplane %p"
118virtio_blk_data_plane_stop(void *s) "dataplane %p"
119virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
120virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d"
121
88807f89
SH
122# hw/dataplane/vring.c
123vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p"
124
d354c7ec 125# thread-pool.c
b811203c
SH
126thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
127thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
d354c7ec
PB
128thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
129
6d519a5f 130# posix-aio-compat.c
47f08d7a 131paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
bd3c9aa5
PS
132
133# ioport.c
47f08d7a
L
134cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
135cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
62dd89de
PS
136
137# balloon.c
138# Since requests are raised via monitor, not many tracepoints are needed.
47f08d7a 139balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
d8023f31
BS
140
141# hw/apic.c
47f08d7a
L
142apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
143apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
689d7e2f
SH
144cpu_set_apic_base(uint64_t val) "%016"PRIx64
145cpu_get_apic_base(uint64_t val) "%016"PRIx64
47f08d7a
L
146apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
147apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
d8023f31 148# coalescing
343270ea 149apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
47f08d7a
L
150apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
151apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
97bf4851
BS
152
153# hw/cs4231.c
47f08d7a
L
154cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
155cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
156cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
157cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
97bf4851 158
d43ed9ec 159# hw/ds1225y.c
47f08d7a
L
160nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
161nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
d43ed9ec 162
97bf4851 163# hw/eccmemctl.c
47f08d7a
L
164ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
165ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
166ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
167ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
168ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
169ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
170ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
171ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
172ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
173ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
174ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
175ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
176ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
177ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
178ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
179ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
180ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
181ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
97bf4851 182
f6e35343
MA
183# hw/fw_cfg.c
184fw_cfg_write(void *s, uint8_t value) "%p %d"
185fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
186fw_cfg_read(void *s, uint8_t ret) "%p = %d"
187fw_cfg_add_file_dupe(void *s, char *name) "%p %s"
089da572 188fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
f6e35343 189
31f7eedf
MA
190# hw/hd-geometry.c
191hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d"
1f24d7b4 192hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d"
31f7eedf 193
63b9932d
HP
194# hw/jazz-led.c
195jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
196jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
197
97bf4851 198# hw/lance.c
47f08d7a
L
199lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
200lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
97bf4851
BS
201
202# hw/slavio_intctl.c
47f08d7a
L
203slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
204slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
205slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
206slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
207slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
208slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
209slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
210slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
211slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
212slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
213slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
214slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
97bf4851
BS
215
216# hw/slavio_misc.c
47f08d7a
L
217slavio_misc_update_irq_raise(void) "Raise IRQ"
218slavio_misc_update_irq_lower(void) "Lower IRQ"
219slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
220slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
221slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
222slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
223slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
224slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
225slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
226slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
227slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
228slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
229slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
230apc_mem_writeb(uint32_t val) "Write power management %02x"
231apc_mem_readb(uint32_t ret) "Read power management %02x"
232slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
233slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
234slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
235slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
97bf4851
BS
236
237# hw/slavio_timer.c
47f08d7a
L
238slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
239slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
689d7e2f 240slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
47f08d7a
L
241slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
242slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
689d7e2f 243slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
47f08d7a
L
244slavio_timer_mem_writel_counter_invalid(void) "not user timer"
245slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
246slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
247slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
248slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
249slavio_timer_mem_writel_mode_invalid(void) "not system timer"
689d7e2f 250slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
97bf4851
BS
251
252# hw/sparc32_dma.c
689d7e2f
SH
253ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
254ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
47f08d7a
L
255sparc32_dma_set_irq_raise(void) "Raise IRQ"
256sparc32_dma_set_irq_lower(void) "Lower IRQ"
257espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
258espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
259sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
260sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
261sparc32_dma_enable_raise(void) "Raise DMA enable"
262sparc32_dma_enable_lower(void) "Lower DMA enable"
97bf4851
BS
263
264# hw/sun4m.c
47f08d7a
L
265sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
266sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
267sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
268sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
97bf4851
BS
269
270# hw/sun4m_iommu.c
47f08d7a
L
271sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
272sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
689d7e2f 273sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
47f08d7a
L
274sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
275sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
276sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
277sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
689d7e2f 278sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
94b0b5ff 279
f1ae32a1 280# hw/usb/core.c
808aeb98 281usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
5ac2731c 282usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s"
808aeb98 283
f1ae32a1 284# hw/usb/bus.c
891fb2cd 285usb_port_claim(int bus, const char *port) "bus %d, port %s"
3b7e759a 286usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s"
891fb2cd
GH
287usb_port_detach(int bus, const char *port) "bus %d, port %s"
288usb_port_release(int bus, const char *port) "bus %d, port %s"
289
f1ae32a1 290# hw/usb/hcd-ehci.c
47f08d7a 291usb_ehci_reset(void) "=== RESET ==="
3e4f910c
GH
292usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
293usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
294usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
295usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x"
296usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x"
297usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)"
47f08d7a
L
298usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
299usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
300usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
301usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
302usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
303usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
304usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
305usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
306usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
2fe80192 307usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
30e9d412
GH
308usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
309usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
47f08d7a 310usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
47f08d7a 311usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
eb36a88e 312usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
7efc17af 313usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
5c514681 314usb_ehci_guest_bug(const char *reason) "%s"
1defcbd1
GH
315usb_ehci_doorbell_ring(void) ""
316usb_ehci_doorbell_ack(void) ""
55903f1d 317usb_ehci_dma_error(void) ""
439a97cc 318
50dcc0f8
GH
319# hw/usb/hcd-uhci.c
320usb_uhci_reset(void) "=== RESET ==="
321usb_uhci_schedule_start(void) ""
322usb_uhci_schedule_stop(void) ""
323usb_uhci_frame_start(uint32_t num) "nr %d"
4aed20e2 324usb_uhci_frame_stop_bandwidth(void) ""
50dcc0f8 325usb_uhci_frame_loop_stop_idle(void) ""
50dcc0f8 326usb_uhci_frame_loop_continue(void) ""
7dd0dfd7
GH
327usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
328usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
50dcc0f8 329usb_uhci_queue_add(uint32_t token) "token 0x%x"
66a08cbe 330usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s"
50dcc0f8
GH
331usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
332usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
333usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
334usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d"
335usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
336usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
337usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
338usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
339usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
340usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
341usb_uhci_qh_load(uint32_t qh) "qh 0x%x"
342usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
343usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
344usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
345usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
346usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
347
2d754a10
GH
348# hw/usb/hcd-xhci.c
349usb_xhci_reset(void) "=== RESET ==="
fc0ddaca
GH
350usb_xhci_run(void) ""
351usb_xhci_stop(void) ""
2d754a10
GH
352usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
353usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
354usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x"
355usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
356usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
357usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
358usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x"
359usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
360usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
7acd279f
GH
361usb_xhci_irq_intx(uint32_t level) "level %d"
362usb_xhci_irq_msi(uint32_t nr) "nr %d"
4c47f800
GH
363usb_xhci_irq_msix(uint32_t nr) "nr %d"
364usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
365usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
962d11e1 366usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
0703a4a7 367usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
4f47f0f8
GH
368usb_xhci_port_reset(uint32_t port) "port %d"
369usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d"
bdfce20d 370usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits %x"
348f1037
GH
371usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
372usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
373usb_xhci_slot_address(uint32_t slotid) "slotid %d"
374usb_xhci_slot_configure(uint32_t slotid) "slotid %d"
375usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d"
376usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
c1f6b493
GH
377usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
378usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
024426ac
GH
379usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr %016" PRIx64
380usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d"
c1f6b493
GH
381usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
382usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
024426ac 383usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d"
97df650b
GH
384usb_xhci_xfer_async(void *xfer) "%p"
385usb_xhci_xfer_nak(void *xfer) "%p"
386usb_xhci_xfer_retry(void *xfer) "%p"
387usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d"
388usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
0ab966cf 389usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)"
2d754a10 390
529f8f9f 391# hw/usb/desc.c
47f08d7a
L
392usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
393usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
394usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
395usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
396usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
2077469b 397usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d"
47f08d7a
L
398usb_set_addr(int addr) "dev %d"
399usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
1de14d43 400usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
47f08d7a
L
401usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
402usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
37fb59d3 403
529f8f9f
GH
404# hw/usb/dev-hub.c
405usb_hub_reset(int addr) "dev %d"
406usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d"
407usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x"
408usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
409usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
410usb_hub_attach(int addr, int nr) "dev %d, port %d"
411usb_hub_detach(int addr, int nr) "dev %d, port %d"
412
0f58f68b
GH
413# hw/usb/dev-uas.c
414usb_uas_reset(int addr) "dev %d"
415usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x"
416usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x"
417usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x"
418usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
419usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
420usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d"
421usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d"
422usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d"
423usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x"
424usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d"
425usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
426
f1ae32a1 427# hw/usb/host-linux.c
e6a2f500
GH
428usb_host_open_started(int bus, int addr) "dev %d:%d"
429usb_host_open_success(int bus, int addr) "dev %d:%d"
430usb_host_open_failure(int bus, int addr) "dev %d:%d"
431usb_host_disconnect(int bus, int addr) "dev %d:%d"
432usb_host_close(int bus, int addr) "dev %d:%d"
2b2325ff
GH
433usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
434usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
e6a2f500
GH
435usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
436usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
437usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
438usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d"
2b2325ff 439usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d"
e6a2f500 440usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
2b2325ff 441usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d"
19b89252
GH
442usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
443usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
8c908fca 444usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d"
19b89252
GH
445usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
446usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
e6a2f500
GH
447usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
448usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d"
6aebe407 449usb_host_urb_canceled(int bus, int addr, void *aurb) "dev %d:%d, aurb %p"
e6a2f500
GH
450usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
451usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
c32da151
GH
452usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
453usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
454usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d"
455usb_host_iso_many_urbs(int bus, int addr, int count) "dev %d:%d, count %d"
e6a2f500
GH
456usb_host_reset(int bus, int addr) "dev %d:%d"
457usb_host_auto_scan_enabled(void)
458usb_host_auto_scan_disabled(void)
9516bb47 459usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d"
96dd9aac
GH
460usb_host_parse_device(int bus, int addr, int vendor, int product) "dev %d:%d, id %04x:%04x"
461usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
462usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d"
463usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d"
464usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d"
465usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
e6a2f500 466
5138efec 467# hw/scsi-bus.c
47f08d7a 468scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
814589c4 469scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
47f08d7a 470scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
e88c591d 471scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
47f08d7a
L
472scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
473scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
6f6710aa 474scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d"
47f08d7a 475scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
689d7e2f 476scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
47f08d7a
L
477scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
478scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
e48e84ea 479scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x"
47f08d7a
L
480scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
481scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
482scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
483scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
5138efec 484
94b0b5ff 485# vl.c
47f08d7a 486vm_state_notify(int running, int reason) "running %d reason %d"
4524051c 487load_file(const char *name, const char *path) "name %s location %s"
7e866003 488runstate_set(int new_state) "new state %d"
298800ca 489
3cce16f4
KW
490# block/qcow2.c
491qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d"
492qcow2_writev_done_req(void *co, int ret) "co %p ret %d"
493qcow2_writev_start_part(void *co) "co %p"
494qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d"
495qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
496
497qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d"
0af729ec 498qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
10f0ed8b 499qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64
250196f1 500qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d"
3cce16f4
KW
501qcow2_cluster_alloc_phys(void *co) "co %p"
502qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d"
503
504qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d"
505qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d"
506qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
507qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
508qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
509
510qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
511qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
512qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
513qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d"
514qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d"
515qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d"
516
298800ca 517# block/qed-l2-cache.c
47f08d7a
L
518qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
519qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
520qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
298800ca
SH
521
522# block/qed-table.c
47f08d7a
L
523qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
524qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
525qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
526qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
eabba580
SH
527
528# block/qed.c
47f08d7a
L
529qed_need_check_timer_cb(void *s) "s %p"
530qed_start_need_check_timer(void *s) "s %p"
531qed_cancel_need_check_timer(void *s) "s %p"
532qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
6e4f59bd 533qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x"
689d7e2f 534qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
47f08d7a
L
535qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
536qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
689d7e2f
SH
537qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
538qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
47f08d7a 539qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
0f3a4a01 540
b213b370 541# hw/g364fb.c
47f08d7a
L
542g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
543g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
b213b370 544
0f3a4a01 545# hw/grlib_gptimer.c
47f08d7a
L
546grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
547grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
548grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
549grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
550grlib_gptimer_hit(int id) "timer:%d HIT"
551grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
552grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
3f10bcbb
FC
553
554# hw/grlib_irqmp.c
2f4a725b 555grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
47f08d7a
L
556grlib_irqmp_ack(int intno) "interrupt:%d"
557grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
689d7e2f 558grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
47f08d7a 559grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
8b1e1320
FC
560
561# hw/grlib_apbuart.c
47f08d7a
L
562grlib_apbuart_event(int event) "event:%d"
563grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
0c685d28 564grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
b04d9890
FC
565
566# hw/leon3.c
47f08d7a
L
567leon3_set_irq(int intno) "Set CPU IRQ %d"
568leon3_reset_irq(int intno) "Reset CPU IRQ %d"
9363ee31 569
cbcc6336 570# spice-qemu-char.c
47f08d7a
L
571spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
572spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
573spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
574spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
5a49d3e9 575spice_vmc_event(int event) "spice vmc event %d"
4ef66fa7
MW
576
577# hw/lm32_pic.c
47f08d7a
L
578lm32_pic_raise_irq(void) "Raise CPU interrupt"
579lm32_pic_lower_irq(void) "Lower CPU interrupt"
580lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
581lm32_pic_set_im(uint32_t im) "im 0x%08x"
582lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
583lm32_pic_get_im(uint32_t im) "im 0x%08x"
584lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
15d7dc4f
MW
585
586# hw/lm32_juart.c
47f08d7a
L
587lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
588lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
589lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
590lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
ea7924dc
MW
591
592# hw/lm32_timer.c
47f08d7a
L
593lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
594lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
595lm32_timer_hit(void) "timer hit"
596lm32_timer_irq_state(int level) "irq state %d"
770ae571
MW
597
598# hw/lm32_uart.c
47f08d7a
L
599lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
600lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
601lm32_uart_irq_state(int level) "irq state %d"
f19410ca
MW
602
603# hw/lm32_sys.c
47f08d7a 604lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
25a8bb96 605
e8f943c3
HR
606# hw/megasas.c
607megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
608megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
609megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
610megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
611megasas_qf_found(unsigned int index, uint64_t pa) "found mapped frame %x pa %" PRIx64 ""
612megasas_qf_new(unsigned int index, void *cmd) "return new frame %x cmd %p"
613megasas_qf_failed(unsigned long pa) "all frames busy for frame %lx"
614megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int tail, int busy) "enqueue frame %x count %d context %" PRIx64 " tail %x busy %d"
615megasas_qf_update(unsigned int head, unsigned int busy) "update reply queue head %x busy %d"
e8f943c3
HR
616megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
617megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
618megasas_qf_complete(uint64_t context, unsigned int tail, unsigned int offset, int busy, unsigned int doorbell) "context %" PRIx64 " tail %x offset %d busy %d doorbell %x"
e8f943c3
HR
619megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
620megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: Unhandled MFI cmd %x"
621megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
622megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x target not present"
623megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
624megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
625megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
626megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
627megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
628megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x req allocation failed"
629megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
630megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
631megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
632megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: finished with status %x, len %u/%u"
633megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: command completed, status %x, residual %d"
634megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
635megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
636megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
637megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
638megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes completed"
639megasas_io_read(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu"
640megasas_io_write(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu"
e8f943c3
HR
641megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
642megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
643megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
644megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
645megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
646megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
647megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
648megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s alloc failed"
649megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
650megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: DCMD finish internal cmd %x lun %d"
651megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: Invalid internal DCMD %x"
652megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
653megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
654megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: invalid DCMD sge count %d"
e8f943c3
HR
655megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: invalid xfer len %ld, max %ld"
656megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
657megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: DCMD dummy xfer len %ld"
658megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
659megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
660megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
661megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: DCMD LD get info for dev %d"
662megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: DCMD PD get info for dev %d"
663megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: DCMD PD list query flags %x"
10d6530c 664megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld"
e8f943c3
HR
665megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: aborting frame %x"
666megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64 ""
667megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
668megasas_reset(void) "Reset"
669megasas_init(int sges, int cmds, const char *intr, const char *mode) "Using %d sges, %d cmds, %s, %s mode"
670megasas_msix_raise(int vector) "vector %d"
671megasas_irq_lower(void) "INTx"
672megasas_irq_raise(void) "INTx"
673megasas_intr_enabled(void) "Interrupts enabled"
674megasas_intr_disabled(void) "Interrupts disabled"
675megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x"
676megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
677megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
678megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
679
25a8bb96 680# hw/milkymist-ac97.c
47f08d7a
L
681milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
682milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
683milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
684milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
685milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
686milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
687milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
688milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
689milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
690milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
e4dc6d2c
MW
691
692# hw/milkymist-hpdmc.c
47f08d7a
L
693milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
694milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
b4e37d98
MW
695
696# hw/milkymist-memcard.c
47f08d7a
L
697milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
698milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
07424544 699
57aa265d 700# hw/milkymist-minimac2.c
47f08d7a
L
701milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
702milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
703milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
704milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
705milkymist_minimac2_tx_frame(uint32_t length) "length %u"
706milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
707milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
708milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
709milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
710milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
711milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
5ee18b9c
MW
712
713# hw/milkymist-pfpu.c
47f08d7a
L
714milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
715milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
716milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
717milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
87a381ec
MW
718
719# hw/milkymist-softusb.c
47f08d7a
L
720milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
721milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
722milkymist_softusb_mevt(uint8_t m) "m %d"
723milkymist_softusb_kevt(uint8_t m) "m %d"
47f08d7a 724milkymist_softusb_pulse_irq(void) "Pulse IRQ"
96832424
MW
725
726# hw/milkymist-sysctl.c
47f08d7a
L
727milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
728milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
729milkymist_sysctl_icap_write(uint32_t value) "value %08x"
730milkymist_sysctl_start_timer0(void) "Start timer0"
731milkymist_sysctl_stop_timer0(void) "Stop timer0"
732milkymist_sysctl_start_timer1(void) "Start timer1"
733milkymist_sysctl_stop_timer1(void) "Stop timer1"
734milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
735milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
0670dadd
MW
736
737# hw/milkymist-tmu2.c
47f08d7a
L
738milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
739milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
740milkymist_tmu2_start(void) "Start TMU"
741milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
883de16b
MW
742
743# hw/milkymist-uart.c
47f08d7a
L
744milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
745milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
fcfa3397
MW
746milkymist_uart_raise_irq(void) "Raise IRQ"
747milkymist_uart_lower_irq(void) "Lower IRQ"
d23948b1
MW
748
749# hw/milkymist-vgafb.c
47f08d7a
L
750milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
751milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
432d268c 752
83818f7c
HP
753# hw/mipsnet.c
754mipsnet_send(uint32_t size) "sending len=%u"
755mipsnet_receive(uint32_t size) "receiving len=%u"
756mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
903ec8ea 757mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
83818f7c
HP
758mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
759
1ae41f44
HP
760# hw/pc87312.c
761pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
762pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
763pc87312_info_floppy(uint32_t base) "base 0x%x"
764pc87312_info_ide(uint32_t base) "base 0x%x"
765pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
766pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
767
881d588a
DF
768# hw/scsi/vmw_pvscsi.c
769pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d"
770pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d"
771pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64""
772pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64""
773pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")"
774pvscsi_update_irq_msi(void) "sending MSI notification"
775pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx"
776pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx"
777pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u"
6e860b5d 778pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu"
881d588a
DF
779pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)"
780pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x"
781pvscsi_command_complete_data_run(void) "not all data required for command transferred"
782pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes"
783pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul"
784pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64""
785pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected"
786pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected"
787pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx"
788pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored"
789pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]"
790pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived"
791pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u"
792pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64""
793pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x"
794pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64""
795pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64""
796pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64""
797pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes"
798pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d"
799pvscsi_state(const char* state) "starting %s ..."
800pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64""
801pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u"
802
432d268c 803# xen-all.c
47f08d7a 804xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
20581d20 805xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
432d268c
JN
806
807# xen-mapcache.c
689d7e2f
SH
808xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
809xen_remap_bucket(uint64_t index) "index %#"PRIx64
47f08d7a 810xen_map_cache_return(void* ptr) "%p"
050a0ddf 811
01195b73 812# hw/xen_platform.c
47f08d7a 813xen_platform_log(char *s) "xen platform: %s"
00dccaf1
KW
814
815# qemu-coroutine.c
47f08d7a
L
816qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
817qemu_coroutine_yield(void *from, void *to) "from %p to %p"
818qemu_coroutine_terminate(void *co) "self %p"
b96e9247
KW
819
820# qemu-coroutine-lock.c
02ffb504 821qemu_co_queue_run_restart(void *co) "co %p"
bfe24e1a 822qemu_co_queue_next(void *nxt) "next %p"
47f08d7a
L
823qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
824qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
825qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
826qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
30c2f238
BS
827
828# hw/escc.c
47f08d7a
L
829escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
830escc_get_queue(char channel, int val) "channel %c get 0x%02x"
831escc_update_irq(int irq) "IRQ = %d"
832escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
833escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
834escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
835escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
836escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
837escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
838escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
839escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
840escc_kbd_command(int val) "Command %d"
841escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
bf4b9889 842
c589b249 843# block/iscsi.c
f4dfa67f 844iscsi_aio_write16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
c589b249 845iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
f4dfa67f 846iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
c589b249
RS
847iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
848
bf4b9889 849# hw/esp.c
3af4e9aa
HP
850esp_error_fifo_overrun(void) "FIFO overrun"
851esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
852esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
bf4b9889
BS
853esp_raise_irq(void) "Raise IRQ"
854esp_lower_irq(void) "Lower IRQ"
855esp_dma_enable(void) "Raise enable"
856esp_dma_disable(void) "Lower enable"
857esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
858esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
859esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
860esp_write_response(uint32_t status) "Transfer status (status=%d)"
861esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
862esp_command_complete(void) "SCSI Command complete"
863esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
864esp_command_complete_fail(void) "Command failed"
865esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
866esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
867esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
868esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
869esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
870esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
871esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
872esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
873esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
874esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
875esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
876esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
877esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
6915bff1 878esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
bf4b9889
BS
879esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
880esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
881esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
882esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
6fe84c18 883esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
fabaaf1d
HP
884esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
885esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
886esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
887esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
888esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
889esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
890esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
891esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
892esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
893esp_pci_dma_start(uint32_t val) "START (%.8x)"
894esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
895esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
89bd820a
SH
896
897# monitor.c
898handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
899monitor_protocol_emitter(void *mon) "mon %p"
afeecec2
DB
900monitor_protocol_event(uint32_t event, const char *evname, void *data) "event=%d name \"%s\" data %p"
901monitor_protocol_event_handler(uint32_t event, void *data, uint64_t last, uint64_t now) "event=%d data=%p last=%" PRId64 " now=%" PRId64
902monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
903monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64
904monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
342407fd
MF
905
906# hw/opencores_eth.c
907open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
908open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
909open_eth_update_irq(uint32_t v) "IRQ <- %x"
910open_eth_receive(unsigned len) "RX: len: %u"
911open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
912open_eth_receive_reject(void) "RX: rejected"
913open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
914open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
915open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
916open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
917open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
918open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
1f99b949 919
c572f23a 920# hw/9pfs/virtio-9p.c
7999f7e1 921v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
c572f23a
HPB
922v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
923v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
c76eaf13 924v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
c572f23a
HPB
925v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64""
926v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
927v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
928v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64""
929v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
930v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
931v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
932v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
933v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
934v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
935v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
936v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
937v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
2f008a8c 938v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
c572f23a 939v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
2f008a8c
AK
940v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
941v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
942v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
c572f23a
HPB
943v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
944v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
945v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
946v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
947v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
948v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
949v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
950v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
c76eaf13 951v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
c572f23a
HPB
952v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
953v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
954v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
955v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
956v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
957v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
c76eaf13
SW
958v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
959v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
c572f23a
HPB
960v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
961v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64""
962v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
963v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
964v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
ec0ceb17
BS
965
966# target-sparc/mmu_helper.c
967mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
968mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
969mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64""
970mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64""
971mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64""
972mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
973mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
974mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
11e66bca
BS
975
976# target-sparc/int_helper.c
977int_helper_set_softint(uint32_t softint) "new %08x"
978int_helper_clear_softint(uint32_t softint) "new %08x"
979int_helper_write_softint(uint32_t softint) "new %08x"
980int_helper_icache_freeze(void) "Instruction cache: freeze"
981int_helper_dcache_freeze(void) "Data cache: freeze"
870be6ad
BS
982
983# target-sparc/win_helper.c
984win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
985win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
986win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
987win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
988win_helper_done(uint32_t tl) "tl=%d"
989win_helper_retry(uint32_t tl) "tl=%d"
c57c4658
KW
990
991# dma-helpers.c
992dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d"
993dma_aio_cancel(void *dbs) "dbs=%p"
994dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
995dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d"
996dma_map_wait(void *dbs) "dbs=%p"
cdbc19dd
AL
997
998# console.h
437fe106
GH
999console_gfx_new(void) ""
1000console_txt_new(int w, int h) "%dx%d"
1001console_select(int nr) "%d"
0f7b2864 1002console_refresh(int interval) "interval %d ms"
da229ef3
GH
1003displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
1004displaysurface_create_from(void *display_surface, int w, int h, int bpp, int swap) "surface=%p, %dx%d, bpp %d, bswap %d"
1005displaysurface_free(void *display_surface) "surface=%p"
7c20b4a3
GH
1006displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
1007displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
72750018
AL
1008
1009# vga.c
1010ppm_save(const char *filename, void *display_surface) "%s surface=%p"
7a6404cd
GH
1011vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1012vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1013vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1014vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1015vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1016vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
eb2f9b02 1017vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
c480bb7d 1018
517a13c9
JQ
1019# savevm.c
1020
1021savevm_section_start(void) ""
1022savevm_section_end(unsigned int section_id) "section_id %u"
1023
3c12193d
JQ
1024# arch_init.c
1025migration_bitmap_sync_start(void) ""
1026migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64""
7ca1dfad 1027migration_throttle(void) ""
3c12193d 1028
c480bb7d
AL
1029# hw/qxl.c
1030disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
1031disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
95b752bc 1032qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
c480bb7d
AL
1033qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
1034qxl_destroy_primary(int qid) "%d"
1035qxl_enter_vga_mode(int qid) "%d"
1036qxl_exit_vga_mode(int qid) "%d"
1037qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64""
1038qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
1039qxl_interface_attach_worker(int qid) "%d"
1040qxl_interface_get_init_info(int qid) "%d"
1041qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
1042qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
1043qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
1044qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
1045qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
1046qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
a639ab04 1047qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
c480bb7d 1048qxl_io_read_unexpected(int qid) "%d"
917ae08c 1049qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
c480bb7d
AL
1050qxl_io_write(int qid, const char *mode, uint64_t addr, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " val=%"PRIu64" size=%u async=%d"
1051qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
1052qxl_post_load(int qid, const char *mode) "%d %s"
1053qxl_pre_load(int qid) "%d"
1054qxl_pre_save(int qid) "%d"
1055qxl_reset_surfaces(int qid) "%d"
1056qxl_ring_command_check(int qid, const char *mode) "%d %s"
1057qxl_ring_command_get(int qid, const char *mode) "%d %s"
1058qxl_ring_command_req_notification(int qid) "%d"
1059qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
1060qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
1061qxl_ring_cursor_req_notification(int qid) "%d"
1062qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
1063qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
1064qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
1065qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
1066qxl_soft_reset(int qid) "%d"
1067qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
1068qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
1069qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
1070qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
1071qemu_spice_wakeup(uint32_t qid) "%d"
c480bb7d
AL
1072qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
1073qxl_spice_destroy_surfaces_complete(int qid) "%d"
1074qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
1075qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
1076qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
1077qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
917ae08c 1078qxl_spice_monitors_config(int qid) "%d"
c480bb7d
AL
1079qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
1080qxl_spice_oom(int qid) "%d"
1081qxl_spice_reset_cursor(int qid) "%d"
1082qxl_spice_reset_image_cache(int qid) "%d"
1083qxl_spice_reset_memslots(int qid) "%d"
1084qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
1085qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
1086qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
917ae08c 1087qxl_send_events(int qid, uint32_t events) "%d %d"
511aefb0 1088qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
917ae08c 1089qxl_set_guest_bug(int qid) "%d"
a639ab04
AL
1090qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
1091qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
e0ac6097 1092qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
a639ab04
AL
1093qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
1094qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
e0ac6097 1095qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
d53291cf
AL
1096
1097# hw/qxl-render.c
1098qxl_render_blit_guest_primary_initialized(void) ""
1099qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
1100qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
1101qxl_render_update_area_done(void *cookie) "%p"
a2950fb6
AK
1102
1103# hw/spapr_pci.c
0ee2c058
AK
1104spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)"
1105spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
1106spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u"
1107spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
1108spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
a2950fb6 1109spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
500efa23
DG
1110
1111# hw/xics.c
1112xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
1113xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
1114xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
1115xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x"
1116xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x"
1117xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]"
1118xics_masked_pending(void) "set_irq_msi: masked pending"
1119xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]"
1120xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
1121xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
1122xics_ics_eoi(int nr) "ics_eoi: irq %#x"
e7c033c3
PB
1123
1124# hbitmap.c
1125hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx"
1126hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
1127hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64
7b18aad5
CH
1128
1129# target-s390x/ioinst.c
1130ioinst(const char *insn) "IOINST: %s"
1131ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
1132ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
1133ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
df1fe5bb
CH
1134
1135# hw/s390x/css.c
1136css_enable_facility(const char *facility) "CSS: enable %s"
1137css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
1138css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
1139css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
1140css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
1141css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
a5cf2bb4
CH
1142
1143# hw/s390x/virtio-ccw.c
1144virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
1145virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
c09e5bb1
KS
1146
1147# migration.c
1148migrate_set_state(int new_state) "new state %d"
9c775729
KS
1149
1150# kvm-all.c
1151kvm_ioctl(int type, void *arg) "type %d, arg %p"
1152kvm_vm_ioctl(int type, void *arg) "type %d, arg %p"
1153kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type %d, arg %p"
b76ac80a
KS
1154kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
1155
fa131d94
PB
1156# qom/object.c
1157object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
1158object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"