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1 | /** @file\r | |
2 | \r | |
3 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
4 | This program and the accompanying materials\r | |
5 | are licensed and made available under the terms and conditions of the BSD License\r | |
6 | which accompanies this distribution. The full text of the license may be found at\r | |
7 | http://opensource.org/licenses/bsd-license.php.\r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | \r | |
12 | **/\r | |
13 | \r | |
14 | #ifndef _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_\r | |
15 | #define _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_\r | |
16 | \r | |
17 | #include <PiPei.h>\r | |
18 | \r | |
19 | #include <Ppi/MasterBootMode.h>\r | |
20 | #include <Ppi/SdMmcHostController.h>\r | |
21 | \r | |
22 | #include <IndustryStandard/Pci.h>\r | |
23 | \r | |
24 | #include <Library/DebugLib.h>\r | |
25 | #include <Library/BaseLib.h>\r | |
26 | #include <Library/BaseMemoryLib.h>\r | |
27 | #include <Library/PciLib.h>\r | |
28 | #include <Library/PeiServicesLib.h>\r | |
29 | #include <Library/MemoryAllocationLib.h>\r | |
30 | \r | |
31 | #define SD_MMC_HC_PEI_SIGNATURE SIGNATURE_32 ('S', 'D', 'M', 'C')\r | |
32 | \r | |
33 | #define MAX_SD_MMC_HCS 8\r | |
34 | #define MAX_SD_MMC_SLOTS 6\r | |
35 | \r | |
36 | //\r | |
37 | // SD Host Controller SlotInfo Register Offset\r | |
38 | //\r | |
39 | #define SD_MMC_HC_PEI_SLOT_OFFSET 0x40\r | |
40 | \r | |
41 | typedef struct {\r | |
42 | UINT8 FirstBar:3; // bit 0:2\r | |
43 | UINT8 Reserved:1; // bit 3\r | |
44 | UINT8 SlotNum:3; // bit 4:6\r | |
45 | UINT8 Reserved1:1; // bit 7\r | |
46 | } SD_MMC_HC_PEI_SLOT_INFO;\r | |
47 | \r | |
48 | typedef struct {\r | |
49 | UINTN SlotNum;\r | |
50 | UINTN MmioBarAddr[MAX_SD_MMC_SLOTS];\r | |
51 | } SD_MMC_HC_PEI_BAR;\r | |
52 | \r | |
53 | typedef struct {\r | |
54 | UINTN Signature;\r | |
55 | EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;\r | |
56 | EFI_PEI_PPI_DESCRIPTOR PpiList;\r | |
57 | UINTN TotalSdMmcHcs;\r | |
58 | SD_MMC_HC_PEI_BAR MmioBar[MAX_SD_MMC_HCS];\r | |
59 | } SD_MMC_HC_PEI_PRIVATE_DATA;\r | |
60 | \r | |
61 | #define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a) CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)\r | |
62 | \r | |
63 | /**\r | |
64 | Get the MMIO base address of SD/MMC host controller.\r | |
65 | \r | |
66 | @param[in] This The protocol instance pointer.\r | |
67 | @param[in] ControllerId The ID of the SD/MMC host controller.\r | |
68 | @param[in,out] MmioBar The pointer to store the array of available\r | |
69 | SD/MMC host controller slot MMIO base addresses.\r | |
70 | The entry number of the array is specified by BarNum.\r | |
71 | @param[out] BarNum The pointer to store the supported bar number.\r | |
72 | \r | |
73 | @retval EFI_SUCCESS The operation succeeds.\r | |
74 | @retval EFI_INVALID_PARAMETER The parameters are invalid.\r | |
75 | \r | |
76 | **/\r | |
77 | EFI_STATUS\r | |
78 | EFIAPI\r | |
79 | GetSdMmcHcMmioBar (\r | |
80 | IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,\r | |
81 | IN UINT8 ControllerId,\r | |
82 | IN OUT UINTN **MmioBar,\r | |
83 | OUT UINT8 *BarNum\r | |
84 | );\r | |
85 | \r | |
86 | #endif\r |