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1 | /** @file\r | |
2 | ACPI Serial Port Console Redirection Table as defined by Microsoft in\r | |
3 | http://www.microsoft.com/whdc/system/platform/server/spcr.mspx\r | |
4 | \r | |
5 | Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
6 | (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r | |
7 | Copyright (c) 2014 - 2016, ARM Limited. All rights reserved.<BR>\r | |
8 | This program and the accompanying materials \r | |
9 | are licensed and made available under the terms and conditions of the BSD License \r | |
10 | which accompanies this distribution. The full text of the license may be found at \r | |
11 | http://opensource.org/licenses/bsd-license.php \r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
15 | **/\r | |
16 | \r | |
17 | #ifndef _SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_H_\r | |
18 | #define _SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_H_\r | |
19 | \r | |
20 | \r | |
21 | #include <IndustryStandard/Acpi.h>\r | |
22 | \r | |
23 | //\r | |
24 | // Ensure proper structure formats\r | |
25 | //\r | |
26 | #pragma pack(1)\r | |
27 | \r | |
28 | ///\r | |
29 | /// SPCR Revision (defined in spec)\r | |
30 | ///\r | |
31 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION 0x02\r | |
32 | \r | |
33 | ///\r | |
34 | /// Serial Port Console Redirection Table Format\r | |
35 | ///\r | |
36 | typedef struct {\r | |
37 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
38 | UINT8 InterfaceType;\r | |
39 | UINT8 Reserved1[3];\r | |
40 | EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE BaseAddress;\r | |
41 | UINT8 InterruptType;\r | |
42 | UINT8 Irq;\r | |
43 | UINT32 GlobalSystemInterrupt;\r | |
44 | UINT8 BaudRate;\r | |
45 | UINT8 Parity;\r | |
46 | UINT8 StopBits;\r | |
47 | UINT8 FlowControl;\r | |
48 | UINT8 TerminalType;\r | |
49 | UINT8 Reserved2;\r | |
50 | UINT16 PciDeviceId;\r | |
51 | UINT16 PciVendorId;\r | |
52 | UINT8 PciBusNumber;\r | |
53 | UINT8 PciDeviceNumber;\r | |
54 | UINT8 PciFunctionNumber;\r | |
55 | UINT32 PciFlags;\r | |
56 | UINT8 PciSegment;\r | |
57 | UINT32 Reserved3;\r | |
58 | } EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE;\r | |
59 | \r | |
60 | #pragma pack()\r | |
61 | \r | |
62 | //\r | |
63 | // SPCR Definitions\r | |
64 | //\r | |
65 | \r | |
66 | //\r | |
67 | // Interface Type\r | |
68 | //\r | |
69 | \r | |
70 | ///\r | |
71 | /// Full 16550 interface\r | |
72 | ///\r | |
73 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 0\r | |
74 | ///\r | |
75 | /// Full 16450 interface\r | |
76 | ///\r | |
77 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16450 1\r | |
78 | \r | |
79 | \r | |
80 | //\r | |
81 | // The Serial Port Subtypes for ARM are documented in Table 3 of the DBG2 Specification\r | |
82 | //\r | |
83 | \r | |
84 | ///\r | |
85 | /// ARM PL011 UART\r | |
86 | ///\r | |
87 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART 0x03\r | |
88 | \r | |
89 | ///\r | |
90 | /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated]\r | |
91 | ///\r | |
92 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_SBSA_GENERIC_UART_2X 0x0d\r | |
93 | \r | |
94 | ///\r | |
95 | /// ARM SBSA Generic UART\r | |
96 | ///\r | |
97 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_SBSA_GENERIC_UART 0x0e\r | |
98 | \r | |
99 | //\r | |
100 | // Interrupt Type\r | |
101 | //\r | |
102 | \r | |
103 | ///\r | |
104 | /// PC-AT-compatible dual-8259 IRQ interrupt\r | |
105 | ///\r | |
106 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_8259 0x1\r | |
107 | ///\r | |
108 | /// I/O APIC interrupt (Global System Interrupt)\r | |
109 | ///\r | |
110 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_APIC 0x2\r | |
111 | ///\r | |
112 | /// I/O SAPIC interrupt (Global System Interrupt)\r | |
113 | ///\r | |
114 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_SAPIC 0x4\r | |
115 | ///\r | |
116 | /// ARMH GIC interrupt (Global System Interrupt)\r | |
117 | ///\r | |
118 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC 0x8\r | |
119 | \r | |
120 | //\r | |
121 | // Baud Rate\r | |
122 | //\r | |
123 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_9600 3\r | |
124 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_19200 4\r | |
125 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_57600 6\r | |
126 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200 7\r | |
127 | \r | |
128 | //\r | |
129 | // Parity\r | |
130 | //\r | |
131 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY 0\r | |
132 | \r | |
133 | //\r | |
134 | // Stop Bits\r | |
135 | //\r | |
136 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1 1\r | |
137 | \r | |
138 | //\r | |
139 | // Flow Control\r | |
140 | //\r | |
141 | \r | |
142 | ///\r | |
143 | /// DCD required for transmit\r | |
144 | ///\r | |
145 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_DCD 0x1\r | |
146 | ///\r | |
147 | /// RTS/CTS hardware flow control\r | |
148 | ///\r | |
149 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_RTS_CTS 0x2\r | |
150 | ///\r | |
151 | /// XON/XOFF software control\r | |
152 | ///\r | |
153 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_XON_XOFF 0x4\r | |
154 | \r | |
155 | //\r | |
156 | // Terminal Type\r | |
157 | //\r | |
158 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT100 0\r | |
159 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT100_PLUS 1\r | |
160 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8 2\r | |
161 | #define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI 3\r | |
162 | \r | |
163 | #endif\r |