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1 | /** @file\r | |
2 | MSR Definitions.\r | |
3 | \r | |
4 | Provides defines for Machine Specific Registers(MSR) indexes. Data structures\r | |
5 | are provided for MSRs that contain one or more bit fields. If the MSR value\r | |
6 | returned is a single 32-bit or 64-bit value, then a data structure is not\r | |
7 | provided for that MSR.\r | |
8 | \r | |
9 | Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>\r | |
10 | This program and the accompanying materials\r | |
11 | are licensed and made available under the terms and conditions of the BSD License\r | |
12 | which accompanies this distribution. The full text of the license may be found at\r | |
13 | http://opensource.org/licenses/bsd-license.php\r | |
14 | \r | |
15 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
16 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
17 | \r | |
18 | @par Specification Reference:\r | |
19 | AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34\r | |
20 | \r | |
21 | **/\r | |
22 | \r | |
23 | #ifndef __FAM17_MSR_H\r | |
24 | #define __FAM17_MSR_H\r | |
25 | \r | |
26 | /**\r | |
27 | Secure Encrypted Virtualization (SEV) status register\r | |
28 | \r | |
29 | **/\r | |
30 | #define MSR_SEV_STATUS 0xc0010131\r | |
31 | \r | |
32 | /**\r | |
33 | MSR information returned for #MSR_SEV_STATUS\r | |
34 | **/\r | |
35 | typedef union {\r | |
36 | ///\r | |
37 | /// Individual bit fields\r | |
38 | ///\r | |
39 | struct {\r | |
40 | ///\r | |
41 | /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled\r | |
42 | ///\r | |
43 | UINT32 SevBit:1;\r | |
44 | \r | |
45 | ///\r | |
46 | /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled\r | |
47 | ///\r | |
48 | UINT32 SevEsBit:1;\r | |
49 | \r | |
50 | UINT32 Reserved:30;\r | |
51 | } Bits;\r | |
52 | ///\r | |
53 | /// All bit fields as a 32-bit value\r | |
54 | ///\r | |
55 | UINT32 Uint32;\r | |
56 | ///\r | |
57 | /// All bit fields as a 64-bit value\r | |
58 | ///\r | |
59 | UINT64 Uint64;\r | |
60 | } MSR_SEV_STATUS_REGISTER;\r | |
61 | \r | |
62 | #endif\r |