ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S

   1 #
   2 #  Copyright (c) 2014, ARM Limited. All rights reserved.
   3 #
   4 #  This program and the accompanying materials are licensed and made available
   5 #  under the terms and conditions of the BSD License which accompanies this
   6 #  distribution. The full text of the license may be found at
   7 #  http://opensource.org/licenses/bsd-license.php
   8 #
   9 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 #
  13
  14 #include <AsmMacroIoLibV8.h>
  15
  16 #define ICC_SRE_EL1             S3_0_C12_C12_5
  17 #define ICC_SRE_EL2             S3_4_C12_C9_5
  18 #define ICC_SRE_EL3             S3_6_C12_C12_5
  19 #define ICC_IGRPEN1_EL1         S3_0_C12_C12_7
  20 #define ICC_EOIR1_EL1           S3_0_C12_C12_1
  21 #define ICC_IAR1_EL1            S3_0_C12_C12_0
  22 #define ICC_PMR_EL1             S3_0_C4_C6_0
  23 #define ICC_BPR1_EL1            S3_0_C12_C12_3
  24
  25 .text
  26 .align 2
  27
  28 GCC_ASM_EXPORT(ArmGicGetControlSystemRegisterEnable)
  29 GCC_ASM_EXPORT(ArmGicSetControlSystemRegisterEnable)
  30 GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
  31 GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
  32 GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
  33 GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
  34 GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
  35 GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
  36
  37 //UINT32
  38 //EFIAPI
  39 //ArmGicGetControlSystemRegisterEnable (
  40 //  VOID
  41 //  );
  42 ASM_PFX(ArmGicGetControlSystemRegisterEnable):
  43         EL1_OR_EL2_OR_EL3(x1)
  44 1:  mrs x0, ICC_SRE_EL1
  45         b       4f
  46 2:  mrs x0, ICC_SRE_EL2
  47         b       4f
  48 3:  mrs x0, ICC_SRE_EL3
  49 4:  ret
  50
  51 //VOID
  52 //EFIAPI
  53 //ArmGicSetControlSystemRegisterEnable (
  54 //  IN UINT32         ControlSystemRegisterEnable
  55 //  );
  56 ASM_PFX(ArmGicSetControlSystemRegisterEnable):
  57         EL1_OR_EL2_OR_EL3(x1)
  58 1:  msr ICC_SRE_EL1, x0
  59         b       4f
  60 2:  msr ICC_SRE_EL2, x0
  61         b       4f
  62 3:  msr ICC_SRE_EL3, x0
  63 4:  isb
  64         ret
  65
  66 //VOID
  67 //ArmGicV3EnableInterruptInterface (
  68 //  VOID
  69 //  );
  70 ASM_PFX(ArmGicV3EnableInterruptInterface):
  71         mov     x0, #1
  72         msr     ICC_IGRPEN1_EL1, x0
  73         ret
  74
  75 //VOID
  76 //ArmGicV3DisableInterruptInterface (
  77 //  VOID
  78 //  );
  79 ASM_PFX(ArmGicV3DisableInterruptInterface):
  80         mov     x0, #0
  81         msr     ICC_IGRPEN1_EL1, x0
  82         ret
  83
  84 //VOID
  85 //ArmGicV3EndOfInterrupt (
  86 //  IN UINTN          InterruptId
  87 //  );
  88 ASM_PFX(ArmGicV3EndOfInterrupt):
  89         msr     ICC_EOIR1_EL1, x0
  90         ret
  91
  92 //UINTN
  93 //ArmGicV3AcknowledgeInterrupt (
  94 //  VOID
  95 //  );
  96 ASM_PFX(ArmGicV3AcknowledgeInterrupt):
  97         mrs     x0, ICC_IAR1_EL1
  98         ret
  99
 100 //VOID
 101 //ArmGicV3SetPriorityMask (
 102 //  IN UINTN          Priority
 103 //  );
 104 ASM_PFX(ArmGicV3SetPriorityMask):
 105         msr     ICC_PMR_EL1, x0
 106         ret
 107
 108 //VOID
 109 //ArmGicV3SetBinaryPointer (
 110 //  IN UINTN          BinaryPoint
 111 //  );
 112 ASM_PFX(ArmGicV3SetBinaryPointer):
 113         msr     ICC_BPR1_EL1, x0
 114         ret