3 * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include <Chipset/AArch64.h>
17 #include <Library/BaseMemoryLib.h>
18 #include <Library/MemoryAllocationLib.h>
19 #include <Library/ArmLib.h>
20 #include <Library/BaseLib.h>
21 #include <Library/DebugLib.h>
22 #include "AArch64Lib.h"
23 #include "ArmLibPrivate.h"
24 #include <Library/ArmArchTimerLib.h>
29 IN ARM_ARCH_TIMER_REGS Reg
,
33 // Check if the Generic/Architecture timer is implemented
34 if (ArmIsArchTimerImplemented ()) {
39 *((UINTN
*)DstBuf
) = ArmReadCntFrq ();
43 *((UINT64
*)DstBuf
) = ArmReadCntPct ();
47 *((UINTN
*)DstBuf
) = ArmReadCntkCtl();
51 *((UINTN
*)DstBuf
) = ArmReadCntpTval ();
55 *((UINTN
*)DstBuf
) = ArmReadCntpCtl ();
59 *((UINTN
*)DstBuf
) = ArmReadCntvTval ();
63 *((UINTN
*)DstBuf
) = ArmReadCntvCtl ();
67 *((UINT64
*)DstBuf
) = ArmReadCntvCt ();
71 *((UINT64
*)DstBuf
) = ArmReadCntpCval ();
75 *((UINT64
*)DstBuf
) = ArmReadCntvCval ();
79 *((UINT64
*)DstBuf
) = ArmReadCntvOff ();
86 DEBUG ((EFI_D_ERROR
, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
90 DEBUG ((EFI_D_ERROR
, "Unknown ARM Generic Timer register %x. \n ", Reg
));
93 DEBUG ((EFI_D_ERROR
, "Attempt to read ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
100 ArmArchTimerWriteReg (
101 IN ARM_ARCH_TIMER_REGS Reg
,
105 // Check if the Generic/Architecture timer is implemented
106 if (ArmIsArchTimerImplemented ()) {
111 ArmWriteCntFrq (*((UINTN
*)SrcBuf
));
115 DEBUG ((EFI_D_ERROR
, "Can't write to Read Only Register: CNTPCT \n"));
119 ArmWriteCntkCtl (*((UINTN
*)SrcBuf
));
123 ArmWriteCntpTval (*((UINTN
*)SrcBuf
));
127 ArmWriteCntpCtl (*((UINTN
*)SrcBuf
));
131 ArmWriteCntvTval (*((UINTN
*)SrcBuf
));
135 ArmWriteCntvCtl (*((UINTN
*)SrcBuf
));
139 DEBUG ((EFI_D_ERROR
, "Can't write to Read Only Register: CNTVCT \n"));
143 ArmWriteCntpCval (*((UINT64
*)SrcBuf
) );
147 ArmWriteCntvCval (*((UINT64
*)SrcBuf
) );
151 ArmWriteCntvOff (*((UINT64
*)SrcBuf
));
158 DEBUG ((EFI_D_ERROR
, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
162 DEBUG ((EFI_D_ERROR
, "Unknown ARM Generic Timer register %x. \n ", Reg
));
165 DEBUG ((EFI_D_ERROR
, "Attempt to write to ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
172 ArmArchTimerEnableTimer (
178 ArmArchTimerReadReg (CntpCtl
, (VOID
*)&TimerCtrlReg
);
179 TimerCtrlReg
|= ARM_ARCH_TIMER_ENABLE
;
180 ArmArchTimerWriteReg (CntpCtl
, (VOID
*)&TimerCtrlReg
);
185 ArmArchTimerDisableTimer (
191 ArmArchTimerReadReg (CntpCtl
, (VOID
*)&TimerCtrlReg
);
192 TimerCtrlReg
&= ~ARM_ARCH_TIMER_ENABLE
;
193 ArmArchTimerWriteReg (CntpCtl
, (VOID
*)&TimerCtrlReg
);
198 ArmArchTimerSetTimerFreq (
202 ArmArchTimerWriteReg (CntFrq
, (VOID
*)&FreqInHz
);
207 ArmArchTimerGetTimerFreq (
211 UINTN ArchTimerFreq
= 0;
212 ArmArchTimerReadReg (CntFrq
, (VOID
*)&ArchTimerFreq
);
213 return ArchTimerFreq
;
218 ArmArchTimerGetTimerVal (
223 ArmArchTimerReadReg (CntpTval
, (VOID
*)&ArchTimerVal
);
230 ArmArchTimerSetTimerVal (
234 ArmArchTimerWriteReg (CntpTval
, (VOID
*)&Val
);
239 ArmArchTimerGetSystemCount (
244 ArmArchTimerReadReg (CntPct
, (VOID
*)&SystemCount
);
250 ArmArchTimerGetTimerCtrlReg (
255 ArmArchTimerReadReg (CntpCtl
, (VOID
*)&Val
);
261 ArmArchTimerSetTimerCtrlReg (
265 ArmArchTimerWriteReg (CntpCtl
, (VOID
*)&Val
);
270 ArmArchTimerSetCompareVal (
274 ArmArchTimerWriteReg (CntpCval
, (VOID
*)&Val
);