3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Library/ArmPlatformLib.h>
16 #include <Library/ArmTrustZoneLib.h>
17 #include <Library/ArmPlatformSysConfigLib.h>
18 #include <Library/DebugLib.h>
19 #include <Library/IoLib.h>
20 #include <Library/PcdLib.h>
22 #include <Drivers/PL310L2Cache.h>
24 #include <ArmPlatform.h>
27 Initialize the Secure peripherals and memory regions
29 If Trustzone is supported by your platform then this function makes the required initialization
30 of the secure peripherals and memory regions.
34 ArmPlatformTrustzoneInit (
39 // Setup TZ Protection Controller
42 // Set Non Secure access for all devices
43 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_0
, 0xFFFFFFFF);
44 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_1
, 0xFFFFFFFF);
45 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_2
, 0xFFFFFFFF);
47 // Remove Non secure access to secure devices
48 TZPCClearDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_0
,
49 ARM_VE_DECPROT_BIT_TZPC
| ARM_VE_DECPROT_BIT_DMC_TZASC
| ARM_VE_DECPROT_BIT_NMC_TZASC
| ARM_VE_DECPROT_BIT_SMC_TZASC
);
51 TZPCClearDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_2
,
52 ARM_VE_DECPROT_BIT_EXT_MAST_TZ
| ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK
| ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK
| ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK
);
55 // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
58 // NOR Flash 0 non secure (BootMon)
59 TZASCSetRegion(ARM_VE_TZASC_BASE
,1,TZASC_REGION_ENABLED
,
60 ARM_VE_SMB_NOR0_BASE
,0,
61 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
63 // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
64 #if EDK2_ARMVE_SECURE_SYSTEM
65 //Note: Your OS Kernel must be aware of the secure regions before to enable this region
66 TZASCSetRegion(ARM_VE_TZASC_BASE
,2,TZASC_REGION_ENABLED
,
67 ARM_VE_SMB_NOR1_BASE
+ SIZE_32MB
,0,
68 TZASC_REGION_SIZE_32MB
, TZASC_REGION_SECURITY_NSRW
);
70 TZASCSetRegion(ARM_VE_TZASC_BASE
,2,TZASC_REGION_ENABLED
,
71 ARM_VE_SMB_NOR1_BASE
,0,
72 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
75 // Base of SRAM. Only half of SRAM in Non Secure world
76 // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
77 #if EDK2_ARMVE_SECURE_SYSTEM
78 //Note: Your OS Kernel must be aware of the secure regions before to enable this region
79 TZASCSetRegion(ARM_VE_TZASC_BASE
,3,TZASC_REGION_ENABLED
,
80 ARM_VE_SMB_SRAM_BASE
,0,
81 TZASC_REGION_SIZE_16MB
, TZASC_REGION_SECURITY_NSRW
);
83 TZASCSetRegion(ARM_VE_TZASC_BASE
,3,TZASC_REGION_ENABLED
,
84 ARM_VE_SMB_SRAM_BASE
,0,
85 TZASC_REGION_SIZE_32MB
, TZASC_REGION_SECURITY_NSRW
);
88 // Memory Mapped Peripherals. All in non secure world
89 TZASCSetRegion(ARM_VE_TZASC_BASE
,4,TZASC_REGION_ENABLED
,
90 ARM_VE_SMB_PERIPH_BASE
,0,
91 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
93 // MotherBoard Peripherals and On-chip peripherals.
94 TZASCSetRegion(ARM_VE_TZASC_BASE
,5,TZASC_REGION_ENABLED
,
95 ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE
,0,
96 TZASC_REGION_SIZE_256MB
, TZASC_REGION_SECURITY_NSRW
);
100 Initialize controllers that must setup at the early stage
102 Some peripherals must be initialized in Secure World.
103 For example, some L2x0 requires to be initialized in Secure World
107 ArmPlatformSecInitialize (
110 // The L2x0 controller must be intialize in Secure World
111 L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase
),
112 PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES
,L2x0_LATENCY_8_CYCLES
,L2x0_LATENCY_8_CYCLES
),
113 PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES
,L2x0_LATENCY_8_CYCLES
,L2x0_LATENCY_8_CYCLES
),
114 0,~0, // Use default setting for the Auxiliary Control Register
117 // Initialize the System Configuration
118 ArmPlatformSysConfigInitialize ();