3 * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Library/BaseLib.h>
19 #include <Library/BaseMemoryLib.h>
20 #include <Library/DebugLib.h>
21 #include <Library/IoLib.h>
22 #include <Library/PcdLib.h>
23 #include <Library/UefiBootServicesTableLib.h>
24 #include <Library/UefiRuntimeServicesTableLib.h>
25 #include <Library/UefiLib.h>
27 #include <Protocol/WatchdogTimer.h>
29 #include "SP805Watchdog.h"
31 EFI_EVENT EfiExitBootServicesEvent
= (EFI_EVENT
)NULL
;
34 Make sure the SP805 registers are unlocked for writing.
36 Note: The SP805 Watchdog Timer supports locking of its registers,
37 i.e. it inhibits all writes to avoid rogue software accidentally
38 corrupting their contents.
46 if( MmioRead32(SP805_WDOG_LOCK_REG
) == SP805_WDOG_LOCK_IS_LOCKED
) {
47 MmioWrite32(SP805_WDOG_LOCK_REG
, SP805_WDOG_SPECIAL_UNLOCK_CODE
);
52 Make sure the SP805 registers are locked and can not be overwritten.
54 Note: The SP805 Watchdog Timer supports locking of its registers,
55 i.e. it inhibits all writes to avoid rogue software accidentally
56 corrupting their contents.
64 if( MmioRead32(SP805_WDOG_LOCK_REG
) == SP805_WDOG_LOCK_IS_UNLOCKED
) {
65 // To lock it, just write in any number (except the special unlock code).
66 MmioWrite32(SP805_WDOG_LOCK_REG
, SP805_WDOG_LOCK_IS_LOCKED
);
71 Stop the SP805 watchdog timer from counting down by disabling interrupts.
80 if ( (MmioRead32(SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) != 0 ) {
81 MmioAnd32(SP805_WDOG_CONTROL_REG
, ~SP805_WDOG_CTRL_INTEN
);
86 Starts the SP805 counting down by enabling interrupts.
87 The count down will start from the value stored in the Load register,
88 not from the value where it was previously stopped.
97 if ( (MmioRead32(SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) == 0 ) {
98 MmioOr32(SP805_WDOG_CONTROL_REG
, SP805_WDOG_CTRL_INTEN
);
103 On exiting boot services we must make sure the SP805 Watchdog Timer
108 ExitBootServicesEvent (
119 This function registers the handler NotifyFunction so it is called every time
120 the watchdog timer expires. It also passes the amount of time since the last
121 handler call to the NotifyFunction.
122 If NotifyFunction is not NULL and a handler is not already registered,
123 then the new handler is registered and EFI_SUCCESS is returned.
124 If NotifyFunction is NULL, and a handler is already registered,
125 then that handler is unregistered.
126 If an attempt is made to register a handler when a handler is already registered,
127 then EFI_ALREADY_STARTED is returned.
128 If an attempt is made to unregister a handler when a handler is not registered,
129 then EFI_INVALID_PARAMETER is returned.
131 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
132 @param NotifyFunction The function to call when a timer interrupt fires. This
133 function executes at TPL_HIGH_LEVEL. The DXE Core will
134 register a handler for the timer interrupt, so it can know
135 how much time has passed. This information is used to
136 signal timer based events. NULL will unregister the handler.
138 @retval EFI_SUCCESS The watchdog timer handler was registered.
139 @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
141 @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
142 previously registered.
147 SP805RegisterHandler (
148 IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
149 IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
152 // ERROR: This function is not supported.
153 // The hardware watchdog will reset the board
154 return EFI_INVALID_PARAMETER
;
159 This function adjusts the period of timer interrupts to the value specified
160 by TimerPeriod. If the timer period is updated, then the selected timer
161 period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
162 the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
163 If an error occurs while attempting to update the timer period, then the
164 timer hardware will be put back in its state prior to this call, and
165 EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
166 is disabled. This is not the same as disabling the CPU's interrupts.
167 Instead, it must either turn off the timer hardware, or it must adjust the
168 interrupt controller so that a CPU interrupt is not generated when the timer
171 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
172 @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
173 the timer hardware is not programmable, then EFI_UNSUPPORTED is
174 returned. If the timer is programmable, then the timer period
175 will be rounded up to the nearest timer period that is supported
176 by the timer hardware. If TimerPeriod is set to 0, then the
177 timer interrupts will be disabled.
180 @retval EFI_SUCCESS The timer period was changed.
181 @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
182 @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
187 SP805SetTimerPeriod (
188 IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
189 IN UINT64 TimerPeriod
// In 100ns units
192 EFI_STATUS Status
= EFI_SUCCESS
;
197 if( TimerPeriod
== 0 ) {
198 // This is a watchdog stop request
202 // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
203 // The SP805 will count down to ZERO once, generate an interrupt and
204 // then it will again reload the initial value and start again.
205 // On the second time when it reaches ZERO, it will actually reset the board.
206 // Therefore, we need to load half the required delay.
208 // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
212 // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
214 Ticks64bit
= DivU64x32(MultU64x32(TimerPeriod
, (UINTN
)PcdGet32(PcdSP805WatchdogClockFrequencyInHz
)), 20000000);
216 // The registers in the SP805 are only 32 bits
217 if(Ticks64bit
> (UINT64
)0xFFFFFFFF) {
218 // We could load the watchdog with the maximum supported value but
219 // if a smaller value was requested, this could have the watchdog
220 // triggering before it was intended.
221 // Better generate an error to let the caller know.
222 Status
= EFI_DEVICE_ERROR
;
226 // Update the watchdog with a 32-bit value.
227 MmioWrite32(SP805_WDOG_LOAD_REG
, (UINT32
)Ticks64bit
);
229 // Start the watchdog
234 // Ensure the watchdog is locked before exiting.
240 This function retrieves the period of timer interrupts in 100 ns units,
241 returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
242 is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
243 returned, then the timer is currently disabled.
245 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
246 @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
247 0 is returned, then the timer is currently disabled.
250 @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
251 @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
256 SP805GetTimerPeriod (
257 IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
258 OUT UINT64
*TimerPeriod
261 EFI_STATUS Status
= EFI_SUCCESS
;
264 if (TimerPeriod
== NULL
) {
265 return EFI_INVALID_PARAMETER
;
268 // Check if the watchdog is stopped
269 if ( (MmioRead32(SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) == 0 ) {
270 // It is stopped, so return zero.
273 // Convert the Watchdog ticks into TimerPeriod
274 // Ensure 64bit arithmetic throughout because the Watchdog ticks may already
275 // be at the maximum 32 bit value and we still need to multiply that by 600.
276 ReturnValue
= MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG
), 600 );
279 *TimerPeriod
= ReturnValue
;
285 Interface structure for the Watchdog Architectural Protocol.
287 @par Protocol Description:
288 This protocol provides a service to set the amount of time to wait
289 before firing the watchdog timer, and it also provides a service to
290 register a handler that is invoked when the watchdog timer fires.
292 @par When the watchdog timer fires, control will be passed to a handler
293 if one has been registered. If no handler has been registered,
294 or the registered handler returns, then the system will be
295 reset by calling the Runtime Service ResetSystem().
297 @param RegisterHandler
298 Registers a handler that will be called each time the
299 watchdogtimer interrupt fires. TimerPeriod defines the minimum
300 time between timer interrupts, so TimerPeriod will also
301 be the minimum time between calls to the registered
303 NOTE: If the watchdog resets the system in hardware, then
304 this function will not have any chance of executing.
306 @param SetTimerPeriod
307 Sets the period of the timer interrupt in 100 nS units.
308 This function is optional, and may return EFI_UNSUPPORTED.
309 If this function is supported, then the timer period will
310 be rounded up to the nearest supported timer period.
312 @param GetTimerPeriod
313 Retrieves the period of the timer interrupt in 100 nS units.
316 EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer
= {
317 (EFI_WATCHDOG_TIMER_REGISTER_HANDLER
) SP805RegisterHandler
,
318 (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD
) SP805SetTimerPeriod
,
319 (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD
) SP805GetTimerPeriod
323 Initialize the state information for the Watchdog Timer Architectural Protocol.
325 @param ImageHandle of the loaded driver
326 @param SystemTable Pointer to the System Table
328 @retval EFI_SUCCESS Protocol registered
329 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
330 @retval EFI_DEVICE_ERROR Hardware problems
336 IN EFI_HANDLE ImageHandle
,
337 IN EFI_SYSTEM_TABLE
*SystemTable
343 // Unlock access to the SP805 registers
346 // Stop the watchdog from triggering unexpectedly
349 // Set the watchdog to reset the board when triggered
350 if ((MmioRead32(SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_RESEN
) == 0) {
351 MmioOr32 (SP805_WDOG_CONTROL_REG
, SP805_WDOG_CTRL_RESEN
);
354 // Prohibit any rogue access to SP805 registers
358 // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
359 // This will avoid conflicts with the universal watchdog
361 ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL
, &gEfiWatchdogTimerArchProtocolGuid
);
363 // Register for an ExitBootServicesEvent
364 Status
= gBS
->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES
, TPL_NOTIFY
, ExitBootServicesEvent
, NULL
, &EfiExitBootServicesEvent
);
365 if (EFI_ERROR(Status
)) {
366 Status
= EFI_OUT_OF_RESOURCES
;
370 // Install the Timer Architectural Protocol onto a new handle
372 Status
= gBS
->InstallMultipleProtocolInterfaces(
374 &gEfiWatchdogTimerArchProtocolGuid
, &gWatchdogTimer
,
377 if (EFI_ERROR(Status
)) {
378 Status
= EFI_OUT_OF_RESOURCES
;
383 if(EFI_ERROR(Status
)) {
384 // The watchdog failed to initialize