3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Chipset/ArmV7.h>
17 #include "PrePeiCore.h"
19 extern EFI_PEI_PPI_DESCRIPTOR
*gSecPpiTable
;
33 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
36 EFI_SEC_PEI_HAND_OFF SecCoreData
;
40 // Bind this information into the SEC hand-off state
41 // Note: this must be in sync with the stuff in the asm file
42 // Note also: HOBs (pei temp ram) MUST be above stack
44 SecCoreData
.DataSize
= sizeof(EFI_SEC_PEI_HAND_OFF
);
45 SecCoreData
.BootFirmwareVolumeBase
= (VOID
*)(UINTN
)PcdGet32 (PcdNormalFvBaseAddress
);
46 SecCoreData
.BootFirmwareVolumeSize
= PcdGet32 (PcdNormalFvSize
);
47 SecCoreData
.TemporaryRamBase
= (VOID
*)(UINTN
)PcdGet32 (PcdCPUCoresNonSecStackBase
); // We consider we run on the primary core (and so we use the first stack)
48 SecCoreData
.TemporaryRamSize
= (UINTN
)(UINTN
)PcdGet32 (PcdCPUCoresNonSecStackSize
);
49 SecCoreData
.PeiTemporaryRamBase
= (VOID
*)((UINTN
)(SecCoreData
.TemporaryRamBase
) + (SecCoreData
.TemporaryRamSize
/ 2));
50 SecCoreData
.PeiTemporaryRamSize
= SecCoreData
.TemporaryRamSize
/ 2;
51 SecCoreData
.StackBase
= SecCoreData
.TemporaryRamBase
;
52 SecCoreData
.StackSize
= SecCoreData
.TemporaryRamSize
- SecCoreData
.PeiTemporaryRamSize
;
54 // jump to pei core entry point
55 (PeiCoreEntryPoint
)(&SecCoreData
, (VOID
*)&gSecPpiTable
);