2 Main file supporting the transition to PEI Core in Normal World for Versatile Express
4 Copyright (c) 2011, ARM Limited. All rights reserved.
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef __PREPEICORE_H_
11 #define __PREPEICORE_H_
13 #include <Library/ArmLib.h>
14 #include <Library/ArmPlatformLib.h>
15 #include <Library/BaseMemoryLib.h>
16 #include <Library/DebugLib.h>
17 #include <Library/IoLib.h>
18 #include <Library/PcdLib.h>
21 #include <Ppi/TemporaryRamSupport.h>
25 OUT UINTN
*PpiListSize
,
26 OUT EFI_PEI_PPI_DESCRIPTOR
**PpiList
31 PrePeiCoreTemporaryRamSupport (
32 IN CONST EFI_PEI_SERVICES
**PeiServices
,
33 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
34 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
43 // Vector Table for Pei Phase
52 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
56 * This is the main function for secondary cores. They loop around until a non Null value is written to
57 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
58 * Note:The secondary cores, while executing secondary_main, assumes that:
59 * : SGI 0 is configured as Non-secure interrupt
60 * : Priority Mask is configured to allow SGI 0
61 * : Interrupt Distributor and CPU interfaces are enabled
71 PeiCommonExceptionEntry (