RVCT is obsolete and no longer used.
Remove support for it.
Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
+++ /dev/null
-//\r
-// Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r
-//\r
-// SPDX-License-Identifier: BSD-2-Clause-Patent\r
-//\r
-//\r
-\r
-#include <Library/ArmLib.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- EXPORT ArmPlatformPeiBootAction\r
- EXPORT ArmPlatformGetCorePosition\r
- EXPORT ArmPlatformGetPrimaryCoreMpId\r
- EXPORT ArmPlatformIsPrimaryCore\r
-\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
-\r
- PRESERVE8\r
- AREA ArmPlatformNullHelper, CODE, READONLY\r
-\r
-ArmPlatformPeiBootAction FUNCTION\r
- bx lr\r
- ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformGetCorePosition (\r
-// IN UINTN MpId\r
-// );\r
-ArmPlatformGetCorePosition FUNCTION\r
- and r1, r0, #ARM_CORE_MASK\r
- and r0, r0, #ARM_CLUSTER_MASK\r
- add r0, r1, r0, LSR #7\r
- bx lr\r
- ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformGetPrimaryCoreMpId (\r
-// VOID\r
-// );\r
-ArmPlatformGetPrimaryCoreMpId FUNCTION\r
- mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)\r
- bx lr\r
- ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformIsPrimaryCore (\r
-// IN UINTN MpId\r
-// );\r
-ArmPlatformIsPrimaryCore FUNCTION\r
- mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)\r
- and r0, r0, r1\r
- mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)\r
- cmp r0, r1\r
- moveq r0, #1\r
- movne r0, #0\r
- bx lr\r
- ENDFUNC\r
-\r
- END\r
-\r
\r
[Sources.Arm]\r
Arm/ArmPlatformHelper.S | GCC\r
- Arm/ArmPlatformHelper.asm | RVCT\r
\r
[Sources.AArch64]\r
AArch64/ArmPlatformHelper.S\r
+++ /dev/null
-//\r
-// Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r
-//\r
-// SPDX-License-Identifier: BSD-2-Clause-Patent\r
-//\r
-//\r
-\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- EXPORT ArmPlatformStackSet\r
- EXPORT ArmPlatformStackSetPrimary\r
- EXPORT ArmPlatformStackSetSecondary\r
-\r
- IMPORT ArmPlatformIsPrimaryCore\r
- IMPORT ArmPlatformGetCorePosition\r
- IMPORT ArmPlatformGetPrimaryCoreMpId\r
-\r
- IMPORT _gPcd_FixedAtBuild_PcdCoreCount\r
-\r
- PRESERVE8\r
- AREA ArmPlatformStackLib, CODE, READONLY\r
-\r
-//VOID\r
-//ArmPlatformStackSet (\r
-// IN UINTN StackBase,\r
-// IN UINTN MpId,\r
-// IN UINTN PrimaryStackSize,\r
-// IN UINTN SecondaryStackSize\r
-// );\r
-ArmPlatformStackSet FUNCTION\r
- // Save parameters\r
- mov r6, r3\r
- mov r5, r2\r
- mov r4, r1\r
- mov r3, r0\r
-\r
- // Save the Link register\r
- mov r7, lr\r
-\r
- // Identify Stack\r
- mov r0, r1\r
- bl ArmPlatformIsPrimaryCore\r
- cmp r0, #1\r
-\r
- // Restore parameters\r
- mov r0, r3\r
- mov r1, r4\r
- mov r2, r5\r
- mov r3, r6\r
-\r
- // Restore the Link register\r
- mov lr, r7\r
-\r
- beq ArmPlatformStackSetPrimary\r
- bne ArmPlatformStackSetSecondary\r
- ENDFUNC\r
-\r
-//VOID\r
-//ArmPlatformStackSetPrimary (\r
-// IN UINTN StackBase,\r
-// IN UINTN MpId,\r
-// IN UINTN PrimaryStackSize,\r
-// IN UINTN SecondaryStackSize\r
-// );\r
-ArmPlatformStackSetPrimary FUNCTION\r
- mov r4, lr\r
-\r
- // Add stack of primary stack to StackBase\r
- add r0, r0, r2\r
-\r
- // Compute SecondaryCoresCount * SecondaryCoreStackSize\r
- mov32 r1, FixedPcdGet32 (PcdCoreCount)\r
- sub r1, #1\r
- mul r3, r3, r1\r
-\r
- // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))\r
- add sp, r0, r3\r
-\r
- bx r4\r
- ENDFUNC\r
-\r
-//VOID\r
-//ArmPlatformStackSetSecondary (\r
-// IN UINTN StackBase,\r
-// IN UINTN MpId,\r
-// IN UINTN PrimaryStackSize,\r
-// IN UINTN SecondaryStackSize\r
-// );\r
-ArmPlatformStackSetSecondary FUNCTION\r
- mov r4, lr\r
- mov sp, r0\r
-\r
- // Get Core Position\r
- mov r0, r1\r
- bl ArmPlatformGetCorePosition\r
- mov r5, r0\r
-\r
- // Get Primary Core Position\r
- bl ArmPlatformGetPrimaryCoreMpId\r
- bl ArmPlatformGetCorePosition\r
-\r
- // Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)\r
- cmp r5, r0\r
- subhi r5, r5, #1\r
- add r5, r5, #1\r
-\r
- // Compute top of the secondary stack\r
- mul r3, r3, r5\r
-\r
- // Set stack\r
- add sp, sp, r3\r
-\r
- bx r4\r
- ENDFUNC\r
-\r
- END\r
ArmPlatformPkg/ArmPlatformPkg.dec\r
\r
[Sources.ARM]\r
- Arm/ArmPlatformStackLib.asm | RVCT\r
Arm/ArmPlatformStackLib.S | GCC\r
\r
[Sources.AARCH64]\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// SPDX-License-Identifier: BSD-2-Clause-Patent\r
-//\r
-//\r
-\r
-#include <AutoGen.h>\r
-\r
- IMPORT PeiCommonExceptionEntry\r
- EXPORT PeiVectorTable\r
-\r
- PRESERVE8\r
- AREA PrePeiCoreException, CODE, READONLY, CODEALIGN, ALIGN=5\r
-\r
-//============================================================\r
-//Default Exception Handlers\r
-//============================================================\r
-\r
-\r
-PeiVectorTable\r
- b _DefaultResetHandler\r
- b _DefaultUndefined\r
- b _DefaultSWI\r
- b _DefaultPrefetchAbort\r
- b _DefaultDataAbort\r
- b _DefaultReserved\r
- b _DefaultIrq\r
- b _DefaultFiq\r
-\r
-//\r
-// Default Exception handlers: There is no plan to return from any of these exceptions.\r
-// No context saving at all.\r
-//\r
-_DefaultResetHandler\r
- mov r1, lr\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #0\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultUndefined\r
- sub r1, LR, #4\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #1\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultSWI\r
- sub r1, LR, #4\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #2\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultPrefetchAbort\r
- sub r1, LR, #4\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #3\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultDataAbort\r
- sub r1, LR, #8\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #4\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultReserved\r
- mov r1, lr\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #5\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultIrq\r
- sub r1, LR, #4\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #6\r
- blx PeiCommonExceptionEntry\r
-\r
-_DefaultFiq\r
- sub r1, LR, #4\r
- cps #0x13 ; Switch to SVC for common stack\r
- mov r0, #7\r
- blx PeiCommonExceptionEntry\r
-\r
- END\r
+++ /dev/null
-//\r
-// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-//\r
-// SPDX-License-Identifier: BSD-2-Clause-Patent\r
-//\r
-//\r
-\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- IMPORT CEntryPoint\r
- IMPORT ArmPlatformGetCorePosition\r
- IMPORT ArmPlatformIsPrimaryCore\r
- IMPORT ArmReadMpidr\r
- IMPORT ArmPlatformPeiBootAction\r
- EXPORT _ModuleEntryPoint\r
-\r
- PRESERVE8\r
- AREA PrePeiCoreEntryPoint, CODE, READONLY\r
-\r
-StartupAddr DCD CEntryPoint\r
-\r
-_ModuleEntryPoint\r
- // Do early platform specific actions\r
- bl ArmPlatformPeiBootAction\r
-\r
- // Identify CPU ID\r
- bl ArmReadMpidr\r
- // Keep a copy of the MpId register value\r
- mov r5, r0\r
-\r
- // Is it the Primary Core ?\r
- bl ArmPlatformIsPrimaryCore\r
-\r
- // Get the top of the primary stacks (and the base of the secondary stacks)\r
- mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
-\r
- // r0 is equal to 1 if I am the primary core\r
- cmp r0, #1\r
- beq _SetupPrimaryCoreStack\r
-\r
-_SetupSecondaryCoreStack\r
- // r1 contains the base of the secondary stacks\r
-\r
- // Get the Core Position\r
- mov r6, r1 // Save base of the secondary stacks\r
- mov r0, r5\r
- bl ArmPlatformGetCorePosition\r
- // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
- add r0, r0, #1\r
-\r
- // StackOffset = CorePos * StackSize\r
- mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
- mul r0, r0, r2\r
- // SP = StackBase + StackOffset\r
- add sp, r6, r0\r
-\r
-_PrepareArguments\r
- // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- mov32 r2, FixedPcdGet32(PcdFvBaseAddress)\r
- ldr r1, [r2, #4]\r
-\r
- // Move sec startup address into a data register\r
- // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r3, StartupAddr\r
-\r
- // Jump to PrePeiCore C code\r
- // r0 = mp_id\r
- // r1 = pei_core_address\r
- mov r0, r5\r
- blx r3\r
-\r
-_SetupPrimaryCoreStack\r
- mov sp, r1\r
- mov32 r8, FixedPcdGet64 (PcdCPUCoresStackBase)\r
- mov32 r9, FixedPcdGet32 (PcdInitValueInTempStack)\r
- mov r10, r9\r
- mov r11, r9\r
- mov r12, r9\r
-0:stm r8!, {r9-r12}\r
- cmp r8, r1\r
- blt 0b\r
- b _PrepareArguments\r
-\r
-_NeverReturn\r
- b _NeverReturn\r
-\r
- END\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
-; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
- EXPORT SecSwitchStack\r
-\r
- AREA Switch_Stack, CODE, READONLY\r
-\r
-;/**\r
-; This allows the caller to switch the stack and return\r
-;\r
-; @param StackDelta Signed amount by which to modify the stack pointer\r
-;\r
-; @return Nothing. Goes to the Entry Point passing in the new parameters\r
-;\r
-;**/\r
-;VOID\r
-;EFIAPI\r
-;SecSwitchStack (\r
-; VOID *StackDelta\r
-; );\r
-;\r
-SecSwitchStack\r
- MOV R1, SP\r
- ADD R1, R0, R1\r
- MOV SP, R1\r
- BX LR\r
- END\r
\r
[Sources.ARM]\r
Arm/ArchPrePeiCore.c\r
- Arm/PrePeiCoreEntryPoint.asm | RVCT\r
Arm/PrePeiCoreEntryPoint.S | GCC\r
- Arm/SwitchStack.asm | RVCT\r
Arm/SwitchStack.S | GCC\r
- Arm/Exception.asm | RVCT\r
Arm/Exception.S | GCC\r
\r
[Sources.AARCH64]\r
\r
[Sources.ARM]\r
Arm/ArchPrePeiCore.c\r
- Arm/PrePeiCoreEntryPoint.asm | RVCT\r
Arm/PrePeiCoreEntryPoint.S | GCC\r
- Arm/SwitchStack.asm | RVCT\r
Arm/SwitchStack.S | GCC\r
- Arm/Exception.asm | RVCT\r
Arm/Exception.S | GCC\r
\r
[Sources.AARCH64]\r
+++ /dev/null
-//\r
-// Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>\r
-//\r
-// SPDX-License-Identifier: BSD-2-Clause-Patent\r
-//\r
-//\r
-\r
-#include <AutoGen.h>\r
-#include <Chipset/ArmV7.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- IMPORT CEntryPoint\r
- IMPORT ArmPlatformIsPrimaryCore\r
- IMPORT ArmReadMpidr\r
- IMPORT ArmPlatformPeiBootAction\r
- IMPORT ArmPlatformStackSet\r
- IMPORT mSystemMemoryEnd\r
-\r
- EXPORT _ModuleEntryPoint\r
-\r
- PRESERVE8\r
- AREA PrePiCoreEntryPoint, CODE, READONLY\r
-\r
-StartupAddr DCD CEntryPoint\r
-\r
-_ModuleEntryPoint\r
- // Do early platform specific actions\r
- bl ArmPlatformPeiBootAction\r
-\r
- // Get ID of this CPU in multi-core system\r
- bl ArmReadMpidr\r
- // Keep a copy of the MpId register value\r
- mov r8, r0\r
-\r
-_SetSVCMode\r
- // Enter SVC mode, Disable FIQ and IRQ\r
- mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r
- msr CPSR_c, r1\r
-\r
-// Check if we can install the stack at the top of the System Memory or if we need\r
-// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
-// at the top of the DRAM)\r
-_SystemMemoryEndInit\r
- adrll r1, mSystemMemoryEnd\r
- ldrd r2, r3, [r1]\r
- teq r3, #0\r
- moveq r1, r2\r
- mvnne r1, #0\r
-\r
-_SetupStackPosition\r
- // r1 = SystemMemoryTop\r
-\r
- // Calculate Top of the Firmware Device\r
- mov32 r2, FixedPcdGet32(PcdFdBaseAddress)\r
- mov32 r3, FixedPcdGet32(PcdFdSize)\r
- sub r3, r3, #1\r
- add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
-\r
- // UEFI Memory Size (stacks are allocated in this region)\r
- mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)\r
-\r
- //\r
- // Reserve the memory for the UEFI region (contain stacks on its top)\r
- //\r
-\r
- // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
- subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
- bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
- cmp r0, r4\r
- bge _SetupStack\r
-\r
- // Case the top of stacks is the FdBaseAddress\r
- mov r1, r2\r
-\r
-_SetupStack\r
- // r1 contains the top of the stack (and the UEFI Memory)\r
-\r
- // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
- // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
- // top of the memory space)\r
- adds r9, r1, #1\r
- bcs _SetupOverflowStack\r
-\r
-_SetupAlignedStack\r
- mov r1, r9\r
- b _GetBaseUefiMemory\r
-\r
-_SetupOverflowStack\r
- // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
- // aligned (4KB)\r
- mov32 r9, EFI_PAGE_MASK\r
- and r9, r9, r1\r
- sub r1, r1, r9\r
-\r
-_GetBaseUefiMemory\r
- // Calculate the Base of the UEFI Memory\r
- sub r9, r1, r4\r
-\r
-_GetStackBase\r
- // r1 = The top of the Mpcore Stacks\r
- // Stack for the primary core = PrimaryCoreStack\r
- mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
- sub r10, r1, r2\r
-\r
- // Stack for the secondary core = Number of Cores - 1\r
- mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
- sub r10, r10, r1\r
-\r
- // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
- mov r0, r10\r
- mov r1, r8\r
- //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
- mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
- mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
- bl ArmPlatformStackSet\r
-\r
- // Is it the Primary Core ?\r
- mov r0, r8\r
- bl ArmPlatformIsPrimaryCore\r
- cmp r0, #1\r
- bne _PrepareArguments\r
-\r
-_PrepareArguments\r
- mov r0, r8\r
- mov r1, r9\r
- mov r2, r10\r
-\r
- // Move sec startup address into a data register\r
- // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r4, StartupAddr\r
-\r
- // Jump to PrePiCore C code\r
- // r0 = MpId\r
- // r1 = UefiMemoryBase\r
- // r2 = StacksBase\r
- blx r4\r
-\r
-_NeverReturn\r
- b _NeverReturn\r
-\r
- END\r
[Sources.ARM]\r
Arm/ArchPrePi.c\r
Arm/ModuleEntryPoint.S | GCC\r
- Arm/ModuleEntryPoint.asm | RVCT\r
\r
[Sources.AArch64]\r
AArch64/ArchPrePi.c\r
[Sources.ARM]\r
Arm/ArchPrePi.c\r
Arm/ModuleEntryPoint.S | GCC\r
- Arm/ModuleEntryPoint.asm | RVCT\r
\r
[Sources.AArch64]\r
AArch64/ArchPrePi.c\r
#\r
#*/\r
\r
-# Define the following variable to specify an alternative toolchain to the one located in your PATH:\r
-# - RVCT_TOOLS_PATH: for RVCT and RVCTLINUX toolchains\r
-\r
-EDK2_TOOLCHAIN ?= RVCTLINUX\r
+EDK2_TOOLCHAIN ?= GCC5\r
EDK2_ARCH ?= ARM\r
EDK2_BUILD ?= DEBUG\r
\r
projects / mirror_edk2.git / commitdiff