2 // Copyright (c) 2011-2013, ARM Limited. All rights reserved.
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <AsmMacroIoLibV8.h>
16 #include "SecInternal.h"
21 GCC_ASM_IMPORT(CEntryPoint)
22 GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
23 GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
24 GCC_ASM_IMPORT(ArmPlatformSecBootAction)
25 GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
26 GCC_ASM_IMPORT(ArmDisableInterrupts)
27 GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
28 GCC_ASM_IMPORT(ArmReadMpidr)
29 GCC_ASM_IMPORT(ArmCallWFE)
30 GCC_ASM_EXPORT(_ModuleEntryPoint)
32 StartupAddr: .dword ASM_PFX(CEntryPoint)
34 ASM_PFX(_ModuleEntryPoint):
36 // NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
37 // and configure the system accordingly. EL2 is default if possible.
38 // If we started in EL3 we need to switch and run at EL2.
39 // If we are running at EL2 stay in EL2
40 // If we are starting at EL1 stay in EL1.
42 // Sec only runs in EL3. Othewise we jump to PEI without changing anything.
43 // If Sec runs we change to EL2 before switching to PEI.
45 // Which EL are we running at? Every EL needs some level of setup...
47 1:// If we are at EL1 or EL2 leave SEC for PEI.
48 2:b ASM_PFX(JumpToPEI)
49 // If we are at EL3 we need to configure it and switch to EL2
50 3:b ASM_PFX(MainEntryPoint)
52 ASM_PFX(MainEntryPoint):
53 // First ensure all interrupts are disabled
54 bl ASM_PFX(ArmDisableInterrupts)
56 // Ensure that the MMU and caches are off
57 bl ASM_PFX(ArmDisableCachesAndMmu)
59 // By default, we are doing a cold boot
60 mov x10, #ARM_SEC_COLD_BOOT
62 // Jump to Platform Specific Boot Action function
63 bl ASM_PFX(ArmPlatformSecBootAction)
67 bl ASM_PFX(ArmReadMpidr)
68 // Keep a copy of the MpId register value
71 // Is it the Primary Core ?
72 bl ASM_PFX(ArmPlatformIsPrimaryCore)
74 // Only the primary core initialize the memory (SMC)
78 // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
79 // Otherwise we have to wait the Primary Core to finish the initialization
80 cmp x10, #ARM_SEC_COLD_BOOT
81 b.ne _SetupSecondaryCoreStack
83 // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
84 bl ASM_PFX(ArmCallWFE)
85 // Now the Init Mem is initialized, we setup the secondary core stacks
86 b _SetupSecondaryCoreStack
89 // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
90 cmp x10, #ARM_SEC_COLD_BOOT
91 b.ne _SetupPrimaryCoreStack
93 // Initialize Init Boot Memory
94 bl ASM_PFX(ArmPlatformSecBootMemoryInit)
96 _SetupPrimaryCoreStack:
97 // Get the top of the primary stacks (and the base of the secondary stacks)
98 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
99 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
102 LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), x2)
104 // The reserved space for global variable must be 8-bytes aligned for pushing
105 // 64-bit variable on the stack
106 SetPrimaryStack (x1, x2, x3, x4)
109 _SetupSecondaryCoreStack:
110 // Get the top of the primary stacks (and the base of the secondary stacks)
111 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
112 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
115 // Get the Core Position
117 bl ASM_PFX(ArmPlatformGetCorePosition)
118 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
121 // StackOffset = CorePos * StackSize
122 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), x2)
124 // SP = StackBase + StackOffset
128 // Move sec startup address into a data register
129 // Ensure we're jumping to FV version of the code (not boot remapped alias)
132 // Jump to SEC C code
142 LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), x0)