2 // Copyright (c) 2011-2012, ARM Limited. All rights reserved.
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <AsmMacroIoLib.h>
16 #include "SecInternal.h"
18 INCLUDE AsmMacroIoLib.inc
21 IMPORT ArmPlatformSecBootAction
22 IMPORT ArmPlatformInitializeBootMemory
23 IMPORT ArmDisableInterrupts
24 IMPORT ArmDisableCachesAndMmu
29 EXPORT _ModuleEntryPoint
32 AREA SecEntryPoint, CODE, READONLY
34 StartupAddr DCD CEntryPoint
37 // First ensure all interrupts are disabled
38 blx ArmDisableInterrupts
40 // Ensure that the MMU and caches are off
41 blx ArmDisableCachesAndMmu
43 // Jump to Platform Specific Boot Action function
44 blx ArmPlatformSecBootAction
46 // Set VBAR to the start of the exception vectors in Secure Mode
47 ldr r0, =SecVectorTable
53 // Get ID of this CPU in Multicore system
54 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
57 // Is it the Primary Core ?
58 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
60 // Only the primary core initialize the memory (SMC)
64 // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
66 // Now the Init Mem is initialized, we setup the secondary core stacks
67 b _SetupSecondaryCoreStack
70 // Initialize Init Boot Memory
71 bl ArmPlatformInitializeBootMemory
73 // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
74 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
76 _SetupPrimaryCoreStack
77 // Get the top of the primary stacks (and the base of the secondary stacks)
78 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
79 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
82 LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
84 // The reserved space for global variable must be 8-bytes aligned for pushing
85 // 64-bit variable on the stack
86 SetPrimaryStack (r1, r2, r3)
89 _SetupSecondaryCoreStack
90 // Get the top of the primary stacks (and the base of the secondary stacks)
91 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
92 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
95 // Get the Core Position (ClusterId * 4) + CoreId
96 GetCorePositionInStack(r0, r5, r2)
97 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
100 // StackOffset = CorePos * StackSize
101 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
103 // SP = StackBase + StackOffset
107 // Move sec startup address into a data register
108 // Ensure we're jumping to FV version of the code (not boot remapped alias)
111 // Jump to SEC C code