3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
26 // Universal Host Controller Interface data structures and defines
28 #include <IndustryStandard/pci22.h>
31 extern UINTN gEHCDebugLevel
;
32 extern UINTN gEHCErrorLevel
;
35 #define STALL_1_MACRO_SECOND 1
36 #define STALL_1_MILLI_SECOND 1000 * STALL_1_MACRO_SECOND
37 #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND
39 #define MEM_UNIT_SIZE 128
42 #define SETUP_PACKET_PID_CODE 0x02
43 #define INPUT_PACKET_PID_CODE 0x01
44 #define OUTPUT_PACKET_PID_CODE 0x0
46 #define ITD_SELECT_TYPE 0x0
47 #define QH_SELECT_TYPE 0x01
48 #define SITD_SELECT_TYPE 0x02
49 #define FSTN_SELECT_TYPE 0x03
51 #define EHCI_SET_PORT_RESET_RECOVERY_TIME 50 * STALL_1_MILLI_SECOND
52 #define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME STALL_1_MILLI_SECOND
53 #define EHCI_GENERIC_TIMEOUT 50 * STALL_1_MILLI_SECOND
54 #define EHCI_GENERIC_RECOVERY_TIME 50 * STALL_1_MACRO_SECOND
55 #define EHCI_SYNC_REQUEST_POLLING_TIME 50 * STALL_1_MACRO_SECOND
56 #define EHCI_ASYNC_REQUEST_POLLING_TIME 50 * STALL_1_MILLI_SECOND
58 #define USB_BAR_INDEX 0 /* how many bytes away from USB_BASE to 0x10 */
60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
62 #define EHCI_MIN_PACKET_SIZE 8
63 #define EHCI_MAX_PACKET_SIZE 1024
64 #define EHCI_MAX_FRAME_LIST_LENGTH 1024
65 #define EHCI_BLOCK_SIZE_WITH_TT 64
66 #define EHCI_BLOCK_SIZE 512
67 #define EHCI_MAX_QTD_CAPACITY (EFI_PAGE_SIZE * 5)
69 #define NAK_COUNT_RELOAD 3
70 #define QTD_ERROR_COUNTER 3
71 #define HIGH_BANDWIDTH_PIPE_MULTIPLIER 1
73 #define QTD_STATUS_ACTIVE 0x80
74 #define QTD_STATUS_HALTED 0x40
75 #define QTD_STATUS_BUFFER_ERR 0x20
76 #define QTD_STATUS_BABBLE_ERR 0x10
77 #define QTD_STATUS_TRANSACTION_ERR 0x08
78 #define QTD_STATUS_DO_STOP_SPLIT 0x02
79 #define QTD_STATUS_DO_START_SPLIT 0
80 #define QTD_STATUS_DO_PING 0x01
81 #define QTD_STATUS_DO_OUT 0
86 #define MICRO_FRAME_0_CHANNEL 0x01
87 #define MICRO_FRAME_1_CHANNEL 0x02
88 #define MICRO_FRAME_2_CHANNEL 0x04
89 #define MICRO_FRAME_3_CHANNEL 0x08
90 #define MICRO_FRAME_4_CHANNEL 0x10
91 #define MICRO_FRAME_5_CHANNEL 0x20
92 #define MICRO_FRAME_6_CHANNEL 0x40
93 #define MICRO_FRAME_7_CHANNEL 0x80
95 #define CONTROL_TRANSFER 0x01
96 #define BULK_TRANSFER 0x02
97 #define SYNC_INTERRUPT_TRANSFER 0x04
98 #define ASYNC_INTERRUPT_TRANSFER 0x08
99 #define SYNC_ISOCHRONOUS_TRANSFER 0x10
100 #define ASYNC_ISOCHRONOUS_TRANSFER 0x20
104 // Enhanced Host Controller Registers definitions
106 extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding
;
107 extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName
;
109 #define USBCMD 0x0 /* Command Register Offset 00-03h */
110 #define USBCMD_RS 0x01 /* Run / Stop */
111 #define USBCMD_HCRESET 0x02 /* Host controller reset */
112 #define USBCMD_FLS_512 0x04 /* 512 elements (2048bytes) in Frame List */
113 #define USBCMD_FLS_256 0x08 /* 256 elements (1024bytes) in Frame List */
114 #define USBCMD_PSE 0x10 /* Periodic schedule enable */
115 #define USBCMD_ASE 0x20 /* Asynchronous schedule enable */
116 #define USBCMD_IAAD 0x40 /* Interrupt on async advance doorbell */
118 #define USBSTS 0x04 /* Statue Register Offset 04-07h */
119 #define USBSTS_HSE 0x10 /* Host system error */
120 #define USBSTS_IAA 0x20 /* Interrupt on async advance */
121 #define USBSTS_HCH 0x1000 /* Host controller halted */
122 #define USBSTS_PSS 0x4000 /* Periodic schedule status */
123 #define USBSTS_ASS 0x8000 /* Asynchronous schedule status */
125 #define USBINTR 0x08 /* Command Register Offset 08-0bh */
127 #define FRINDEX 0x0c /* Frame Index Offset 0c-0fh */
129 #define CTRLDSSGMENT 0x10 /* 4G Segment Selector Offset 10-13h */
131 #define PERIODICLISTBASE 0x14 /* Frame List Base Address Offset 14-17h */
133 #define ASYNCLISTADDR 0x18 /* Next Asynchronous List Address Offset 18-1bh */
135 #define CONFIGFLAG 0x40 /* Configured Flag Register Offset 40-43h */
136 #define CONFIGFLAG_CF 0x01 /* Configure Flag */
138 #define PORTSC 0x44 /* Port Status/Control Offset 44-47h */
139 #define PORTSC_CCS 0x01 /* Current Connect Status*/
140 #define PORTSC_CSC 0x02 /* Connect Status Change */
141 #define PORTSC_PED 0x04 /* Port Enable / Disable */
142 #define PORTSC_PEDC 0x08 /* Port Enable / Disable Change */
143 #define PORTSC_OCA 0x10 /* Over current Active */
144 #define PORTSC_OCC 0x20 /* Over current Change */
145 #define PORTSC_FPR 0x40 /* Force Port Resume */
146 #define PORTSC_SUSP 0x80 /* Port Suspend State */
147 #define PORTSC_PR 0x100 /* Port Reset */
148 #define PORTSC_LS_KSTATE 0x400 /* Line Status K-state */
149 #define PORTSC_LS_JSTATE 0x800 /* Line Status J-state */
150 #define PORTSC_PP 0x1000 /* Port Power */
151 #define PORTSC_PO 0x2000 /* Port Owner */
153 #define CAPLENGTH 0 /* Capability Register Length 00h */
155 #define HCIVERSION 0x02 /* Interface Version Number 02-03h */
157 #define HCSPARAMS 0x04 /* Structural Parameters 04-07h */
158 #define HCSP_NPORTS 0x0f /* Number of physical downstream ports on host controller */
160 #define HCCPARAMS 0x08 /* Capability Parameters 08-0bh */
161 #define HCCP_64BIT 0x01 /* 64-bit Addressing Capability */
162 #define HCCP_PFLF 0x02 /* Programmable Frame List Flag */
163 #define HCCP_EECP 0xff00 /* EHCI Extemded Capabilities Pointer */
165 #define HCSPPORTROUTE 0x0c /* Companion Port Route Description 60b */
167 #define CLASSC 0x09 /* Class Code 09-0bh */
169 #define USBBASE 0x10 /* Base Address to Memory-mapped Host Controller Register Space 10-13h */
171 #define SBRN 0x60 /* Serial Bus Release Number 60h */
173 #define FLADJ 0x61 /* Frame Length Adjustment Register 61h */
175 #define PORTWAKECAP 0x62 /* Port wake capablilities register(OPIONAL) 61-62h */
178 // PCI Configuration Registers
180 #define EHCI_PCI_CLASSC 0x09
181 #define EHCI_PCI_MEMORY_BASE 0x10
184 // Memory Offset Registers
186 #define EHCI_MEMORY_CAPLENGTH 0x0
187 #define EHCI_MEMORY_CONFIGFLAG 0x40
190 // USB Base Class Code,Sub-Class Code and Programming Interface
192 #define PCI_CLASSC_PI_EHCI 0x20
194 #define SETUP_PACKET_ID 0x2D
195 #define INPUT_PACKET_ID 0x69
196 #define OUTPUT_PACKET_ID 0xE1
197 #define ERROR_PACKET_ID 0x55
199 #define bit(a) (1 << (a))
201 #define GET_0B_TO_31B(Addr) (((UINTN) Addr) & (0xffffffff))
202 #define GET_32B_TO_63B(Addr) ((UINTN)RShiftU64((UINTN) Addr, 32) & (0xffffffff))
206 // Ehci Data and Ctrl Structures
220 UINT32 NextQtdTerminate
: 1;
222 UINT32 NextQtdPointer
: 27;
224 UINT32 AltNextQtdTerminate
: 1;
226 UINT32 AltNextQtdPointer
: 27;
230 UINT32 ErrorCount
: 2;
231 UINT32 CurrentPage
: 3;
232 UINT32 InterruptOnComplete
: 1;
233 UINT32 TotalBytes
: 15;
234 UINT32 DataToggle
: 1;
236 UINT32 CurrentOffset
: 12;
237 UINT32 BufferPointer0
: 20;
240 UINT32 BufferPointer1
: 20;
243 UINT32 BufferPointer2
: 20;
246 UINT32 BufferPointer3
: 20;
249 UINT32 BufferPointer4
: 20;
258 UINT32 QhTerminate
: 1;
259 UINT32 SelectType
: 2;
261 UINT32 QhHorizontalPointer
: 27;
263 UINT32 DeviceAddr
: 7;
265 UINT32 EndpointNum
: 4;
266 UINT32 EndpointSpeed
: 2;
267 UINT32 DataToggleControl
: 1;
268 UINT32 HeadReclamationFlag
: 1;
269 UINT32 MaxPacketLen
: 11;
270 UINT32 ControlEndpointFlag
: 1;
271 UINT32 NakCountReload
: 4;
273 UINT32 InerruptScheduleMask
: 8;
274 UINT32 SplitComletionMask
: 8;
277 UINT32 Multiplier
: 2;
280 UINT32 CurrentQtdPointer
: 27;
282 UINT32 NextQtdTerminate
: 1;
284 UINT32 NextQtdPointer
: 27;
286 UINT32 AltNextQtdTerminate
: 1;
288 UINT32 AltNextQtdPointer
: 27;
292 UINT32 ErrorCount
: 2;
293 UINT32 CurrentPage
: 3;
294 UINT32 InterruptOnComplete
: 1;
295 UINT32 TotalBytes
: 15;
296 UINT32 DataToggle
: 1;
298 UINT32 CurrentOffset
: 12;
299 UINT32 BufferPointer0
: 20;
301 UINT32 CompleteSplitMask
: 8;
303 UINT32 BufferPointer1
: 20;
306 UINT32 SplitBytes
: 7;
307 UINT32 BufferPointer2
: 20;
310 UINT32 BufferPointer3
: 20;
313 UINT32 BufferPointer4
: 20;
319 UINT32 LinkTerminate
: 1;
320 UINT32 SelectType
: 2;
322 UINT32 LinkPointer
: 27;
327 typedef struct _EHCI_QTD_ENTITY EHCI_QTD_ENTITY
;
328 typedef struct _EHCI_QH_ENTITY EHCI_QH_ENTITY
;
329 typedef struct _EHCI_ASYNC_REQUEST EHCI_ASYNC_REQUEST
;
333 struct _EHCI_QTD_ENTITY
{
336 UINT32 StaticTotalBytes
;
337 UINT32 StaticCurrentOffset
;
338 EHCI_QTD_ENTITY
*Prev
;
339 EHCI_QTD_ENTITY
*Next
;
340 EHCI_QTD_ENTITY
*AltNext
;
341 EHCI_QH_ENTITY
*SelfQh
;
346 struct _EHCI_QH_ENTITY
{
348 EHCI_QH_ENTITY
*Next
;
349 EHCI_QH_ENTITY
*Prev
;
350 EHCI_QTD_ENTITY
*FirstQtdPtr
;
351 EHCI_QTD_ENTITY
*LastQtdPtr
;
352 EHCI_QTD_ENTITY
*AltQtdPtr
;
357 #define GET_QH_ENTITY_ADDR(a) ((EHCI_QH_ENTITY *) a)
358 #define GET_QTD_ENTITY_ADDR(a) ((EHCI_QTD_ENTITY *) a)
362 // Ehci Managment Structures
364 #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
366 #define USB2_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
368 struct _EHCI_ASYNC_REQUEST
{
370 EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc
;
372 EHCI_ASYNC_REQUEST
*Prev
;
373 EHCI_ASYNC_REQUEST
*Next
;
374 EHCI_QH_ENTITY
*QhPtr
;
377 typedef struct _MEMORY_MANAGE_HEADER
{
379 UINTN BitArraySizeInBytes
;
380 UINT8
*MemoryBlockPtr
;
381 UINTN MemoryBlockSizeInBytes
;
383 struct _MEMORY_MANAGE_HEADER
*Next
;
384 } MEMORY_MANAGE_HEADER
;
386 typedef struct _USB2_HC_DEV
{
388 EFI_PCI_IO_PROTOCOL
*PciIo
;
389 EFI_USB2_HC_PROTOCOL Usb2Hc
;
390 UINTN PeriodicFrameListLength
;
391 VOID
*PeriodicFrameListBuffer
;
392 VOID
*PeriodicFrameListMap
;
394 EHCI_ASYNC_REQUEST
*AsyncRequestList
;
395 EFI_EVENT AsyncRequestEvent
;
396 EFI_UNICODE_STRING_TABLE
*ControllerNameTable
;
397 MEMORY_MANAGE_HEADER
*MemoryHeader
;
398 UINT8 Is64BitCapable
;
399 UINT32 High32BitAddr
;
400 EHCI_QH_ENTITY
*NULLQH
;
401 UINT32 UsbCapabilityLen
;
402 UINT16 DeviceSpeed
[16];
407 // Internal Functions Declaration
415 IN USB2_HC_DEV
*HcDev
,
416 OUT MEMORY_MANAGE_HEADER
**MemoryHeader
,
417 IN UINTN MemoryBlockSizeInPages
423 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
424 and use PciIo->Map to map the common buffer for Bus Master Read/Write.
429 MemoryHeader - MEMORY_MANAGE_HEADER to output
430 MemoryBlockSizeInPages - MemoryBlockSizeInPages
435 EFI_OUT_OF_RESOURCES Fail for no resources
436 EFI_UNSUPPORTED Unsupported currently
443 IN USB2_HC_DEV
*HcDev
,
444 IN MEMORY_MANAGE_HEADER
*MemoryHeader
455 MemoryHeader - MemoryHeader to be freed
460 EFI_INVALID_PARAMETER Parameter is error
466 InsertMemoryHeaderToList (
467 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
468 IN MEMORY_MANAGE_HEADER
*NewMemoryHeader
474 Insert Memory Header To List
478 MemoryHeader - MEMORY_MANAGE_HEADER
479 NewMemoryHeader - MEMORY_MANAGE_HEADER
489 AllocMemInMemoryBlock (
490 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
492 IN UINTN NumberOfMemoryUnit
498 Alloc Memory In MemoryBlock
502 MemoryHeader - MEMORY_MANAGE_HEADER
503 Pool - Place to store pointer to memory
504 NumberOfMemoryUnit - Number Of Memory Unit
509 EFI_NOT_FOUND Can't find the free memory
515 IsMemoryBlockEmptied (
516 IN MEMORY_MANAGE_HEADER
*MemoryHeaderPtr
522 Is Memory Block Emptied
526 MemoryHeaderPtr - MEMORY_MANAGE_HEADER
538 IN MEMORY_MANAGE_HEADER
*FirstMemoryHeader
,
539 IN MEMORY_MANAGE_HEADER
*NeedFreeMemoryHeader
549 FirstMemoryHeader - MEMORY_MANAGE_HEADER
550 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER
560 InitialMemoryManagement (
561 IN USB2_HC_DEV
*HcDev
567 Initialize Memory Management
576 EFI_DEVICE_ERROR Fail
582 DeinitialMemoryManagement (
583 IN USB2_HC_DEV
*HcDev
589 Deinitialize Memory Management
598 EFI_DEVICE_ERROR Fail
605 IN USB2_HC_DEV
*HcDev
,
618 Pool - Place to store pointer to the memory buffer
619 AllocSize - Alloc Size
624 EFI_DEVICE_ERROR Fail
631 IN USB2_HC_DEV
*HcDev
,
645 AllocSize - Pool size
658 ReadEhcCapabiltiyReg (
659 IN USB2_HC_DEV
*HcDev
,
660 IN UINT32 CapabiltiyRegAddr
,
667 Read Ehc Capabitlity register
672 CapabiltiyRegAddr - Ehc Capability register address
673 Data - A pointer to data read from register
678 EFI_DEVICE_ERROR Fail
684 ReadEhcOperationalReg (
685 IN USB2_HC_DEV
*HcDev
,
686 IN UINT32 OperationalRegAddr
,
693 Read Ehc Operation register
698 OperationalRegAddr - Ehc Operation register address
699 Data - A pointer to data read from register
704 EFI_DEVICE_ERROR Fail
710 WriteEhcOperationalReg (
711 IN USB2_HC_DEV
*HcDev
,
712 IN UINT32 OperationalRegAddr
,
719 Write Ehc Operation register
724 OperationalRegAddr - Ehc Operation register address
725 Data - 32bit write to register
730 EFI_DEVICE_ERROR Fail
737 IN USB2_HC_DEV
*HcDev
743 Set Ehc door bell bit
752 EFI_DEVICE_ERROR Fail
759 IN USB2_HC_DEV
*HcDev
,
766 Set the length of Frame List
771 Length - the required length of frame list
776 EFI_INVALID_PARAMETER Invalid parameter
777 EFI_DEVICE_ERROR Fail
783 IsFrameListProgrammable (
784 IN USB2_HC_DEV
*HcDev
790 Whether frame list is programmable
805 IsPeriodicScheduleEnabled (
806 IN USB2_HC_DEV
*HcDev
812 Whether periodic schedule is enabled
827 IsAsyncScheduleEnabled (
828 IN USB2_HC_DEV
*HcDev
834 Whether asynchronous schedule is enabled
850 IN USB2_HC_DEV
*HcDev
,
857 Whether port is enabled
873 IN USB2_HC_DEV
*HcDev
879 Whether Ehc is halted
895 IN USB2_HC_DEV
*HcDev
901 Whether Ehc is halted
917 IN USB2_HC_DEV
*HcDev
923 Whether Ehc is system error
932 FALSE No system error
939 IN EFI_USB2_HC_PROTOCOL
*This
,
946 Whether high speed device attached
962 IN USB2_HC_DEV
*HcDev
,
969 wait for Ehc reset or timeout
974 Timeout - timeout threshold
986 IN USB2_HC_DEV
*HcDev
,
993 wait for Ehc halt or timeout
998 Timeout - timeout threshold
1010 IN USB2_HC_DEV
*HcDev
,
1015 Routine Description:
1017 wait for Ehc not halt or timeout
1022 Timeout - timeout threshold
1033 WaitForEhcDoorbell (
1034 IN USB2_HC_DEV
*HcDev
,
1039 Routine Description:
1041 Wait for periodic schedule disable or timeout
1046 Timeout - timeout threshold
1057 WaitForAsyncScheduleEnable (
1058 IN USB2_HC_DEV
*HcDev
,
1063 Routine Description:
1065 Wait for Ehc asynchronous schedule enable or timeout
1070 Timeout - timeout threshold
1081 WaitForAsyncScheduleDisable (
1082 IN USB2_HC_DEV
*HcDev
,
1087 Routine Description:
1089 Wait for Ehc asynchronous schedule disable or timeout
1094 Timeout - timeout threshold
1105 WaitForPeriodicScheduleEnable (
1106 IN USB2_HC_DEV
*HcDev
,
1111 Routine Description:
1113 Wait for Ehc periodic schedule enable or timeout
1118 Timeout - timeout threshold
1129 WaitForPeriodicScheduleDisable (
1130 IN USB2_HC_DEV
*HcDev
,
1135 Routine Description:
1137 Wait for periodic schedule disable or timeout
1142 Timeout - timeout threshold
1154 IN USB2_HC_DEV
*HcDev
1158 Routine Description:
1160 Get the length of capability register
1169 EFI_DEVICE_ERROR Fail
1175 SetFrameListBaseAddr (
1176 IN USB2_HC_DEV
*HcDev
,
1177 IN UINT32 FrameBuffer
1181 Routine Description:
1183 Set base address of frame list first entry
1188 FrameBuffer - base address of first entry of frame list
1193 EFI_DEVICE_ERROR Fail
1200 IN USB2_HC_DEV
*HcDev
,
1201 IN EHCI_QH_ENTITY
*QhPtr
1205 Routine Description:
1207 Set address of first Async schedule Qh
1212 QhPtr - A pointer to first Qh in the Async schedule
1217 EFI_DEVICE_ERROR Fail
1223 SetCtrlDataStructSeg (
1224 IN USB2_HC_DEV
*HcDev
1228 Routine Description:
1230 Set address of first Async schedule Qh
1235 QhPtr - A pointer to first Qh in the Async schedule
1240 EFI_DEVICE_ERROR Fail
1247 IN USB2_HC_DEV
*HcDev
1251 Routine Description:
1253 Set Ehc port routing bit
1262 EFI_DEVICE_ERROR Fail
1268 EnablePeriodicSchedule (
1269 IN USB2_HC_DEV
*HcDev
1273 Routine Description:
1275 Enable periodic schedule
1284 EFI_DEVICE_ERROR Fail
1290 DisablePeriodicSchedule (
1291 IN USB2_HC_DEV
*HcDev
1295 Routine Description:
1297 Disable periodic schedule
1306 EFI_DEVICE_ERROR Fail
1312 EnableAsynchronousSchedule (
1313 IN USB2_HC_DEV
*HcDev
1317 Routine Description:
1319 Enable asynchrounous schedule
1328 EFI_DEVICE_ERROR Fail
1334 DisableAsynchronousSchedule (
1335 IN USB2_HC_DEV
*HcDev
1339 Routine Description:
1341 Disable asynchrounous schedule
1350 EFI_DEVICE_ERROR Fail
1356 StartScheduleExecution (
1357 IN USB2_HC_DEV
*HcDev
1361 Routine Description:
1363 Start Ehc schedule execution
1372 EFI_DEVICE_ERROR Fail
1379 IN USB2_HC_DEV
*HcDev
1383 Routine Description:
1394 EFI_DEVICE_ERROR Fail
1401 IN USB2_HC_DEV
*HcDev
1405 Routine Description:
1407 Clear Ehc all status bits
1416 EFI_DEVICE_ERROR Fail
1422 // EhciSched Functions
1425 InitialPeriodicFrameList (
1426 IN USB2_HC_DEV
*HcDev
,
1431 Routine Description:
1433 Initialize Periodic Schedule Frame List
1438 Length - Frame List Length
1443 EFI_DEVICE_ERROR Fail
1449 DeinitialPeriodicFrameList (
1450 IN USB2_HC_DEV
*HcDev
1454 Routine Description:
1456 Deinitialize Periodic Schedule Frame List
1470 CreatePollingTimer (
1471 IN USB2_HC_DEV
*HcDev
,
1472 IN EFI_EVENT_NOTIFY NotifyFunction
1476 Routine Description:
1478 Create Async Request Polling Timer
1483 NotifyFunction - Timer Notify Function
1488 EFI_DEVICE_ERROR Fail
1494 DestoryPollingTimer (
1495 IN USB2_HC_DEV
*HcDev
1499 Routine Description:
1501 Destory Async Request Polling Timer
1510 EFI_DEVICE_ERROR Fail
1517 IN USB2_HC_DEV
*HcDev
1521 Routine Description:
1523 Start Async Request Polling Timer
1532 EFI_DEVICE_ERROR Fail
1539 IN USB2_HC_DEV
*HcDev
1543 Routine Description:
1545 Stop Async Request Polling Timer
1554 EFI_DEVICE_ERROR Fail
1561 IN USB2_HC_DEV
*HcDev
,
1562 IN UINT8 DeviceAddr
,
1564 IN UINT8 DeviceSpeed
,
1565 IN UINTN MaxPacketLen
,
1566 OUT EHCI_QH_ENTITY
**QhPtrPtr
1570 Routine Description:
1572 Create Qh Structure and Pre-Initialize
1577 DeviceAddr - Address of Device
1578 Endpoint - Endpoint Number
1579 DeviceSpeed - Device Speed
1580 MaxPacketLen - Max Length of one Packet
1581 QhPtrPtr - A pointer of pointer to Qh for return
1586 EFI_DEVICE_ERROR Fail
1593 IN USB2_HC_DEV
*HcDev
,
1594 IN UINT8 DeviceAddr
,
1595 IN UINT8 DeviceSpeed
,
1596 IN UINTN MaxPacketLen
,
1597 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
1598 OUT EHCI_QH_ENTITY
**QhPtrPtr
1602 Routine Description:
1604 Create Qh for Control Transfer
1609 DeviceAddr - Address of Device
1610 DeviceSpeed - Device Speed
1611 MaxPacketLen - Max Length of one Packet
1612 Translator - Translator Transaction for SplitX
1613 QhPtrPtr - A pointer of pointer to Qh for return
1618 EFI_DEVICE_ERROR Fail
1625 IN USB2_HC_DEV
*HcDev
,
1626 IN UINT8 DeviceAddr
,
1627 IN UINT8 EndPointAddr
,
1628 IN UINT8 DeviceSpeed
,
1629 IN UINT8 DataToggle
,
1630 IN UINTN MaxPacketLen
,
1631 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
1632 OUT EHCI_QH_ENTITY
**QhPtrPtr
1636 Routine Description:
1638 Create Qh for Bulk Transfer
1643 DeviceAddr - Address of Device
1644 EndPointAddr - Address of Endpoint
1645 DeviceSpeed - Device Speed
1646 MaxPacketLen - Max Length of one Packet
1647 Translator - Translator Transaction for SplitX
1648 QhPtrPtr - A pointer of pointer to Qh for return
1653 EFI_DEVICE_ERROR Fail
1660 IN USB2_HC_DEV
*HcDev
,
1661 IN UINT8 DeviceAddr
,
1662 IN UINT8 EndPointAddr
,
1663 IN UINT8 DeviceSpeed
,
1664 IN UINT8 DataToggle
,
1665 IN UINTN MaxPacketLen
,
1667 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
1668 OUT EHCI_QH_ENTITY
**QhPtrPtr
1672 Routine Description:
1674 Create Qh for Control Transfer
1679 DeviceAddr - Address of Device
1680 EndPointAddr - Address of Endpoint
1681 DeviceSpeed - Device Speed
1682 MaxPacketLen - Max Length of one Packet
1683 Interval - value of interval
1684 Translator - Translator Transaction for SplitX
1685 QhPtrPtr - A pointer of pointer to Qh for return
1690 EFI_DEVICE_ERROR Fail
1697 IN USB2_HC_DEV
*HcDev
,
1698 IN EHCI_QH_ENTITY
*QhPtr
1702 Routine Description:
1704 Destory Qh Structure
1709 QhPtr - A pointer to Qh
1720 IN USB2_HC_DEV
*HcDev
,
1726 OUT EHCI_QTD_ENTITY
**QtdPtrPtr
1730 Routine Description:
1732 Create Qtd Structure and Pre-Initialize it
1737 DataPtr - A pointer to user data buffer to transfer
1738 DataLen - Length of user data to transfer
1739 PktId - Packet Identification of this Qtd
1740 Toggle - Data Toggle of this Qtd
1741 QtdStatus - Default value of status of this Qtd
1742 QtdPtrPtr - A pointer of pointer to Qtd for return
1747 EFI_OUT_OF_RESOURCES Cannot allocate resources
1754 IN USB2_HC_DEV
*HcDev
,
1755 IN UINT8
*DevReqPtr
,
1756 OUT EHCI_QTD_ENTITY
**QtdPtrPtr
1760 Routine Description:
1762 Create Qtd Structure for Setup
1767 DevReqPtr - A pointer to Device Request Data
1768 QtdPtrPtr - A pointer of pointer to Qtd for return
1773 EFI_OUT_OF_RESOURCES Cannot allocate resources
1780 IN USB2_HC_DEV
*HcDev
,
1785 OUT EHCI_QTD_ENTITY
**QtdPtrPtr
1789 Routine Description:
1791 Create Qtd Structure for data
1796 DataPtr - A pointer to user data buffer to transfer
1797 DataLen - Length of user data to transfer
1798 PktId - Packet Identification of this Qtd
1799 Toggle - Data Toggle of this Qtd
1800 QtdPtrPtr - A pointer of pointer to Qtd for return
1805 EFI_OUT_OF_RESOURCES Cannot allocate resources
1812 IN USB2_HC_DEV
*HcDev
,
1814 OUT EHCI_QTD_ENTITY
**QtdPtrPtr
1818 Routine Description:
1820 Create Qtd Structure for status
1825 PktId - Packet Identification of this Qtd
1826 QtdPtrPtr - A pointer of pointer to Qtd for return
1831 EFI_OUT_OF_RESOURCES Cannot allocate resources
1838 IN USB2_HC_DEV
*HcDev
,
1840 OUT EHCI_QTD_ENTITY
**QtdPtrPtr
1844 Routine Description:
1846 Create Qtd Structure for Alternative
1851 PktId - Packet Identification of this Qtd
1852 QtdPtrPtr - A pointer of pointer to Qtd for return
1857 EFI_OUT_OF_RESOURCES Cannot allocate resources
1864 IN USB2_HC_DEV
*HcDev
,
1866 IN UINT8
*RequestCursor
,
1867 IN UINT8
*DataCursor
,
1869 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
1870 OUT EHCI_QTD_ENTITY
**ControlQtdsHead
1874 Routine Description:
1876 Create Qtds list for Control Transfer
1881 DataPktId - Packet Identification of Data Qtds
1882 RequestCursor - A pointer to request structure buffer to transfer
1883 DataCursor - A pointer to user data buffer to transfer
1884 DataLen - Length of user data to transfer
1885 ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return
1890 EFI_DEVICE_ERROR Fail
1896 CreateBulkOrInterruptQtds (
1897 IN USB2_HC_DEV
*HcDev
,
1899 IN UINT8
*DataCursor
,
1901 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
1902 OUT EHCI_QTD_ENTITY
**QtdsHead
1906 Routine Description:
1908 Create Qtds list for Bulk or Interrupt Transfer
1913 PktId - Packet Identification of Qtds
1914 DataCursor - A pointer to user data buffer to transfer
1915 DataLen - Length of user data to transfer
1916 DataToggle - Data Toggle to start
1917 Translator - Translator Transaction for SplitX
1918 QtdsHead - A pointer of pointer to first Qtd for control tranfer for return
1923 EFI_DEVICE_ERROR Fail
1930 IN USB2_HC_DEV
*HcDev
,
1931 IN EHCI_QTD_ENTITY
*FirstQtdPtr
1935 Routine Description:
1937 Destory all Qtds in the list
1942 FirstQtdPtr - A pointer to first Qtd in the list
1953 IN EHCI_QTD_ENTITY
*PreQtdPtr
,
1954 IN EHCI_QTD_ENTITY
*QtdPtr
1958 Routine Description:
1964 PreQtdPtr - A pointer to pre Qtd
1965 QtdPtr - A pointer to next Qtd
1976 IN EHCI_QTD_ENTITY
*FirstQtdPtr
,
1977 IN EHCI_QTD_ENTITY
*AltQtdPtr
1981 Routine Description:
1983 Link AlterQtds together
1987 FirstQtdPtr - A pointer to first Qtd in the list
1988 AltQtdPtr - A pointer to alternative Qtd
1998 IN EHCI_QH_ENTITY
*QhPtr
,
1999 IN EHCI_QTD_ENTITY
*QtdEntryPtr
2003 Routine Description:
2005 Link Qtds list to Qh
2009 QhPtr - A pointer to Qh
2010 QtdPtr - A pointer to first Qtd in the list
2021 IN USB2_HC_DEV
*HcDev
,
2022 IN EHCI_QH_ENTITY
*QhPtr
2026 Routine Description:
2028 Link Qh to Async Schedule List
2033 QhPtr - A pointer to Qh
2038 EFI_DEVICE_ERROR Fail
2044 UnlinkQhFromAsyncList (
2045 IN USB2_HC_DEV
*HcDev
,
2046 IN EHCI_QH_ENTITY
*QhPtr
2050 Routine Description:
2052 Unlink Qh from Async Schedule List
2057 QhPtr - A pointer to Qh
2062 EFI_DEVICE_ERROR Fail
2068 LinkQhToPeriodicList (
2069 IN USB2_HC_DEV
*HcDev
,
2070 IN EHCI_QH_ENTITY
*QhPtr
2074 Routine Description:
2076 Link Qh to Periodic Schedule List
2081 QhPtr - A pointer to Qh
2091 UnlinkQhFromPeriodicList (
2092 IN USB2_HC_DEV
*HcDev
,
2093 IN EHCI_QH_ENTITY
*QhPtr
,
2098 Routine Description:
2100 Unlink Qh from Periodic Schedule List
2105 QhPtr - A pointer to Qh
2106 Interval - Interval of this periodic transfer
2116 LinkToAsyncReqeust (
2117 IN USB2_HC_DEV
*HcDev
,
2118 IN EHCI_ASYNC_REQUEST
*AsyncRequestPtr
2122 Routine Description:
2124 Llink AsyncRequest Entry to Async Request List
2129 AsyncRequestPtr - A pointer to Async Request Entry
2139 UnlinkFromAsyncReqeust (
2140 IN USB2_HC_DEV
*HcDev
,
2141 IN EHCI_ASYNC_REQUEST
*AsyncRequestPtr
2145 Routine Description:
2147 Unlink AsyncRequest Entry from Async Request List
2152 AsyncRequestPtr - A pointer to Async Request Entry
2163 IN EHCI_QTD_ENTITY
*FirstQtdPtr
2167 Routine Description:
2169 Number of Qtds in the list
2173 FirstQtdPtr - A pointer to first Qtd in the list
2177 Number of Qtds in the list
2186 IN UINT8
*BufferCursor
2190 Routine Description:
2196 BufferCursor - BufferCursor of the Qtd
2206 GetApproxiOfInterval (
2211 Routine Description:
2213 Get the approximate value in the 2 index sequence
2217 Interval - the value of interval
2221 approximate value of interval in the 2 index sequence
2228 IN EHCI_QTD_HW
*HwQtdPtr
2232 Routine Description:
2234 Get Qtd next pointer field
2238 HwQtdPtr - A pointer to hardware Qtd structure
2242 A pointer to next hardware Qtd structure
2249 IN EHCI_QTD_HW
*HwQtdPtr
2253 Routine Description:
2255 Whether Qtd status is active or not
2259 HwQtdPtr - A pointer to hardware Qtd structure
2271 IN EHCI_QTD_HW
*HwQtdPtr
2275 Routine Description:
2277 Whether Qtd status is halted or not
2281 HwQtdPtr - A pointer to hardware Qtd structure
2292 IsQtdStatusBufferError (
2293 IN EHCI_QTD_HW
*HwQtdPtr
2297 Routine Description:
2299 Whether Qtd status is buffer error or not
2303 HwQtdPtr - A pointer to hardware Qtd structure
2308 FALSE No buffer error
2314 IsQtdStatusBabbleError (
2315 IN EHCI_QTD_HW
*HwQtdPtr
2319 Routine Description:
2321 Whether Qtd status is babble error or not
2325 HwQtdPtr - A pointer to hardware Qtd structure
2330 FALSE No babble error
2336 IsQtdStatusTransactionError (
2337 IN EHCI_QTD_HW
*HwQtdPtr
2341 Routine Description:
2343 Whether Qtd status is transaction error or not
2347 HwQtdPtr - A pointer to hardware Qtd structure
2351 TRUE Transaction error
2352 FALSE No transaction error
2359 IN UINT8 EndPointAddress
2363 Routine Description:
2365 Whether is a DataIn direction transfer
2369 EndPointAddress - address of the endpoint
2381 IN USB2_HC_DEV
*HcDev
,
2382 IN EFI_USB_DATA_DIRECTION TransferDirection
,
2384 IN OUT UINTN
*DataLength
,
2386 OUT UINT8
**DataCursor
,
2391 Routine Description:
2393 Map address of user data buffer
2398 TransferDirection - direction of transfer
2399 Data - A pointer to user data buffer
2400 DataLength - length of user data
2401 PktId - Packte Identificaion
2402 DataCursor - mapped address to return
2403 DataMap - identificaion of this mapping to return
2408 EFI_DEVICE_ERROR Fail
2415 IN USB2_HC_DEV
*HcDev
,
2416 IN OUT VOID
*Request
,
2417 OUT UINT8
**RequestCursor
,
2418 OUT VOID
**RequestMap
2422 Routine Description:
2424 Map address of request structure buffer
2429 Request - A pointer to request structure
2430 RequestCursor - Mapped address of request structure to return
2431 RequestMap - Identificaion of this mapping to return
2436 EFI_DEVICE_ERROR Fail
2442 SetQtdBufferPointer (
2443 IN EHCI_QTD_HW
*QtdHwPtr
,
2449 Routine Description:
2451 Set data buffer pointers in Qtd
2455 QtdHwPtr - A pointer to Qtd hardware structure
2456 DataPtr - A pointer to user data buffer
2457 DataLen - Length of the user data buffer
2467 GetQtdAlternateNextPointer (
2468 IN EHCI_QTD_HW
*HwQtdPtr
2472 Routine Description:
2474 Get Qtd alternate next pointer field
2478 HwQtdPtr - A pointer to hardware Qtd structure
2482 A pointer to hardware alternate Qtd
2489 IN EHCI_QH_ENTITY
*QhPtr
2493 Routine Description:
2495 Zero out the fields in Qh structure
2499 QhPtr - A pointer to Qh structure
2509 UpdateAsyncRequestTransfer (
2510 IN EHCI_ASYNC_REQUEST
*AsyncRequestPtr
,
2511 IN UINT32 TransferResult
,
2516 Routine Description:
2518 Update asynchronous request transfer
2522 AsyncRequestPtr - A pointer to async request
2523 TransferResult - transfer result
2524 ErrQtdPos - postion of error Qtd
2535 DeleteAsyncRequestTransfer (
2536 IN USB2_HC_DEV
*HcDev
,
2537 IN UINT8 DeviceAddress
,
2538 IN UINT8 EndPointAddress
,
2539 OUT UINT8
*DataToggle
2543 Routine Description:
2545 Delete all asynchronous request transfer
2550 DeviceAddress - address of usb device
2551 EndPointAddress - address of endpoint
2552 DataToggle - stored data toggle
2557 EFI_DEVICE_ERROR Fail
2563 CleanUpAllAsyncRequestTransfer (
2564 IN USB2_HC_DEV
*HcDev
2568 Routine Description:
2570 Clean up all asynchronous request transfer
2584 IN USB2_HC_DEV
*HcDev
,
2585 IN BOOLEAN IsControl
,
2586 IN EHCI_QH_ENTITY
*QhPtr
,
2587 IN OUT UINTN
*ActualLen
,
2588 OUT UINT8
*DataToggle
,
2590 OUT UINT32
*TransferResult
2594 Routine Description:
2596 Execute Bulk or SyncInterrupt Transfer
2601 IsControl - Is control transfer or not
2602 QhPtr - A pointer to Qh
2603 ActualLen - Actual transfered Len
2604 DataToggle - Data Toggle
2605 TimeOut - TimeOut threshold
2606 TransferResult - Transfer result
2611 EFI_DEVICE_ERROR Error
2617 CheckQtdsTransferResult (
2618 IN BOOLEAN IsControl
,
2619 IN EHCI_QH_ENTITY
*QhPtr
,
2621 OUT UINTN
*ErrQtdPos
,
2622 OUT UINTN
*ActualLen
2626 Routine Description:
2628 Check transfer result of Qtds
2632 IsControl - Is control transfer or not
2633 QhPtr - A pointer to Qh
2634 Result - Transfer result
2635 ErrQtdPos - Error TD Position
2636 ActualLen - Actual Transfer Size
2647 AsyncRequestMoniter (
2653 Routine Description:
2655 Interrupt transfer periodic check handler
2659 Event - Interrupt event
2660 Context - Pointer to USB2_HC_DEV
2665 EFI_DEVICE_ERROR Fail
2673 IN USB2_HC_DEV
*HcDev
2677 Routine Description:
2679 Create the NULL QH to make it as the Async QH header
2693 IN USB2_HC_DEV
*HcDev
2697 ClearLegacySupport (
2698 IN USB2_HC_DEV
*HcDev
2703 IN USB2_HC_DEV
*HcDev
2708 DumpEHCIPortsStatus (
2709 IN USB2_HC_DEV
*HcDev