2 Intel FSP Header File definition from Intel Firmware Support Package External
3 Architecture Specification v2.0 and above.
5 Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef __FSP_HEADER_FILE_H__
11 #define __FSP_HEADER_FILE_H__
13 #define FSP_HEADER_REVISION_3 3
15 #define FSPE_HEADER_REVISION_1 1
16 #define FSPP_HEADER_REVISION_1 1
19 /// Fixed FSP header offset in the FSP image
21 #define FSP_INFO_HEADER_OFF 0x94
23 #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
25 #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
30 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
34 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.
38 /// Byte 0x04: Length of the FSP Information Header.
42 /// Byte 0x08: Reserved.
46 /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.
47 /// For revision v2.3 the value will be 0x23.
51 /// Byte 0x0B: Revision of the FSP Information Header.
52 /// The Current value for this field is 0x6.
56 /// Byte 0x0C: Revision of the FSP binary.
57 /// Major.Minor.Revision.Build
58 /// If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows:
59 /// 7 : 0 - Build Number
61 /// 23 : 16 - Minor Version
62 /// 31 : 24 - Major Version
63 /// If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision
64 /// while ExtendedImageRevision specifies the high-order bytes of the build number and revision.
65 /// 7 : 0 - Low Byte of Build Number
66 /// 15 : 8 - Low Byte of Revision
67 /// 23 : 16 - Minor Version
68 /// 31 : 24 - Major Version
72 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.
76 /// Byte 0x18: Size of the entire FSP binary.
80 /// Byte 0x1C: FSP binary preferred base address.
84 /// Byte 0x20: Attribute for the FSP binary.
86 UINT16 ImageAttribute
;
88 /// Byte 0x22: Attributes of the FSP Component.
90 UINT16 ComponentAttribute
;
92 /// Byte 0x24: Offset of the FSP configuration region.
94 UINT32 CfgRegionOffset
;
96 /// Byte 0x28: Size of the FSP configuration region.
100 /// Byte 0x2C: Reserved2.
104 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.
106 UINT32 TempRamInitEntryOffset
;
108 /// Byte 0x34: Reserved3.
112 /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.
114 UINT32 NotifyPhaseEntryOffset
;
116 /// Byte 0x3C: The offset for the API to initialize the memory.
118 UINT32 FspMemoryInitEntryOffset
;
120 /// Byte 0x40: The offset for the API to tear down temporary RAM.
122 UINT32 TempRamExitEntryOffset
;
124 /// Byte 0x44: The offset for the API to initialize the CPU and chipset.
126 UINT32 FspSiliconInitEntryOffset
;
128 /// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization.
129 /// This value is only valid if FSP HeaderRevision is >= 5.
130 /// If the value is set to 0x00000000, then this API is not available in this component.
132 UINT32 FspMultiPhaseSiInitEntryOffset
;
134 /// Byte 0x4C: Extended revision of the FSP binary.
135 /// This value is only valid if FSP HeaderRevision is >= 6.
136 /// ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision.
137 /// 7 : 0 - High Byte of Build Number
138 /// 15 : 8 - High Byte of Revision
139 /// The FSP binary build number can be decoded as follows:
140 /// Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0]
141 /// Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8]
142 /// Minor Version = ImageRevision[23:16]
143 /// Major Version = ImageRevision[31:24]
145 UINT16 ExtendedImageRevision
;
147 /// Byte 0x4E: Reserved4.
153 /// Signature of the FSP Extended Header
155 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')
158 /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.
162 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.
166 /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
170 /// Byte 0x08: FSP producer defined revision of the table.
174 /// Byte 0x09: Reserved for future use.
178 /// Byte 0x0A: FSP producer identification string
180 CHAR8 FspProducerId
[6];
182 /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
184 UINT32 FspProducerRevision
;
186 /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
188 UINT32 FspProducerDataSize
;
190 /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
192 } FSP_INFO_EXTENDED_HEADER
;
195 // A generic table search algorithm for additional tables can be implemented with a
196 // signature search algorithm until a terminator signature 'FSPP' is found.
198 #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')
199 #define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE
202 /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.
206 /// Byte 0x00: FSP Patch Table Signature "FSPP".
210 /// Byte 0x04: Size including the PatchData.
214 /// Byte 0x06: Revision is set to 0x01.
216 UINT8 HeaderRevision
;
218 /// Byte 0x07: Reserved for future use.
222 /// Byte 0x08: Number of entries to Patch.
224 UINT32 PatchEntryNum
;
226 /// Byte 0x0C: Patch Data.
228 // UINT32 PatchData[];
233 extern EFI_GUID gFspHeaderFileGuid
;