1 #------------------------------------------------------------------------------
3 # Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
4 # SPDX-License-Identifier: BSD-2-Clause-Patent
8 #------------------------------------------------------------------------------
11 # Float control word initial value:
12 # all exceptions masked, double-precision, round-to-nearest
14 ASM_PFX(mFpuControlWord): .word 0x027F
16 # Multimedia-extensions control word:
17 # all exceptions masked, round-to-nearest, flush to zero for masked underflow
19 ASM_PFX(mMmxControlWord): .long 0x01F80
24 # Initializes floating point units for requirement of UEFI specification.
26 # This function initializes floating-point control word to 0x027F (all exceptions
27 # masked,double-precision, round-to-nearest) and multimedia-extensions control word
28 # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
29 # for masked underflow).
31 ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
32 ASM_PFX(InitializeFloatingPointUnits):
37 # Initialize floating point units
40 fldcw ASM_PFX(mFpuControlWord)
43 # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
44 # whether the processor supports SSE instruction.
52 # Set OSFXSR bit 9 in CR4
59 # The processor should support SSE instruction and we can use
62 ldmxcsr ASM_PFX(mMmxControlWord)