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Add capsule > 4GB support. When capsule data is put above 4GB, IA32 PEI transfers...
[mirror_edk2.git] / MdeModulePkg / Universal / CapsulePei / Capsule.h
1 /** @file
2
3 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions
7 of the BSD License which accompanies this distribution. The
8 full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef _CAPSULE_PEIM_H_
17 #define _CAPSULE_PEIM_H_
18
19 #include <PiPei.h>
20 #include <Uefi/UefiSpec.h>
21
22 #include <Ppi/Capsule.h>
23 #include <Ppi/LoadFile.h>
24 #include <Ppi/ReadOnlyVariable2.h>
25 #include <Guid/CapsuleVendor.h>
26
27 #include <Library/DebugLib.h>
28 #include <Library/PeimEntryPoint.h>
29 #include <Library/PeiServicesLib.h>
30 #include <Library/BaseMemoryLib.h>
31 #include <Library/HobLib.h>
32 #include <Library/PeiServicesTablePointerLib.h>
33 #include <Library/PrintLib.h>
34 #include <Library/PeCoffLib.h>
35 #include <Library/PeCoffGetEntryPointLib.h>
36 #include <Library/PcdLib.h>
37 #include <Library/ReportStatusCodeLib.h>
38 #include <IndustryStandard/PeImage.h>
39 #include "Common/CommonHeader.h"
40
41 #pragma pack(1)
42
43 //
44 // Page-Map Level-4 Offset (PML4) and
45 // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
46 //
47
48 typedef union {
49 struct {
50 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
51 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
52 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
53 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
54 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
55 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
56 UINT64 Reserved:1; // Reserved
57 UINT64 MustBeZero:2; // Must Be Zero
58 UINT64 Available:3; // Available for use by system software
59 UINT64 PageTableBaseAddress:40; // Page Table Base Address
60 UINT64 AvabilableHigh:11; // Available for use by system software
61 UINT64 Nx:1; // No Execute bit
62 } Bits;
63 UINT64 Uint64;
64 } PAGE_MAP_AND_DIRECTORY_POINTER;
65
66 //
67 // Page Table Entry 2MB
68 //
69 typedef union {
70 struct {
71 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
72 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
73 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
74 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
75 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
76 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
77 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
78 UINT64 MustBe1:1; // Must be 1
79 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
80 UINT64 Available:3; // Available for use by system software
81 UINT64 PAT:1; //
82 UINT64 MustBeZero:8; // Must be zero;
83 UINT64 PageTableBaseAddress:31; // Page Table Base Address
84 UINT64 AvabilableHigh:11; // Available for use by system software
85 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
86 } Bits;
87 UINT64 Uint64;
88 } PAGE_TABLE_ENTRY;
89
90 #pragma pack()
91
92 typedef
93 EFI_STATUS
94 (*COALESCE_ENTRY) (
95 IN EFI_PEI_SERVICES **PeiServices,
96 IN EFI_CAPSULE_BLOCK_DESCRIPTOR *BlockList,
97 IN OUT VOID **MemoryBase,
98 IN OUT UINTN *MemorySize
99 );
100
101 #endif