]> git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/IndustryStandard/Acpi63.h
OvmfPkg/OvmfPkg.dec: Add definitions for CSM-related Guid & Protocol
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi63.h
1 /** @file
2 ACPI 6.3 definitions from the ACPI Specification Revision 6.3 Jan, 2019.
3
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2019, ARM Ltd. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8 **/
9
10 #ifndef _ACPI_6_3_H_
11 #define _ACPI_6_3_H_
12
13 #include <IndustryStandard/Acpi62.h>
14
15 //
16 // Ensure proper structure formats
17 //
18 #pragma pack(1)
19
20 ///
21 /// ACPI 6.3 Generic Address Space definition
22 ///
23 typedef struct {
24 UINT8 AddressSpaceId;
25 UINT8 RegisterBitWidth;
26 UINT8 RegisterBitOffset;
27 UINT8 AccessSize;
28 UINT64 Address;
29 } EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE;
30
31 //
32 // Generic Address Space Address IDs
33 //
34 #define EFI_ACPI_6_3_SYSTEM_MEMORY 0x00
35 #define EFI_ACPI_6_3_SYSTEM_IO 0x01
36 #define EFI_ACPI_6_3_PCI_CONFIGURATION_SPACE 0x02
37 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER 0x03
38 #define EFI_ACPI_6_3_SMBUS 0x04
39 #define EFI_ACPI_6_3_SYSTEM_CMOS 0x05
40 #define EFI_ACPI_6_3_PCI_BAR_TARGET 0x06
41 #define EFI_ACPI_6_3_IPMI 0x07
42 #define EFI_ACPI_6_3_GENERAL_PURPOSE_IO 0x08
43 #define EFI_ACPI_6_3_GENERIC_SERIAL_BUS 0x09
44 #define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL 0x0A
45 #define EFI_ACPI_6_3_FUNCTIONAL_FIXED_HARDWARE 0x7F
46
47 //
48 // Generic Address Space Access Sizes
49 //
50 #define EFI_ACPI_6_3_UNDEFINED 0
51 #define EFI_ACPI_6_3_BYTE 1
52 #define EFI_ACPI_6_3_WORD 2
53 #define EFI_ACPI_6_3_DWORD 3
54 #define EFI_ACPI_6_3_QWORD 4
55
56 //
57 // ACPI 6.3 table structures
58 //
59
60 ///
61 /// Root System Description Pointer Structure
62 ///
63 typedef struct {
64 UINT64 Signature;
65 UINT8 Checksum;
66 UINT8 OemId[6];
67 UINT8 Revision;
68 UINT32 RsdtAddress;
69 UINT32 Length;
70 UINT64 XsdtAddress;
71 UINT8 ExtendedChecksum;
72 UINT8 Reserved[3];
73 } EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER;
74
75 ///
76 /// RSD_PTR Revision (as defined in ACPI 6.3 spec.)
77 ///
78 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.3) says current value is 2
79
80 ///
81 /// Common table header, this prefaces all ACPI tables, including FACS, but
82 /// excluding the RSD PTR structure
83 ///
84 typedef struct {
85 UINT32 Signature;
86 UINT32 Length;
87 } EFI_ACPI_6_3_COMMON_HEADER;
88
89 //
90 // Root System Description Table
91 // No definition needed as it is a common description table header, the same with
92 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
93 //
94
95 ///
96 /// RSDT Revision (as defined in ACPI 6.3 spec.)
97 ///
98 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
99
100 //
101 // Extended System Description Table
102 // No definition needed as it is a common description table header, the same with
103 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
104 //
105
106 ///
107 /// XSDT Revision (as defined in ACPI 6.3 spec.)
108 ///
109 #define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
110
111 ///
112 /// Fixed ACPI Description Table Structure (FADT)
113 ///
114 typedef struct {
115 EFI_ACPI_DESCRIPTION_HEADER Header;
116 UINT32 FirmwareCtrl;
117 UINT32 Dsdt;
118 UINT8 Reserved0;
119 UINT8 PreferredPmProfile;
120 UINT16 SciInt;
121 UINT32 SmiCmd;
122 UINT8 AcpiEnable;
123 UINT8 AcpiDisable;
124 UINT8 S4BiosReq;
125 UINT8 PstateCnt;
126 UINT32 Pm1aEvtBlk;
127 UINT32 Pm1bEvtBlk;
128 UINT32 Pm1aCntBlk;
129 UINT32 Pm1bCntBlk;
130 UINT32 Pm2CntBlk;
131 UINT32 PmTmrBlk;
132 UINT32 Gpe0Blk;
133 UINT32 Gpe1Blk;
134 UINT8 Pm1EvtLen;
135 UINT8 Pm1CntLen;
136 UINT8 Pm2CntLen;
137 UINT8 PmTmrLen;
138 UINT8 Gpe0BlkLen;
139 UINT8 Gpe1BlkLen;
140 UINT8 Gpe1Base;
141 UINT8 CstCnt;
142 UINT16 PLvl2Lat;
143 UINT16 PLvl3Lat;
144 UINT16 FlushSize;
145 UINT16 FlushStride;
146 UINT8 DutyOffset;
147 UINT8 DutyWidth;
148 UINT8 DayAlrm;
149 UINT8 MonAlrm;
150 UINT8 Century;
151 UINT16 IaPcBootArch;
152 UINT8 Reserved1;
153 UINT32 Flags;
154 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg;
155 UINT8 ResetValue;
156 UINT16 ArmBootArch;
157 UINT8 MinorVersion;
158 UINT64 XFirmwareCtrl;
159 UINT64 XDsdt;
160 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
161 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
162 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
163 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
164 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
165 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
166 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
167 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
168 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
169 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
170 UINT64 HypervisorVendorIdentity;
171 } EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE;
172
173 ///
174 /// FADT Version (as defined in ACPI 6.3 spec.)
175 ///
176 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
177 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x03
178
179 //
180 // Fixed ACPI Description Table Preferred Power Management Profile
181 //
182 #define EFI_ACPI_6_3_PM_PROFILE_UNSPECIFIED 0
183 #define EFI_ACPI_6_3_PM_PROFILE_DESKTOP 1
184 #define EFI_ACPI_6_3_PM_PROFILE_MOBILE 2
185 #define EFI_ACPI_6_3_PM_PROFILE_WORKSTATION 3
186 #define EFI_ACPI_6_3_PM_PROFILE_ENTERPRISE_SERVER 4
187 #define EFI_ACPI_6_3_PM_PROFILE_SOHO_SERVER 5
188 #define EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC 6
189 #define EFI_ACPI_6_3_PM_PROFILE_PERFORMANCE_SERVER 7
190 #define EFI_ACPI_6_3_PM_PROFILE_TABLET 8
191
192 //
193 // Fixed ACPI Description Table Boot Architecture Flags
194 // All other bits are reserved and must be set to 0.
195 //
196 #define EFI_ACPI_6_3_LEGACY_DEVICES BIT0
197 #define EFI_ACPI_6_3_8042 BIT1
198 #define EFI_ACPI_6_3_VGA_NOT_PRESENT BIT2
199 #define EFI_ACPI_6_3_MSI_NOT_SUPPORTED BIT3
200 #define EFI_ACPI_6_3_PCIE_ASPM_CONTROLS BIT4
201 #define EFI_ACPI_6_3_CMOS_RTC_NOT_PRESENT BIT5
202
203 //
204 // Fixed ACPI Description Table Arm Boot Architecture Flags
205 // All other bits are reserved and must be set to 0.
206 //
207 #define EFI_ACPI_6_3_ARM_PSCI_COMPLIANT BIT0
208 #define EFI_ACPI_6_3_ARM_PSCI_USE_HVC BIT1
209
210 //
211 // Fixed ACPI Description Table Fixed Feature Flags
212 // All other bits are reserved and must be set to 0.
213 //
214 #define EFI_ACPI_6_3_WBINVD BIT0
215 #define EFI_ACPI_6_3_WBINVD_FLUSH BIT1
216 #define EFI_ACPI_6_3_PROC_C1 BIT2
217 #define EFI_ACPI_6_3_P_LVL2_UP BIT3
218 #define EFI_ACPI_6_3_PWR_BUTTON BIT4
219 #define EFI_ACPI_6_3_SLP_BUTTON BIT5
220 #define EFI_ACPI_6_3_FIX_RTC BIT6
221 #define EFI_ACPI_6_3_RTC_S4 BIT7
222 #define EFI_ACPI_6_3_TMR_VAL_EXT BIT8
223 #define EFI_ACPI_6_3_DCK_CAP BIT9
224 #define EFI_ACPI_6_3_RESET_REG_SUP BIT10
225 #define EFI_ACPI_6_3_SEALED_CASE BIT11
226 #define EFI_ACPI_6_3_HEADLESS BIT12
227 #define EFI_ACPI_6_3_CPU_SW_SLP BIT13
228 #define EFI_ACPI_6_3_PCI_EXP_WAK BIT14
229 #define EFI_ACPI_6_3_USE_PLATFORM_CLOCK BIT15
230 #define EFI_ACPI_6_3_S4_RTC_STS_VALID BIT16
231 #define EFI_ACPI_6_3_REMOTE_POWER_ON_CAPABLE BIT17
232 #define EFI_ACPI_6_3_FORCE_APIC_CLUSTER_MODEL BIT18
233 #define EFI_ACPI_6_3_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
234 #define EFI_ACPI_6_3_HW_REDUCED_ACPI BIT20
235 #define EFI_ACPI_6_3_LOW_POWER_S0_IDLE_CAPABLE BIT21
236
237 ///
238 /// Firmware ACPI Control Structure
239 ///
240 typedef struct {
241 UINT32 Signature;
242 UINT32 Length;
243 UINT32 HardwareSignature;
244 UINT32 FirmwareWakingVector;
245 UINT32 GlobalLock;
246 UINT32 Flags;
247 UINT64 XFirmwareWakingVector;
248 UINT8 Version;
249 UINT8 Reserved0[3];
250 UINT32 OspmFlags;
251 UINT8 Reserved1[24];
252 } EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE;
253
254 ///
255 /// FACS Version (as defined in ACPI 6.3 spec.)
256 ///
257 #define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
258
259 ///
260 /// Firmware Control Structure Feature Flags
261 /// All other bits are reserved and must be set to 0.
262 ///
263 #define EFI_ACPI_6_3_S4BIOS_F BIT0
264 #define EFI_ACPI_6_3_64BIT_WAKE_SUPPORTED_F BIT1
265
266 ///
267 /// OSPM Enabled Firmware Control Structure Flags
268 /// All other bits are reserved and must be set to 0.
269 ///
270 #define EFI_ACPI_6_3_OSPM_64BIT_WAKE_F BIT0
271
272 //
273 // Differentiated System Description Table,
274 // Secondary System Description Table
275 // and Persistent System Description Table,
276 // no definition needed as they are common description table header, the same with
277 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
278 //
279 #define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
280 #define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
281
282 ///
283 /// Multiple APIC Description Table header definition. The rest of the table
284 /// must be defined in a platform specific manner.
285 ///
286 typedef struct {
287 EFI_ACPI_DESCRIPTION_HEADER Header;
288 UINT32 LocalApicAddress;
289 UINT32 Flags;
290 } EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
291
292 ///
293 /// MADT Revision (as defined in ACPI 6.3 spec.)
294 ///
295 #define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05
296
297 ///
298 /// Multiple APIC Flags
299 /// All other bits are reserved and must be set to 0.
300 ///
301 #define EFI_ACPI_6_3_PCAT_COMPAT BIT0
302
303 //
304 // Multiple APIC Description Table APIC structure types
305 // All other values between 0x0D and 0x7F are reserved and
306 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
307 //
308 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC 0x00
309 #define EFI_ACPI_6_3_IO_APIC 0x01
310 #define EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE 0x02
311 #define EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE 0x03
312 #define EFI_ACPI_6_3_LOCAL_APIC_NMI 0x04
313 #define EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
314 #define EFI_ACPI_6_3_IO_SAPIC 0x06
315 #define EFI_ACPI_6_3_LOCAL_SAPIC 0x07
316 #define EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES 0x08
317 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC 0x09
318 #define EFI_ACPI_6_3_LOCAL_X2APIC_NMI 0x0A
319 #define EFI_ACPI_6_3_GIC 0x0B
320 #define EFI_ACPI_6_3_GICD 0x0C
321 #define EFI_ACPI_6_3_GIC_MSI_FRAME 0x0D
322 #define EFI_ACPI_6_3_GICR 0x0E
323 #define EFI_ACPI_6_3_GIC_ITS 0x0F
324
325 //
326 // APIC Structure Definitions
327 //
328
329 ///
330 /// Processor Local APIC Structure Definition
331 ///
332 typedef struct {
333 UINT8 Type;
334 UINT8 Length;
335 UINT8 AcpiProcessorUid;
336 UINT8 ApicId;
337 UINT32 Flags;
338 } EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE;
339
340 ///
341 /// Local APIC Flags. All other bits are reserved and must be 0.
342 ///
343 #define EFI_ACPI_6_3_LOCAL_APIC_ENABLED BIT0
344 #define EFI_ACPI_6_3_LOCAL_APIC_ONLINE_CAPABLE BIT1
345
346 ///
347 /// IO APIC Structure
348 ///
349 typedef struct {
350 UINT8 Type;
351 UINT8 Length;
352 UINT8 IoApicId;
353 UINT8 Reserved;
354 UINT32 IoApicAddress;
355 UINT32 GlobalSystemInterruptBase;
356 } EFI_ACPI_6_3_IO_APIC_STRUCTURE;
357
358 ///
359 /// Interrupt Source Override Structure
360 ///
361 typedef struct {
362 UINT8 Type;
363 UINT8 Length;
364 UINT8 Bus;
365 UINT8 Source;
366 UINT32 GlobalSystemInterrupt;
367 UINT16 Flags;
368 } EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
369
370 ///
371 /// Platform Interrupt Sources Structure Definition
372 ///
373 typedef struct {
374 UINT8 Type;
375 UINT8 Length;
376 UINT16 Flags;
377 UINT8 InterruptType;
378 UINT8 ProcessorId;
379 UINT8 ProcessorEid;
380 UINT8 IoSapicVector;
381 UINT32 GlobalSystemInterrupt;
382 UINT32 PlatformInterruptSourceFlags;
383 UINT8 CpeiProcessorOverride;
384 UINT8 Reserved[31];
385 } EFI_ACPI_6_3_PLATFORM_INTERRUPT_APIC_STRUCTURE;
386
387 //
388 // MPS INTI flags.
389 // All other bits are reserved and must be set to 0.
390 //
391 #define EFI_ACPI_6_3_POLARITY (3 << 0)
392 #define EFI_ACPI_6_3_TRIGGER_MODE (3 << 2)
393
394 ///
395 /// Non-Maskable Interrupt Source Structure
396 ///
397 typedef struct {
398 UINT8 Type;
399 UINT8 Length;
400 UINT16 Flags;
401 UINT32 GlobalSystemInterrupt;
402 } EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
403
404 ///
405 /// Local APIC NMI Structure
406 ///
407 typedef struct {
408 UINT8 Type;
409 UINT8 Length;
410 UINT8 AcpiProcessorUid;
411 UINT16 Flags;
412 UINT8 LocalApicLint;
413 } EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE;
414
415 ///
416 /// Local APIC Address Override Structure
417 ///
418 typedef struct {
419 UINT8 Type;
420 UINT8 Length;
421 UINT16 Reserved;
422 UINT64 LocalApicAddress;
423 } EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
424
425 ///
426 /// IO SAPIC Structure
427 ///
428 typedef struct {
429 UINT8 Type;
430 UINT8 Length;
431 UINT8 IoApicId;
432 UINT8 Reserved;
433 UINT32 GlobalSystemInterruptBase;
434 UINT64 IoSapicAddress;
435 } EFI_ACPI_6_3_IO_SAPIC_STRUCTURE;
436
437 ///
438 /// Local SAPIC Structure
439 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
440 ///
441 typedef struct {
442 UINT8 Type;
443 UINT8 Length;
444 UINT8 AcpiProcessorId;
445 UINT8 LocalSapicId;
446 UINT8 LocalSapicEid;
447 UINT8 Reserved[3];
448 UINT32 Flags;
449 UINT32 ACPIProcessorUIDValue;
450 } EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
451
452 ///
453 /// Platform Interrupt Sources Structure
454 ///
455 typedef struct {
456 UINT8 Type;
457 UINT8 Length;
458 UINT16 Flags;
459 UINT8 InterruptType;
460 UINT8 ProcessorId;
461 UINT8 ProcessorEid;
462 UINT8 IoSapicVector;
463 UINT32 GlobalSystemInterrupt;
464 UINT32 PlatformInterruptSourceFlags;
465 } EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
466
467 ///
468 /// Platform Interrupt Source Flags.
469 /// All other bits are reserved and must be set to 0.
470 ///
471 #define EFI_ACPI_6_3_CPEI_PROCESSOR_OVERRIDE BIT0
472
473 ///
474 /// Processor Local x2APIC Structure Definition
475 ///
476 typedef struct {
477 UINT8 Type;
478 UINT8 Length;
479 UINT8 Reserved[2];
480 UINT32 X2ApicId;
481 UINT32 Flags;
482 UINT32 AcpiProcessorUid;
483 } EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
484
485 ///
486 /// Local x2APIC NMI Structure
487 ///
488 typedef struct {
489 UINT8 Type;
490 UINT8 Length;
491 UINT16 Flags;
492 UINT32 AcpiProcessorUid;
493 UINT8 LocalX2ApicLint;
494 UINT8 Reserved[3];
495 } EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE;
496
497 ///
498 /// GIC Structure
499 ///
500 typedef struct {
501 UINT8 Type;
502 UINT8 Length;
503 UINT16 Reserved;
504 UINT32 CPUInterfaceNumber;
505 UINT32 AcpiProcessorUid;
506 UINT32 Flags;
507 UINT32 ParkingProtocolVersion;
508 UINT32 PerformanceInterruptGsiv;
509 UINT64 ParkedAddress;
510 UINT64 PhysicalBaseAddress;
511 UINT64 GICV;
512 UINT64 GICH;
513 UINT32 VGICMaintenanceInterrupt;
514 UINT64 GICRBaseAddress;
515 UINT64 MPIDR;
516 UINT8 ProcessorPowerEfficiencyClass;
517 UINT8 Reserved2;
518 UINT16 SpeOverflowInterrupt;
519 } EFI_ACPI_6_3_GIC_STRUCTURE;
520
521 ///
522 /// GIC Flags. All other bits are reserved and must be 0.
523 ///
524 #define EFI_ACPI_6_3_GIC_ENABLED BIT0
525 #define EFI_ACPI_6_3_PERFORMANCE_INTERRUPT_MODEL BIT1
526 #define EFI_ACPI_6_3_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
527
528 ///
529 /// GIC Distributor Structure
530 ///
531 typedef struct {
532 UINT8 Type;
533 UINT8 Length;
534 UINT16 Reserved1;
535 UINT32 GicId;
536 UINT64 PhysicalBaseAddress;
537 UINT32 SystemVectorBase;
538 UINT8 GicVersion;
539 UINT8 Reserved2[3];
540 } EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE;
541
542 ///
543 /// GIC Version
544 ///
545 #define EFI_ACPI_6_3_GIC_V1 0x01
546 #define EFI_ACPI_6_3_GIC_V2 0x02
547 #define EFI_ACPI_6_3_GIC_V3 0x03
548 #define EFI_ACPI_6_3_GIC_V4 0x04
549
550 ///
551 /// GIC MSI Frame Structure
552 ///
553 typedef struct {
554 UINT8 Type;
555 UINT8 Length;
556 UINT16 Reserved1;
557 UINT32 GicMsiFrameId;
558 UINT64 PhysicalBaseAddress;
559 UINT32 Flags;
560 UINT16 SPICount;
561 UINT16 SPIBase;
562 } EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE;
563
564 ///
565 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
566 ///
567 #define EFI_ACPI_6_3_SPI_COUNT_BASE_SELECT BIT0
568
569 ///
570 /// GICR Structure
571 ///
572 typedef struct {
573 UINT8 Type;
574 UINT8 Length;
575 UINT16 Reserved;
576 UINT64 DiscoveryRangeBaseAddress;
577 UINT32 DiscoveryRangeLength;
578 } EFI_ACPI_6_3_GICR_STRUCTURE;
579
580 ///
581 /// GIC Interrupt Translation Service Structure
582 ///
583 typedef struct {
584 UINT8 Type;
585 UINT8 Length;
586 UINT16 Reserved;
587 UINT32 GicItsId;
588 UINT64 PhysicalBaseAddress;
589 UINT32 Reserved2;
590 } EFI_ACPI_6_3_GIC_ITS_STRUCTURE;
591
592 ///
593 /// Smart Battery Description Table (SBST)
594 ///
595 typedef struct {
596 EFI_ACPI_DESCRIPTION_HEADER Header;
597 UINT32 WarningEnergyLevel;
598 UINT32 LowEnergyLevel;
599 UINT32 CriticalEnergyLevel;
600 } EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE;
601
602 ///
603 /// SBST Version (as defined in ACPI 6.3 spec.)
604 ///
605 #define EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
606
607 ///
608 /// Embedded Controller Boot Resources Table (ECDT)
609 /// The table is followed by a null terminated ASCII string that contains
610 /// a fully qualified reference to the name space object.
611 ///
612 typedef struct {
613 EFI_ACPI_DESCRIPTION_HEADER Header;
614 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcControl;
615 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcData;
616 UINT32 Uid;
617 UINT8 GpeBit;
618 } EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
619
620 ///
621 /// ECDT Version (as defined in ACPI 6.3 spec.)
622 ///
623 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
624
625 ///
626 /// System Resource Affinity Table (SRAT). The rest of the table
627 /// must be defined in a platform specific manner.
628 ///
629 typedef struct {
630 EFI_ACPI_DESCRIPTION_HEADER Header;
631 UINT32 Reserved1; ///< Must be set to 1
632 UINT64 Reserved2;
633 } EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
634
635 ///
636 /// SRAT Version (as defined in ACPI 6.3 spec.)
637 ///
638 #define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
639
640 //
641 // SRAT structure types.
642 // All other values between 0x05 an 0xFF are reserved and
643 // will be ignored by OSPM.
644 //
645 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
646 #define EFI_ACPI_6_3_MEMORY_AFFINITY 0x01
647 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
648 #define EFI_ACPI_6_3_GICC_AFFINITY 0x03
649 #define EFI_ACPI_6_3_GIC_ITS_AFFINITY 0x04
650
651 ///
652 /// Processor Local APIC/SAPIC Affinity Structure Definition
653 ///
654 typedef struct {
655 UINT8 Type;
656 UINT8 Length;
657 UINT8 ProximityDomain7To0;
658 UINT8 ApicId;
659 UINT32 Flags;
660 UINT8 LocalSapicEid;
661 UINT8 ProximityDomain31To8[3];
662 UINT32 ClockDomain;
663 } EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
664
665 ///
666 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
667 ///
668 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
669
670 ///
671 /// Memory Affinity Structure Definition
672 ///
673 typedef struct {
674 UINT8 Type;
675 UINT8 Length;
676 UINT32 ProximityDomain;
677 UINT16 Reserved1;
678 UINT32 AddressBaseLow;
679 UINT32 AddressBaseHigh;
680 UINT32 LengthLow;
681 UINT32 LengthHigh;
682 UINT32 Reserved2;
683 UINT32 Flags;
684 UINT64 Reserved3;
685 } EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE;
686
687 //
688 // Memory Flags. All other bits are reserved and must be 0.
689 //
690 #define EFI_ACPI_6_3_MEMORY_ENABLED (1 << 0)
691 #define EFI_ACPI_6_3_MEMORY_HOT_PLUGGABLE (1 << 1)
692 #define EFI_ACPI_6_3_MEMORY_NONVOLATILE (1 << 2)
693
694 ///
695 /// Processor Local x2APIC Affinity Structure Definition
696 ///
697 typedef struct {
698 UINT8 Type;
699 UINT8 Length;
700 UINT8 Reserved1[2];
701 UINT32 ProximityDomain;
702 UINT32 X2ApicId;
703 UINT32 Flags;
704 UINT32 ClockDomain;
705 UINT8 Reserved2[4];
706 } EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
707
708 ///
709 /// GICC Affinity Structure Definition
710 ///
711 typedef struct {
712 UINT8 Type;
713 UINT8 Length;
714 UINT32 ProximityDomain;
715 UINT32 AcpiProcessorUid;
716 UINT32 Flags;
717 UINT32 ClockDomain;
718 } EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE;
719
720 ///
721 /// GICC Flags. All other bits are reserved and must be 0.
722 ///
723 #define EFI_ACPI_6_3_GICC_ENABLED (1 << 0)
724
725 ///
726 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
727 ///
728 typedef struct {
729 UINT8 Type;
730 UINT8 Length;
731 UINT32 ProximityDomain;
732 UINT8 Reserved[2];
733 UINT32 ItsId;
734 } EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE;
735
736 ///
737 /// Device Handle - ACPI
738 ///
739 typedef struct {
740 UINT64 AcpiHid;
741 UINT32 AcpiUid;
742 UINT8 Reserved[4];
743 } EFI_ACPI_6_3_DEVICE_HANDLE_ACPI;
744
745 ///
746 /// Device Handle - PCI
747 ///
748 typedef struct {
749 UINT16 PciSegment;
750 UINT16 PciBdfNumber;
751 UINT8 Reserved[12];
752 } EFI_ACPI_6_3_DEVICE_HANDLE_PCI;
753
754 ///
755 /// Generic Initiator Affinity Structure
756 ///
757 typedef struct {
758 UINT8 Type;
759 UINT8 Length;
760 UINT8 Reserved1;
761 UINT8 DeviceHandleType;
762 UINT32 ProximityDomain;
763
764 union {
765 EFI_ACPI_6_3_DEVICE_HANDLE_ACPI Acpi;
766 EFI_ACPI_6_3_DEVICE_HANDLE_PCI Pci;
767 } DeviceHandle;
768
769 UINT32 Flags;
770 UINT8 Reserved2[4];
771 } EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE;
772
773 ///
774 /// Generic Initiator Affinity Structure Flags. All other bits are reserved
775 /// and must be 0.
776 ///
777 #define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED (1 << 0)
778
779 ///
780 /// System Locality Distance Information Table (SLIT).
781 /// The rest of the table is a matrix.
782 ///
783 typedef struct {
784 EFI_ACPI_DESCRIPTION_HEADER Header;
785 UINT64 NumberOfSystemLocalities;
786 } EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
787
788 ///
789 /// SLIT Version (as defined in ACPI 6.3 spec.)
790 ///
791 #define EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
792
793 ///
794 /// Corrected Platform Error Polling Table (CPEP)
795 ///
796 typedef struct {
797 EFI_ACPI_DESCRIPTION_HEADER Header;
798 UINT8 Reserved[8];
799 } EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
800
801 ///
802 /// CPEP Version (as defined in ACPI 6.3 spec.)
803 ///
804 #define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
805
806 //
807 // CPEP processor structure types.
808 //
809 #define EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC 0x00
810
811 ///
812 /// Corrected Platform Error Polling Processor Structure Definition
813 ///
814 typedef struct {
815 UINT8 Type;
816 UINT8 Length;
817 UINT8 ProcessorId;
818 UINT8 ProcessorEid;
819 UINT32 PollingInterval;
820 } EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
821
822 ///
823 /// Maximum System Characteristics Table (MSCT)
824 ///
825 typedef struct {
826 EFI_ACPI_DESCRIPTION_HEADER Header;
827 UINT32 OffsetProxDomInfo;
828 UINT32 MaximumNumberOfProximityDomains;
829 UINT32 MaximumNumberOfClockDomains;
830 UINT64 MaximumPhysicalAddress;
831 } EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
832
833 ///
834 /// MSCT Version (as defined in ACPI 6.3 spec.)
835 ///
836 #define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
837
838 ///
839 /// Maximum Proximity Domain Information Structure Definition
840 ///
841 typedef struct {
842 UINT8 Revision;
843 UINT8 Length;
844 UINT32 ProximityDomainRangeLow;
845 UINT32 ProximityDomainRangeHigh;
846 UINT32 MaximumProcessorCapacity;
847 UINT64 MaximumMemoryCapacity;
848 } EFI_ACPI_6_3_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
849
850 ///
851 /// ACPI RAS Feature Table definition.
852 ///
853 typedef struct {
854 EFI_ACPI_DESCRIPTION_HEADER Header;
855 UINT8 PlatformCommunicationChannelIdentifier[12];
856 } EFI_ACPI_6_3_RAS_FEATURE_TABLE;
857
858 ///
859 /// RASF Version (as defined in ACPI 6.3 spec.)
860 ///
861 #define EFI_ACPI_6_3_RAS_FEATURE_TABLE_REVISION 0x01
862
863 ///
864 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
865 ///
866 typedef struct {
867 UINT32 Signature;
868 UINT16 Command;
869 UINT16 Status;
870 UINT16 Version;
871 UINT8 RASCapabilities[16];
872 UINT8 SetRASCapabilities[16];
873 UINT16 NumberOfRASFParameterBlocks;
874 UINT32 SetRASCapabilitiesStatus;
875 } EFI_ACPI_6_3_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
876
877 ///
878 /// ACPI RASF PCC command code
879 ///
880 #define EFI_ACPI_6_3_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
881
882 ///
883 /// ACPI RASF Platform RAS Capabilities
884 ///
885 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0
886 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1
887 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2
888 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3
889 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4
890
891 ///
892 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
893 ///
894 typedef struct {
895 UINT16 Type;
896 UINT16 Version;
897 UINT16 Length;
898 UINT16 PatrolScrubCommand;
899 UINT64 RequestedAddressRange[2];
900 UINT64 ActualAddressRange[2];
901 UINT16 Flags;
902 UINT8 RequestedSpeed;
903 } EFI_ACPI_6_3_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
904
905 ///
906 /// ACPI RASF Patrol Scrub command
907 ///
908 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
909 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
910 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
911
912 ///
913 /// Memory Power State Table definition.
914 ///
915 typedef struct {
916 EFI_ACPI_DESCRIPTION_HEADER Header;
917 UINT8 PlatformCommunicationChannelIdentifier;
918 UINT8 Reserved[3];
919 // Memory Power Node Structure
920 // Memory Power State Characteristics
921 } EFI_ACPI_6_3_MEMORY_POWER_STATUS_TABLE;
922
923 ///
924 /// MPST Version (as defined in ACPI 6.3 spec.)
925 ///
926 #define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_REVISION 0x01
927
928 ///
929 /// MPST Platform Communication Channel Shared Memory Region definition.
930 ///
931 typedef struct {
932 UINT32 Signature;
933 UINT16 Command;
934 UINT16 Status;
935 UINT32 MemoryPowerCommandRegister;
936 UINT32 MemoryPowerStatusRegister;
937 UINT32 PowerStateId;
938 UINT32 MemoryPowerNodeId;
939 UINT64 MemoryEnergyConsumed;
940 UINT64 ExpectedAveragePowerComsuned;
941 } EFI_ACPI_6_3_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
942
943 ///
944 /// ACPI MPST PCC command code
945 ///
946 #define EFI_ACPI_6_3_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
947
948 ///
949 /// ACPI MPST Memory Power command
950 ///
951 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
952 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
953 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
954 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
955
956 ///
957 /// MPST Memory Power Node Table
958 ///
959 typedef struct {
960 UINT8 PowerStateValue;
961 UINT8 PowerStateInformationIndex;
962 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE;
963
964 typedef struct {
965 UINT8 Flag;
966 UINT8 Reserved;
967 UINT16 MemoryPowerNodeId;
968 UINT32 Length;
969 UINT64 AddressBase;
970 UINT64 AddressLength;
971 UINT32 NumberOfPowerStates;
972 UINT32 NumberOfPhysicalComponents;
973 //EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
974 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
975 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE;
976
977 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
978 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
979 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
980
981 typedef struct {
982 UINT16 MemoryPowerNodeCount;
983 UINT8 Reserved[2];
984 } EFI_ACPI_6_3_MPST_MEMORY_POWER_NODE_TABLE;
985
986 ///
987 /// MPST Memory Power State Characteristics Table
988 ///
989 typedef struct {
990 UINT8 PowerStateStructureID;
991 UINT8 Flag;
992 UINT16 Reserved;
993 UINT32 AveragePowerConsumedInMPS0;
994 UINT32 RelativePowerSavingToMPS0;
995 UINT64 ExitLatencyToMPS0;
996 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
997
998 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
999 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
1000 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
1001
1002 typedef struct {
1003 UINT16 MemoryPowerStateCharacteristicsCount;
1004 UINT8 Reserved[2];
1005 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1006
1007 ///
1008 /// Memory Topology Table definition.
1009 ///
1010 typedef struct {
1011 EFI_ACPI_DESCRIPTION_HEADER Header;
1012 UINT32 Reserved;
1013 } EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE;
1014
1015 ///
1016 /// PMTT Version (as defined in ACPI 6.3 spec.)
1017 ///
1018 #define EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
1019
1020 ///
1021 /// Common Memory Aggregator Device Structure.
1022 ///
1023 typedef struct {
1024 UINT8 Type;
1025 UINT8 Reserved;
1026 UINT16 Length;
1027 UINT16 Flags;
1028 UINT16 Reserved1;
1029 } EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1030
1031 ///
1032 /// Memory Aggregator Device Type
1033 ///
1034 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1035 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1036 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1037
1038 ///
1039 /// Socket Memory Aggregator Device Structure.
1040 ///
1041 typedef struct {
1042 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1043 UINT16 SocketIdentifier;
1044 UINT16 Reserved;
1045 //EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1046 } EFI_ACPI_6_3_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1047
1048 ///
1049 /// MemoryController Memory Aggregator Device Structure.
1050 ///
1051 typedef struct {
1052 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1053 UINT32 ReadLatency;
1054 UINT32 WriteLatency;
1055 UINT32 ReadBandwidth;
1056 UINT32 WriteBandwidth;
1057 UINT16 OptimalAccessUnit;
1058 UINT16 OptimalAccessAlignment;
1059 UINT16 Reserved;
1060 UINT16 NumberOfProximityDomains;
1061 //UINT32 ProximityDomain[NumberOfProximityDomains];
1062 //EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1063 } EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1064
1065 ///
1066 /// DIMM Memory Aggregator Device Structure.
1067 ///
1068 typedef struct {
1069 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1070 UINT16 PhysicalComponentIdentifier;
1071 UINT16 Reserved;
1072 UINT32 SizeOfDimm;
1073 UINT32 SmbiosHandle;
1074 } EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1075
1076 ///
1077 /// Boot Graphics Resource Table definition.
1078 ///
1079 typedef struct {
1080 EFI_ACPI_DESCRIPTION_HEADER Header;
1081 ///
1082 /// 2-bytes (16 bit) version ID. This value must be 1.
1083 ///
1084 UINT16 Version;
1085 ///
1086 /// 1-byte status field indicating current status about the table.
1087 /// Bits[7:1] = Reserved (must be zero)
1088 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1089 ///
1090 UINT8 Status;
1091 ///
1092 /// 1-byte enumerated type field indicating format of the image.
1093 /// 0 = Bitmap
1094 /// 1 - 255 Reserved (for future use)
1095 ///
1096 UINT8 ImageType;
1097 ///
1098 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1099 /// of the image bitmap.
1100 ///
1101 UINT64 ImageAddress;
1102 ///
1103 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1104 /// (X, Y) display offset of the top left corner of the boot image.
1105 /// The top left corner of the display is at offset (0, 0).
1106 ///
1107 UINT32 ImageOffsetX;
1108 ///
1109 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1110 /// (X, Y) display offset of the top left corner of the boot image.
1111 /// The top left corner of the display is at offset (0, 0).
1112 ///
1113 UINT32 ImageOffsetY;
1114 } EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE;
1115
1116 ///
1117 /// BGRT Revision
1118 ///
1119 #define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1120
1121 ///
1122 /// BGRT Version
1123 ///
1124 #define EFI_ACPI_6_3_BGRT_VERSION 0x01
1125
1126 ///
1127 /// BGRT Status
1128 ///
1129 #define EFI_ACPI_6_3_BGRT_STATUS_NOT_DISPLAYED 0x00
1130 #define EFI_ACPI_6_3_BGRT_STATUS_DISPLAYED 0x01
1131
1132 ///
1133 /// BGRT Image Type
1134 ///
1135 #define EFI_ACPI_6_3_BGRT_IMAGE_TYPE_BMP 0x00
1136
1137 ///
1138 /// FPDT Version (as defined in ACPI 6.3 spec.)
1139 ///
1140 #define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1141
1142 ///
1143 /// FPDT Performance Record Types
1144 ///
1145 #define EFI_ACPI_6_3_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1146 #define EFI_ACPI_6_3_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1147
1148 ///
1149 /// FPDT Performance Record Revision
1150 ///
1151 #define EFI_ACPI_6_3_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1152 #define EFI_ACPI_6_3_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1153
1154 ///
1155 /// FPDT Runtime Performance Record Types
1156 ///
1157 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1158 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1159 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1160
1161 ///
1162 /// FPDT Runtime Performance Record Revision
1163 ///
1164 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1165 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1166 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1167
1168 ///
1169 /// FPDT Performance Record header
1170 ///
1171 typedef struct {
1172 UINT16 Type;
1173 UINT8 Length;
1174 UINT8 Revision;
1175 } EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER;
1176
1177 ///
1178 /// FPDT Performance Table header
1179 ///
1180 typedef struct {
1181 UINT32 Signature;
1182 UINT32 Length;
1183 } EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER;
1184
1185 ///
1186 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1187 ///
1188 typedef struct {
1189 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1190 UINT32 Reserved;
1191 ///
1192 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1193 ///
1194 UINT64 BootPerformanceTablePointer;
1195 } EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1196
1197 ///
1198 /// FPDT S3 Performance Table Pointer Record Structure
1199 ///
1200 typedef struct {
1201 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1202 UINT32 Reserved;
1203 ///
1204 /// 64-bit processor-relative physical address of the S3 Performance Table.
1205 ///
1206 UINT64 S3PerformanceTablePointer;
1207 } EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1208
1209 ///
1210 /// FPDT Firmware Basic Boot Performance Record Structure
1211 ///
1212 typedef struct {
1213 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1214 UINT32 Reserved;
1215 ///
1216 /// Timer value logged at the beginning of firmware image execution.
1217 /// This may not always be zero or near zero.
1218 ///
1219 UINT64 ResetEnd;
1220 ///
1221 /// Timer value logged just prior to loading the OS boot loader into memory.
1222 /// For non-UEFI compatible boots, this field must be zero.
1223 ///
1224 UINT64 OsLoaderLoadImageStart;
1225 ///
1226 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1227 /// For non-UEFI compatible boots, the timer value logged will be just prior
1228 /// to the INT 19h handler invocation.
1229 ///
1230 UINT64 OsLoaderStartImageStart;
1231 ///
1232 /// Timer value logged at the point when the OS loader calls the
1233 /// ExitBootServices function for UEFI compatible firmware.
1234 /// For non-UEFI compatible boots, this field must be zero.
1235 ///
1236 UINT64 ExitBootServicesEntry;
1237 ///
1238 /// Timer value logged at the point just prior towhen the OS loader gaining
1239 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1240 /// For non-UEFI compatible boots, this field must be zero.
1241 ///
1242 UINT64 ExitBootServicesExit;
1243 } EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1244
1245 ///
1246 /// FPDT Firmware Basic Boot Performance Table signature
1247 ///
1248 #define EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1249
1250 //
1251 // FPDT Firmware Basic Boot Performance Table
1252 //
1253 typedef struct {
1254 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;
1255 //
1256 // one or more Performance Records.
1257 //
1258 } EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1259
1260 ///
1261 /// FPDT "S3PT" S3 Performance Table
1262 ///
1263 #define EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1264
1265 //
1266 // FPDT Firmware S3 Boot Performance Table
1267 //
1268 typedef struct {
1269 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;
1270 //
1271 // one or more Performance Records.
1272 //
1273 } EFI_ACPI_6_3_FPDT_FIRMWARE_S3_BOOT_TABLE;
1274
1275 ///
1276 /// FPDT Basic S3 Resume Performance Record
1277 ///
1278 typedef struct {
1279 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1280 ///
1281 /// A count of the number of S3 resume cycles since the last full boot sequence.
1282 ///
1283 UINT32 ResumeCount;
1284 ///
1285 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1286 /// OS waking vector. Only the most recent resume cycle's time is retained.
1287 ///
1288 UINT64 FullResume;
1289 ///
1290 /// Average timer value of all resume cycles logged since the last full boot
1291 /// sequence, including the most recent resume. Note that the entire log of
1292 /// timer values does not need to be retained in order to calculate this average.
1293 ///
1294 UINT64 AverageResume;
1295 } EFI_ACPI_6_3_FPDT_S3_RESUME_RECORD;
1296
1297 ///
1298 /// FPDT Basic S3 Suspend Performance Record
1299 ///
1300 typedef struct {
1301 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;
1302 ///
1303 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1304 /// Only the most recent suspend cycle's timer value is retained.
1305 ///
1306 UINT64 SuspendStart;
1307 ///
1308 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1309 /// mechanism) used to trigger hardware entry to S3.
1310 /// Only the most recent suspend cycle's timer value is retained.
1311 ///
1312 UINT64 SuspendEnd;
1313 } EFI_ACPI_6_3_FPDT_S3_SUSPEND_RECORD;
1314
1315 ///
1316 /// Firmware Performance Record Table definition.
1317 ///
1318 typedef struct {
1319 EFI_ACPI_DESCRIPTION_HEADER Header;
1320 } EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1321
1322 ///
1323 /// Generic Timer Description Table definition.
1324 ///
1325 typedef struct {
1326 EFI_ACPI_DESCRIPTION_HEADER Header;
1327 UINT64 CntControlBasePhysicalAddress;
1328 UINT32 Reserved;
1329 UINT32 SecurePL1TimerGSIV;
1330 UINT32 SecurePL1TimerFlags;
1331 UINT32 NonSecurePL1TimerGSIV;
1332 UINT32 NonSecurePL1TimerFlags;
1333 UINT32 VirtualTimerGSIV;
1334 UINT32 VirtualTimerFlags;
1335 UINT32 NonSecurePL2TimerGSIV;
1336 UINT32 NonSecurePL2TimerFlags;
1337 UINT64 CntReadBasePhysicalAddress;
1338 UINT32 PlatformTimerCount;
1339 UINT32 PlatformTimerOffset;
1340 UINT32 VirtualPL2TimerGSIV;
1341 UINT32 VirtualPL2TimerFlags;
1342 } EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE;
1343
1344 ///
1345 /// GTDT Version (as defined in ACPI 6.3 spec.)
1346 ///
1347 #define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03
1348
1349 ///
1350 /// Timer Flags. All other bits are reserved and must be 0.
1351 ///
1352 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1353 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1354 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1355
1356 ///
1357 /// Platform Timer Type
1358 ///
1359 #define EFI_ACPI_6_3_GTDT_GT_BLOCK 0
1360 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG 1
1361
1362 ///
1363 /// GT Block Structure
1364 ///
1365 typedef struct {
1366 UINT8 Type;
1367 UINT16 Length;
1368 UINT8 Reserved;
1369 UINT64 CntCtlBase;
1370 UINT32 GTBlockTimerCount;
1371 UINT32 GTBlockTimerOffset;
1372 } EFI_ACPI_6_3_GTDT_GT_BLOCK_STRUCTURE;
1373
1374 ///
1375 /// GT Block Timer Structure
1376 ///
1377 typedef struct {
1378 UINT8 GTFrameNumber;
1379 UINT8 Reserved[3];
1380 UINT64 CntBaseX;
1381 UINT64 CntEL0BaseX;
1382 UINT32 GTxPhysicalTimerGSIV;
1383 UINT32 GTxPhysicalTimerFlags;
1384 UINT32 GTxVirtualTimerGSIV;
1385 UINT32 GTxVirtualTimerFlags;
1386 UINT32 GTxCommonFlags;
1387 } EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1388
1389 ///
1390 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1391 ///
1392 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1393 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1394
1395 ///
1396 /// Common Flags Flags. All other bits are reserved and must be 0.
1397 ///
1398 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1399 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1400
1401 ///
1402 /// SBSA Generic Watchdog Structure
1403 ///
1404 typedef struct {
1405 UINT8 Type;
1406 UINT16 Length;
1407 UINT8 Reserved;
1408 UINT64 RefreshFramePhysicalAddress;
1409 UINT64 WatchdogControlFramePhysicalAddress;
1410 UINT32 WatchdogTimerGSIV;
1411 UINT32 WatchdogTimerFlags;
1412 } EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1413
1414 ///
1415 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1416 ///
1417 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1418 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1419 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1420
1421 //
1422 // NVDIMM Firmware Interface Table definition.
1423 //
1424 typedef struct {
1425 EFI_ACPI_DESCRIPTION_HEADER Header;
1426 UINT32 Reserved;
1427 } EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1428
1429 //
1430 // NFIT Version (as defined in ACPI 6.3 spec.)
1431 //
1432 #define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
1433
1434 //
1435 // Definition for NFIT Table Structure Types
1436 //
1437 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0
1438 #define EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1
1439 #define EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE_TYPE 2
1440 #define EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3
1441 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4
1442 #define EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5
1443 #define EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6
1444
1445 //
1446 // Definition for NFIT Structure Header
1447 //
1448 typedef struct {
1449 UINT16 Type;
1450 UINT16 Length;
1451 } EFI_ACPI_6_3_NFIT_STRUCTURE_HEADER;
1452
1453 //
1454 // Definition for System Physical Address Range Structure
1455 //
1456 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
1457 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
1458 #define EFI_ACPI_6_3_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1459 #define EFI_ACPI_6_3_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1460 #define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1461 #define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1462 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1463 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1464 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1465 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
1466 typedef struct {
1467 UINT16 Type;
1468 UINT16 Length;
1469 UINT16 SPARangeStructureIndex;
1470 UINT16 Flags;
1471 UINT32 Reserved_8;
1472 UINT32 ProximityDomain;
1473 GUID AddressRangeTypeGUID;
1474 UINT64 SystemPhysicalAddressRangeBase;
1475 UINT64 SystemPhysicalAddressRangeLength;
1476 UINT64 AddressRangeMemoryMappingAttribute;
1477 } EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1478
1479 //
1480 // Definition for Memory Device to System Physical Address Range Mapping Structure
1481 //
1482 typedef struct {
1483 UINT32 DIMMNumber:4;
1484 UINT32 MemoryChannelNumber:4;
1485 UINT32 MemoryControllerID:4;
1486 UINT32 SocketID:4;
1487 UINT32 NodeControllerID:12;
1488 UINT32 Reserved_28:4;
1489 } EFI_ACPI_6_3_NFIT_DEVICE_HANDLE;
1490
1491 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
1492 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1
1493 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2
1494 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3
1495 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
1496 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
1497 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6
1498 typedef struct {
1499 UINT16 Type;
1500 UINT16 Length;
1501 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1502 UINT16 NVDIMMPhysicalID;
1503 UINT16 NVDIMMRegionID;
1504 UINT16 SPARangeStructureIndex ;
1505 UINT16 NVDIMMControlRegionStructureIndex;
1506 UINT64 NVDIMMRegionSize;
1507 UINT64 RegionOffset;
1508 UINT64 NVDIMMPhysicalAddressRegionBase;
1509 UINT16 InterleaveStructureIndex;
1510 UINT16 InterleaveWays;
1511 UINT16 NVDIMMStateFlags;
1512 UINT16 Reserved_46;
1513 } EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1514
1515 //
1516 // Definition for Interleave Structure
1517 //
1518 typedef struct {
1519 UINT16 Type;
1520 UINT16 Length;
1521 UINT16 InterleaveStructureIndex;
1522 UINT16 Reserved_6;
1523 UINT32 NumberOfLines;
1524 UINT32 LineSize;
1525 //UINT32 LineOffset[NumberOfLines];
1526 } EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE;
1527
1528 //
1529 // Definition for SMBIOS Management Information Structure
1530 //
1531 typedef struct {
1532 UINT16 Type;
1533 UINT16 Length;
1534 UINT32 Reserved_4;
1535 //UINT8 Data[];
1536 } EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1537
1538 //
1539 // Definition for NVDIMM Control Region Structure
1540 //
1541 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0
1542
1543 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
1544 typedef struct {
1545 UINT16 Type;
1546 UINT16 Length;
1547 UINT16 NVDIMMControlRegionStructureIndex;
1548 UINT16 VendorID;
1549 UINT16 DeviceID;
1550 UINT16 RevisionID;
1551 UINT16 SubsystemVendorID;
1552 UINT16 SubsystemDeviceID;
1553 UINT16 SubsystemRevisionID;
1554 UINT8 ValidFields;
1555 UINT8 ManufacturingLocation;
1556 UINT16 ManufacturingDate;
1557 UINT8 Reserved_22[2];
1558 UINT32 SerialNumber;
1559 UINT16 RegionFormatInterfaceCode;
1560 UINT16 NumberOfBlockControlWindows;
1561 UINT64 SizeOfBlockControlWindow;
1562 UINT64 CommandRegisterOffsetInBlockControlWindow;
1563 UINT64 SizeOfCommandRegisterInBlockControlWindows;
1564 UINT64 StatusRegisterOffsetInBlockControlWindow;
1565 UINT64 SizeOfStatusRegisterInBlockControlWindows;
1566 UINT16 NVDIMMControlRegionFlag;
1567 UINT8 Reserved_74[6];
1568 } EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1569
1570 //
1571 // Definition for NVDIMM Block Data Window Region Structure
1572 //
1573 typedef struct {
1574 UINT16 Type;
1575 UINT16 Length;
1576 UINT16 NVDIMMControlRegionStructureIndex;
1577 UINT16 NumberOfBlockDataWindows;
1578 UINT64 BlockDataWindowStartOffset;
1579 UINT64 SizeOfBlockDataWindow;
1580 UINT64 BlockAccessibleMemoryCapacity;
1581 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1582 } EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1583
1584 //
1585 // Definition for Flush Hint Address Structure
1586 //
1587 typedef struct {
1588 UINT16 Type;
1589 UINT16 Length;
1590 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1591 UINT16 NumberOfFlushHintAddresses;
1592 UINT8 Reserved_10[6];
1593 //UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
1594 } EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1595
1596 ///
1597 /// Secure DEVices Table (SDEV)
1598 ///
1599 typedef struct {
1600 EFI_ACPI_DESCRIPTION_HEADER Header;
1601 } EFI_ACPI_6_3_SECURE_DEVICES_TABLE_HEADER;
1602
1603 ///
1604 /// SDEV Revision (as defined in ACPI 6.3 spec.)
1605 ///
1606 #define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_REVISION 0x01
1607
1608 ///
1609 /// Secure Devcice types
1610 ///
1611 #define EFI_ACPI_6_3_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01
1612 #define EFI_ACPI_6_3_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00
1613
1614 ///
1615 /// Secure Devcice flags
1616 ///
1617 #define EFI_ACPI_6_3_SDEV_FLAG_ALLOW_HANDOFF BIT0
1618
1619 ///
1620 /// SDEV Structure Header
1621 ///
1622 typedef struct {
1623 UINT8 Type;
1624 UINT8 Flags;
1625 UINT16 Length;
1626 } EFI_ACPI_6_3_SDEV_STRUCTURE_HEADER;
1627
1628 ///
1629 /// PCIe Endpoint Device based Secure Device Structure
1630 ///
1631 typedef struct {
1632 UINT8 Type;
1633 UINT8 Flags;
1634 UINT16 Length;
1635 UINT16 PciSegmentNumber;
1636 UINT16 StartBusNumber;
1637 UINT16 PciPathOffset;
1638 UINT16 PciPathLength;
1639 UINT16 VendorSpecificDataOffset;
1640 UINT16 VendorSpecificDataLength;
1641 } EFI_ACPI_6_3_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1642
1643 ///
1644 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1645 ///
1646 typedef struct {
1647 UINT8 Type;
1648 UINT8 Flags;
1649 UINT16 Length;
1650 UINT16 DeviceIdentifierOffset;
1651 UINT16 DeviceIdentifierLength;
1652 UINT16 VendorSpecificDataOffset;
1653 UINT16 VendorSpecificDataLength;
1654 } EFI_ACPI_6_3_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1655
1656 ///
1657 /// Boot Error Record Table (BERT)
1658 ///
1659 typedef struct {
1660 EFI_ACPI_DESCRIPTION_HEADER Header;
1661 UINT32 BootErrorRegionLength;
1662 UINT64 BootErrorRegion;
1663 } EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_HEADER;
1664
1665 ///
1666 /// BERT Version (as defined in ACPI 6.3 spec.)
1667 ///
1668 #define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1669
1670 ///
1671 /// Boot Error Region Block Status Definition
1672 ///
1673 typedef struct {
1674 UINT32 UncorrectableErrorValid:1;
1675 UINT32 CorrectableErrorValid:1;
1676 UINT32 MultipleUncorrectableErrors:1;
1677 UINT32 MultipleCorrectableErrors:1;
1678 UINT32 ErrorDataEntryCount:10;
1679 UINT32 Reserved:18;
1680 } EFI_ACPI_6_3_ERROR_BLOCK_STATUS;
1681
1682 ///
1683 /// Boot Error Region Definition
1684 ///
1685 typedef struct {
1686 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;
1687 UINT32 RawDataOffset;
1688 UINT32 RawDataLength;
1689 UINT32 DataLength;
1690 UINT32 ErrorSeverity;
1691 } EFI_ACPI_6_3_BOOT_ERROR_REGION_STRUCTURE;
1692
1693 //
1694 // Boot Error Severity types
1695 //
1696 #define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00
1697 #define EFI_ACPI_6_3_ERROR_SEVERITY_FATAL 0x01
1698 #define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED 0x02
1699 #define EFI_ACPI_6_3_ERROR_SEVERITY_NONE 0x03
1700
1701 ///
1702 /// Generic Error Data Entry Definition
1703 ///
1704 typedef struct {
1705 UINT8 SectionType[16];
1706 UINT32 ErrorSeverity;
1707 UINT16 Revision;
1708 UINT8 ValidationBits;
1709 UINT8 Flags;
1710 UINT32 ErrorDataLength;
1711 UINT8 FruId[16];
1712 UINT8 FruText[20];
1713 UINT8 Timestamp[8];
1714 } EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1715
1716 ///
1717 /// Generic Error Data Entry Version (as defined in ACPI 6.3 spec.)
1718 ///
1719 #define EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300
1720
1721 ///
1722 /// HEST - Hardware Error Source Table
1723 ///
1724 typedef struct {
1725 EFI_ACPI_DESCRIPTION_HEADER Header;
1726 UINT32 ErrorSourceCount;
1727 } EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1728
1729 ///
1730 /// HEST Version (as defined in ACPI 6.3 spec.)
1731 ///
1732 #define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1733
1734 //
1735 // Error Source structure types.
1736 //
1737 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1738 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1739 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR 0x02
1740 #define EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER 0x06
1741 #define EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER 0x07
1742 #define EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER 0x08
1743 #define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR 0x09
1744 #define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A
1745 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B
1746
1747 //
1748 // Error Source structure flags.
1749 //
1750 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1751 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1752 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)
1753
1754 ///
1755 /// IA-32 Architecture Machine Check Exception Structure Definition
1756 ///
1757 typedef struct {
1758 UINT16 Type;
1759 UINT16 SourceId;
1760 UINT8 Reserved0[2];
1761 UINT8 Flags;
1762 UINT8 Enabled;
1763 UINT32 NumberOfRecordsToPreAllocate;
1764 UINT32 MaxSectionsPerRecord;
1765 UINT64 GlobalCapabilityInitData;
1766 UINT64 GlobalControlInitData;
1767 UINT8 NumberOfHardwareBanks;
1768 UINT8 Reserved1[7];
1769 } EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1770
1771 ///
1772 /// IA-32 Architecture Machine Check Bank Structure Definition
1773 ///
1774 typedef struct {
1775 UINT8 BankNumber;
1776 UINT8 ClearStatusOnInitialization;
1777 UINT8 StatusDataFormat;
1778 UINT8 Reserved0;
1779 UINT32 ControlRegisterMsrAddress;
1780 UINT64 ControlInitData;
1781 UINT32 StatusRegisterMsrAddress;
1782 UINT32 AddressRegisterMsrAddress;
1783 UINT32 MiscRegisterMsrAddress;
1784 } EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1785
1786 ///
1787 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1788 ///
1789 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1790 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1791 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1792
1793 //
1794 // Hardware Error Notification types. All other values are reserved
1795 //
1796 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1797 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1798 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1799 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1800 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1801 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
1802 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
1803 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
1804 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08
1805 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09
1806 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A
1807 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B
1808
1809 ///
1810 /// Hardware Error Notification Configuration Write Enable Structure Definition
1811 ///
1812 typedef struct {
1813 UINT16 Type:1;
1814 UINT16 PollInterval:1;
1815 UINT16 SwitchToPollingThresholdValue:1;
1816 UINT16 SwitchToPollingThresholdWindow:1;
1817 UINT16 ErrorThresholdValue:1;
1818 UINT16 ErrorThresholdWindow:1;
1819 UINT16 Reserved:10;
1820 } EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1821
1822 ///
1823 /// Hardware Error Notification Structure Definition
1824 ///
1825 typedef struct {
1826 UINT8 Type;
1827 UINT8 Length;
1828 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1829 UINT32 PollInterval;
1830 UINT32 Vector;
1831 UINT32 SwitchToPollingThresholdValue;
1832 UINT32 SwitchToPollingThresholdWindow;
1833 UINT32 ErrorThresholdValue;
1834 UINT32 ErrorThresholdWindow;
1835 } EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1836
1837 ///
1838 /// IA-32 Architecture Corrected Machine Check Structure Definition
1839 ///
1840 typedef struct {
1841 UINT16 Type;
1842 UINT16 SourceId;
1843 UINT8 Reserved0[2];
1844 UINT8 Flags;
1845 UINT8 Enabled;
1846 UINT32 NumberOfRecordsToPreAllocate;
1847 UINT32 MaxSectionsPerRecord;
1848 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1849 UINT8 NumberOfHardwareBanks;
1850 UINT8 Reserved1[3];
1851 } EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1852
1853 ///
1854 /// IA-32 Architecture NMI Error Structure Definition
1855 ///
1856 typedef struct {
1857 UINT16 Type;
1858 UINT16 SourceId;
1859 UINT8 Reserved0[2];
1860 UINT32 NumberOfRecordsToPreAllocate;
1861 UINT32 MaxSectionsPerRecord;
1862 UINT32 MaxRawDataLength;
1863 } EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1864
1865 ///
1866 /// PCI Express Root Port AER Structure Definition
1867 ///
1868 typedef struct {
1869 UINT16 Type;
1870 UINT16 SourceId;
1871 UINT8 Reserved0[2];
1872 UINT8 Flags;
1873 UINT8 Enabled;
1874 UINT32 NumberOfRecordsToPreAllocate;
1875 UINT32 MaxSectionsPerRecord;
1876 UINT32 Bus;
1877 UINT16 Device;
1878 UINT16 Function;
1879 UINT16 DeviceControl;
1880 UINT8 Reserved1[2];
1881 UINT32 UncorrectableErrorMask;
1882 UINT32 UncorrectableErrorSeverity;
1883 UINT32 CorrectableErrorMask;
1884 UINT32 AdvancedErrorCapabilitiesAndControl;
1885 UINT32 RootErrorCommand;
1886 } EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1887
1888 ///
1889 /// PCI Express Device AER Structure Definition
1890 ///
1891 typedef struct {
1892 UINT16 Type;
1893 UINT16 SourceId;
1894 UINT8 Reserved0[2];
1895 UINT8 Flags;
1896 UINT8 Enabled;
1897 UINT32 NumberOfRecordsToPreAllocate;
1898 UINT32 MaxSectionsPerRecord;
1899 UINT32 Bus;
1900 UINT16 Device;
1901 UINT16 Function;
1902 UINT16 DeviceControl;
1903 UINT8 Reserved1[2];
1904 UINT32 UncorrectableErrorMask;
1905 UINT32 UncorrectableErrorSeverity;
1906 UINT32 CorrectableErrorMask;
1907 UINT32 AdvancedErrorCapabilitiesAndControl;
1908 } EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1909
1910 ///
1911 /// PCI Express Bridge AER Structure Definition
1912 ///
1913 typedef struct {
1914 UINT16 Type;
1915 UINT16 SourceId;
1916 UINT8 Reserved0[2];
1917 UINT8 Flags;
1918 UINT8 Enabled;
1919 UINT32 NumberOfRecordsToPreAllocate;
1920 UINT32 MaxSectionsPerRecord;
1921 UINT32 Bus;
1922 UINT16 Device;
1923 UINT16 Function;
1924 UINT16 DeviceControl;
1925 UINT8 Reserved1[2];
1926 UINT32 UncorrectableErrorMask;
1927 UINT32 UncorrectableErrorSeverity;
1928 UINT32 CorrectableErrorMask;
1929 UINT32 AdvancedErrorCapabilitiesAndControl;
1930 UINT32 SecondaryUncorrectableErrorMask;
1931 UINT32 SecondaryUncorrectableErrorSeverity;
1932 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1933 } EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1934
1935 ///
1936 /// Generic Hardware Error Source Structure Definition
1937 ///
1938 typedef struct {
1939 UINT16 Type;
1940 UINT16 SourceId;
1941 UINT16 RelatedSourceId;
1942 UINT8 Flags;
1943 UINT8 Enabled;
1944 UINT32 NumberOfRecordsToPreAllocate;
1945 UINT32 MaxSectionsPerRecord;
1946 UINT32 MaxRawDataLength;
1947 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1948 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1949 UINT32 ErrorStatusBlockLength;
1950 } EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1951
1952 ///
1953 /// Generic Hardware Error Source Version 2 Structure Definition
1954 ///
1955 typedef struct {
1956 UINT16 Type;
1957 UINT16 SourceId;
1958 UINT16 RelatedSourceId;
1959 UINT8 Flags;
1960 UINT8 Enabled;
1961 UINT32 NumberOfRecordsToPreAllocate;
1962 UINT32 MaxSectionsPerRecord;
1963 UINT32 MaxRawDataLength;
1964 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1965 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1966 UINT32 ErrorStatusBlockLength;
1967 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;
1968 UINT64 ReadAckPreserve;
1969 UINT64 ReadAckWrite;
1970 } EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
1971
1972 ///
1973 /// Generic Error Status Definition
1974 ///
1975 typedef struct {
1976 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;
1977 UINT32 RawDataOffset;
1978 UINT32 RawDataLength;
1979 UINT32 DataLength;
1980 UINT32 ErrorSeverity;
1981 } EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE;
1982
1983 ///
1984 /// IA-32 Architecture Deferred Machine Check Structure Definition
1985 ///
1986 typedef struct {
1987 UINT16 Type;
1988 UINT16 SourceId;
1989 UINT8 Reserved0[2];
1990 UINT8 Flags;
1991 UINT8 Enabled;
1992 UINT32 NumberOfRecordsToPreAllocate;
1993 UINT32 MaxSectionsPerRecord;
1994 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1995 UINT8 NumberOfHardwareBanks;
1996 UINT8 Reserved1[3];
1997 } EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;
1998
1999 ///
2000 /// HMAT - Heterogeneous Memory Attribute Table
2001 ///
2002 typedef struct {
2003 EFI_ACPI_DESCRIPTION_HEADER Header;
2004 UINT8 Reserved[4];
2005 } EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2006
2007 ///
2008 /// HMAT Revision (as defined in ACPI 6.3 spec.)
2009 ///
2010 #define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02
2011
2012 ///
2013 /// HMAT types
2014 ///
2015 #define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00
2016 #define EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01
2017 #define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02
2018
2019 ///
2020 /// HMAT Structure Header
2021 ///
2022 typedef struct {
2023 UINT16 Type;
2024 UINT8 Reserved[2];
2025 UINT32 Length;
2026 } EFI_ACPI_6_3_HMAT_STRUCTURE_HEADER;
2027
2028 ///
2029 /// Memory Proximity Domain Attributes Structure flags
2030 ///
2031 typedef struct {
2032 UINT16 InitiatorProximityDomainValid:1;
2033 UINT16 Reserved:15;
2034 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;
2035
2036 ///
2037 /// Memory Proximity Domain Attributes Structure
2038 ///
2039 typedef struct {
2040 UINT16 Type;
2041 UINT8 Reserved[2];
2042 UINT32 Length;
2043 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;
2044 UINT8 Reserved1[2];
2045 UINT32 InitiatorProximityDomain;
2046 UINT32 MemoryProximityDomain;
2047 UINT8 Reserved2[20];
2048 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;
2049
2050 ///
2051 /// System Locality Latency and Bandwidth Information Structure flags
2052 ///
2053 typedef struct {
2054 UINT8 MemoryHierarchy:4;
2055 UINT8 Reserved:4;
2056 } EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2057
2058 ///
2059 /// System Locality Latency and Bandwidth Information Structure
2060 ///
2061 typedef struct {
2062 UINT16 Type;
2063 UINT8 Reserved[2];
2064 UINT32 Length;
2065 EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;
2066 UINT8 DataType;
2067 UINT8 Reserved1[2];
2068 UINT32 NumberOfInitiatorProximityDomains;
2069 UINT32 NumberOfTargetProximityDomains;
2070 UINT8 Reserved2[4];
2071 UINT64 EntryBaseUnit;
2072 } EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2073
2074 ///
2075 /// Memory Side Cache Information Structure cache attributes
2076 ///
2077 typedef struct {
2078 UINT32 TotalCacheLevels:4;
2079 UINT32 CacheLevel:4;
2080 UINT32 CacheAssociativity:4;
2081 UINT32 WritePolicy:4;
2082 UINT32 CacheLineSize:16;
2083 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2084
2085 ///
2086 /// Memory Side Cache Information Structure
2087 ///
2088 typedef struct {
2089 UINT16 Type;
2090 UINT8 Reserved[2];
2091 UINT32 Length;
2092 UINT32 MemoryProximityDomain;
2093 UINT8 Reserved1[4];
2094 UINT64 MemorySideCacheSize;
2095 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;
2096 UINT8 Reserved2[2];
2097 UINT16 NumberOfSmbiosHandles;
2098 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2099
2100 ///
2101 /// ERST - Error Record Serialization Table
2102 ///
2103 typedef struct {
2104 EFI_ACPI_DESCRIPTION_HEADER Header;
2105 UINT32 SerializationHeaderSize;
2106 UINT8 Reserved0[4];
2107 UINT32 InstructionEntryCount;
2108 } EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2109
2110 ///
2111 /// ERST Version (as defined in ACPI 6.3 spec.)
2112 ///
2113 #define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
2114
2115 ///
2116 /// ERST Serialization Actions
2117 ///
2118 #define EFI_ACPI_6_3_ERST_BEGIN_WRITE_OPERATION 0x00
2119 #define EFI_ACPI_6_3_ERST_BEGIN_READ_OPERATION 0x01
2120 #define EFI_ACPI_6_3_ERST_BEGIN_CLEAR_OPERATION 0x02
2121 #define EFI_ACPI_6_3_ERST_END_OPERATION 0x03
2122 #define EFI_ACPI_6_3_ERST_SET_RECORD_OFFSET 0x04
2123 #define EFI_ACPI_6_3_ERST_EXECUTE_OPERATION 0x05
2124 #define EFI_ACPI_6_3_ERST_CHECK_BUSY_STATUS 0x06
2125 #define EFI_ACPI_6_3_ERST_GET_COMMAND_STATUS 0x07
2126 #define EFI_ACPI_6_3_ERST_GET_RECORD_IDENTIFIER 0x08
2127 #define EFI_ACPI_6_3_ERST_SET_RECORD_IDENTIFIER 0x09
2128 #define EFI_ACPI_6_3_ERST_GET_RECORD_COUNT 0x0A
2129 #define EFI_ACPI_6_3_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
2130 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
2131 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
2132 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
2133 #define EFI_ACPI_6_3_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10
2134
2135 ///
2136 /// ERST Action Command Status
2137 ///
2138 #define EFI_ACPI_6_3_ERST_STATUS_SUCCESS 0x00
2139 #define EFI_ACPI_6_3_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
2140 #define EFI_ACPI_6_3_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
2141 #define EFI_ACPI_6_3_ERST_STATUS_FAILED 0x03
2142 #define EFI_ACPI_6_3_ERST_STATUS_RECORD_STORE_EMPTY 0x04
2143 #define EFI_ACPI_6_3_ERST_STATUS_RECORD_NOT_FOUND 0x05
2144
2145 ///
2146 /// ERST Serialization Instructions
2147 ///
2148 #define EFI_ACPI_6_3_ERST_READ_REGISTER 0x00
2149 #define EFI_ACPI_6_3_ERST_READ_REGISTER_VALUE 0x01
2150 #define EFI_ACPI_6_3_ERST_WRITE_REGISTER 0x02
2151 #define EFI_ACPI_6_3_ERST_WRITE_REGISTER_VALUE 0x03
2152 #define EFI_ACPI_6_3_ERST_NOOP 0x04
2153 #define EFI_ACPI_6_3_ERST_LOAD_VAR1 0x05
2154 #define EFI_ACPI_6_3_ERST_LOAD_VAR2 0x06
2155 #define EFI_ACPI_6_3_ERST_STORE_VAR1 0x07
2156 #define EFI_ACPI_6_3_ERST_ADD 0x08
2157 #define EFI_ACPI_6_3_ERST_SUBTRACT 0x09
2158 #define EFI_ACPI_6_3_ERST_ADD_VALUE 0x0A
2159 #define EFI_ACPI_6_3_ERST_SUBTRACT_VALUE 0x0B
2160 #define EFI_ACPI_6_3_ERST_STALL 0x0C
2161 #define EFI_ACPI_6_3_ERST_STALL_WHILE_TRUE 0x0D
2162 #define EFI_ACPI_6_3_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
2163 #define EFI_ACPI_6_3_ERST_GOTO 0x0F
2164 #define EFI_ACPI_6_3_ERST_SET_SRC_ADDRESS_BASE 0x10
2165 #define EFI_ACPI_6_3_ERST_SET_DST_ADDRESS_BASE 0x11
2166 #define EFI_ACPI_6_3_ERST_MOVE_DATA 0x12
2167
2168 ///
2169 /// ERST Instruction Flags
2170 ///
2171 #define EFI_ACPI_6_3_ERST_PRESERVE_REGISTER 0x01
2172
2173 ///
2174 /// ERST Serialization Instruction Entry
2175 ///
2176 typedef struct {
2177 UINT8 SerializationAction;
2178 UINT8 Instruction;
2179 UINT8 Flags;
2180 UINT8 Reserved0;
2181 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2182 UINT64 Value;
2183 UINT64 Mask;
2184 } EFI_ACPI_6_3_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2185
2186 ///
2187 /// EINJ - Error Injection Table
2188 ///
2189 typedef struct {
2190 EFI_ACPI_DESCRIPTION_HEADER Header;
2191 UINT32 InjectionHeaderSize;
2192 UINT8 InjectionFlags;
2193 UINT8 Reserved0[3];
2194 UINT32 InjectionEntryCount;
2195 } EFI_ACPI_6_3_ERROR_INJECTION_TABLE_HEADER;
2196
2197 ///
2198 /// EINJ Version (as defined in ACPI 6.3 spec.)
2199 ///
2200 #define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_REVISION 0x01
2201
2202 ///
2203 /// EINJ Error Injection Actions
2204 ///
2205 #define EFI_ACPI_6_3_EINJ_BEGIN_INJECTION_OPERATION 0x00
2206 #define EFI_ACPI_6_3_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
2207 #define EFI_ACPI_6_3_EINJ_SET_ERROR_TYPE 0x02
2208 #define EFI_ACPI_6_3_EINJ_GET_ERROR_TYPE 0x03
2209 #define EFI_ACPI_6_3_EINJ_END_OPERATION 0x04
2210 #define EFI_ACPI_6_3_EINJ_EXECUTE_OPERATION 0x05
2211 #define EFI_ACPI_6_3_EINJ_CHECK_BUSY_STATUS 0x06
2212 #define EFI_ACPI_6_3_EINJ_GET_COMMAND_STATUS 0x07
2213 #define EFI_ACPI_6_3_EINJ_TRIGGER_ERROR 0xFF
2214
2215 ///
2216 /// EINJ Action Command Status
2217 ///
2218 #define EFI_ACPI_6_3_EINJ_STATUS_SUCCESS 0x00
2219 #define EFI_ACPI_6_3_EINJ_STATUS_UNKNOWN_FAILURE 0x01
2220 #define EFI_ACPI_6_3_EINJ_STATUS_INVALID_ACCESS 0x02
2221
2222 ///
2223 /// EINJ Error Type Definition
2224 ///
2225 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
2226 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
2227 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
2228 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
2229 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
2230 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
2231 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
2232 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
2233 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
2234 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
2235 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
2236 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
2237
2238 ///
2239 /// EINJ Injection Instructions
2240 ///
2241 #define EFI_ACPI_6_3_EINJ_READ_REGISTER 0x00
2242 #define EFI_ACPI_6_3_EINJ_READ_REGISTER_VALUE 0x01
2243 #define EFI_ACPI_6_3_EINJ_WRITE_REGISTER 0x02
2244 #define EFI_ACPI_6_3_EINJ_WRITE_REGISTER_VALUE 0x03
2245 #define EFI_ACPI_6_3_EINJ_NOOP 0x04
2246
2247 ///
2248 /// EINJ Instruction Flags
2249 ///
2250 #define EFI_ACPI_6_3_EINJ_PRESERVE_REGISTER 0x01
2251
2252 ///
2253 /// EINJ Injection Instruction Entry
2254 ///
2255 typedef struct {
2256 UINT8 InjectionAction;
2257 UINT8 Instruction;
2258 UINT8 Flags;
2259 UINT8 Reserved0;
2260 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2261 UINT64 Value;
2262 UINT64 Mask;
2263 } EFI_ACPI_6_3_EINJ_INJECTION_INSTRUCTION_ENTRY;
2264
2265 ///
2266 /// EINJ Trigger Action Table
2267 ///
2268 typedef struct {
2269 UINT32 HeaderSize;
2270 UINT32 Revision;
2271 UINT32 TableSize;
2272 UINT32 EntryCount;
2273 } EFI_ACPI_6_3_EINJ_TRIGGER_ACTION_TABLE;
2274
2275 ///
2276 /// Platform Communications Channel Table (PCCT)
2277 ///
2278 typedef struct {
2279 EFI_ACPI_DESCRIPTION_HEADER Header;
2280 UINT32 Flags;
2281 UINT64 Reserved;
2282 } EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2283
2284 ///
2285 /// PCCT Version (as defined in ACPI 6.3 spec.)
2286 ///
2287 #define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02
2288
2289 ///
2290 /// PCCT Global Flags
2291 ///
2292 #define EFI_ACPI_6_3_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0
2293
2294 //
2295 // PCCT Subspace type
2296 //
2297 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_GENERIC 0x00
2298 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
2299 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
2300 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03
2301 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04
2302
2303 ///
2304 /// PCC Subspace Structure Header
2305 ///
2306 typedef struct {
2307 UINT8 Type;
2308 UINT8 Length;
2309 } EFI_ACPI_6_3_PCCT_SUBSPACE_HEADER;
2310
2311 ///
2312 /// Generic Communications Subspace Structure
2313 ///
2314 typedef struct {
2315 UINT8 Type;
2316 UINT8 Length;
2317 UINT8 Reserved[6];
2318 UINT64 BaseAddress;
2319 UINT64 AddressLength;
2320 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2321 UINT64 DoorbellPreserve;
2322 UINT64 DoorbellWrite;
2323 UINT32 NominalLatency;
2324 UINT32 MaximumPeriodicAccessRate;
2325 UINT16 MinimumRequestTurnaroundTime;
2326 } EFI_ACPI_6_3_PCCT_SUBSPACE_GENERIC;
2327
2328 ///
2329 /// Generic Communications Channel Shared Memory Region
2330 ///
2331
2332 typedef struct {
2333 UINT8 Command;
2334 UINT8 Reserved:7;
2335 UINT8 NotifyOnCompletion:1;
2336 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2337
2338 typedef struct {
2339 UINT8 CommandComplete:1;
2340 UINT8 PlatformInterrupt:1;
2341 UINT8 Error:1;
2342 UINT8 PlatformNotification:1;
2343 UINT8 Reserved:4;
2344 UINT8 Reserved1;
2345 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2346
2347 typedef struct {
2348 UINT32 Signature;
2349 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
2350 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
2351 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2352
2353 #define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0
2354 #define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1
2355
2356 ///
2357 /// Type 1 HW-Reduced Communications Subspace Structure
2358 ///
2359 typedef struct {
2360 UINT8 Type;
2361 UINT8 Length;
2362 UINT32 PlatformInterrupt;
2363 UINT8 PlatformInterruptFlags;
2364 UINT8 Reserved;
2365 UINT64 BaseAddress;
2366 UINT64 AddressLength;
2367 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2368 UINT64 DoorbellPreserve;
2369 UINT64 DoorbellWrite;
2370 UINT32 NominalLatency;
2371 UINT32 MaximumPeriodicAccessRate;
2372 UINT16 MinimumRequestTurnaroundTime;
2373 } EFI_ACPI_6_3_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2374
2375 ///
2376 /// Type 2 HW-Reduced Communications Subspace Structure
2377 ///
2378 typedef struct {
2379 UINT8 Type;
2380 UINT8 Length;
2381 UINT32 PlatformInterrupt;
2382 UINT8 PlatformInterruptFlags;
2383 UINT8 Reserved;
2384 UINT64 BaseAddress;
2385 UINT64 AddressLength;
2386 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2387 UINT64 DoorbellPreserve;
2388 UINT64 DoorbellWrite;
2389 UINT32 NominalLatency;
2390 UINT32 MaximumPeriodicAccessRate;
2391 UINT16 MinimumRequestTurnaroundTime;
2392 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2393 UINT64 PlatformInterruptAckPreserve;
2394 UINT64 PlatformInterruptAckWrite;
2395 } EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2396
2397 ///
2398 /// Type 3 Extended PCC Subspace Structure
2399 ///
2400 typedef struct {
2401 UINT8 Type;
2402 UINT8 Length;
2403 UINT32 PlatformInterrupt;
2404 UINT8 PlatformInterruptFlags;
2405 UINT8 Reserved;
2406 UINT64 BaseAddress;
2407 UINT32 AddressLength;
2408 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2409 UINT64 DoorbellPreserve;
2410 UINT64 DoorbellWrite;
2411 UINT32 NominalLatency;
2412 UINT32 MaximumPeriodicAccessRate;
2413 UINT32 MinimumRequestTurnaroundTime;
2414 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2415 UINT64 PlatformInterruptAckPreserve;
2416 UINT64 PlatformInterruptAckSet;
2417 UINT8 Reserved1[8];
2418 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2419 UINT64 CommandCompleteCheckMask;
2420 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;
2421 UINT64 CommandCompleteUpdatePreserve;
2422 UINT64 CommandCompleteUpdateSet;
2423 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2424 UINT64 ErrorStatusMask;
2425 } EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC;
2426
2427 ///
2428 /// Type 4 Extended PCC Subspace Structure
2429 ///
2430 typedef EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_3_PCCT_SUBSPACE_4_EXTENDED_PCC;
2431
2432 #define EFI_ACPI_6_3_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0
2433
2434 typedef struct {
2435 UINT32 Signature;
2436 UINT32 Flags;
2437 UINT32 Length;
2438 UINT32 Command;
2439 } EFI_ACPI_6_3_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2440
2441 ///
2442 /// Platform Debug Trigger Table (PDTT)
2443 ///
2444 typedef struct {
2445 EFI_ACPI_DESCRIPTION_HEADER Header;
2446 UINT8 TriggerCount;
2447 UINT8 Reserved[3];
2448 UINT32 TriggerIdentifierArrayOffset;
2449 } EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2450
2451 ///
2452 /// PDTT Revision (as defined in ACPI 6.3 spec.)
2453 ///
2454 #define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00
2455
2456 ///
2457 /// PDTT Platform Communication Channel Identifier Structure
2458 ///
2459 typedef struct {
2460 UINT16 SubChannelIdentifer:8;
2461 UINT16 Runtime:1;
2462 UINT16 WaitForCompletion:1;
2463 UINT16 TriggerOrder:1;
2464 UINT16 Reserved:5;
2465 } EFI_ACPI_6_3_PDTT_PCC_IDENTIFIER;
2466
2467 ///
2468 /// PCC Commands Codes used by Platform Debug Trigger Table
2469 ///
2470 #define EFI_ACPI_6_3_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00
2471 #define EFI_ACPI_6_3_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01
2472
2473 ///
2474 /// PPTT Platform Communication Channel
2475 ///
2476 typedef EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_3_PDTT_PCC;
2477
2478 ///
2479 /// Processor Properties Topology Table (PPTT)
2480 ///
2481 typedef struct {
2482 EFI_ACPI_DESCRIPTION_HEADER Header;
2483 } EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2484
2485 ///
2486 /// PPTT Revision (as defined in ACPI 6.3 spec.)
2487 ///
2488 #define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02
2489
2490 ///
2491 /// PPTT types
2492 ///
2493 #define EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR 0x00
2494 #define EFI_ACPI_6_3_PPTT_TYPE_CACHE 0x01
2495 #define EFI_ACPI_6_3_PPTT_TYPE_ID 0x02
2496
2497 ///
2498 /// PPTT Structure Header
2499 ///
2500 typedef struct {
2501 UINT8 Type;
2502 UINT8 Length;
2503 UINT8 Reserved[2];
2504 } EFI_ACPI_6_3_PPTT_STRUCTURE_HEADER;
2505
2506 ///
2507 /// For PPTT struct processor flags
2508 ///
2509 #define EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL 0x0
2510 #define EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL 0x1
2511 #define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID 0x0
2512 #define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID 0x1
2513 #define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD 0x0
2514 #define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD 0x1
2515 #define EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF 0x0
2516 #define EFI_ACPI_6_3_PPTT_NODE_IS_LEAF 0x1
2517 #define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0
2518 #define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL 0x1
2519
2520 ///
2521 /// Processor hierarchy node structure flags
2522 ///
2523 typedef struct {
2524 UINT32 PhysicalPackage:1;
2525 UINT32 AcpiProcessorIdValid:1;
2526 UINT32 ProcessorIsAThread:1;
2527 UINT32 NodeIsALeaf:1;
2528 UINT32 IdenticalImplementation:1;
2529 UINT32 Reserved:27;
2530 } EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2531
2532 ///
2533 /// Processor hierarchy node structure
2534 ///
2535 typedef struct {
2536 UINT8 Type;
2537 UINT8 Length;
2538 UINT8 Reserved[2];
2539 EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;
2540 UINT32 Parent;
2541 UINT32 AcpiProcessorId;
2542 UINT32 NumberOfPrivateResources;
2543 } EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR;
2544
2545 ///
2546 /// For PPTT struct cache flags
2547 ///
2548 #define EFI_ACPI_6_3_PPTT_CACHE_SIZE_INVALID 0x0
2549 #define EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID 0x1
2550 #define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_INVALID 0x0
2551 #define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID 0x1
2552 #define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_INVALID 0x0
2553 #define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID 0x1
2554 #define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_INVALID 0x0
2555 #define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID 0x1
2556 #define EFI_ACPI_6_3_PPTT_CACHE_TYPE_INVALID 0x0
2557 #define EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID 0x1
2558 #define EFI_ACPI_6_3_PPTT_WRITE_POLICY_INVALID 0x0
2559 #define EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID 0x1
2560 #define EFI_ACPI_6_3_PPTT_LINE_SIZE_INVALID 0x0
2561 #define EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID 0x1
2562
2563 ///
2564 /// Cache Type Structure flags
2565 ///
2566 typedef struct {
2567 UINT32 SizePropertyValid:1;
2568 UINT32 NumberOfSetsValid:1;
2569 UINT32 AssociativityValid:1;
2570 UINT32 AllocationTypeValid:1;
2571 UINT32 CacheTypeValid:1;
2572 UINT32 WritePolicyValid:1;
2573 UINT32 LineSizeValid:1;
2574 UINT32 Reserved:25;
2575 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS;
2576
2577 ///
2578 /// For cache attributes
2579 ///
2580 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0
2581 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1
2582 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2
2583 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0
2584 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1
2585 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2
2586 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0
2587 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1
2588
2589 ///
2590 /// Cache Type Structure cache attributes
2591 ///
2592 typedef struct {
2593 UINT8 AllocationType:2;
2594 UINT8 CacheType:2;
2595 UINT8 WritePolicy:1;
2596 UINT8 Reserved:3;
2597 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2598
2599 ///
2600 /// Cache Type Structure
2601 ///
2602 typedef struct {
2603 UINT8 Type;
2604 UINT8 Length;
2605 UINT8 Reserved[2];
2606 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS Flags;
2607 UINT32 NextLevelOfCache;
2608 UINT32 Size;
2609 UINT32 NumberOfSets;
2610 UINT8 Associativity;
2611 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;
2612 UINT16 LineSize;
2613 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE;
2614
2615 ///
2616 /// ID structure
2617 ///
2618 typedef struct {
2619 UINT8 Type;
2620 UINT8 Length;
2621 UINT8 Reserved[2];
2622 UINT32 VendorId;
2623 UINT64 Level1Id;
2624 UINT64 Level2Id;
2625 UINT16 MajorRev;
2626 UINT16 MinorRev;
2627 UINT16 SpinRev;
2628 } EFI_ACPI_6_3_PPTT_STRUCTURE_ID;
2629
2630 //
2631 // Known table signatures
2632 //
2633
2634 ///
2635 /// "RSD PTR " Root System Description Pointer
2636 ///
2637 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2638
2639 ///
2640 /// "APIC" Multiple APIC Description Table
2641 ///
2642 #define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
2643
2644 ///
2645 /// "BERT" Boot Error Record Table
2646 ///
2647 #define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
2648
2649 ///
2650 /// "BGRT" Boot Graphics Resource Table
2651 ///
2652 #define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
2653
2654 ///
2655 /// "CDIT" Component Distance Information Table
2656 ///
2657 #define EFI_ACPI_6_3_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')
2658
2659 ///
2660 /// "CPEP" Corrected Platform Error Polling Table
2661 ///
2662 #define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
2663
2664 ///
2665 /// "CRAT" Component Resource Attribute Table
2666 ///
2667 #define EFI_ACPI_6_3_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')
2668
2669 ///
2670 /// "DSDT" Differentiated System Description Table
2671 ///
2672 #define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
2673
2674 ///
2675 /// "ECDT" Embedded Controller Boot Resources Table
2676 ///
2677 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
2678
2679 ///
2680 /// "EINJ" Error Injection Table
2681 ///
2682 #define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
2683
2684 ///
2685 /// "ERST" Error Record Serialization Table
2686 ///
2687 #define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
2688
2689 ///
2690 /// "FACP" Fixed ACPI Description Table
2691 ///
2692 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
2693
2694 ///
2695 /// "FACS" Firmware ACPI Control Structure
2696 ///
2697 #define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
2698
2699 ///
2700 /// "FPDT" Firmware Performance Data Table
2701 ///
2702 #define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
2703
2704 ///
2705 /// "GTDT" Generic Timer Description Table
2706 ///
2707 #define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
2708
2709 ///
2710 /// "HEST" Hardware Error Source Table
2711 ///
2712 #define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
2713
2714 ///
2715 /// "HMAT" Heterogeneous Memory Attribute Table
2716 ///
2717 #define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')
2718
2719 ///
2720 /// "MPST" Memory Power State Table
2721 ///
2722 #define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
2723
2724 ///
2725 /// "MSCT" Maximum System Characteristics Table
2726 ///
2727 #define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
2728
2729 ///
2730 /// "NFIT" NVDIMM Firmware Interface Table
2731 ///
2732 #define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')
2733
2734 ///
2735 /// "PDTT" Platform Debug Trigger Table
2736 ///
2737 #define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')
2738
2739 ///
2740 /// "PMTT" Platform Memory Topology Table
2741 ///
2742 #define EFI_ACPI_6_3_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
2743
2744 ///
2745 /// "PPTT" Processor Properties Topology Table
2746 ///
2747 #define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
2748
2749 ///
2750 /// "PSDT" Persistent System Description Table
2751 ///
2752 #define EFI_ACPI_6_3_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
2753
2754 ///
2755 /// "RASF" ACPI RAS Feature Table
2756 ///
2757 #define EFI_ACPI_6_3_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
2758
2759 ///
2760 /// "RSDT" Root System Description Table
2761 ///
2762 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
2763
2764 ///
2765 /// "SBST" Smart Battery Specification Table
2766 ///
2767 #define EFI_ACPI_6_3_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2768
2769 ///
2770 /// "SDEV" Secure DEVices Table
2771 ///
2772 #define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')
2773
2774 ///
2775 /// "SLIT" System Locality Information Table
2776 ///
2777 #define EFI_ACPI_6_3_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2778
2779 ///
2780 /// "SRAT" System Resource Affinity Table
2781 ///
2782 #define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2783
2784 ///
2785 /// "SSDT" Secondary System Description Table
2786 ///
2787 #define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2788
2789 ///
2790 /// "XSDT" Extended System Description Table
2791 ///
2792 #define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2793
2794 ///
2795 /// "BOOT" MS Simple Boot Spec
2796 ///
2797 #define EFI_ACPI_6_3_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2798
2799 ///
2800 /// "CSRT" MS Core System Resource Table
2801 ///
2802 #define EFI_ACPI_6_3_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2803
2804 ///
2805 /// "DBG2" MS Debug Port 2 Spec
2806 ///
2807 #define EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2808
2809 ///
2810 /// "DBGP" MS Debug Port Spec
2811 ///
2812 #define EFI_ACPI_6_3_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2813
2814 ///
2815 /// "DMAR" DMA Remapping Table
2816 ///
2817 #define EFI_ACPI_6_3_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2818
2819 ///
2820 /// "DPPT" DMA Protection Policy Table
2821 ///
2822 #define EFI_ACPI_6_3_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')
2823
2824 ///
2825 /// "DRTM" Dynamic Root of Trust for Measurement Table
2826 ///
2827 #define EFI_ACPI_6_3_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2828
2829 ///
2830 /// "ETDT" Event Timer Description Table
2831 ///
2832 #define EFI_ACPI_6_3_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2833
2834 ///
2835 /// "HPET" IA-PC High Precision Event Timer Table
2836 ///
2837 #define EFI_ACPI_6_3_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2838
2839 ///
2840 /// "iBFT" iSCSI Boot Firmware Table
2841 ///
2842 #define EFI_ACPI_6_3_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2843
2844 ///
2845 /// "IORT" I/O Remapping Table
2846 ///
2847 #define EFI_ACPI_6_3_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')
2848
2849 ///
2850 /// "IVRS" I/O Virtualization Reporting Structure
2851 ///
2852 #define EFI_ACPI_6_3_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2853
2854 ///
2855 /// "LPIT" Low Power Idle Table
2856 ///
2857 #define EFI_ACPI_6_3_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2858
2859 ///
2860 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2861 ///
2862 #define EFI_ACPI_6_3_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2863
2864 ///
2865 /// "MCHI" Management Controller Host Interface Table
2866 ///
2867 #define EFI_ACPI_6_3_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2868
2869 ///
2870 /// "MSDM" MS Data Management Table
2871 ///
2872 #define EFI_ACPI_6_3_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2873
2874 ///
2875 /// "SDEI" Software Delegated Exceptions Interface Table
2876 ///
2877 #define EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
2878
2879 ///
2880 /// "SLIC" MS Software Licensing Table Specification
2881 ///
2882 #define EFI_ACPI_6_3_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2883
2884 ///
2885 /// "SPCR" Serial Port Concole Redirection Table
2886 ///
2887 #define EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2888
2889 ///
2890 /// "SPMI" Server Platform Management Interface Table
2891 ///
2892 #define EFI_ACPI_6_3_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2893
2894 ///
2895 /// "STAO" _STA Override Table
2896 ///
2897 #define EFI_ACPI_6_3_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')
2898
2899 ///
2900 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2901 ///
2902 #define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2903
2904 ///
2905 /// "TPM2" Trusted Computing Platform 1 Table
2906 ///
2907 #define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2908
2909 ///
2910 /// "UEFI" UEFI ACPI Data Table
2911 ///
2912 #define EFI_ACPI_6_3_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2913
2914 ///
2915 /// "WAET" Windows ACPI Emulated Devices Table
2916 ///
2917 #define EFI_ACPI_6_3_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2918
2919 ///
2920 /// "WDAT" Watchdog Action Table
2921 ///
2922 #define EFI_ACPI_6_3_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2923
2924 ///
2925 /// "WDRT" Watchdog Resource Table
2926 ///
2927 #define EFI_ACPI_6_3_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2928
2929 ///
2930 /// "WPBT" MS Platform Binary Table
2931 ///
2932 #define EFI_ACPI_6_3_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2933
2934 ///
2935 /// "WSMT" Windows SMM Security Mitigation Table
2936 ///
2937 #define EFI_ACPI_6_3_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')
2938
2939 ///
2940 /// "XENV" Xen Project Table
2941 ///
2942 #define EFI_ACPI_6_3_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')
2943
2944 #pragma pack()
2945
2946 #endif