MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8   @par Revision Reference:
   9     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  10       Specification v3.2, Dated October 2020.
  11       https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
  12
  13   @par Glossary:
  14     - HPET - High Precision Event Timer
  15     - NUMA - Non-uniform Memory Access
  16 **/
  17 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  18 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  19
  20 #include <IndustryStandard/Acpi.h>
  21
  22 #pragma pack(1)
  23
  24 ///
  25 /// DMA-Remapping Reporting Structure definitions from section 8.1
  26 ///@{
  27 #define EFI_ACPI_DMAR_REVISION                             0x01
  28
  29 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
  30 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
  31 #define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
  32 ///@}
  33
  34 ///
  35 /// Remapping Structure Types definitions from section 8.2
  36 ///@{
  37 #define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
  38 #define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
  39 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
  40 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
  41 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
  42 #define EFI_ACPI_DMAR_TYPE_SATC                   0x05
  43 ///@}
  44
  45 ///
  46 /// DMA-Remapping Hardware Unit definitions from section 8.3
  47 ///
  48 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  49
  50 ///
  51 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  52 ///@{
  53 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  54 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  55 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  56 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  57 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  58 ///@}
  59
  60 ///
  61 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  62 ///
  63 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
  64
  65 ///
  66 /// Definition for DMA Remapping Structure Header
  67 ///
  68 typedef struct {
  69   UINT16        Type;
  70   UINT16        Length;
  71 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  72
  73 ///
  74 /// Definition for DMA-Remapping PCI Path
  75 ///
  76 typedef struct {
  77   UINT8         Device;
  78   UINT8         Function;
  79 } EFI_ACPI_DMAR_PCI_PATH;
  80
  81 ///
  82 /// Device Scope Structure is defined in section 8.3.1
  83 ///
  84 typedef struct {
  85   UINT8         Type;
  86   UINT8         Length;
  87   UINT16        Reserved2;
  88   UINT8         EnumerationId;
  89   UINT8         StartBusNumber;
  90 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  91
  92 /**
  93   DMA-remapping hardware unit definition (DRHD) structure is defined in
  94   section 8.3. This uniquely represents a remapping hardware unit present
  95   in the platform. There must be at least one instance of this structure
  96   for each PCI segment in the platform.
  97 **/
  98 typedef struct {
  99   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 100   /**
 101     - Bit[0]: INCLUDE_PCI_ALL
 102               - If Set, this remapping hardware unit has under its scope all
 103                 PCI compatible devices in the specified Segment, except devices
 104                 reported under the scope of other remapping hardware units for
 105                 the same Segment.
 106               - If Clear, this remapping hardware unit has under its scope only
 107                 devices in the specified Segment that are explicitly identified
 108                 through the DeviceScope field.
 109     - Bits[7:1] Reserved.
 110   **/
 111   UINT8                           Flags;
 112   UINT8                           Reserved;
 113   ///
 114   /// The PCI Segment associated with this unit.
 115   ///
 116   UINT16                          SegmentNumber;
 117   ///
 118   /// Base address of remapping hardware register-set for this unit.
 119   ///
 120   UINT64                          RegisterBaseAddress;
 121 } EFI_ACPI_DMAR_DRHD_HEADER;
 122
 123 /**
 124   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 125   Reserved memory ranges that may be DMA targets may be reported through the
 126   RMRR structures, along with the devices that requires access to the specified
 127   reserved memory region.
 128 **/
 129 typedef struct {
 130   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 131   UINT8                           Reserved[2];
 132   ///
 133   /// PCI Segment Number associated with devices identified through
 134   /// the Device Scope field.
 135   ///
 136   UINT16                          SegmentNumber;
 137   ///
 138   /// Base address of 4KB-aligned reserved memory region
 139   ///
 140   UINT64                          ReservedMemoryRegionBaseAddress;
 141   /**
 142     Last address of the reserved memory region. Value in this field must be
 143     greater than the value in Reserved Memory Region Base Address field.
 144     The reserved memory region size (Limit - Base + 1) must be an integer
 145     multiple of 4KB.
 146   **/
 147   UINT64                          ReservedMemoryRegionLimitAddress;
 148 } EFI_ACPI_DMAR_RMRR_HEADER;
 149
 150 /**
 151   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 152   This structure is applicable only for platforms supporting Device-TLBs as
 153   reported through the Extended Capability Register. For each PCI Segment in
 154   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 155   ATSR structures identifies PCI-Express Root-Ports supporting Address
 156   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 157   devices behind a Root Port only if the Root Port is reported as supporting
 158   ATS transactions.
 159 **/
 160 typedef struct {
 161   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 162   /**
 163     - Bit[0]: ALL_PORTS:
 164               - If Set, indicates all PCI Express Root Ports in the specified
 165                 PCI Segment supports ATS transactions.
 166               - If Clear, indicates ATS transactions are supported only on
 167                 Root Ports identified through the Device Scope field.
 168     - Bits[7:1] Reserved.
 169   **/
 170   UINT8                           Flags;
 171   UINT8                           Reserved;
 172   ///
 173   /// The PCI Segment associated with this ATSR structure
 174   ///
 175   UINT16                          SegmentNumber;
 176 } EFI_ACPI_DMAR_ATSR_HEADER;
 177
 178 /**
 179   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 180   in section 8.6. This is intended to be used only on NUMA platforms with
 181   Remapping hardware units and memory spanned across multiple nodes.
 182   When used, there must be a RHSA structure for each Remapping hardware unit
 183   reported through DRHD structure.
 184 **/
 185 typedef struct {
 186   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 187   UINT8                           Reserved[4];
 188   ///
 189   /// Register Base Address of this Remap hardware unit reported in the
 190   /// corresponding DRHD structure.
 191   ///
 192   UINT64                          RegisterBaseAddress;
 193   ///
 194   /// Proximity Domain to which the Remap hardware unit identified by the
 195   /// Register Base Address field belongs.
 196   ///
 197   UINT32                          ProximityDomain;
 198 } EFI_ACPI_DMAR_RHSA_HEADER;
 199
 200 /**
 201   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 202   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 203   issuing DMA requests in the platform. ANDD structures are used in conjunction
 204   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 205 **/
 206 typedef struct {
 207   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 208   UINT8                           Reserved[3];
 209   /**
 210     Each ACPI device enumerated through an ANDD structure must have a unique
 211     value for this field. To report an ACPI device with ACPI Device Number
 212     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 213     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 214     The Start Bus Number and Path fields in the Device-Scope together
 215     provides the 16-bit source-id allocated by platform for the ACPI device.
 216   **/
 217   UINT8                           AcpiDeviceNumber;
 218 } EFI_ACPI_DMAR_ANDD_HEADER;
 219
 220 /**
 221   An SoC Integrated Address Translation Cache (SATC) reporting structure is
 222   defined in section 8.8.
 223 **/
 224 typedef struct {
 225   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 226   /**
 227     - Bit[0]: ATC_REQUIRED:
 228               - If Set, indicates that every SoC integrated device enumerated
 229                 in this table has a functional requirement to enable its ATC
 230                 (via the ATS capability) for device operation.
 231               - If Clear, any device enumerated in this table can operate when
 232                 its respective ATC is not enabled (albeit with reduced
 233                 performance or functionality).
 234     - Bits[7:1] Reserved.
 235   **/
 236   UINT8                           Flags;
 237   UINT8                           Reserved;
 238   ///
 239   /// The PCI Segment associated with this SATC structure. All SoC integrated
 240   /// devices within a PCI segment with same value for Flags field must be
 241   /// enumerated in the same SATC structure.
 242   ///
 243   UINT16                          SegmentNumber;
 244 } EFI_ACPI_DMAR_SATC_HEADER;
 245
 246 /**
 247   DMA Remapping Reporting Structure Header as defined in section 8.1
 248   This header will be followed by list of Remapping Structures listed below
 249     - DMA Remapping Hardware Unit Definition (DRHD)
 250     - Reserved Memory Region Reporting (RMRR)
 251     - Root Port ATS Capability Reporting (ATSR)
 252     - Remapping Hardware Static Affinity (RHSA)
 253     - ACPI Name-space Device Declaration (ANDD)
 254     - SoC Integrated Address Translation Cache reporting (SATC)
 255   These structure types must by reported in numerical order.
 256   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 257   structures of type 1 (RMRR), and so forth.
 258 **/
 259 typedef struct {
 260   EFI_ACPI_DESCRIPTION_HEADER     Header;
 261   /**
 262     This field indicates the maximum DMA physical addressability supported by
 263     this platform. The system address map reported by the BIOS indicates what
 264     portions of this addresses are populated. The Host Address Width (HAW) of
 265     the platform is computed as (N+1), where N is the value reported in this
 266     field.
 267     For example, for a platform supporting 40 bits of physical addressability,
 268     the value of 100111b is reported in this field.
 269   **/
 270   UINT8                           HostAddressWidth;
 271   /**
 272     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 273                 remapping. If Set, the platform supports interrupt remapping.
 274     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 275                 firmware may Set this field to request system software to opt
 276                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 277                 valid only when the INTR_REMAP field (bit 0) is Set.
 278     - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
 279                 recommended to Set this field to report any platform initiated
 280                 DMA is restricted to only reserved memory regions (reported in
 281                 RMRR structures) when transferring control to system software
 282                 such as on ExitBootServices().
 283     - Bits[7:3] Reserved.
 284   **/
 285   UINT8                           Flags;
 286   UINT8                           Reserved[10];
 287 } EFI_ACPI_DMAR_HEADER;
 288
 289 #pragma pack()
 290
 291 #endif