MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8   @par Revision Reference:
   9     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  10       Specification v4.0, Dated June 2022.
  11       https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
  12
  13   @par Glossary:
  14     - HPET - High Precision Event Timer
  15     - NUMA - Non-uniform Memory Access
  16 **/
  17
  18 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  19 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  20
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #pragma pack(1)
  24
  25 ///
  26 /// DMA-Remapping Reporting Structure definitions from section 8.1
  27 ///@{
  28 #define EFI_ACPI_DMAR_REVISION  0x01
  29
  30 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
  31 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
  32 #define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
  33 ///@}
  34
  35 ///
  36 /// Remapping Structure Types definitions from section 8.2
  37 ///@{
  38 #define EFI_ACPI_DMAR_TYPE_DRHD  0x00
  39 #define EFI_ACPI_DMAR_TYPE_RMRR  0x01
  40 #define EFI_ACPI_DMAR_TYPE_ATSR  0x02
  41 #define EFI_ACPI_DMAR_TYPE_RHSA  0x03
  42 #define EFI_ACPI_DMAR_TYPE_ANDD  0x04
  43 #define EFI_ACPI_DMAR_TYPE_SATC  0x05
  44 #define EFI_ACPI_DMAR_TYPE_SIDP  0x06
  45 ///@}
  46
  47 ///
  48 /// DMA-Remapping Hardware Unit definitions from section 8.3
  49 ///
  50 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  51
  52 ///
  53 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  54 ///@{
  55 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  56 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  57 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  58 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  59 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  60
  61 #define EFI_ACPI_DEVICE_SCOPE_REQ_WO_PASID_NESTED_NOTALLOWED  BIT0
  62 #define EFI_ACPI_DEVICE_SCOPE_REQ_WO_PASID_PWSNP_NOTALLOWED   BIT1
  63 #define EFI_ACPI_DEVICE_SCOPE_REQ_WO_PASID_PGSNP_NOTALLOWED   BIT2
  64 #define EFI_ACPI_DEVICE_SCOPE_REQ_WO_PASID_ATC_HARDENED       BIT3
  65 #define EFI_ACPI_DEVICE_SCOPE_REQ_WO_PASID_ATC_REQUIRED       BIT4
  66 ///@}
  67
  68 ///
  69 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  70 ///
  71 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS  BIT0
  72
  73 ///
  74 /// Definition for DMA Remapping Structure Header
  75 ///
  76 typedef struct {
  77   UINT16    Type;
  78   UINT16    Length;
  79 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  80
  81 ///
  82 /// Definition for DMA-Remapping PCI Path
  83 ///
  84 typedef struct {
  85   UINT8    Device;
  86   UINT8    Function;
  87 } EFI_ACPI_DMAR_PCI_PATH;
  88
  89 ///
  90 /// Device Scope Structure is defined in section 8.3.1
  91 ///
  92 typedef struct {
  93   UINT8    Type;
  94   UINT8    Length;
  95   UINT8    Flags;
  96   UINT8    Reserved;
  97   UINT8    EnumerationId;
  98   UINT8    StartBusNumber;
  99 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
 100
 101 /**
 102   DMA-remapping hardware unit definition (DRHD) structure is defined in
 103   section 8.3. This uniquely represents a remapping hardware unit present
 104   in the platform. There must be at least one instance of this structure
 105   for each PCI segment in the platform.
 106 **/
 107 typedef struct {
 108   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 109
 110   /**
 111     - Bit[0]: INCLUDE_PCI_ALL
 112               - If Set, this remapping hardware unit has under its scope all
 113                 PCI compatible devices in the specified Segment, except devices
 114                 reported under the scope of other remapping hardware units for
 115                 the same Segment.
 116               - If Clear, this remapping hardware unit has under its scope only
 117                 devices in the specified Segment that are explicitly identified
 118                 through the DeviceScope field.
 119     - Bits[7:1] Reserved.
 120   **/
 121   UINT8     Flags;
 122
 123   /**
 124     - Bits[3:0]: Indicates the size of the remapping hardware register set for
 125                  this remapping unit. If the value in this field is N, the size
 126                  of the register set is 2^N 4 KB pages
 127     - Bits[7:4]: Reserved.
 128   **/
 129   UINT8     Size;
 130   ///
 131   /// The PCI Segment associated with this unit.
 132   ///
 133   UINT16    SegmentNumber;
 134   ///
 135   /// Base address of remapping hardware register-set for this unit.
 136   ///
 137   UINT64    RegisterBaseAddress;
 138 } EFI_ACPI_DMAR_DRHD_HEADER;
 139
 140 /**
 141   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 142   Reserved memory ranges that may be DMA targets may be reported through the
 143   RMRR structures, along with the devices that requires access to the specified
 144   reserved memory region.
 145 **/
 146 typedef struct {
 147   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 148   UINT8                             Reserved[2];
 149   ///
 150   /// PCI Segment Number associated with devices identified through
 151   /// the Device Scope field.
 152   ///
 153   UINT16                            SegmentNumber;
 154   ///
 155   /// Base address of 4KB-aligned reserved memory region
 156   ///
 157   UINT64                            ReservedMemoryRegionBaseAddress;
 158
 159   /**
 160     Last address of the reserved memory region. Value in this field must be
 161     greater than the value in Reserved Memory Region Base Address field.
 162     The reserved memory region size (Limit - Base + 1) must be an integer
 163     multiple of 4KB.
 164   **/
 165   UINT64                            ReservedMemoryRegionLimitAddress;
 166 } EFI_ACPI_DMAR_RMRR_HEADER;
 167
 168 /**
 169   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 170   This structure is applicable only for platforms supporting Device-TLBs as
 171   reported through the Extended Capability Register. For each PCI Segment in
 172   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 173   ATSR structures identifies PCI-Express Root-Ports supporting Address
 174   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 175   devices behind a Root Port only if the Root Port is reported as supporting
 176   ATS transactions.
 177 **/
 178 typedef struct {
 179   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 180
 181   /**
 182     - Bit[0]: ALL_PORTS:
 183               - If Set, indicates all PCI Express Root Ports in the specified
 184                 PCI Segment supports ATS transactions.
 185               - If Clear, indicates ATS transactions are supported only on
 186                 Root Ports identified through the Device Scope field.
 187     - Bits[7:1] Reserved.
 188   **/
 189   UINT8     Flags;
 190   UINT8     Reserved;
 191   ///
 192   /// The PCI Segment associated with this ATSR structure
 193   ///
 194   UINT16    SegmentNumber;
 195 } EFI_ACPI_DMAR_ATSR_HEADER;
 196
 197 /**
 198   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 199   in section 8.6. This is intended to be used only on NUMA platforms with
 200   Remapping hardware units and memory spanned across multiple nodes.
 201   When used, there must be a RHSA structure for each Remapping hardware unit
 202   reported through DRHD structure.
 203 **/
 204 typedef struct {
 205   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 206   UINT8                             Reserved[4];
 207   ///
 208   /// Register Base Address of this Remap hardware unit reported in the
 209   /// corresponding DRHD structure.
 210   ///
 211   UINT64                            RegisterBaseAddress;
 212   ///
 213   /// Proximity Domain to which the Remap hardware unit identified by the
 214   /// Register Base Address field belongs.
 215   ///
 216   UINT32                            ProximityDomain;
 217 } EFI_ACPI_DMAR_RHSA_HEADER;
 218
 219 /**
 220   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 221   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 222   issuing DMA requests in the platform. ANDD structures are used in conjunction
 223   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 224 **/
 225 typedef struct {
 226   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 227   UINT8                             Reserved[3];
 228
 229   /**
 230     Each ACPI device enumerated through an ANDD structure must have a unique
 231     value for this field. To report an ACPI device with ACPI Device Number
 232     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 233     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 234     The Start Bus Number and Path fields in the Device-Scope together
 235     provides the 16-bit source-id allocated by platform for the ACPI device.
 236   **/
 237   UINT8    AcpiDeviceNumber;
 238 } EFI_ACPI_DMAR_ANDD_HEADER;
 239
 240 /**
 241   An SoC Integrated Address Translation Cache (SATC) reporting structure is
 242   defined in section 8.8.
 243 **/
 244 typedef struct {
 245   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 246
 247   /**
 248     - Bit[0]: ATC_REQUIRED:
 249               - If Set, indicates that every SoC integrated device enumerated
 250                 in this table has a functional requirement to enable its ATC
 251                 (via the ATS capability) for device operation.
 252               - If Clear, any device enumerated in this table can operate when
 253                 its respective ATC is not enabled (albeit with reduced
 254                 performance or functionality).
 255     - Bits[7:1] Reserved.
 256   **/
 257   UINT8     Flags;
 258   UINT8     Reserved;
 259   ///
 260   /// The PCI Segment associated with this SATC structure. All SoC integrated
 261   /// devices within a PCI segment with same value for Flags field must be
 262   /// enumerated in the same SATC structure.
 263   ///
 264   UINT16    SegmentNumber;
 265 } EFI_ACPI_DMAR_SATC_HEADER;
 266
 267 /**
 268   SoC Integrated Device Property (SIDP) Reporting Structure is defined in
 269   section 8.9.
 270 **/
 271 typedef struct {
 272   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 273
 274   UINT16                            Reserved;
 275   ///
 276   /// The PCI Segment associated with this SIDP structure.
 277   ///
 278   UINT16                            SegmentNumber;
 279 } EFI_ACPI_DMAR_SIDP_HEADER;
 280
 281 /**
 282   DMA Remapping Reporting Structure Header as defined in section 8.1
 283   This header will be followed by list of Remapping Structures listed below
 284     - DMA Remapping Hardware Unit Definition (DRHD)
 285     - Reserved Memory Region Reporting (RMRR)
 286     - Root Port ATS Capability Reporting (ATSR)
 287     - Remapping Hardware Static Affinity (RHSA)
 288     - ACPI Name-space Device Declaration (ANDD)
 289     - SoC Integrated Address Translation Cache reporting (SATC)
 290     - SoC Integrated Device Property reporting (SIDP)
 291   These structure types must by reported in numerical order.
 292   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 293   structures of type 1 (RMRR), and so forth.
 294 **/
 295 typedef struct {
 296   EFI_ACPI_DESCRIPTION_HEADER    Header;
 297
 298   /**
 299     This field indicates the maximum DMA physical addressability supported by
 300     this platform. The system address map reported by the BIOS indicates what
 301     portions of this addresses are populated. The Host Address Width (HAW) of
 302     the platform is computed as (N+1), where N is the value reported in this
 303     field.
 304     For example, for a platform supporting 40 bits of physical addressability,
 305     the value of 100111b is reported in this field.
 306   **/
 307   UINT8    HostAddressWidth;
 308
 309   /**
 310     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 311                 remapping. If Set, the platform supports interrupt remapping.
 312     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 313                 firmware may Set this field to request system software to opt
 314                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 315                 valid only when the INTR_REMAP field (bit 0) is Set.
 316     - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
 317                 recommended to Set this field to report any platform initiated
 318                 DMA is restricted to only reserved memory regions (reported in
 319                 RMRR structures) when transferring control to system software
 320                 such as on ExitBootServices().
 321     - Bits[7:3] Reserved.
 322   **/
 323   UINT8    Flags;
 324   UINT8    Reserved[10];
 325 } EFI_ACPI_DMAR_HEADER;
 326
 327 #pragma pack()
 328
 329 #endif