2 Support for PCI 3.0 standard.
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <IndustryStandard/Pci23.h>
22 /// PCI_CLASS_MASS_STORAGE, Base Class 01h.
25 #define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
26 #define PCI_IF_MASS_STORAGE_SATA 0x00
27 #define PCI_IF_MASS_STORAGE_AHCI 0x01
31 /// PCI_CLASS_WIRELESS, Base Class 0Dh.
34 #define PCI_SUBCLASS_ETHERNET_80211A 0x20
35 #define PCI_SUBCLASS_ETHERNET_80211B 0x21
39 Macro that checks whether device is a SATA controller.
41 @param _p Specified device.
43 @retval TRUE Device is a SATA controller.
44 @retval FALSE Device is not a SATA controller.
47 #define IS_PCI_SATADPA(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)
50 /// PCI Capability List IDs and records
52 #define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
57 /// PCI Data Structure Format
58 /// Section 5.1.2, PCI Firmware Specification, Revision 3.0
61 UINT32 Signature
; ///< "PCIR"
64 UINT16 DeviceListOffset
;
72 UINT16 MaxRuntimeImageLength
;
73 UINT16 ConfigUtilityCodeHeaderOffset
;
74 UINT16 DMTFCLPEntryPointOffset
;
75 } PCI_3_0_DATA_STRUCTURE
;