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2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
5 registers on PCI root bridges on any supported PCI segment. These library services take a single
6 address parameter that encodes the PCI Segment, PCI Bus, PCI Device, PCI Function, and PCI Register.
7 The layout of this address parameter is as follows:
9 PCI Register: Bits 0..11
10 PCI Function Bits 12..14
11 PCI Device Bits 15..19
13 Reserved Bits 28..31. Must be 0.
14 PCI Segment Bits 32..47
15 Reserved Bits 48..63. Must be 0.
17 | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
18 63 48 47 32 31 28 27 20 19 15 14 12 11 0
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
22 may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some alternate
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
24 accesses when PCI Segments other than Segment #0 must be accessed.
26 Copyright (c) 2006 - 2008, Intel Corporation
27 All rights reserved. This program and the accompanying materials
28 are licensed and made available under the terms and conditions of the BSD License
29 which accompanies this distribution. The full text of the license may be found at
30 http://opensource.org/licenses/bsd-license.php
32 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
33 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
37 #ifndef __PCI_SEGMENT_LIB__
38 #define __PCI_SEGMENT_LIB__
42 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
43 and PCI Register to an address that can be passed to the PCI Segment Library functions.
45 Computes an address that is compatible with the PCI Segment Library functions.
46 The unused upper bits of Segment, Bus, Device, Function,
47 and Register are stripped prior to the generation of the address.
49 @param Segment PCI Segment number. Range 0..65535.
50 @param Bus PCI Bus number. Range 0..255.
51 @param Device PCI Device number. Range 0..31.
52 @param Function PCI Function number. Range 0..7.
53 @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
55 @return The address that is compatible with the PCI Segment Library functions.
58 #define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
59 ( ((Register) & 0xfff) | \
60 (((Function) & 0x07) << 12) | \
61 (((Device) & 0x1f) << 15) | \
62 (((Bus) & 0xff) << 20) | \
63 (LShiftU64((Segment) & 0xffff, 32)) \
67 Reads an 8-bit PCI configuration register.
69 Reads and returns the 8-bit PCI configuration register specified by Address.
70 This function must guarantee that all PCI read and write operations are serialized.
72 If any reserved bits in Address are set, then ASSERT().
74 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
76 @return The 8-bit PCI configuration register specified by Address.
86 Writes an 8-bit PCI configuration register.
88 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
89 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
91 If Address > 0x0FFFFFFF, then ASSERT().
93 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
94 @param Value The value to write.
96 @return The parameter of Value.
107 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.
109 Reads the 8-bit PCI configuration register specified by Address,
110 performs a bitwise inclusive OR between the read result and the value specified by OrData,
111 and writes the result to the 8-bit PCI configuration register specified by Address.
112 The value written to the PCI configuration register is returned.
113 This function must guarantee that all PCI read and write operations are serialized.
115 If any reserved bits in Address are set, then ASSERT().
117 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
118 @param OrData The value to OR with the PCI configuration register.
120 @return The value written to the PCI configuration register.
131 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
133 Reads the 8-bit PCI configuration register specified by Address,
134 performs a bitwise AND between the read result and the value specified by AndData,
135 and writes the result to the 8-bit PCI configuration register specified by Address.
136 The value written to the PCI configuration register is returned.
137 This function must guarantee that all PCI read and write operations are serialized.
138 If any reserved bits in Address are set, then ASSERT().
140 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
141 @param AndData The value to AND with the PCI configuration register.
143 @return The value written to the PCI configuration register.
154 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
155 followed a bitwise inclusive OR with another 8-bit value.
157 Reads the 8-bit PCI configuration register specified by Address,
158 performs a bitwise AND between the read result and the value specified by AndData,
159 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
160 and writes the result to the 8-bit PCI configuration register specified by Address.
161 The value written to the PCI configuration register is returned.
162 This function must guarantee that all PCI read and write operations are serialized.
164 If any reserved bits in Address are set, then ASSERT().
166 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
167 @param AndData The value to AND with the PCI configuration register.
168 @param OrData The value to OR with the PCI configuration register.
170 @return The value written to the PCI configuration register.
175 PciSegmentAndThenOr8 (
182 Reads a bit field of a PCI configuration register.
184 Reads the bit field in an 8-bit PCI configuration register.
185 The bit field is specified by the StartBit and the EndBit.
186 The value of the bit field is returned.
188 If any reserved bits in Address are set, then ASSERT().
189 If StartBit is greater than 7, then ASSERT().
190 If EndBit is greater than 7, then ASSERT().
191 If EndBit is less than StartBit, then ASSERT().
193 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
194 @param StartBit The ordinal of the least significant bit in the bit field.
195 The ordinal of the least significant bit in a byte is bit 0.
196 @param EndBit The ordinal of the most significant bit in the bit field.
197 The ordinal of the most significant bit in a byte is bit 7.
199 @return The value of the bit field.
204 PciSegmentBitFieldRead8 (
211 Writes a bit field to a PCI configuration register.
213 Writes Value to the bit field of the PCI configuration register.
214 The bit field is specified by the StartBit and the EndBit.
215 All other bits in the destination PCI configuration register are preserved.
216 The new value of the 8-bit register is returned.
217 If any reserved bits in Address are set, then ASSERT().
218 If StartBit is greater than 7, then ASSERT().
219 If EndBit is greater than 7, then ASSERT().
220 If EndBit is less than StartBit, then ASSERT().
222 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
223 @param StartBit The ordinal of the least significant bit in the bit field.
224 The ordinal of the least significant bit in a byte is bit 0.
225 @param EndBit The ordinal of the most significant bit in the bit field.
226 The ordinal of the most significant bit in a byte is bit 7.
227 @param Value New value of the bit field.
229 @return The new value of the 8-bit register.
234 PciSegmentBitFieldWrite8 (
242 Reads the 8-bit PCI configuration register specified by Address,
243 performs a bitwise inclusive OR between the read result and the value specified by OrData,
244 and writes the result to the 8-bit PCI configuration register specified by Address.
246 If any reserved bits in Address are set, then ASSERT().
247 If StartBit is greater than 7, then ASSERT().
248 If EndBit is greater than 7, then ASSERT().
249 If EndBit is less than StartBit, then ASSERT().
251 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
252 @param StartBit The ordinal of the least significant bit in the bit field.
253 The ordinal of the least significant bit in a byte is bit 0.
254 @param EndBit The ordinal of the most significant bit in the bit field.
255 The ordinal of the most significant bit in a byte is bit 7.
256 @param OrData The value to OR with the read value from the PCI configuration register.
258 @return The value written to the PCI configuration register.
263 PciSegmentBitFieldOr8 (
271 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR,
272 and writes the result back to the bit field in the 8-bit port.
274 Reads the 8-bit PCI configuration register specified by Address,
275 performs a bitwise inclusive OR between the read result and the value specified by OrData,
276 and writes the result to the 8-bit PCI configuration register specified by Address.
277 The value written to the PCI configuration register is returned.
278 This function must guarantee that all PCI read and write operations are serialized.
279 Extra left bits in OrData are stripped.
281 If any reserved bits in Address are set, then ASSERT().
282 If StartBit is greater than 7, then ASSERT().
283 If EndBit is greater than 7, then ASSERT().
284 If EndBit is less than StartBit, then ASSERT().
286 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
287 @param StartBit The ordinal of the least significant bit in the bit field.
288 The ordinal of the least significant bit in a byte is bit 0.
289 @param EndBit The ordinal of the most significant bit in the bit field.
290 The ordinal of the most significant bit in a byte is bit 7.
291 @param AndData The value to AND with the read value from the PCI configuration register.
293 @return The value written to the PCI configuration register.
298 PciSegmentBitFieldAnd8 (
306 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND,
307 and writes the result back to the bit field in the 8-bit register.
309 Reads the 8-bit PCI configuration register specified by Address,
310 performs a bitwise AND between the read result and the value specified by AndData,
311 and writes the result to the 8-bit PCI configuration register specified by Address.
312 The value written to the PCI configuration register is returned.
313 This function must guarantee that all PCI read and write operations are serialized.
314 Extra left bits in AndData are stripped.
316 If any reserved bits in Address are set, then ASSERT().
317 If StartBit is greater than 7, then ASSERT().
318 If EndBit is greater than 7, then ASSERT().
319 If EndBit is less than StartBit, then ASSERT().
321 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
322 @param StartBit The ordinal of the least significant bit in the bit field.
323 The ordinal of the least significant bit in a byte is bit 0.
324 @param EndBit The ordinal of the most significant bit in the bit field.
325 The ordinal of the most significant bit in a byte is bit 7.
326 @param AndData The value to AND with the read value from the PCI configuration register.
327 @param OrData The value to OR with the read value from the PCI configuration register.
329 @return The value written to the PCI configuration register.
334 PciSegmentBitFieldAndThenOr8 (
343 Reads a 16-bit PCI configuration register.
345 Reads and returns the 16-bit PCI configuration register specified by Address.
346 This function must guarantee that all PCI read and write operations are serialized.
348 If any reserved bits in Address are set, then ASSERT().
349 If Address is not aligned on a 16-bit boundary, then ASSERT().
351 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
353 @return The 16-bit PCI configuration register specified by Address.
363 Writes a 16-bit PCI configuration register.
365 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
366 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
368 If any reserved bits in Address are set, then ASSERT().
369 If Address is not aligned on a 16-bit boundary, then ASSERT().
371 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
372 @param Value The value to write.
374 @return The parameter of Value.
385 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with a 16-bit value.
387 Reads the 16-bit PCI configuration register specified by Address,
388 performs a bitwise inclusive OR between the read result and the value specified by OrData,
389 and writes the result to the 16-bit PCI configuration register specified by Address.
390 The value written to the PCI configuration register is returned.
391 This function must guarantee that all PCI read and write operations are serialized.
393 If any reserved bits in Address are set, then ASSERT().
394 If Address is not aligned on a 16-bit boundary, then ASSERT().
396 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
397 @param OrData The value to OR with the PCI configuration register.
399 @return The value written to the PCI configuration register.
410 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
412 Reads the 16-bit PCI configuration register specified by Address,
413 performs a bitwise AND between the read result and the value specified by AndData,
414 and writes the result to the 16-bit PCI configuration register specified by Address.
415 The value written to the PCI configuration register is returned.
416 This function must guarantee that all PCI read and write operations are serialized.
418 If any reserved bits in Address are set, then ASSERT().
419 If Address is not aligned on a 16-bit boundary, then ASSERT().
421 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
422 @param AndData The value to AND with the PCI configuration register.
424 @return The value written to the PCI configuration register.
435 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
436 followed a bitwise inclusive OR with another 16-bit value.
438 Reads the 16-bit PCI configuration register specified by Address,
439 performs a bitwise AND between the read result and the value specified by AndData,
440 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
441 and writes the result to the 16-bit PCI configuration register specified by Address.
442 The value written to the PCI configuration register is returned.
443 This function must guarantee that all PCI read and write operations are serialized.
445 If any reserved bits in Address are set, then ASSERT().
446 If Address is not aligned on a 16-bit boundary, then ASSERT().
448 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
449 @param AndData The value to AND with the PCI configuration register.
450 @param OrData The value to OR with the PCI configuration register.
452 @return The value written to the PCI configuration register.
457 PciSegmentAndThenOr16 (
464 Reads a bit field of a PCI configuration register.
466 Reads the bit field in a 16-bit PCI configuration register.
467 The bit field is specified by the StartBit and the EndBit.
468 The value of the bit field is returned.
470 If any reserved bits in Address are set, then ASSERT().
471 If Address is not aligned on a 16-bit boundary, then ASSERT().
472 If StartBit is greater than 7, then ASSERT().
473 If EndBit is greater than 7, then ASSERT().
474 If EndBit is less than StartBit, then ASSERT().
476 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
477 @param StartBit The ordinal of the least significant bit in the bit field.
478 The ordinal of the least significant bit in a byte is bit 0.
479 @param EndBit The ordinal of the most significant bit in the bit field.
480 The ordinal of the most significant bit in a byte is bit 7.
482 @return The value of the bit field.
487 PciSegmentBitFieldRead16 (
494 Writes a bit field to a PCI configuration register.
496 Writes Value to the bit field of the PCI configuration register.
497 The bit field is specified by the StartBit and the EndBit.
498 All other bits in the destination PCI configuration register are preserved.
499 The new value of the 16-bit register is returned.
501 If any reserved bits in Address are set, then ASSERT().
502 If Address is not aligned on a 16-bit boundary, then ASSERT().
503 If StartBit is greater than 7, then ASSERT().
504 If EndBit is greater than 7, then ASSERT().
505 If EndBit is less than StartBit, then ASSERT().
507 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
508 @param StartBit The ordinal of the least significant bit in the bit field.
509 The ordinal of the least significant bit in a byte is bit 0.
510 @param EndBit The ordinal of the most significant bit in the bit field.
511 The ordinal of the most significant bit in a byte is bit 7.
512 @param Value New value of the bit field.
514 @return The new value of the 16-bit register.
519 PciSegmentBitFieldWrite16 (
527 Reads the 16-bit PCI configuration register specified by Address,
528 performs a bitwise inclusive OR between the read result and the value specified by OrData,
529 and writes the result to the 16-bit PCI configuration register specified by Address.
531 If any reserved bits in Address are set, then ASSERT().
532 If Address is not aligned on a 16-bit boundary, then ASSERT().
533 If StartBit is greater than 15, then ASSERT().
534 If EndBit is greater than 15, then ASSERT().
535 If EndBit is less than StartBit, then ASSERT().
537 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
538 @param StartBit The ordinal of the least significant bit in the bit field.
539 The ordinal of the least significant bit in a byte is bit 0.
540 @param EndBit The ordinal of the most significant bit in the bit field.
541 The ordinal of the most significant bit in a byte is bit 7.
542 @param OrData The value to OR with the read value from the PCI configuration register.
544 @return The value written to the PCI configuration register.
549 PciSegmentBitFieldOr16 (
557 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
558 and writes the result back to the bit field in the 16-bit port.
560 Reads the 16-bit PCI configuration register specified by Address,
561 performs a bitwise inclusive OR between the read result and the value specified by OrData,
562 and writes the result to the 16-bit PCI configuration register specified by Address.
563 The value written to the PCI configuration register is returned.
564 This function must guarantee that all PCI read and write operations are serialized.
565 Extra left bits in OrData are stripped.
567 If any reserved bits in Address are set, then ASSERT().
568 If Address is not aligned on a 16-bit boundary, then ASSERT().
569 If StartBit is greater than 7, then ASSERT().
570 If EndBit is greater than 7, then ASSERT().
571 If EndBit is less than StartBit, then ASSERT().
573 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
574 @param StartBit The ordinal of the least significant bit in the bit field.
575 The ordinal of the least significant bit in a byte is bit 0.
576 @param EndBit The ordinal of the most significant bit in the bit field.
577 The ordinal of the most significant bit in a byte is bit 7.
578 @param AndData The value to AND with the read value from the PCI configuration register.
580 @return The value written to the PCI configuration register.
585 PciSegmentBitFieldAnd16 (
593 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND,
594 and writes the result back to the bit field in the 16-bit register.
596 Reads the 16-bit PCI configuration register specified by Address,
597 performs a bitwise AND between the read result and the value specified by AndData,
598 and writes the result to the 16-bit PCI configuration register specified by Address.
599 The value written to the PCI configuration register is returned.
600 This function must guarantee that all PCI read and write operations are serialized.
601 Extra left bits in AndData are stripped.
603 If any reserved bits in Address are set, then ASSERT().
604 If Address is not aligned on a 16-bit boundary, then ASSERT()..
605 If StartBit is greater than 7, then ASSERT().
606 If EndBit is greater than 7, then ASSERT().
607 If EndBit is less than StartBit, then ASSERT().
609 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
610 @param StartBit The ordinal of the least significant bit in the bit field.
611 The ordinal of the least significant bit in a byte is bit 0.
612 @param EndBit The ordinal of the most significant bit in the bit field.
613 The ordinal of the most significant bit in a byte is bit 7.
614 @param AndData The value to AND with the read value from the PCI configuration register.
615 @param OrData The value to OR with the read value from the PCI configuration register.
617 @return The value written to the PCI configuration register.
622 PciSegmentBitFieldAndThenOr16 (
631 Reads a 32-bit PCI configuration register.
633 Reads and returns the 32-bit PCI configuration register specified by Address.
634 This function must guarantee that all PCI read and write operations are serialized.
636 If any reserved bits in Address are set, then ASSERT().
637 If Address is not aligned on a 32-bit boundary, then ASSERT().
639 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
641 @return The 32-bit PCI configuration register specified by Address.
651 Writes a 32-bit PCI configuration register.
653 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
654 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
656 If any reserved bits in Address are set, then ASSERT().
657 If Address is not aligned on a 32-bit boundary, then ASSERT().
659 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
660 @param Value The value to write.
662 @return The parameter of Value.
673 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.
675 Reads the 32-bit PCI configuration register specified by Address,
676 performs a bitwise inclusive OR between the read result and the value specified by OrData,
677 and writes the result to the 32-bit PCI configuration register specified by Address.
678 The value written to the PCI configuration register is returned.
679 This function must guarantee that all PCI read and write operations are serialized.
681 If any reserved bits in Address are set, then ASSERT().
682 If Address is not aligned on a 32-bit boundary, then ASSERT().
684 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
685 @param OrData The value to OR with the PCI configuration register.
687 @return The value written to the PCI configuration register.
698 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
700 Reads the 32-bit PCI configuration register specified by Address,
701 performs a bitwise AND between the read result and the value specified by AndData,
702 and writes the result to the 32-bit PCI configuration register specified by Address.
703 The value written to the PCI configuration register is returned.
704 This function must guarantee that all PCI read and write operations are serialized.
706 If any reserved bits in Address are set, then ASSERT().
707 If Address is not aligned on a 32-bit boundary, then ASSERT().
709 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
710 @param AndData The value to AND with the PCI configuration register.
712 @return The value written to the PCI configuration register.
723 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
724 followed a bitwise inclusive OR with another 32-bit value.
726 Reads the 32-bit PCI configuration register specified by Address,
727 performs a bitwise AND between the read result and the value specified by AndData,
728 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
729 and writes the result to the 32-bit PCI configuration register specified by Address.
730 The value written to the PCI configuration register is returned.
731 This function must guarantee that all PCI read and write operations are serialized.
733 If any reserved bits in Address are set, then ASSERT().
734 If Address is not aligned on a 32-bit boundary, then ASSERT().
736 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
737 @param AndData The value to AND with the PCI configuration register.
738 @param OrData The value to OR with the PCI configuration register.
740 @return The value written to the PCI configuration register.
745 PciSegmentAndThenOr32 (
752 Reads a bit field of a PCI configuration register.
754 Reads the bit field in a 32-bit PCI configuration register.
755 The bit field is specified by the StartBit and the EndBit.
756 The value of the bit field is returned.
758 If any reserved bits in Address are set, then ASSERT().
759 If Address is not aligned on a 32-bit boundary, then ASSERT().
760 If StartBit is greater than 7, then ASSERT().
761 If EndBit is greater than 7, then ASSERT().
762 If EndBit is less than StartBit, then ASSERT().
764 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
765 @param StartBit The ordinal of the least significant bit in the bit field.
766 The ordinal of the least significant bit in a byte is bit 0.
767 @param EndBit The ordinal of the most significant bit in the bit field.
768 The ordinal of the most significant bit in a byte is bit 7.
770 @return The value of the bit field.
775 PciSegmentBitFieldRead32 (
782 Writes a bit field to a PCI configuration register.
784 Writes Value to the bit field of the PCI configuration register.
785 The bit field is specified by the StartBit and the EndBit.
786 All other bits in the destination PCI configuration register are preserved.
787 The new value of the 32-bit register is returned.
789 If any reserved bits in Address are set, then ASSERT().
790 If Address is not aligned on a 32-bit boundary, then ASSERT().
791 If StartBit is greater than 7, then ASSERT().
792 If EndBit is greater than 7, then ASSERT().
793 If EndBit is less than StartBit, then ASSERT().
795 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
796 @param StartBit The ordinal of the least significant bit in the bit field.
797 The ordinal of the least significant bit in a byte is bit 0.
798 @param EndBit The ordinal of the most significant bit in the bit field.
799 The ordinal of the most significant bit in a byte is bit 7.
800 @param Value New value of the bit field.
802 @return The new value of the 32-bit register.
807 PciSegmentBitFieldWrite32 (
815 Reads the 32-bit PCI configuration register specified by Address,
816 performs a bitwise inclusive OR between the read result and the value specified by OrData,
817 and writes the result to the 32-bit PCI configuration register specified by Address.
819 If any reserved bits in Address are set, then ASSERT().
820 If Address is not aligned on a 32-bit boundary, then ASSERT().
821 If StartBit is greater than 7, then ASSERT().
822 If EndBit is greater than 7, then ASSERT().
823 If EndBit is less than StartBit, then ASSERT().
825 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
826 @param StartBit The ordinal of the least significant bit in the bit field.
827 The ordinal of the least significant bit in a byte is bit 0.
828 @param EndBit The ordinal of the most significant bit in the bit field.
829 The ordinal of the most significant bit in a byte is bit 7.
830 @param OrData The value to OR with the read value from the PCI configuration register.
832 @return The value written to the PCI configuration register.
837 PciSegmentBitFieldOr32 (
845 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR,
846 and writes the result back to the bit field in the 32-bit port.
848 Reads the 32-bit PCI configuration register specified by Address,
849 performs a bitwise inclusive OR between the read result and the value specified by OrData,
850 and writes the result to the 32-bit PCI configuration register specified by Address.
851 The value written to the PCI configuration register is returned.
852 This function must guarantee that all PCI read and write operations are serialized.
853 Extra left bits in OrData are stripped.
855 If any reserved bits in Address are set, then ASSERT().
856 If Address is not aligned on a 32-bit boundary, then ASSERT().
857 If StartBit is greater than 7, then ASSERT().
858 If EndBit is greater than 7, then ASSERT().
859 If EndBit is less than StartBit, then ASSERT().
861 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
862 @param StartBit The ordinal of the least significant bit in the bit field.
863 The ordinal of the least significant bit in a byte is bit 0.
864 @param EndBit The ordinal of the most significant bit in the bit field.
865 The ordinal of the most significant bit in a byte is bit 7.
866 @param AndData The value to AND with the read value from the PCI configuration register.
868 @return The value written to the PCI configuration register.
873 PciSegmentBitFieldAnd32 (
881 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND,
882 and writes the result back to the bit field in the 32-bit register.
884 Reads the 32-bit PCI configuration register specified by Address,
885 performs a bitwise AND between the read result and the value specified by AndData,
886 and writes the result to the 32-bit PCI configuration register specified by Address.
887 The value written to the PCI configuration register is returned.
888 This function must guarantee that all PCI read and write operations are serialized.
889 Extra left bits in AndData are stripped.
891 If any reserved bits in Address are set, then ASSERT().
892 If Address is not aligned on a 32-bit boundary, then ASSERT().
893 If StartBit is greater than 7, then ASSERT().
894 If EndBit is greater than 7, then ASSERT().
895 If EndBit is less than StartBit, then ASSERT().
897 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
898 @param StartBit The ordinal of the least significant bit in the bit field.
899 The ordinal of the least significant bit in a byte is bit 0.
900 @param EndBit The ordinal of the most significant bit in the bit field.
901 The ordinal of the most significant bit in a byte is bit 7.
902 @param AndData The value to AND with the read value from the PCI configuration register.
903 @param OrData The value to OR with the read value from the PCI configuration register.
905 @return The value written to the PCI configuration register.
910 PciSegmentBitFieldAndThenOr32 (
919 Reads a range of PCI configuration registers into a caller supplied buffer.
921 Reads the range of PCI configuration registers specified by StartAddress
922 and Size into the buffer specified by Buffer.
923 This function only allows the PCI configuration registers from a single PCI function to be read.
926 If any reserved bits in StartAddress are set, then ASSERT().
927 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
928 If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
929 If Size > 0 and Buffer is NULL, then ASSERT().
931 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
932 @param Size Size in bytes of the transfer.
933 @param Buffer Pointer to a buffer receiving the data read.
935 @return The parameter of Size.
940 PciSegmentReadBuffer (
941 IN UINT64 StartAddress
,
947 Copies the data in a caller supplied buffer to a specified range of PCI configuration space.
949 Writes the range of PCI configuration registers specified by StartAddress
950 and Size from the buffer specified by Buffer.
951 This function only allows the PCI configuration registers from a single PCI function to be written.
954 If any reserved bits in StartAddress are set, then ASSERT().
955 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
956 If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
957 If Buffer is NULL, then ASSERT().
959 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
960 @param Size Size in bytes of the transfer.
961 @param Buffer Pointer to a buffer containing the data to write.
963 @return The parameter of Size.
968 PciSegmentWriteBuffer (
969 IN UINT64 StartAddress
,