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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/Library/PciSegmentLib.h
2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 Copyright (c) 2006 - 2008, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __PCI_SEGMENT_LIB__
16 #define __PCI_SEGMENT_LIB__
20 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
21 and PCI Register to an address that can be passed to the PCI Segment Library functions.
23 Computes an address that is compatible with the PCI Segment Library functions.
24 The unused upper bits of Segment, Bus, Device, Function,
25 and Register are stripped prior to the generation of the address.
27 @param Segment PCI Segment number. Range 0..65535.
28 @param Bus PCI Bus number. Range 0..255.
29 @param Device PCI Device number. Range 0..31.
30 @param Function PCI Function number. Range 0..7.
31 @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
33 @return The address that is compatible with the PCI Segment Library functions.
36 #define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
37 ( ((Register) & 0xfff) | \
38 (((Function) & 0x07) << 12) | \
39 (((Device) & 0x1f) << 15) | \
40 (((Bus) & 0xff) << 20) | \
41 (LShiftU64((Segment) & 0xffff, 32)) \
45 Reads an 8-bit PCI configuration register.
47 Reads and returns the 8-bit PCI configuration register specified by Address.
48 This function must guarantee that all PCI read and write operations are serialized.
49 If any reserved bits in Address are set, then ASSERT().
51 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
53 @return The 8-bit PCI configuration register specified by Address.
63 Writes an 8-bit PCI configuration register.
65 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
66 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
67 If Address > 0x0FFFFFFF, then ASSERT().
69 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
70 @param Value The value to write.
72 @return The parameter of Value.
83 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.
85 Reads the 8-bit PCI configuration register specified by Address,
86 performs a bitwise inclusive OR between the read result and the value specified by OrData,
87 and writes the result to the 8-bit PCI configuration register specified by Address.
88 The value written to the PCI configuration register is returned.
89 This function must guarantee that all PCI read and write operations are serialized.
90 If any reserved bits in Address are set, then ASSERT().
92 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
93 @param OrData The value to OR with the PCI configuration register.
95 @return The value written to the PCI configuration register.
106 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
108 Reads the 8-bit PCI configuration register specified by Address,
109 performs a bitwise AND between the read result and the value specified by AndData,
110 and writes the result to the 8-bit PCI configuration register specified by Address.
111 The value written to the PCI configuration register is returned.
112 This function must guarantee that all PCI read and write operations are serialized.
113 If any reserved bits in Address are set, then ASSERT().
115 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
116 @param AndData The value to AND with the PCI configuration register.
118 @return The value written to the PCI configuration register.
129 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
130 followed a bitwise inclusive OR with another 8-bit value.
132 Reads the 8-bit PCI configuration register specified by Address,
133 performs a bitwise AND between the read result and the value specified by AndData,
134 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
135 and writes the result to the 8-bit PCI configuration register specified by Address.
136 The value written to the PCI configuration register is returned.
137 This function must guarantee that all PCI read and write operations are serialized.
138 If any reserved bits in Address are set, then ASSERT().
140 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
141 @param AndData The value to AND with the PCI configuration register.
142 @param OrData The value to OR with the PCI configuration register.
144 @return The value written to the PCI configuration register.
149 PciSegmentAndThenOr8 (
156 Reads a bit field of a PCI configuration register.
158 Reads the bit field in an 8-bit PCI configuration register.
159 The bit field is specified by the StartBit and the EndBit.
160 The value of the bit field is returned.
161 If any reserved bits in Address are set, then ASSERT().
162 If StartBit is greater than 7, then ASSERT().
163 If EndBit is greater than 7, then ASSERT().
164 If EndBit is less than StartBit, then ASSERT().
166 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
167 @param StartBit The ordinal of the least significant bit in the bit field.
168 The ordinal of the least significant bit in a byte is bit 0.
169 @param EndBit The ordinal of the most significant bit in the bit field.
170 The ordinal of the most significant bit in a byte is bit 7.
172 @return The value of the bit field.
177 PciSegmentBitFieldRead8 (
184 Writes a bit field to a PCI configuration register.
186 Writes Value to the bit field of the PCI configuration register.
187 The bit field is specified by the StartBit and the EndBit.
188 All other bits in the destination PCI configuration register are preserved.
189 The new value of the 8-bit register is returned.
190 If any reserved bits in Address are set, then ASSERT().
191 If StartBit is greater than 7, then ASSERT().
192 If EndBit is greater than 7, then ASSERT().
193 If EndBit is less than StartBit, then ASSERT().
195 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
196 @param StartBit The ordinal of the least significant bit in the bit field.
197 The ordinal of the least significant bit in a byte is bit 0.
198 @param EndBit The ordinal of the most significant bit in the bit field.
199 The ordinal of the most significant bit in a byte is bit 7.
200 @param Value New value of the bit field.
202 @return The new value of the 8-bit register.
207 PciSegmentBitFieldWrite8 (
215 Reads the 8-bit PCI configuration register specified by Address,
216 performs a bitwise inclusive OR between the read result and the value specified by OrData,
217 and writes the result to the 8-bit PCI configuration register specified by Address.
219 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
220 @param StartBit The ordinal of the least significant bit in the bit field.
221 The ordinal of the least significant bit in a byte is bit 0.
222 @param EndBit The ordinal of the most significant bit in the bit field.
223 The ordinal of the most significant bit in a byte is bit 7.
224 @param OrData The value to OR with the read value from the PCI configuration register.
226 @return The value written to the PCI configuration register.
231 PciSegmentBitFieldOr8 (
239 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR,
240 and writes the result back to the bit field in the 8-bit port.
242 Reads the 8-bit PCI configuration register specified by Address,
243 performs a bitwise inclusive OR between the read result and the value specified by OrData,
244 and writes the result to the 8-bit PCI configuration register specified by Address.
245 The value written to the PCI configuration register is returned.
246 This function must guarantee that all PCI read and write operations are serialized.
247 Extra left bits in OrData are stripped.
248 If any reserved bits in Address are set, then ASSERT().
249 If StartBit is greater than 7, then ASSERT().
250 If EndBit is greater than 7, then ASSERT().
251 If EndBit is less than StartBit, then ASSERT().
253 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
254 @param StartBit The ordinal of the least significant bit in the bit field.
255 The ordinal of the least significant bit in a byte is bit 0.
256 @param EndBit The ordinal of the most significant bit in the bit field.
257 The ordinal of the most significant bit in a byte is bit 7.
258 @param AndData The value to AND with the read value from the PCI configuration register.
260 @return The value written to the PCI configuration register.
265 PciSegmentBitFieldAnd8 (
273 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND,
274 and writes the result back to the bit field in the 8-bit register.
276 Reads the 8-bit PCI configuration register specified by Address,
277 performs a bitwise AND between the read result and the value specified by AndData,
278 and writes the result to the 8-bit PCI configuration register specified by Address.
279 The value written to the PCI configuration register is returned.
280 This function must guarantee that all PCI read and write operations are serialized.
281 Extra left bits in AndData are stripped.
282 If any reserved bits in Address are set, then ASSERT().
283 If StartBit is greater than 7, then ASSERT().
284 If EndBit is greater than 7, then ASSERT().
285 If EndBit is less than StartBit, then ASSERT().
287 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
288 @param StartBit The ordinal of the least significant bit in the bit field.
289 The ordinal of the least significant bit in a byte is bit 0.
290 @param EndBit The ordinal of the most significant bit in the bit field.
291 The ordinal of the most significant bit in a byte is bit 7.
292 @param AndData The value to AND with the read value from the PCI configuration register.
293 @param OrData The value to OR with the read value from the PCI configuration register.
295 @return The value written to the PCI configuration register.
300 PciSegmentBitFieldAndThenOr8 (
309 Reads a 16-bit PCI configuration register.
311 Reads and returns the 16-bit PCI configuration register specified by Address.
312 This function must guarantee that all PCI read and write operations are serialized.
313 If any reserved bits in Address are set, then ASSERT().
315 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
317 @return The 16-bit PCI configuration register specified by Address.
327 Writes a 16-bit PCI configuration register.
329 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
330 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
331 If Address > 0x0FFFFFFF, then ASSERT().
333 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
334 @param Value The value to write.
336 @return The parameter of Value.
347 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with a 16-bit value.
349 Reads the 16-bit PCI configuration register specified by Address,
350 performs a bitwise inclusive OR between the read result and the value specified by OrData,
351 and writes the result to the 16-bit PCI configuration register specified by Address.
352 The value written to the PCI configuration register is returned.
353 This function must guarantee that all PCI read and write operations are serialized.
354 If any reserved bits in Address are set, then ASSERT().
356 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
357 @param OrData The value to OR with the PCI configuration register.
359 @return The value written to the PCI configuration register.
370 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
372 Reads the 16-bit PCI configuration register specified by Address,
373 performs a bitwise AND between the read result and the value specified by AndData,
374 and writes the result to the 16-bit PCI configuration register specified by Address.
375 The value written to the PCI configuration register is returned.
376 This function must guarantee that all PCI read and write operations are serialized.
377 If any reserved bits in Address are set, then ASSERT().
379 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
380 @param AndData The value to AND with the PCI configuration register.
382 @return The value written to the PCI configuration register.
393 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
394 followed a bitwise inclusive OR with another 16-bit value.
396 Reads the 16-bit PCI configuration register specified by Address,
397 performs a bitwise AND between the read result and the value specified by AndData,
398 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
399 and writes the result to the 16-bit PCI configuration register specified by Address.
400 The value written to the PCI configuration register is returned.
401 This function must guarantee that all PCI read and write operations are serialized.
402 If any reserved bits in Address are set, then ASSERT().
404 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
405 @param AndData The value to AND with the PCI configuration register.
406 @param OrData The value to OR with the PCI configuration register.
408 @return The value written to the PCI configuration register.
413 PciSegmentAndThenOr16 (
420 Reads a bit field of a PCI configuration register.
422 Reads the bit field in a 16-bit PCI configuration register.
423 The bit field is specified by the StartBit and the EndBit.
424 The value of the bit field is returned.
425 If any reserved bits in Address are set, then ASSERT().
426 If StartBit is greater than 7, then ASSERT().
427 If EndBit is greater than 7, then ASSERT().
428 If EndBit is less than StartBit, then ASSERT().
430 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
431 @param StartBit The ordinal of the least significant bit in the bit field.
432 The ordinal of the least significant bit in a byte is bit 0.
433 @param EndBit The ordinal of the most significant bit in the bit field.
434 The ordinal of the most significant bit in a byte is bit 7.
436 @return The value of the bit field.
441 PciSegmentBitFieldRead16 (
448 Writes a bit field to a PCI configuration register.
450 Writes Value to the bit field of the PCI configuration register.
451 The bit field is specified by the StartBit and the EndBit.
452 All other bits in the destination PCI configuration register are preserved.
453 The new value of the 16-bit register is returned.
454 If any reserved bits in Address are set, then ASSERT().
455 If StartBit is greater than 7, then ASSERT().
456 If EndBit is greater than 7, then ASSERT().
457 If EndBit is less than StartBit, then ASSERT().
459 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
460 @param StartBit The ordinal of the least significant bit in the bit field.
461 The ordinal of the least significant bit in a byte is bit 0.
462 @param EndBit The ordinal of the most significant bit in the bit field.
463 The ordinal of the most significant bit in a byte is bit 7.
464 @param Value New value of the bit field.
466 @return The new value of the 16-bit register.
471 PciSegmentBitFieldWrite16 (
479 Reads the 16-bit PCI configuration register specified by Address,
480 performs a bitwise inclusive OR between the read result and the value specified by OrData,
481 and writes the result to the 16-bit PCI configuration register specified by Address.
483 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
484 @param StartBit The ordinal of the least significant bit in the bit field.
485 The ordinal of the least significant bit in a byte is bit 0.
486 @param EndBit The ordinal of the most significant bit in the bit field.
487 The ordinal of the most significant bit in a byte is bit 7.
488 @param OrData The value to OR with the read value from the PCI configuration register.
490 @return The value written to the PCI configuration register.
495 PciSegmentBitFieldOr16 (
503 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
504 and writes the result back to the bit field in the 16-bit port.
506 Reads the 16-bit PCI configuration register specified by Address,
507 performs a bitwise inclusive OR between the read result and the value specified by OrData,
508 and writes the result to the 16-bit PCI configuration register specified by Address.
509 The value written to the PCI configuration register is returned.
510 This function must guarantee that all PCI read and write operations are serialized.
511 Extra left bits in OrData are stripped.
512 If any reserved bits in Address are set, then ASSERT().
513 If StartBit is greater than 7, then ASSERT().
514 If EndBit is greater than 7, then ASSERT().
515 If EndBit is less than StartBit, then ASSERT().
517 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
518 @param StartBit The ordinal of the least significant bit in the bit field.
519 The ordinal of the least significant bit in a byte is bit 0.
520 @param EndBit The ordinal of the most significant bit in the bit field.
521 The ordinal of the most significant bit in a byte is bit 7.
522 @param AndData The value to AND with the read value from the PCI configuration register.
524 @return The value written to the PCI configuration register.
529 PciSegmentBitFieldAnd16 (
537 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND,
538 and writes the result back to the bit field in the 16-bit register.
540 Reads the 16-bit PCI configuration register specified by Address,
541 performs a bitwise AND between the read result and the value specified by AndData,
542 and writes the result to the 16-bit PCI configuration register specified by Address.
543 The value written to the PCI configuration register is returned.
544 This function must guarantee that all PCI read and write operations are serialized.
545 Extra left bits in AndData are stripped.
546 If any reserved bits in Address are set, then ASSERT().
547 If StartBit is greater than 7, then ASSERT().
548 If EndBit is greater than 7, then ASSERT().
549 If EndBit is less than StartBit, then ASSERT().
551 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
552 @param StartBit The ordinal of the least significant bit in the bit field.
553 The ordinal of the least significant bit in a byte is bit 0.
554 @param EndBit The ordinal of the most significant bit in the bit field.
555 The ordinal of the most significant bit in a byte is bit 7.
556 @param AndData The value to AND with the read value from the PCI configuration register.
557 @param OrData The value to OR with the read value from the PCI configuration register.
559 @return The value written to the PCI configuration register.
564 PciSegmentBitFieldAndThenOr16 (
573 Reads a 32-bit PCI configuration register.
575 Reads and returns the 32-bit PCI configuration register specified by Address.
576 This function must guarantee that all PCI read and write operations are serialized.
577 If any reserved bits in Address are set, then ASSERT().
579 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
581 @return The 32-bit PCI configuration register specified by Address.
591 Writes a 32-bit PCI configuration register.
593 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
594 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
595 If Address > 0x0FFFFFFF, then ASSERT().
597 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
598 @param Value The value to write.
600 @return The parameter of Value.
611 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.
613 Reads the 32-bit PCI configuration register specified by Address,
614 performs a bitwise inclusive OR between the read result and the value specified by OrData,
615 and writes the result to the 32-bit PCI configuration register specified by Address.
616 The value written to the PCI configuration register is returned.
617 This function must guarantee that all PCI read and write operations are serialized.
618 If any reserved bits in Address are set, then ASSERT().
620 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
621 @param OrData The value to OR with the PCI configuration register.
623 @return The value written to the PCI configuration register.
634 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
636 Reads the 32-bit PCI configuration register specified by Address,
637 performs a bitwise AND between the read result and the value specified by AndData,
638 and writes the result to the 32-bit PCI configuration register specified by Address.
639 The value written to the PCI configuration register is returned.
640 This function must guarantee that all PCI read and write operations are serialized.
641 If any reserved bits in Address are set, then ASSERT().
643 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
644 @param AndData The value to AND with the PCI configuration register.
646 @return The value written to the PCI configuration register.
657 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
658 followed a bitwise inclusive OR with another 32-bit value.
660 Reads the 32-bit PCI configuration register specified by Address,
661 performs a bitwise AND between the read result and the value specified by AndData,
662 performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
663 and writes the result to the 32-bit PCI configuration register specified by Address.
664 The value written to the PCI configuration register is returned.
665 This function must guarantee that all PCI read and write operations are serialized.
666 If any reserved bits in Address are set, then ASSERT().
668 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
669 @param AndData The value to AND with the PCI configuration register.
670 @param OrData The value to OR with the PCI configuration register.
672 @return The value written to the PCI configuration register.
677 PciSegmentAndThenOr32 (
684 Reads a bit field of a PCI configuration register.
686 Reads the bit field in a 32-bit PCI configuration register.
687 The bit field is specified by the StartBit and the EndBit.
688 The value of the bit field is returned.
689 If any reserved bits in Address are set, then ASSERT().
690 If StartBit is greater than 7, then ASSERT().
691 If EndBit is greater than 7, then ASSERT().
692 If EndBit is less than StartBit, then ASSERT().
694 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
695 @param StartBit The ordinal of the least significant bit in the bit field.
696 The ordinal of the least significant bit in a byte is bit 0.
697 @param EndBit The ordinal of the most significant bit in the bit field.
698 The ordinal of the most significant bit in a byte is bit 7.
700 @return The value of the bit field.
705 PciSegmentBitFieldRead32 (
712 Writes a bit field to a PCI configuration register.
714 Writes Value to the bit field of the PCI configuration register.
715 The bit field is specified by the StartBit and the EndBit.
716 All other bits in the destination PCI configuration register are preserved.
717 The new value of the 32-bit register is returned.
718 If any reserved bits in Address are set, then ASSERT().
719 If StartBit is greater than 7, then ASSERT().
720 If EndBit is greater than 7, then ASSERT().
721 If EndBit is less than StartBit, then ASSERT().
723 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
724 @param StartBit The ordinal of the least significant bit in the bit field.
725 The ordinal of the least significant bit in a byte is bit 0.
726 @param EndBit The ordinal of the most significant bit in the bit field.
727 The ordinal of the most significant bit in a byte is bit 7.
728 @param Value New value of the bit field.
730 @return The new value of the 32-bit register.
735 PciSegmentBitFieldWrite32 (
743 Reads the 32-bit PCI configuration register specified by Address,
744 performs a bitwise inclusive OR between the read result and the value specified by OrData,
745 and writes the result to the 32-bit PCI configuration register specified by Address.
747 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
748 @param StartBit The ordinal of the least significant bit in the bit field.
749 The ordinal of the least significant bit in a byte is bit 0.
750 @param EndBit The ordinal of the most significant bit in the bit field.
751 The ordinal of the most significant bit in a byte is bit 7.
752 @param OrData The value to OR with the read value from the PCI configuration register.
754 @return The value written to the PCI configuration register.
759 PciSegmentBitFieldOr32 (
767 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR,
768 and writes the result back to the bit field in the 32-bit port.
770 Reads the 32-bit PCI configuration register specified by Address,
771 performs a bitwise inclusive OR between the read result and the value specified by OrData,
772 and writes the result to the 32-bit PCI configuration register specified by Address.
773 The value written to the PCI configuration register is returned.
774 This function must guarantee that all PCI read and write operations are serialized.
775 Extra left bits in OrData are stripped.
776 If any reserved bits in Address are set, then ASSERT().
777 If StartBit is greater than 7, then ASSERT().
778 If EndBit is greater than 7, then ASSERT().
779 If EndBit is less than StartBit, then ASSERT().
781 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
782 @param StartBit The ordinal of the least significant bit in the bit field.
783 The ordinal of the least significant bit in a byte is bit 0.
784 @param EndBit The ordinal of the most significant bit in the bit field.
785 The ordinal of the most significant bit in a byte is bit 7.
786 @param AndData The value to AND with the read value from the PCI configuration register.
788 @return The value written to the PCI configuration register.
793 PciSegmentBitFieldAnd32 (
801 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND,
802 and writes the result back to the bit field in the 32-bit register.
804 Reads the 32-bit PCI configuration register specified by Address,
805 performs a bitwise AND between the read result and the value specified by AndData,
806 and writes the result to the 32-bit PCI configuration register specified by Address.
807 The value written to the PCI configuration register is returned.
808 This function must guarantee that all PCI read and write operations are serialized.
809 Extra left bits in AndData are stripped.
810 If any reserved bits in Address are set, then ASSERT().
811 If StartBit is greater than 7, then ASSERT().
812 If EndBit is greater than 7, then ASSERT().
813 If EndBit is less than StartBit, then ASSERT().
815 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
816 @param StartBit The ordinal of the least significant bit in the bit field.
817 The ordinal of the least significant bit in a byte is bit 0.
818 @param EndBit The ordinal of the most significant bit in the bit field.
819 The ordinal of the most significant bit in a byte is bit 7.
820 @param AndData The value to AND with the read value from the PCI configuration register.
821 @param OrData The value to OR with the read value from the PCI configuration register.
823 @return The value written to the PCI configuration register.
828 PciSegmentBitFieldAndThenOr32 (
837 Reads a range of PCI configuration registers into a caller supplied buffer.
839 Reads the range of PCI configuration registers specified by StartAddress
840 and Size into the buffer specified by Buffer.
841 This function only allows the PCI configuration registers from a single PCI function to be read.
843 If any reserved bits in StartAddress are set, then ASSERT().
844 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
845 If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
846 If Buffer is NULL, then ASSERT().
848 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
849 @param Size Size in bytes of the transfer.
850 @param Buffer Pointer to a buffer receiving the data read.
852 @return The paramter of Size.
857 PciSegmentReadBuffer (
858 IN UINT64 StartAddress
,
864 Copies the data in a caller supplied buffer to a specified range of PCI configuration space.
866 Writes the range of PCI configuration registers specified by StartAddress
867 and Size from the buffer specified by Buffer.
868 This function only allows the PCI configuration registers from a single PCI function to be written.
870 If any reserved bits in StartAddress are set, then ASSERT().
871 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
872 If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
873 If Buffer is NULL, then ASSERT().
875 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
876 @param Size Size in bytes of the transfer.
877 @param Buffer Pointer to a buffer containing the data to write.
879 @return The paramter of Size.
884 PciSegmentWriteBuffer (
885 IN UINT64 StartAddress
,