3 * Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
4 * Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "MmcHostDxe.h"
18 EMBEDDED_EXTERNAL_DEVICE
*gTPS65950
;
19 UINT8 mMaxDataTransferRate
= 0;
21 BOOLEAN mBitModeSet
= FALSE
;
25 VENDOR_DEVICE_PATH Mmc
;
29 MMCHS_DEVICE_PATH gMMCDevicePath
= {
34 { (UINT8
)(sizeof(VENDOR_DEVICE_PATH
)), (UINT8
)((sizeof(VENDOR_DEVICE_PATH
)) >> 8) },
36 { 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } }
40 END_ENTIRE_DEVICE_PATH_SUBTYPE
,
41 { sizeof (EFI_DEVICE_PATH_PROTOCOL
), 0 }
96 Translation
= 0x113A0014;//CMD17;
99 Translation
= CMD24
| 4;
105 Translation
= ACMD41
;
108 Translation
= Command
;
116 UINTN
*ClockFrequencySelect
119 UINTN TransferRateValue
= 0;
120 UINTN TimeValue
= 0 ;
123 DEBUG ((DEBUG_BLKIO
, "CalculateCardCLKD()\n"));
125 // For SD Cards we would need to send CMD6 to set
126 // speeds abouve 25MHz. High Speed mode 50 MHz and up
128 // Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)
129 switch (mMaxDataTransferRate
& 0x7) { // 2
131 TransferRateValue
= 100 * 1000;
135 TransferRateValue
= 1 * 1000 * 1000;
139 TransferRateValue
= 10 * 1000 * 1000;
143 TransferRateValue
= 100 * 1000 * 1000;
147 DEBUG ((DEBUG_BLKIO
, "Invalid parameter.\n"));
152 //Calculate Time value (Bits 6:3 of TRAN_SPEED)
153 switch ((mMaxDataTransferRate
>> 3) & 0xF) { // 6
215 DEBUG ((DEBUG_BLKIO
, "Invalid parameter.\n"));
220 Frequency
= TransferRateValue
* TimeValue
/10;
222 // Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.
223 *ClockFrequencySelect
= ((MMC_REFERENCE_CLK
/Frequency
) + 1);
225 DEBUG ((DEBUG_BLKIO
, "mMaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", mMaxDataTransferRate
, Frequency
/1000, *ClockFrequencySelect
));
229 UpdateMMCHSClkFrequency (
233 DEBUG ((DEBUG_BLKIO
, "UpdateMMCHSClkFrequency()\n"));
235 // Set Clock enable to 0x0 to not provide the clock to the card
236 MmioAnd32 (MMCHS_SYSCTL
, ~CEN
);
238 // Set new clock frequency.
239 MmioAndThenOr32 (MMCHS_SYSCTL
, ~CLKD_MASK
, NewCLKD
<< 6);
241 // Poll till Internal Clock Stable
242 while ((MmioRead32 (MMCHS_SYSCTL
) & ICS_MASK
) != ICS
);
244 // Set Clock enable to 0x1 to provide the clock to the card
245 MmioOr32 (MMCHS_SYSCTL
, CEN
);
256 DEBUG ((DEBUG_BLKIO
, "InitializeMMCHS()\n"));
258 // Select Device group to belong to P1 device group in Power IC.
260 Status
= gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4
, VMMC1_DEV_GRP
), 1, &Data
);
261 ASSERT_EFI_ERROR(Status
);
263 // Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.
265 Status
= gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4
, VMMC1_DEDICATED_REG
), 1, &Data
);
266 ASSERT_EFI_ERROR(Status
);
268 // After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
269 MmioOr32 (CONTROL_PBIAS_LITE
, (PBIASLITEVMODE0
| PBIASLITEPWRDNZ0
| PBIASSPEEDCTRL0
| PBIASLITEVMODE1
| PBIASLITEWRDNZ1
));
272 MmioAndThenOr32 (GPIO1_BASE
+ GPIO_OE
, ~BIT23
, BIT23
);
274 // Enable Card Detect
275 Data
= CARD_DETECT_ENABLE
;
276 gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2
, TPS65950_GPIO_CTRL
), 1, &Data
);
283 IN EFI_MMC_HOST_PROTOCOL
*This
290 // Card detect is a GPIO0 on the TPS65950
292 Status
= gTPS65950
->Read (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2
, GPIODATAIN1
), 1, &Data
);
293 if (EFI_ERROR (Status
)) {
297 return !(Data
& CARD_DETECT_BIT
);
302 IN EFI_MMC_HOST_PROTOCOL
*This
306 * On our BeagleBoard the SD card WP pin is always read as TRUE.
307 * Probably something wrong with GPIO configuration.
308 * BeagleBoard-xM uses microSD cards so there is no write protect at all.
309 * Hence commenting out SD card WP pin read status.
311 //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
317 EFI_GUID mPL180MciDevicePathGuid
= EFI_CALLER_ID_GUID
;
321 IN EFI_MMC_HOST_PROTOCOL
*This
,
322 IN EFI_DEVICE_PATH_PROTOCOL
**DevicePath
325 EFI_DEVICE_PATH_PROTOCOL
*NewDevicePathNode
;
327 NewDevicePathNode
= CreateDeviceNode(HARDWARE_DEVICE_PATH
,HW_VENDOR_DP
,sizeof(VENDOR_DEVICE_PATH
));
328 CopyGuid(&((VENDOR_DEVICE_PATH
*)NewDevicePathNode
)->Guid
,&mPL180MciDevicePathGuid
);
329 *DevicePath
= NewDevicePathNode
;
335 IN EFI_MMC_HOST_PROTOCOL
*This
,
341 UINTN RetryCount
= 0;
343 if (IgnoreCommand(MmcCmd
))
346 MmcCmd
= TranslateCommand(MmcCmd
);
348 //DEBUG ((EFI_D_ERROR, "MMCSendCommand(%d)\n", MmcCmd));
350 // Check if command line is in use or not. Poll till command line is available.
351 while ((MmioRead32 (MMCHS_PSTATE
) & DATI_MASK
) == DATI_NOT_ALLOWED
);
353 // Provide the block size.
354 MmioWrite32 (MMCHS_BLK
, BLEN_512BYTES
);
356 // Setting Data timeout counter value to max value.
357 MmioAndThenOr32 (MMCHS_SYSCTL
, ~DTO_MASK
, DTO_VAL
);
359 // Clear Status register.
360 MmioWrite32 (MMCHS_STAT
, 0xFFFFFFFF);
362 // Set command argument register
363 MmioWrite32 (MMCHS_ARG
, Argument
);
366 //Enable interrupt enable events to occur
367 //MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);
370 MmioWrite32 (MMCHS_CMD
, MmcCmd
);
372 // Check for the command status.
373 while (RetryCount
< MAX_RETRY_COUNT
) {
375 MmcStatus
= MmioRead32 (MMCHS_STAT
);
376 } while (MmcStatus
== 0);
378 // Read status of command response
379 if ((MmcStatus
& ERRI
) != 0) {
381 // Perform soft-reset for mmci_cmd line.
382 MmioOr32 (MMCHS_SYSCTL
, SRC
);
383 while ((MmioRead32 (MMCHS_SYSCTL
) & SRC
));
385 //DEBUG ((EFI_D_INFO, "MmcStatus: 0x%x\n", MmcStatus));
386 return EFI_DEVICE_ERROR
;
389 // Check if command is completed.
390 if ((MmcStatus
& CC
) == CC
) {
391 MmioWrite32 (MMCHS_STAT
, CC
);
398 if (RetryCount
== MAX_RETRY_COUNT
) {
399 DEBUG ((DEBUG_BLKIO
, "MMCSendCommand: Timeout\n"));
408 IN EFI_MMC_HOST_PROTOCOL
*This
,
416 case MmcInvalidState
:
419 case MmcHwInitializationState
:
422 DEBUG ((DEBUG_BLKIO
, "MMCHwInitializationState()\n"));
423 Status
= InitializeMMCHS ();
424 if (EFI_ERROR(Status
)) {
425 DEBUG ((DEBUG_BLKIO
, "Initialize MMC host controller fails. Status: %x\n", Status
));
429 // Software reset of the MMCHS host controller.
430 MmioWrite32 (MMCHS_SYSCONFIG
, SOFTRESET
);
432 while ((MmioRead32 (MMCHS_SYSSTATUS
) & RESETDONE_MASK
) != RESETDONE
);
434 // Soft reset for all.
435 MmioWrite32 (MMCHS_SYSCTL
, SRA
);
437 while ((MmioRead32 (MMCHS_SYSCTL
) & SRA
) != 0x0);
439 //Voltage capabilities initialization. Activate VS18 and VS30.
440 MmioOr32 (MMCHS_CAPA
, (VS30
| VS18
));
442 // Wakeup configuration
443 MmioOr32 (MMCHS_SYSCONFIG
, ENAWAKEUP
);
444 MmioOr32 (MMCHS_HCTL
, IWE
);
446 // MMCHS Controller default initialization
447 MmioOr32 (MMCHS_CON
, (OD
| DW8_1_4_BIT
| CEATA_OFF
));
449 MmioWrite32 (MMCHS_HCTL
, (SDVS_3_0_V
| DTW_1_BIT
| SDBP_OFF
));
451 // Enable internal clock
452 MmioOr32 (MMCHS_SYSCTL
, ICE
);
454 // Set the clock frequency to 80KHz.
455 UpdateMMCHSClkFrequency (CLKD_80KHZ
);
457 // Enable SD bus power.
458 MmioOr32 (MMCHS_HCTL
, (SDBP_ON
));
460 // Poll till SD bus power bit is set.
461 while ((MmioRead32 (MMCHS_HCTL
) & SDBP_MASK
) != SDBP_ON
);
463 // Enable interrupts.
464 MmioWrite32 (MMCHS_IE
, (BADA_EN
| CERR_EN
| DEB_EN
| DCRC_EN
| DTO_EN
| CIE_EN
|
465 CEB_EN
| CCRC_EN
| CTO_EN
| BRR_EN
| BWR_EN
| TC_EN
| CC_EN
));
467 // Controller INIT procedure start.
468 MmioOr32 (MMCHS_CON
, INIT
);
469 MmioWrite32 (MMCHS_CMD
, 0x00000000);
470 while (!(MmioRead32 (MMCHS_STAT
) & CC
));
475 // Set CC bit to 0x1 to clear the flag
476 MmioOr32 (MMCHS_STAT
, CC
);
478 // Retry INIT procedure.
479 MmioWrite32 (MMCHS_CMD
, 0x00000000);
480 while (!(MmioRead32 (MMCHS_STAT
) & CC
));
482 // End initialization sequence
483 MmioAnd32 (MMCHS_CON
, ~INIT
);
485 MmioOr32 (MMCHS_HCTL
, (SDVS_3_0_V
| DTW_1_BIT
| SDBP_ON
));
487 // Change clock frequency to 400KHz to fit protocol
488 UpdateMMCHSClkFrequency(CLKD_400KHZ
);
490 MmioOr32 (MMCHS_CON
, OD
);
496 case MmcIdentificationState
:
498 case MmcStandByState
:
499 CalculateCardCLKD (&FreqSel
);
500 UpdateMMCHSClkFrequency (FreqSel
);
502 case MmcTransferState
:
504 Status
= MMCSendCommand (This
, CMD55
, mRca
<< 16);
505 if (!EFI_ERROR (Status
)) {
506 // Set device into 4-bit data bus mode
507 Status
= MMCSendCommand (This
, ACMD6
, 0x2);
508 if (!EFI_ERROR (Status
)) {
509 // Set host controler into 4-bit mode
510 MmioOr32 (MMCHS_HCTL
, DTW_4_BIT
);
511 DEBUG ((DEBUG_BLKIO
, "SD Memory Card set to 4-bit mode\n"));
517 case MmcSendingDataState
:
519 case MmcReceiveDataState
:
521 case MmcProgrammingState
:
523 case MmcDisconnectState
:
532 IN EFI_MMC_HOST_PROTOCOL
*This
,
533 IN MMC_RESPONSE_TYPE Type
,
537 if (Buffer
== NULL
) {
538 return EFI_INVALID_PARAMETER
;
541 if (Type
== MMC_RESPONSE_TYPE_R2
) {
542 Buffer
[0] = MmioRead32 (MMCHS_RSP10
);
543 Buffer
[1] = MmioRead32 (MMCHS_RSP32
);
544 Buffer
[2] = MmioRead32 (MMCHS_RSP54
);
545 Buffer
[3] = MmioRead32 (MMCHS_RSP76
);
547 Buffer
[0] = MmioRead32 (MMCHS_RSP10
);
550 if (Type
== MMC_RESPONSE_TYPE_CSD
) {
551 mMaxDataTransferRate
= Buffer
[3] & 0xFF;
552 } else if (Type
== MMC_RESPONSE_TYPE_RCA
) {
553 mRca
= Buffer
[0] >> 16;
561 IN EFI_MMC_HOST_PROTOCOL
*This
,
569 UINTN RetryCount
= 0;
571 DEBUG ((DEBUG_BLKIO
, "MMCReadBlockData(LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", Lba
, Length
, Buffer
));
573 // Check controller status to make sure there is no error.
574 while (RetryCount
< MAX_RETRY_COUNT
) {
577 MmcStatus
= MmioRead32 (MMCHS_STAT
);
578 } while(MmcStatus
== 0);
580 // Check if Buffer read ready (BRR) bit is set?
581 if (MmcStatus
& BRR
) {
584 MmioOr32 (MMCHS_STAT
, BRR
);
586 for (Count
= 0; Count
< Length
/ 4; Count
++) {
587 *Buffer
++ = MmioRead32(MMCHS_DATA
);
594 if (RetryCount
== MAX_RETRY_COUNT
) {
603 IN EFI_MMC_HOST_PROTOCOL
*This
,
611 UINTN RetryCount
= 0;
613 // Check controller status to make sure there is no error.
614 while (RetryCount
< MAX_RETRY_COUNT
) {
617 MmcStatus
= MmioRead32 (MMCHS_STAT
);
618 } while(MmcStatus
== 0);
620 // Check if Buffer write ready (BWR) bit is set?
621 if (MmcStatus
& BWR
) {
624 MmioOr32 (MMCHS_STAT
, BWR
);
626 // Write block worth of data.
627 for (Count
= 0; Count
< Length
/ 4; Count
++) {
628 MmioWrite32 (MMCHS_DATA
, *Buffer
++);
636 if (RetryCount
== MAX_RETRY_COUNT
) {
643 EFI_MMC_HOST_PROTOCOL gMMCHost
= {
644 MMC_HOST_PROTOCOL_REVISION
,
657 IN EFI_HANDLE ImageHandle
,
658 IN EFI_SYSTEM_TABLE
*SystemTable
662 EFI_HANDLE Handle
= NULL
;
664 DEBUG ((DEBUG_BLKIO
, "MMCInitialize()\n"));
666 Status
= gBS
->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid
, NULL
, (VOID
**)&gTPS65950
);
667 ASSERT_EFI_ERROR(Status
);
669 Status
= gBS
->InstallMultipleProtocolInterfaces (
671 &gEfiMmcHostProtocolGuid
, &gMMCHost
,
674 ASSERT_EFI_ERROR (Status
);