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1 ;------------------------------------------------------------------------------
2 ; @file
3 ; Sets the CR3 register for 64-bit paging
4 ;
5 ; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
6 ; This program and the accompanying materials
7 ; are licensed and made available under the terms and conditions of the BSD License
8 ; which accompanies this distribution. The full text of the license may be found at
9 ; http://opensource.org/licenses/bsd-license.php
10 ;
11 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 ;
14 ;------------------------------------------------------------------------------
15
16 BITS 32
17
18 %define PAGE_PRESENT 0x01
19 %define PAGE_READ_WRITE 0x02
20 %define PAGE_USER_SUPERVISOR 0x04
21 %define PAGE_WRITE_THROUGH 0x08
22 %define PAGE_CACHE_DISABLE 0x010
23 %define PAGE_ACCESSED 0x020
24 %define PAGE_DIRTY 0x040
25 %define PAGE_PAT 0x080
26 %define PAGE_GLOBAL 0x0100
27 %define PAGE_2M_MBO 0x080
28 %define PAGE_2M_PAT 0x01000
29
30 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
31 PAGE_ACCESSED + \
32 PAGE_DIRTY + \
33 PAGE_READ_WRITE + \
34 PAGE_PRESENT)
35
36 %define PAGE_PDP_ATTR (PAGE_ACCESSED + \
37 PAGE_READ_WRITE + \
38 PAGE_PRESENT)
39
40
41 ;
42 ; Modified: EAX, ECX
43 ;
44 SetCr3ForPageTables64:
45
46 ;
47 ; For OVMF, build some initial page tables at
48 ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).
49 ;
50 ; This range should match with PcdOvmfSecPageTablesSize which is
51 ; declared in the FDF files.
52 ;
53 ; At the end of PEI, the pages tables will be rebuilt into a
54 ; more permanent location by DxeIpl.
55 ;
56
57 mov ecx, 6 * 0x1000 / 4
58 xor eax, eax
59 clearPageTablesMemoryLoop:
60 mov dword[ecx * 4 + PT_ADDR (0) - 4], eax
61 loop clearPageTablesMemoryLoop
62
63 ;
64 ; Top level Page Directory Pointers (1 * 512GB entry)
65 ;
66 mov dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR
67
68 ;
69 ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
70 ;
71 mov dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR
72 mov dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR
73 mov dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR
74 mov dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR
75
76 ;
77 ; Page Table Entries (2048 * 2MB entries => 4GB)
78 ;
79 mov ecx, 0x800
80 pageTableEntriesLoop:
81 mov eax, ecx
82 dec eax
83 shl eax, 21
84 add eax, PAGE_2M_PDE_ATTR
85 mov [ecx * 8 + PT_ADDR (0x2000 - 8)], eax
86 loop pageTableEntriesLoop
87
88 ;
89 ; Set CR3 now that the paging structures are available
90 ;
91 mov eax, PT_ADDR (0)
92 mov cr3, eax
93
94 OneTimeCallRet SetCr3ForPageTables64