3 Functions and types shared by the SMM accessor PEI and DXE modules.
5 Copyright (C) 2015, Red Hat, Inc.
7 This program and the accompanying materials are licensed and made available
8 under the terms and conditions of the BSD License which accompanies this
9 distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
13 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Guid/AcpiS3Context.h>
18 #include <IndustryStandard/Q35MchIch9.h>
19 #include <Library/DebugLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/PciLib.h>
23 #include "SmramInternal.h"
26 // The value of PcdQ35TsegMbytes is saved into this variable at module startup.
28 UINT16 mQ35TsegMbytes
;
31 Save PcdQ35TsegMbytes into mQ35TsegMbytes.
38 mQ35TsegMbytes
= PcdGet16 (PcdQ35TsegMbytes
);
42 Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
43 OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
44 from the D_LCK and T_EN bits.
46 PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rely on
47 the LockState and OpenState fields being up-to-date on entry, and they need
48 to restore the same invariant on exit, if they touch the bits in question.
50 @param[out] LockState Reflects the D_LCK bit on output; TRUE iff SMRAM is
52 @param[out] OpenState Reflects the inverse of the T_EN bit on output; TRUE
57 OUT BOOLEAN
*LockState
,
58 OUT BOOLEAN
*OpenState
61 UINT8 SmramVal
, EsmramcVal
;
63 SmramVal
= PciRead8 (DRAMC_REGISTER_Q35 (MCH_SMRAM
));
64 EsmramcVal
= PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC
));
66 *LockState
= !!(SmramVal
& MCH_SMRAM_D_LCK
);
67 *OpenState
= !(EsmramcVal
& MCH_ESMRAMC_T_EN
);
71 // The functions below follow the PEI_SMM_ACCESS_PPI and
72 // EFI_SMM_ACCESS2_PROTOCOL member declarations. The PeiServices and This
73 // pointers are removed (TSEG doesn't depend on them), and so is the
74 // DescriptorIndex parameter (TSEG doesn't support range-wise locking).
76 // The LockState and OpenState members that are common to both
77 // PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL are taken and updated in
78 // isolation from the rest of the (non-shared) members.
83 OUT BOOLEAN
*LockState
,
84 OUT BOOLEAN
*OpenState
88 // Open TSEG by clearing T_EN.
90 PciAnd8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC
),
91 (UINT8
)((~(UINT32
)MCH_ESMRAMC_T_EN
) & 0xff));
93 GetStates (LockState
, OpenState
);
95 return EFI_DEVICE_ERROR
;
102 OUT BOOLEAN
*LockState
,
103 OUT BOOLEAN
*OpenState
107 // Close TSEG by setting T_EN.
109 PciOr8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC
), MCH_ESMRAMC_T_EN
);
111 GetStates (LockState
, OpenState
);
113 return EFI_DEVICE_ERROR
;
120 OUT BOOLEAN
*LockState
,
121 IN OUT BOOLEAN
*OpenState
125 return EFI_DEVICE_ERROR
;
129 // Close & lock TSEG by setting T_EN and D_LCK.
131 PciOr8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC
), MCH_ESMRAMC_T_EN
);
132 PciOr8 (DRAMC_REGISTER_Q35 (MCH_SMRAM
), MCH_SMRAM_D_LCK
);
134 GetStates (LockState
, OpenState
);
135 if (*OpenState
|| !*LockState
) {
136 return EFI_DEVICE_ERROR
;
142 SmramAccessGetCapabilities (
143 IN BOOLEAN LockState
,
144 IN BOOLEAN OpenState
,
145 IN OUT UINTN
*SmramMapSize
,
146 IN OUT EFI_SMRAM_DESCRIPTOR
*SmramMap
150 UINT32 TsegMemoryBaseMb
, TsegMemoryBase
;
151 UINT64 CommonRegionState
;
154 OriginalSize
= *SmramMapSize
;
155 *SmramMapSize
= DescIdxCount
* sizeof *SmramMap
;
156 if (OriginalSize
< *SmramMapSize
) {
157 return EFI_BUFFER_TOO_SMALL
;
161 // Read the TSEG Memory Base register.
163 TsegMemoryBaseMb
= PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB
));
164 TsegMemoryBase
= (TsegMemoryBaseMb
>> MCH_TSEGMB_MB_SHIFT
) << 20;
167 // Precompute the region state bits that will be set for all regions.
169 CommonRegionState
= (OpenState
? EFI_SMRAM_OPEN
: EFI_SMRAM_CLOSED
) |
170 (LockState
? EFI_SMRAM_LOCKED
: 0) |
174 // The first region hosts an SMM_S3_RESUME_STATE object. It is located at the
175 // start of TSEG. We round up the size to whole pages, and we report it as
176 // EFI_ALLOCATED, so that the SMM_CORE stays away from it.
178 SmramMap
[DescIdxSmmS3ResumeState
].PhysicalStart
= TsegMemoryBase
;
179 SmramMap
[DescIdxSmmS3ResumeState
].CpuStart
= TsegMemoryBase
;
180 SmramMap
[DescIdxSmmS3ResumeState
].PhysicalSize
=
181 EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE
)));
182 SmramMap
[DescIdxSmmS3ResumeState
].RegionState
=
183 CommonRegionState
| EFI_ALLOCATED
;
186 // Get the TSEG size bits from the ESMRAMC register.
188 TsegSizeBits
= PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC
)) &
189 MCH_ESMRAMC_TSEG_MASK
;
192 // The second region is the main one, following the first.
194 SmramMap
[DescIdxMain
].PhysicalStart
=
195 SmramMap
[DescIdxSmmS3ResumeState
].PhysicalStart
+
196 SmramMap
[DescIdxSmmS3ResumeState
].PhysicalSize
;
197 SmramMap
[DescIdxMain
].CpuStart
= SmramMap
[DescIdxMain
].PhysicalStart
;
198 SmramMap
[DescIdxMain
].PhysicalSize
=
199 (TsegSizeBits
== MCH_ESMRAMC_TSEG_8MB
? SIZE_8MB
:
200 TsegSizeBits
== MCH_ESMRAMC_TSEG_2MB
? SIZE_2MB
:
201 TsegSizeBits
== MCH_ESMRAMC_TSEG_1MB
? SIZE_1MB
:
202 mQ35TsegMbytes
* SIZE_1MB
) -
203 SmramMap
[DescIdxSmmS3ResumeState
].PhysicalSize
;
204 SmramMap
[DescIdxMain
].RegionState
= CommonRegionState
;