2 CPU DXE Module to produce CPU ARCH Protocol.
4 Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include "CpuPageTable.h"
19 #define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | EFI_MEMORY_WT | EFI_MEMORY_WB | EFI_MEMORY_UCE | EFI_MEMORY_WP)
20 #define MEMORY_ATTRIBUTE_MASK (EFI_MEMORY_RP | EFI_MEMORY_XP | EFI_MEMORY_RO)
25 BOOLEAN InterruptState
= FALSE
;
26 EFI_HANDLE mCpuHandle
= NULL
;
27 BOOLEAN mIsFlushingGCD
;
28 UINT64 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
29 UINT64 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
30 UINT64 mTimerPeriod
= 0;
32 FIXED_MTRR mFixedMtrrTable
[] = {
34 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
39 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
44 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
49 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
54 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
59 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
64 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
69 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
74 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
79 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
84 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
91 EFI_CPU_ARCH_PROTOCOL gCpu
= {
97 CpuRegisterInterruptHandler
,
99 CpuSetMemoryAttributes
,
101 4 // DmaBufferAlignment
105 // CPU Arch Protocol Functions
109 Flush CPU data cache. If the instruction cache is fully coherent
110 with all DMA operations then function can just return EFI_SUCCESS.
112 @param This Protocol instance structure
113 @param Start Physical address to start flushing from.
114 @param Length Number of bytes to flush. Round up to chipset
116 @param FlushType Specifies the type of flush operation to perform.
118 @retval EFI_SUCCESS If cache was flushed
119 @retval EFI_UNSUPPORTED If flush type is not supported.
120 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
125 CpuFlushCpuDataCache (
126 IN EFI_CPU_ARCH_PROTOCOL
*This
,
127 IN EFI_PHYSICAL_ADDRESS Start
,
129 IN EFI_CPU_FLUSH_TYPE FlushType
132 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
135 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
139 return EFI_UNSUPPORTED
;
145 Enables CPU interrupts.
147 @param This Protocol instance structure
149 @retval EFI_SUCCESS If interrupts were enabled in the CPU
150 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
156 IN EFI_CPU_ARCH_PROTOCOL
*This
161 InterruptState
= TRUE
;
167 Disables CPU interrupts.
169 @param This Protocol instance structure
171 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
172 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
177 CpuDisableInterrupt (
178 IN EFI_CPU_ARCH_PROTOCOL
*This
181 DisableInterrupts ();
183 InterruptState
= FALSE
;
189 Return the state of interrupts.
191 @param This Protocol instance structure
192 @param State Pointer to the CPU's current interrupt state
194 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
195 @retval EFI_INVALID_PARAMETER State is NULL.
200 CpuGetInterruptState (
201 IN EFI_CPU_ARCH_PROTOCOL
*This
,
206 return EFI_INVALID_PARAMETER
;
209 *State
= InterruptState
;
215 Generates an INIT to the CPU.
217 @param This Protocol instance structure
218 @param InitType Type of CPU INIT to perform
220 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
222 @retval EFI_DEVICE_ERROR If CPU INIT failed.
223 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
229 IN EFI_CPU_ARCH_PROTOCOL
*This
,
230 IN EFI_CPU_INIT_TYPE InitType
233 return EFI_UNSUPPORTED
;
238 Registers a function to be called from the CPU interrupt handler.
240 @param This Protocol instance structure
241 @param InterruptType Defines which interrupt to hook. IA-32
242 valid range is 0x00 through 0xFF
243 @param InterruptHandler A pointer to a function of type
244 EFI_CPU_INTERRUPT_HANDLER that is called
245 when a processor interrupt occurs. A null
246 pointer is an error condition.
248 @retval EFI_SUCCESS If handler installed or uninstalled.
249 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
250 for InterruptType was previously installed.
251 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
252 InterruptType was not previously installed.
253 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
259 CpuRegisterInterruptHandler (
260 IN EFI_CPU_ARCH_PROTOCOL
*This
,
261 IN EFI_EXCEPTION_TYPE InterruptType
,
262 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
265 return RegisterCpuInterruptHandler (InterruptType
, InterruptHandler
);
270 Returns a timer value from one of the CPU's internal timers. There is no
271 inherent time interval between ticks but is a function of the CPU frequency.
273 @param This - Protocol instance structure.
274 @param TimerIndex - Specifies which CPU timer is requested.
275 @param TimerValue - Pointer to the returned timer value.
276 @param TimerPeriod - A pointer to the amount of time that passes
277 in femtoseconds (10-15) for each increment
278 of TimerValue. If TimerValue does not
279 increment at a predictable rate, then 0 is
280 returned. The amount of time that has
281 passed between two calls to GetTimerValue()
282 can be calculated with the formula
283 (TimerValue2 - TimerValue1) * TimerPeriod.
284 This parameter is optional and may be NULL.
286 @retval EFI_SUCCESS - If the CPU timer count was returned.
287 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
288 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
289 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
295 IN EFI_CPU_ARCH_PROTOCOL
*This
,
296 IN UINT32 TimerIndex
,
297 OUT UINT64
*TimerValue
,
298 OUT UINT64
*TimerPeriod OPTIONAL
304 if (TimerValue
== NULL
) {
305 return EFI_INVALID_PARAMETER
;
308 if (TimerIndex
!= 0) {
309 return EFI_INVALID_PARAMETER
;
312 *TimerValue
= AsmReadTsc ();
314 if (TimerPeriod
!= NULL
) {
315 if (mTimerPeriod
== 0) {
317 // Read time stamp counter before and after delay of 100 microseconds
319 BeginValue
= AsmReadTsc ();
320 MicroSecondDelay (100);
321 EndValue
= AsmReadTsc ();
323 // Calculate the actual frequency
325 mTimerPeriod
= DivU64x64Remainder (
330 EndValue
- BeginValue
,
334 *TimerPeriod
= mTimerPeriod
;
341 A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
342 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
344 @param[in] Buffer Pointer to an MTRR_SETTINGS object, to be passed to
353 MtrrSetAllMtrrs (Buffer
);
357 Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
359 This function modifies the attributes for the memory region specified by BaseAddress and
360 Length from their current attributes to the attributes specified by Attributes.
362 @param This The EFI_CPU_ARCH_PROTOCOL instance.
363 @param BaseAddress The physical address that is the start address of a memory region.
364 @param Length The size in bytes of the memory region.
365 @param Attributes The bit mask of attributes to set for the memory region.
367 @retval EFI_SUCCESS The attributes were set for the memory region.
368 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
369 BaseAddress and Length cannot be modified.
370 @retval EFI_INVALID_PARAMETER Length is zero.
371 Attributes specified an illegal combination of attributes that
372 cannot be set together.
373 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
374 the memory resource range.
375 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
376 resource range specified by BaseAddress and Length.
377 The bit mask of attributes is not support for the memory resource
378 range specified by BaseAddress and Length.
383 CpuSetMemoryAttributes (
384 IN EFI_CPU_ARCH_PROTOCOL
*This
,
385 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
390 RETURN_STATUS Status
;
391 MTRR_MEMORY_CACHE_TYPE CacheType
;
393 EFI_MP_SERVICES_PROTOCOL
*MpService
;
394 MTRR_SETTINGS MtrrSettings
;
395 UINT64 CacheAttributes
;
396 UINT64 MemoryAttributes
;
397 MTRR_MEMORY_CACHE_TYPE CurrentCacheType
;
400 // If this function is called because GCD SetMemorySpaceAttributes () is called
401 // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
402 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
403 // to avoid unnecessary computing.
405 if (mIsFlushingGCD
) {
406 DEBUG((EFI_D_INFO
, " Flushing GCD\n"));
411 CacheAttributes
= Attributes
& CACHE_ATTRIBUTE_MASK
;
412 MemoryAttributes
= Attributes
& MEMORY_ATTRIBUTE_MASK
;
414 if (Attributes
!= (CacheAttributes
| MemoryAttributes
)) {
415 return EFI_INVALID_PARAMETER
;
418 if (CacheAttributes
!= 0) {
419 if (!IsMtrrSupported ()) {
420 return EFI_UNSUPPORTED
;
423 switch (CacheAttributes
) {
425 CacheType
= CacheUncacheable
;
429 CacheType
= CacheWriteCombining
;
433 CacheType
= CacheWriteThrough
;
437 CacheType
= CacheWriteProtected
;
441 CacheType
= CacheWriteBack
;
445 return EFI_INVALID_PARAMETER
;
447 CurrentCacheType
= MtrrGetMemoryAttribute(BaseAddress
);
448 if (CurrentCacheType
!= CacheType
) {
450 // call MTRR libary function
452 Status
= MtrrSetMemoryAttribute (
458 if (!RETURN_ERROR (Status
)) {
459 MpStatus
= gBS
->LocateProtocol (
460 &gEfiMpServiceProtocolGuid
,
465 // Synchronize the update with all APs
467 if (!EFI_ERROR (MpStatus
)) {
468 MtrrGetAllMtrrs (&MtrrSettings
);
469 MpStatus
= MpService
->StartupAllAPs (
471 SetMtrrsFromBuffer
, // Procedure
472 FALSE
, // SingleThread
474 0, // TimeoutInMicrosecsond
475 &MtrrSettings
, // ProcedureArgument
476 NULL
// FailedCpuList
478 ASSERT (MpStatus
== EFI_SUCCESS
|| MpStatus
== EFI_NOT_STARTED
);
481 if (EFI_ERROR(Status
)) {
488 // Set memory attribute by page table
490 return AssignMemoryPageAttributes (NULL
, BaseAddress
, Length
, MemoryAttributes
, AllocatePages
);
494 Initializes the valid bits mask and valid address mask for MTRRs.
496 This function initializes the valid bits mask and valid address mask for MTRRs.
505 UINT8 PhysicalAddressBits
;
507 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
509 if (RegEax
>= 0x80000008) {
510 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
512 PhysicalAddressBits
= (UINT8
) RegEax
;
514 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
515 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
517 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
518 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
523 Gets GCD Mem Space type from MTRR Type.
525 This function gets GCD Mem Space type from MTRR Type.
527 @param MtrrAttributes MTRR memory type
529 @return GCD Mem Space type
533 GetMemorySpaceAttributeFromMtrrType (
534 IN UINT8 MtrrAttributes
537 switch (MtrrAttributes
) {
538 case MTRR_CACHE_UNCACHEABLE
:
539 return EFI_MEMORY_UC
;
540 case MTRR_CACHE_WRITE_COMBINING
:
541 return EFI_MEMORY_WC
;
542 case MTRR_CACHE_WRITE_THROUGH
:
543 return EFI_MEMORY_WT
;
544 case MTRR_CACHE_WRITE_PROTECTED
:
545 return EFI_MEMORY_WP
;
546 case MTRR_CACHE_WRITE_BACK
:
547 return EFI_MEMORY_WB
;
554 Searches memory descriptors covered by given memory range.
556 This function searches into the Gcd Memory Space for descriptors
557 (from StartIndex to EndIndex) that contains the memory range
558 specified by BaseAddress and Length.
560 @param MemorySpaceMap Gcd Memory Space Map as array.
561 @param NumberOfDescriptors Number of descriptors in map.
562 @param BaseAddress BaseAddress for the requested range.
563 @param Length Length for the requested range.
564 @param StartIndex Start index into the Gcd Memory Space Map.
565 @param EndIndex End index into the Gcd Memory Space Map.
567 @retval EFI_SUCCESS Search successfully.
568 @retval EFI_NOT_FOUND The requested descriptors does not exist.
572 SearchGcdMemorySpaces (
573 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
574 IN UINTN NumberOfDescriptors
,
575 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
577 OUT UINTN
*StartIndex
,
585 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
586 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
&&
587 BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
590 if (BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
&&
591 BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
596 return EFI_NOT_FOUND
;
600 Sets the attributes for a specified range in Gcd Memory Space Map.
602 This function sets the attributes for a specified range in
603 Gcd Memory Space Map.
605 @param MemorySpaceMap Gcd Memory Space Map as array
606 @param NumberOfDescriptors Number of descriptors in map
607 @param BaseAddress BaseAddress for the range
608 @param Length Length for the range
609 @param Attributes Attributes to set
611 @retval EFI_SUCCESS Memory attributes set successfully
612 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
616 SetGcdMemorySpaceAttributes (
617 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
618 IN UINTN NumberOfDescriptors
,
619 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
628 EFI_PHYSICAL_ADDRESS RegionStart
;
632 // Get all memory descriptors covered by the memory range
634 Status
= SearchGcdMemorySpaces (
642 if (EFI_ERROR (Status
)) {
647 // Go through all related descriptors and set attributes accordingly
649 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
650 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
654 // Calculate the start and end address of the overlapping range
656 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
657 RegionStart
= BaseAddress
;
659 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
661 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
662 RegionLength
= BaseAddress
+ Length
- RegionStart
;
664 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
667 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
669 gDS
->SetMemorySpaceAttributes (
672 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
681 Refreshes the GCD Memory Space attributes according to MTRRs.
683 This function refreshes the GCD Memory Space attributes according to MTRRs.
687 RefreshGcdMemoryAttributes (
695 EFI_PHYSICAL_ADDRESS BaseAddress
;
698 UINT64 CurrentAttributes
;
700 UINTN NumberOfDescriptors
;
701 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
702 UINT64 DefaultAttributes
;
703 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
704 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
705 UINT32 FirmwareVariableMtrrCount
;
706 UINT8 DefaultMemoryType
;
708 if (!IsMtrrSupported ()) {
712 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
713 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
715 mIsFlushingGCD
= TRUE
;
716 MemorySpaceMap
= NULL
;
719 // Initialize the valid bits mask and valid address mask for MTRRs
721 InitializeMtrrMask ();
724 // Get the memory attribute of variable MTRRs
726 MtrrGetMemoryAttributeInVariableMtrr (
728 mValidMtrrAddressMask
,
733 // Get the memory space map from GCD
735 Status
= gDS
->GetMemorySpaceMap (
736 &NumberOfDescriptors
,
739 ASSERT_EFI_ERROR (Status
);
741 DefaultMemoryType
= (UINT8
) MtrrGetDefaultMemoryType ();
742 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType
);
745 // Set default attributes to all spaces.
747 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
748 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
751 gDS
->SetMemorySpaceAttributes (
752 MemorySpaceMap
[Index
].BaseAddress
,
753 MemorySpaceMap
[Index
].Length
,
754 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) |
755 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
760 // Go for variable MTRRs with WB attribute
762 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
763 if (VariableMtrr
[Index
].Valid
&&
764 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) {
765 SetGcdMemorySpaceAttributes (
768 VariableMtrr
[Index
].BaseAddress
,
769 VariableMtrr
[Index
].Length
,
776 // Go for variable MTRRs with the attribute except for WB and UC attributes
778 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
779 if (VariableMtrr
[Index
].Valid
&&
780 VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
&&
781 VariableMtrr
[Index
].Type
!= MTRR_CACHE_UNCACHEABLE
) {
782 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
) VariableMtrr
[Index
].Type
);
783 SetGcdMemorySpaceAttributes (
786 VariableMtrr
[Index
].BaseAddress
,
787 VariableMtrr
[Index
].Length
,
794 // Go for variable MTRRs with UC attribute
796 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
797 if (VariableMtrr
[Index
].Valid
&&
798 VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
) {
799 SetGcdMemorySpaceAttributes (
802 VariableMtrr
[Index
].BaseAddress
,
803 VariableMtrr
[Index
].Length
,
810 // Go for fixed MTRRs
815 MtrrGetFixedMtrr (&MtrrFixedSettings
);
816 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
817 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
819 // Check for continuous fixed MTRR sections
821 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
822 MtrrType
= (UINT8
) RShiftU64 (RegValue
, SubIndex
* 8);
823 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
826 // A new MTRR attribute begins
828 Attributes
= CurrentAttributes
;
831 // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
833 if (CurrentAttributes
!= Attributes
) {
834 SetGcdMemorySpaceAttributes (
841 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
843 Attributes
= CurrentAttributes
;
846 Length
+= mFixedMtrrTable
[Index
].Length
;
850 // Handle the last fixed MTRR region
852 SetGcdMemorySpaceAttributes (
861 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
863 if (MemorySpaceMap
!= NULL
) {
864 FreePool (MemorySpaceMap
);
867 mIsFlushingGCD
= FALSE
;
871 Initialize Interrupt Descriptor Table for interrupt handling.
875 InitInterruptDescriptorTable (
880 EFI_VECTOR_HANDOFF_INFO
*VectorInfoList
;
881 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
884 Status
= EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid
, (VOID
**) &VectorInfoList
);
885 if (Status
== EFI_SUCCESS
&& VectorInfoList
!= NULL
) {
886 VectorInfo
= VectorInfoList
;
888 Status
= InitializeCpuInterruptHandlers (VectorInfo
);
889 ASSERT_EFI_ERROR (Status
);
894 Callback function for idle events.
896 @param Event Event whose notification function is being invoked.
897 @param Context The pointer to the notification function's context,
898 which is implementation-dependent.
903 IdleLoopEventCallback (
912 Ensure the compatibility of a memory space descriptor with the MMIO aperture.
914 The memory space descriptor can come from the GCD memory space map, or it can
915 represent a gap between two neighboring memory space descriptors. In the
916 latter case, the GcdMemoryType field is expected to be
917 EfiGcdMemoryTypeNonExistent.
919 If the memory space descriptor already has type
920 EfiGcdMemoryTypeMemoryMappedIo, and its capabilities are a superset of the
921 required capabilities, then no action is taken -- it is by definition
922 compatible with the aperture.
924 Otherwise, the intersection of the memory space descriptor is calculated with
925 the aperture. If the intersection is the empty set (no overlap), no action is
926 taken; the memory space descriptor is compatible with the aperture.
928 Otherwise, the type of the descriptor is investigated again. If the type is
929 EfiGcdMemoryTypeNonExistent (representing a gap, or a genuine descriptor with
930 such a type), then an attempt is made to add the intersection as MMIO space
931 to the GCD memory space map, with the specified capabilities. This ensures
932 continuity for the aperture, and the descriptor is deemed compatible with the
935 Otherwise, the memory space descriptor is incompatible with the MMIO
938 @param[in] Base Base address of the aperture.
939 @param[in] Length Length of the aperture.
940 @param[in] Capabilities Capabilities required by the aperture.
941 @param[in] Descriptor The descriptor to ensure compatibility with the
944 @retval EFI_SUCCESS The descriptor is compatible. The GCD memory
945 space map may have been updated, for
946 continuity within the aperture.
947 @retval EFI_INVALID_PARAMETER The descriptor is incompatible.
948 @return Error codes from gDS->AddMemorySpace().
951 IntersectMemoryDescriptor (
954 IN UINT64 Capabilities
,
955 IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*Descriptor
958 UINT64 IntersectionBase
;
959 UINT64 IntersectionEnd
;
962 if (Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
&&
963 (Descriptor
->Capabilities
& Capabilities
) == Capabilities
) {
967 IntersectionBase
= MAX (Base
, Descriptor
->BaseAddress
);
968 IntersectionEnd
= MIN (Base
+ Length
,
969 Descriptor
->BaseAddress
+ Descriptor
->Length
);
970 if (IntersectionBase
>= IntersectionEnd
) {
972 // The descriptor and the aperture don't overlap.
977 if (Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
978 Status
= gDS
->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo
,
979 IntersectionBase
, IntersectionEnd
- IntersectionBase
,
982 DEBUG ((EFI_ERROR (Status
) ? EFI_D_ERROR
: EFI_D_VERBOSE
,
983 "%a: %a: add [%Lx, %Lx): %r\n", gEfiCallerBaseName
, __FUNCTION__
,
984 IntersectionBase
, IntersectionEnd
, Status
));
988 DEBUG ((EFI_D_ERROR
, "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
989 "with aperture [%Lx, %Lx) cap %Lx\n", gEfiCallerBaseName
, __FUNCTION__
,
990 Descriptor
->BaseAddress
, Descriptor
->BaseAddress
+ Descriptor
->Length
,
991 (UINT32
)Descriptor
->GcdMemoryType
, Descriptor
->Capabilities
,
992 Base
, Base
+ Length
, Capabilities
));
993 return EFI_INVALID_PARAMETER
;
997 Add MMIO space to GCD.
998 The routine checks the GCD database and only adds those which are
999 not added in the specified range to GCD.
1001 @param Base Base address of the MMIO space.
1002 @param Length Length of the MMIO space.
1003 @param Capabilities Capabilities of the MMIO space.
1005 @retval EFI_SUCCES The MMIO space was added successfully.
1008 AddMemoryMappedIoSpace (
1011 IN UINT64 Capabilities
1016 UINTN NumberOfDescriptors
;
1017 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
1019 Status
= gDS
->GetMemorySpaceMap (&NumberOfDescriptors
, &MemorySpaceMap
);
1020 if (EFI_ERROR (Status
)) {
1021 DEBUG ((EFI_D_ERROR
, "%a: %a: GetMemorySpaceMap(): %r\n",
1022 gEfiCallerBaseName
, __FUNCTION__
, Status
));
1026 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
1027 Status
= IntersectMemoryDescriptor (Base
, Length
, Capabilities
,
1028 &MemorySpaceMap
[Index
]);
1029 if (EFI_ERROR (Status
)) {
1030 goto FreeMemorySpaceMap
;
1036 // Make sure there are adjacent descriptors covering [Base, Base + Length).
1037 // It is possible that they have not been merged; merging can be prevented
1038 // by allocation and different capabilities.
1041 EFI_STATUS CheckStatus
;
1042 EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor
;
1044 for (CheckBase
= Base
;
1045 CheckBase
< Base
+ Length
;
1046 CheckBase
= Descriptor
.BaseAddress
+ Descriptor
.Length
) {
1047 CheckStatus
= gDS
->GetMemorySpaceDescriptor (CheckBase
, &Descriptor
);
1048 ASSERT_EFI_ERROR (CheckStatus
);
1049 ASSERT (Descriptor
.GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
);
1050 ASSERT ((Descriptor
.Capabilities
& Capabilities
) == Capabilities
);
1055 FreePool (MemorySpaceMap
);
1061 Add and allocate CPU local APIC memory mapped space.
1063 @param[in]ImageHandle Image handle this driver.
1067 AddLocalApicMemorySpace (
1068 IN EFI_HANDLE ImageHandle
1072 EFI_PHYSICAL_ADDRESS BaseAddress
;
1074 BaseAddress
= (EFI_PHYSICAL_ADDRESS
) GetLocalApicBaseAddress();
1075 Status
= AddMemoryMappedIoSpace (BaseAddress
, SIZE_4KB
, EFI_MEMORY_UC
);
1076 ASSERT_EFI_ERROR (Status
);
1078 Status
= gDS
->AllocateMemorySpace (
1079 EfiGcdAllocateAddress
,
1080 EfiGcdMemoryTypeMemoryMappedIo
,
1087 ASSERT_EFI_ERROR (Status
);
1091 Initialize the state information for the CPU Architectural Protocol.
1093 @param ImageHandle Image handle this driver.
1094 @param SystemTable Pointer to the System Table.
1096 @retval EFI_SUCCESS Thread can be successfully created
1097 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
1098 @retval EFI_DEVICE_ERROR Cannot create the thread
1104 IN EFI_HANDLE ImageHandle
,
1105 IN EFI_SYSTEM_TABLE
*SystemTable
1109 EFI_EVENT IdleLoopEvent
;
1111 InitializePageTableLib();
1113 InitializeFloatingPointUnits ();
1116 // Make sure interrupts are disabled
1118 DisableInterrupts ();
1123 InitGlobalDescriptorTable ();
1126 // Setup IDT pointer, IDT and interrupt entry points
1128 InitInterruptDescriptorTable ();
1131 // Enable the local APIC for Virtual Wire Mode.
1133 ProgramVirtualWireMode ();
1136 // Install CPU Architectural Protocol
1138 Status
= gBS
->InstallMultipleProtocolInterfaces (
1140 &gEfiCpuArchProtocolGuid
, &gCpu
,
1143 ASSERT_EFI_ERROR (Status
);
1146 // Refresh GCD memory space map according to MTRR value.
1148 RefreshGcdMemoryAttributes ();
1151 // Add and allocate local APIC memory mapped space
1153 AddLocalApicMemorySpace (ImageHandle
);
1156 // Setup a callback for idle events
1158 Status
= gBS
->CreateEventEx (
1161 IdleLoopEventCallback
,
1163 &gIdleLoopEventGuid
,
1166 ASSERT_EFI_ERROR (Status
);
1168 InitializeMpSupport ();