UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm

   1 ;------------------------------------------------------------------------------ ;
   2 ; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
   3 ; This program and the accompanying materials
   4 ; are licensed and made available under the terms and conditions of the BSD License
   5 ; which accompanies this distribution.  The full text of the license may be found at
   6 ; http://opensource.org/licenses/bsd-license.php.
   7 ;
   8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  10 ;
  11 ; Module Name:
  12 ;
  13 ;   SmiException.asm
  14 ;
  15 ; Abstract:
  16 ;
  17 ;   Exception handlers used in SM mode
  18 ;
  19 ;-------------------------------------------------------------------------------
  20
  21     .686p
  22     .model  flat,C
  23
  24 EXTERNDEF   gcStmPsd:BYTE
  25
  26 EXTERNDEF   SmmStmExceptionHandler:PROC
  27 EXTERNDEF   SmmStmSetup:PROC
  28 EXTERNDEF   SmmStmTeardown:PROC
  29
  30 CODE_SEL    = 08h
  31 DATA_SEL    = 20h
  32 TSS_SEL     = 40h
  33
  34     .data
  35
  36 gcStmPsd     LABEL   BYTE
  37             DB      'TXTPSSIG'
  38             DW      PSD_SIZE
  39             DW      1              ; Version
  40             DD      0              ; LocalApicId
  41             DB      05h            ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
  42             DB      0              ; BIOS to STM
  43             DB      0              ; STM to BIOS
  44             DB      0
  45             DW      CODE_SEL
  46             DW      DATA_SEL
  47             DW      DATA_SEL
  48             DW      DATA_SEL
  49             DW      TSS_SEL
  50             DW      0
  51             DQ      0              ; SmmCr3
  52             DQ      _OnStmSetup
  53             DQ      _OnStmTeardown
  54             DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint
  55             DQ      0              ; SmmSmiHandlerRsp
  56             DQ      0
  57             DD      0
  58             DD      80010100h      ; RequiredStmSmmRevId
  59             DQ      _OnException
  60             DQ      0              ; ExceptionStack
  61             DW      DATA_SEL
  62             DW      01Fh           ; ExceptionFilter
  63             DD      0
  64             DQ      0
  65             DQ      0              ; BiosHwResourceRequirementsPtr
  66             DQ      0              ; AcpiRsdp
  67             DB      0              ; PhysicalAddressBits
  68 PSD_SIZE  = $ - offset gcStmPsd
  69
  70     .code
  71 ;------------------------------------------------------------------------------
  72 ; SMM Exception handlers
  73 ;------------------------------------------------------------------------------
  74 _OnException       PROC
  75     mov  ecx, esp
  76     push ecx
  77     call SmmStmExceptionHandler
  78     add  esp, 4
  79
  80     mov  ebx, eax
  81     mov  eax, 4
  82     DB  0fh, 01h, 0c1h ; VMCALL
  83     jmp $
  84 _OnException       ENDP
  85
  86 _OnStmSetup PROC
  87 ;
  88 ; Check XD disable bit
  89 ;
  90     xor     esi, esi
  91     mov     eax, gStmXdSupported
  92     mov     al, [eax]
  93     cmp     al, 0
  94     jz      @StmXdDone1
  95     mov     ecx, MSR_IA32_MISC_ENABLE
  96     rdmsr
  97     mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
  98     test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
  99     jz      @f
 100     and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
 101     wrmsr
 102 @@:
 103     mov     ecx, MSR_EFER
 104     rdmsr
 105     or      ax, MSR_EFER_XD             ; enable NXE
 106     wrmsr
 107 @StmXdDone1:
 108     push    esi
 109
 110   call SmmStmSetup
 111
 112     mov     eax, gStmXdSupported
 113     mov     al, [eax]
 114     cmp     al, 0
 115     jz      @f
 116     pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
 117     test    edx, BIT2
 118     jz      @f
 119     mov     ecx, MSR_IA32_MISC_ENABLE
 120     rdmsr
 121     or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
 122     wrmsr
 123 @@:
 124
 125   rsm
 126 _OnStmSetup ENDP
 127
 128 _OnStmTeardown PROC
 129 ;
 130 ; Check XD disable bit
 131 ;
 132     xor     esi, esi
 133     mov     eax, gStmXdSupported
 134     mov     al, [eax]
 135     cmp     al, 0
 136     jz      @StmXdDone2
 137     mov     ecx, MSR_IA32_MISC_ENABLE
 138     rdmsr
 139     mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
 140     test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
 141     jz      @f
 142     and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
 143     wrmsr
 144 @@:
 145     mov     ecx, MSR_EFER
 146     rdmsr
 147     or      ax, MSR_EFER_XD             ; enable NXE
 148     wrmsr
 149 @StmXdDone2:
 150     push    esi
 151
 152   call SmmStmTeardown
 153
 154     mov     eax, gStmXdSupported
 155     mov     al, [eax]
 156     cmp     al, 0
 157     jz      @f
 158     pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
 159     test    edx, BIT2
 160     jz      @f
 161     mov     ecx, MSR_IA32_MISC_ENABLE
 162     rdmsr
 163     or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
 164     wrmsr
 165 @@:
 166
 167   rsm
 168 _OnStmTeardown ENDP
 169
 170     END