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UefiCpuPkg/SmmCpuFeaturesLibStm: Add STM library instance
[mirror_edk2.git] / UefiCpuPkg / Library / SmmCpuFeaturesLib / Ia32 / SmiException.asm
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1;------------------------------------------------------------------------------ ;\r
2; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
3; This program and the accompanying materials\r
4; are licensed and made available under the terms and conditions of the BSD License\r
5; which accompanies this distribution. The full text of the license may be found at\r
6; http://opensource.org/licenses/bsd-license.php.\r
7;\r
8; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
9; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
10;\r
11; Module Name:\r
12;\r
13; SmiException.asm\r
14;\r
15; Abstract:\r
16;\r
17; Exception handlers used in SM mode\r
18;\r
19;-------------------------------------------------------------------------------\r
20\r
21 .686p\r
22 .model flat,C\r
23\r
24EXTERNDEF gcStmPsd:BYTE\r
25\r
26EXTERNDEF SmmStmExceptionHandler:PROC\r
27EXTERNDEF SmmStmSetup:PROC\r
28EXTERNDEF SmmStmTeardown:PROC\r
29\r
30CODE_SEL = 08h\r
31DATA_SEL = 20h\r
32TSS_SEL = 40h\r
33\r
34 .data\r
35\r
36gcStmPsd LABEL BYTE\r
37 DB 'TXTPSSIG'\r
38 DW PSD_SIZE\r
39 DW 1 ; Version\r
40 DD 0 ; LocalApicId\r
41 DB 05h ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr\r
42 DB 0 ; BIOS to STM\r
43 DB 0 ; STM to BIOS\r
44 DB 0\r
45 DW CODE_SEL\r
46 DW DATA_SEL\r
47 DW DATA_SEL\r
48 DW DATA_SEL\r
49 DW TSS_SEL\r
50 DW 0\r
51 DQ 0 ; SmmCr3\r
52 DQ _OnStmSetup\r
53 DQ _OnStmTeardown\r
54 DQ 0 ; SmmSmiHandlerRip - SMM guest entrypoint\r
55 DQ 0 ; SmmSmiHandlerRsp\r
56 DQ 0\r
57 DD 0\r
58 DD 80010100h ; RequiredStmSmmRevId\r
59 DQ _OnException\r
60 DQ 0 ; ExceptionStack\r
61 DW DATA_SEL\r
62 DW 01Fh ; ExceptionFilter\r
63 DD 0\r
64 DQ 0\r
65 DQ 0 ; BiosHwResourceRequirementsPtr\r
66 DQ 0 ; AcpiRsdp\r
67 DB 0 ; PhysicalAddressBits\r
68PSD_SIZE = $ - offset gcStmPsd\r
69\r
70 .code\r
71;------------------------------------------------------------------------------\r
72; SMM Exception handlers\r
73;------------------------------------------------------------------------------\r
74_OnException PROC\r
75 mov ecx, esp\r
76 push ecx\r
77 call SmmStmExceptionHandler\r
78 add esp, 4\r
79\r
80 mov ebx, eax\r
81 mov eax, 4\r
82 DB 0fh, 01h, 0c1h ; VMCALL\r
83 jmp $\r
84_OnException ENDP\r
85\r
86_OnStmSetup PROC\r
87;\r
88; Check XD disable bit\r
89;\r
90 xor esi, esi\r
91 mov eax, gStmXdSupported\r
92 mov al, [eax]\r
93 cmp al, 0\r
94 jz @StmXdDone1\r
95 mov ecx, MSR_IA32_MISC_ENABLE\r
96 rdmsr\r
97 mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32]\r
98 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34]\r
99 jz @f\r
100 and dx, 0FFFBh ; clear XD Disable bit if it is set\r
101 wrmsr\r
102@@:\r
103 mov ecx, MSR_EFER\r
104 rdmsr\r
105 or ax, MSR_EFER_XD ; enable NXE\r
106 wrmsr\r
107@StmXdDone1:\r
108 push esi\r
109\r
110 call SmmStmSetup\r
111\r
112 mov eax, gStmXdSupported\r
113 mov al, [eax]\r
114 cmp al, 0\r
115 jz @f\r
116 pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32]\r
117 test edx, BIT2\r
118 jz @f\r
119 mov ecx, MSR_IA32_MISC_ENABLE\r
120 rdmsr\r
121 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM\r
122 wrmsr\r
123@@:\r
124\r
125 rsm\r
126_OnStmSetup ENDP\r
127\r
128_OnStmTeardown PROC\r
129;\r
130; Check XD disable bit\r
131;\r
132 xor esi, esi\r
133 mov eax, gStmXdSupported\r
134 mov al, [eax]\r
135 cmp al, 0\r
136 jz @StmXdDone2\r
137 mov ecx, MSR_IA32_MISC_ENABLE\r
138 rdmsr\r
139 mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32]\r
140 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34]\r
141 jz @f\r
142 and dx, 0FFFBh ; clear XD Disable bit if it is set\r
143 wrmsr\r
144@@:\r
145 mov ecx, MSR_EFER\r
146 rdmsr\r
147 or ax, MSR_EFER_XD ; enable NXE\r
148 wrmsr\r
149@StmXdDone2:\r
150 push esi\r
151\r
152 call SmmStmTeardown\r
153\r
154 mov eax, gStmXdSupported\r
155 mov al, [eax]\r
156 cmp al, 0\r
157 jz @f\r
158 pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32]\r
159 test edx, BIT2\r
160 jz @f\r
161 mov ecx, MSR_IA32_MISC_ENABLE\r
162 rdmsr\r
163 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM\r
164 wrmsr\r
165@@:\r
166\r
167 rsm\r
168_OnStmTeardown ENDP\r
169\r
170 END\r