2 Page table manipulation functions for IA-32 processors
4 Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include "PiSmmCpuDxeSmm.h"
20 Create PageTable for SMM use.
22 @return PageTable Address
30 UINTN PageFaultHandlerHookAddress
;
31 IA32_IDT_GATE_DESCRIPTOR
*IdtEntry
;
35 // Initialize spin lock
37 InitializeSpinLock (mPFLock
);
39 if (FeaturePcdGet (PcdCpuSmmProfileEnable
)) {
41 // Set own Page Fault entry instead of the default one, because SMM Profile
42 // feature depends on IRET instruction to do Single Step
44 PageFaultHandlerHookAddress
= (UINTN
)PageFaultIdtHandlerSmmProfile
;
45 IdtEntry
= (IA32_IDT_GATE_DESCRIPTOR
*) gcSmiIdtr
.Base
;
46 IdtEntry
+= EXCEPT_IA32_PAGE_FAULT
;
47 IdtEntry
->Bits
.OffsetLow
= (UINT16
)PageFaultHandlerHookAddress
;
48 IdtEntry
->Bits
.Reserved_0
= 0;
49 IdtEntry
->Bits
.GateType
= IA32_IDT_GATE_TYPE_INTERRUPT_32
;
50 IdtEntry
->Bits
.OffsetHigh
= (UINT16
)(PageFaultHandlerHookAddress
>> 16);
53 // Register SMM Page Fault Handler
55 Status
= SmmRegisterExceptionHandler (&mSmmCpuService
, EXCEPT_IA32_PAGE_FAULT
, SmiPFHandler
);
56 ASSERT_EFI_ERROR (Status
);
60 // Additional SMM IDT initialization for SMM stack guard
62 if (FeaturePcdGet (PcdCpuSmmStackGuard
)) {
63 InitializeIDTSmmStackGuard ();
65 return Gen4GPageTable (TRUE
);
69 Page Fault handler for SMM use.
81 ThePage Fault handler wrapper for SMM use.
83 @param InterruptType Defines the type of interrupt or exception that
84 occurred on the processor.This parameter is processor architecture specific.
85 @param SystemContext A pointer to the processor context when
86 the interrupt occurred on the processor.
91 IN EFI_EXCEPTION_TYPE InterruptType
,
92 IN EFI_SYSTEM_CONTEXT SystemContext
96 UINTN GuardPageAddress
;
99 ASSERT (InterruptType
== EXCEPT_IA32_PAGE_FAULT
);
101 AcquireSpinLock (mPFLock
);
103 PFAddress
= AsmReadCr2 ();
106 // If a page fault occurs in SMRAM range, it might be in a SMM stack guard page,
107 // or SMM page protection violation.
109 if ((PFAddress
>= mCpuHotPlugData
.SmrrBase
) &&
110 (PFAddress
< (mCpuHotPlugData
.SmrrBase
+ mCpuHotPlugData
.SmrrSize
))) {
111 DumpCpuContext (InterruptType
, SystemContext
);
112 CpuIndex
= GetCpuIndex ();
113 GuardPageAddress
= (mSmmStackArrayBase
+ EFI_PAGE_SIZE
+ CpuIndex
* mSmmStackSize
);
114 if ((FeaturePcdGet (PcdCpuSmmStackGuard
)) &&
115 (PFAddress
>= GuardPageAddress
) &&
116 (PFAddress
< (GuardPageAddress
+ EFI_PAGE_SIZE
))) {
117 DEBUG ((DEBUG_ERROR
, "SMM stack overflow!\n"));
119 if ((SystemContext
.SystemContextIa32
->ExceptionData
& IA32_PF_EC_ID
) != 0) {
120 DEBUG ((DEBUG_ERROR
, "SMM exception at execution (0x%x)\n", PFAddress
));
122 DumpModuleInfoByIp (*(UINTN
*)(UINTN
)SystemContext
.SystemContextIa32
->Esp
);
125 DEBUG ((DEBUG_ERROR
, "SMM exception at access (0x%x)\n", PFAddress
));
127 DumpModuleInfoByIp ((UINTN
)SystemContext
.SystemContextIa32
->Eip
);
135 // If a page fault occurs in SMM range
137 if ((PFAddress
< mCpuHotPlugData
.SmrrBase
) ||
138 (PFAddress
>= mCpuHotPlugData
.SmrrBase
+ mCpuHotPlugData
.SmrrSize
)) {
139 DumpCpuContext (InterruptType
, SystemContext
);
140 if ((SystemContext
.SystemContextIa32
->ExceptionData
& IA32_PF_EC_ID
) != 0) {
141 DEBUG ((DEBUG_ERROR
, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress
));
143 DumpModuleInfoByIp (*(UINTN
*)(UINTN
)SystemContext
.SystemContextIa32
->Esp
);
147 if (IsSmmCommBufferForbiddenAddress (PFAddress
)) {
148 DEBUG ((DEBUG_ERROR
, "Access SMM communication forbidden address (0x%x)!\n", PFAddress
));
150 DumpModuleInfoByIp ((UINTN
)SystemContext
.SystemContextIa32
->Eip
);
156 if (FeaturePcdGet (PcdCpuSmmProfileEnable
)) {
157 SmmProfilePFHandler (
158 SystemContext
.SystemContextIa32
->Eip
,
159 SystemContext
.SystemContextIa32
->ExceptionData
162 DumpCpuContext (InterruptType
, SystemContext
);
163 SmiDefaultPFHandler ();
166 ReleaseSpinLock (mPFLock
);
170 This function sets memory attribute for page table.
173 SetPageTableAttributes (
183 BOOLEAN PageTableSplitted
;
185 DEBUG ((DEBUG_INFO
, "SetPageTableAttributes\n"));
188 // Disable write protection, because we need mark page table to be write protected.
189 // We need *write* page table memory, to mark itself to be *read only*.
191 AsmWriteCr0 (AsmReadCr0() & ~CR0_WP
);
194 DEBUG ((DEBUG_INFO
, "Start...\n"));
195 PageTableSplitted
= FALSE
;
197 L3PageTable
= (UINT64
*)GetPageTableBase ();
199 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L3PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
200 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
202 for (Index3
= 0; Index3
< 4; Index3
++) {
203 L2PageTable
= (UINT64
*)(UINTN
)(L3PageTable
[Index3
] & ~mAddressEncMask
& PAGING_4K_ADDRESS_MASK_64
);
204 if (L2PageTable
== NULL
) {
208 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L2PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
209 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
211 for (Index2
= 0; Index2
< SIZE_4KB
/sizeof(UINT64
); Index2
++) {
212 if ((L2PageTable
[Index2
] & IA32_PG_PS
) != 0) {
216 L1PageTable
= (UINT64
*)(UINTN
)(L2PageTable
[Index2
] & ~mAddressEncMask
& PAGING_4K_ADDRESS_MASK_64
);
217 if (L1PageTable
== NULL
) {
220 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L1PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
221 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
224 } while (PageTableSplitted
);
227 // Enable write protection, after page table updated.
229 AsmWriteCr0 (AsmReadCr0() | CR0_WP
);