1 /**************************************************************************;
4 ;* Intel Corporation - ACPI Reference Code for the Baytrail *;
5 ;* Family of Customer Reference Boards. *;
8 ;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
10 ; This program and the accompanying materials are licensed and made available under
11 ; the terms and conditions of the BSD License that accompanies this distribution.
12 ; The full text of the license may be found at
13 ; http://opensource.org/licenses/bsd-license.php.
15 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 ;**************************************************************************/
27 Device(PDRC) // PCI Device Resource Consumption
29 Name(_HID,EISAID("PNP0C02"))
33 Name(BUF0,ResourceTemplate()
36 // PCI Express BAR _BAS and _LEN will be updated in _CRS below according to B0:D0:F0:Reg.60h
37 // Forced hard code at the moment.
39 //Memory32Fixed(ReadWrite,0,0,PCIX) // PCIEX BAR
40 Memory32Fixed(ReadWrite,0x0E0000000,0x010000000,PCIX)
43 // SPI BAR. Check if the hard code meets the real configuration.
44 // If not, dynamically update it like the _CRS method below.
46 Memory32Fixed(ReadWrite,0x0FED01000,0x01000,SPIB) // SPI BAR
49 // PMC BAR. Check if the hard code meets the real configuration.
50 // If not, dynamically update it like the _CRS method below.
52 Memory32Fixed(ReadWrite,0x0FED03000,0x01000,PMCB) // PMC BAR
55 // SMB BAR. Check if the hard code meets the real configuration.
56 // If not, dynamically update it like the _CRS method below.
58 Memory32Fixed(ReadWrite,0x0FED04000,0x01000,SMBB) // SMB BAR
61 // IO BAR. Check if the hard code meets the real configuration.
62 // If not, dynamically update it like the _CRS method below.
64 Memory32Fixed(ReadWrite,0x0FED0C000,0x04000,IOBR) // IO BAR
67 // ILB BAR. Check if the hard code meets the real configuration.
68 // If not, dynamically update it like the _CRS method below.
70 Memory32Fixed(ReadWrite,0x0FED08000,0x01000,ILBB) // ILB BAR
73 // RCRB BAR _BAS will be updated in _CRS below according to B0:D31:F0:Reg.F0h
75 Memory32Fixed(ReadWrite,0x0FED1C000,0x01000,RCRB) // RCRB BAR
78 // Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF)
80 Memory32Fixed (ReadOnly, 0x0FEE00000, 0x0100000, LIOH)
83 // MPHY BAR. Check if the hard code meets the real configuration.
84 // If not, dynamically update it like the _CRS method below.
86 Memory32Fixed(ReadWrite,0x0FEF00000,0x0100000,MPHB) // MPHY BAR
89 Method(_CRS,0,Serialized)